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-rw-r--r--arm64-tegra-fix-pcie.patch101
1 files changed, 0 insertions, 101 deletions
diff --git a/arm64-tegra-fix-pcie.patch b/arm64-tegra-fix-pcie.patch
deleted file mode 100644
index 3e93a913c..000000000
--- a/arm64-tegra-fix-pcie.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 5fc5158c547fc3a2b46cbc6f73b926d8b78cd6e2 Mon Sep 17 00:00:00 2001
-From: "Signed-off-by: Jon Hunter" <jonathanh@nvidia.com>
-Date: Fri, 14 Feb 2020 13:53:53 +0000
-Subject: [PATCH] ARM64: tegra: Fix Tegra194 PCIe compatible string
-
-If the kernel configuration option CONFIG_PCIE_DW_PLAT_HOST is enabled
-then this can cause the kernel to incorrectly probe the generic
-designware PCIe platform driver instead of the Tegra194 designware PCIe
-driver. This causes a boot failure on Tegra194 because the necessary
-configuration to access the hardware is not performed.
-
-The order in which the compatible strings are populated in Device-Tree
-is not relevant in this case, because the kernel will attempt to probe
-the device as soon as a driver is loaded and if the generic designware
-PCIe driver is loaded first, then this driver will be probed first.
-Therefore, to fix this problem, remove the "snps,dw-pcie" string from
-the compatible string as we never want this driver to be probe on
-Tegra194.
-
-Fixes: 2602c32f15e7 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT")
-
-Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
----
- .../devicetree/bindings/pci/nvidia,tegra194-pcie.txt | 2 +-
- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 12 ++++++------
- 2 files changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
-index b739f92da58e..1f90eb39870b 100644
---- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
-+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
-@@ -118,7 +118,7 @@ Tegra194:
- --------
-
- pcie@14180000 {
-- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
-+ compatible = "nvidia,tegra194-pcie";
- power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
- reg = <0x00 0x14180000 0x0 0x00020000 /* appl registers (128K) */
- 0x00 0x38000000 0x0 0x00040000 /* configuration space (256K) */
-diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
-index ccac43be12ac..4c58cb10fb9c 100644
---- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
-+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
-@@ -1208,7 +1208,7 @@ sor3: sor@15bc0000 {
- };
-
- pcie@14100000 {
-- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
-+ compatible = "nvidia,tegra194-pcie";
- power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>;
- reg = <0x00 0x14100000 0x0 0x00020000 /* appl registers (128K) */
- 0x00 0x30000000 0x0 0x00040000 /* configuration space (256K) */
-@@ -1253,7 +1253,7 @@ pcie@14100000 {
- };
-
- pcie@14120000 {
-- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
-+ compatible = "nvidia,tegra194-pcie";
- power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>;
- reg = <0x00 0x14120000 0x0 0x00020000 /* appl registers (128K) */
- 0x00 0x32000000 0x0 0x00040000 /* configuration space (256K) */
-@@ -1298,7 +1298,7 @@ pcie@14120000 {
- };
-
- pcie@14140000 {
-- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
-+ compatible = "nvidia,tegra194-pcie";
- power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>;
- reg = <0x00 0x14140000 0x0 0x00020000 /* appl registers (128K) */
- 0x00 0x34000000 0x0 0x00040000 /* configuration space (256K) */
-@@ -1343,7 +1343,7 @@ pcie@14140000 {
- };
-
- pcie@14160000 {
-- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
-+ compatible = "nvidia,tegra194-pcie";
- power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
- reg = <0x00 0x14160000 0x0 0x00020000 /* appl registers (128K) */
- 0x00 0x36000000 0x0 0x00040000 /* configuration space (256K) */
-@@ -1388,7 +1388,7 @@ pcie@14160000 {
- };
-
- pcie@14180000 {
-- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
-+ compatible = "nvidia,tegra194-pcie";
- power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
- reg = <0x00 0x14180000 0x0 0x00020000 /* appl registers (128K) */
- 0x00 0x38000000 0x0 0x00040000 /* configuration space (256K) */
-@@ -1433,7 +1433,7 @@ pcie@14180000 {
- };
-
- pcie@141a0000 {
-- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
-+ compatible = "nvidia,tegra194-pcie";
- power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
- reg = <0x00 0x141a0000 0x0 0x00020000 /* appl registers (128K) */
- 0x00 0x3a000000 0x0 0x00040000 /* configuration space (256K) */
---
-2.24.1
-