diff options
Diffstat (limited to 'AllWinner-net-emac.patch')
| -rw-r--r-- | AllWinner-net-emac.patch | 1460 |
1 files changed, 899 insertions, 561 deletions
diff --git a/AllWinner-net-emac.patch b/AllWinner-net-emac.patch index ebe9a3c94..0e0a319d0 100644 --- a/AllWinner-net-emac.patch +++ b/AllWinner-net-emac.patch @@ -1,21 +1,20 @@ -From patchwork Tue Mar 14 14:18:37 2017 +From patchwork Mon May 1 12:45:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, 01/20] net-next: stmmac: export - stmmac_set_mac_addr/stmmac_get_mac_addr +Subject: [v5, + 01/20] net: stmmac: export stmmac_set_mac_addr/stmmac_get_mac_addr From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623505 -Message-Id: <20170314141856.24560-2-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706455 +Message-Id: <20170501124520.3769-2-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:37 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:01 +0200 Thoses symbol will be needed for the dwmac-sun8i ethernet driver. For letting it to be build as module, they need to be exported. @@ -26,7 +25,7 @@ Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c -index e60bfca..0ab985c8 100644 +index 38f9430..67af0bd 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c @@ -248,6 +248,7 @@ void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6], @@ -43,39 +42,39 @@ index e60bfca..0ab985c8 100644 } - +EXPORT_SYMBOL_GPL(stmmac_get_mac_addr); -From patchwork Tue Mar 14 14:18:38 2017 + +From patchwork Mon May 1 12:45:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,02/20] net-next: stmmac: add optional setup function +Subject: [v5,02/20] net: stmmac: add optional setup function From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623509 -Message-Id: <20170314141856.24560-3-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706501 +Message-Id: <20170501124520.3769-3-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:38 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:02 +0200 -Instead of ading more ifthen logic for adding a new mac_device_info +Instead of adding more ifthen logic for adding a new mac_device_info setup function, it is easier to add a function pointer to the function needed. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 +++- - include/linux/stmmac.h | 3 +++ - 2 files changed, 6 insertions(+), 1 deletion(-) + include/linux/stmmac.h | 1 + + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index 4498a38..856ac57 100644 +index cd8c601..b82ab64 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -3101,7 +3101,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv) +@@ -3947,7 +3947,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv) struct mac_device_info *mac; /* Identify the MAC HW device */ @@ -87,50 +86,42 @@ index 4498a38..856ac57 100644 mac = dwmac1000_setup(priv->ioaddr, priv->plat->multicast_filter_bins, diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index fc273e9..8f09f18 100644 +index 3921cb9..8bb550b 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h -@@ -109,6 +109,8 @@ struct stmmac_axi { - bool axi_rb; - }; - -+struct stmmac_priv; -+ - struct plat_stmmacenet_data { - int bus_id; - int phy_addr; -@@ -136,6 +138,7 @@ struct plat_stmmacenet_data { +@@ -177,6 +177,7 @@ struct plat_stmmacenet_data { void (*fix_mac_speed)(void *priv, unsigned int speed); int (*init)(struct platform_device *pdev, void *priv); void (*exit)(struct platform_device *pdev, void *priv); -+ struct mac_device_info *(*setup)(struct stmmac_priv *priv); ++ struct mac_device_info *(*setup)(void *priv); void *bsp_priv; struct clk *stmmac_clk; struct clk *pclk; -From patchwork Tue Mar 14 14:18:39 2017 + +From patchwork Mon May 1 12:45:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 03/20] ARM: sun8i: dt: Add DT bindings documentation for Allwinner +Subject: [v5, + 03/20] dt-bindings: net: Add DT bindings documentation for Allwinner dwmac-sun8i From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623517 -Message-Id: <20170314141856.24560-4-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706457 +Message-Id: <20170501124520.3769-4-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:39 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:03 +0200 This patch adds documentation for Device-Tree bindings for the Allwinner dwmac-sun8i driver. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> +Acked-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/net/dwmac-sun8i.txt | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) @@ -138,7 +129,7 @@ Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt new file mode 100644 -index 0000000..f01ef17 +index 0000000..05cd067 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt @@ -0,0 +1,77 @@ @@ -166,13 +157,13 @@ index 0000000..f01ef17 +- syscon: A phandle to the syscon of the SoC with one of the following + compatible string: + - allwinner,sun8i-h3-system-controller -+ - allwinner,sun8i-a64-system-controller ++ - allwinner,sun50i-a64-system-controller + - allwinner,sun8i-a83t-system-controller + +Optional properties: -+- allwinner,tx-delay: TX clock delay chain value. Range value is 0-0x07. Default is 0) -+- allwinner,rx-delay: RX clock delay chain value. Range value is 0-0x1F. Default is 0) -+Both delay properties are in 0.1ns step. ++- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) ++- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) ++Both delay properties need to be a multiple of 100. + +Optional properties for "allwinner,sun8i-h3-emac": +- allwinner,leds-active-low: EPHY LEDs are active low @@ -219,25 +210,27 @@ index 0000000..f01ef17 + }; + }; +}; -From patchwork Tue Mar 14 14:18:40 2017 + +From patchwork Mon May 1 12:45:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 04/20] ARM: sun8i: dt: Add DT bindings documentation for Allwinner - syscon +Subject: [v5, 04/20] dt-bindings: syscon: Add DT bindings documentation for + Allwinner syscon From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623533 -Message-Id: <20170314141856.24560-5-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706469 +Message-Id: <20170501124520.3769-5-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:40 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:04 +0200 + +This patch adds documentation for Device-Tree bindings for the +syscon present in allwinner devices. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- @@ -247,7 +240,7 @@ Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> diff --git a/Documentation/devicetree/bindings/misc/allwinner,syscon.txt b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt new file mode 100644 -index 0000000..9f5f1f5 +index 0000000..cb57691 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt @@ -0,0 +1,19 @@ @@ -262,31 +255,31 @@ index 0000000..9f5f1f5 +- reg: address and length of the register for the device. +- compatible: should be "syscon" and one of the following string: + "allwinner,sun8i-h3-system-controller" -+ "allwinner,sun8i-a64-system-controller" ++ "allwinner,sun50i-a64-system-controller" + "allwinner,sun8i-a83t-system-controller" + +Example: -+syscon: syscon@01c00000 { -+ compatible = "syscon", "allwinner,sun8i-h3-system-controller"; ++syscon: syscon@1c00000 { ++ compatible = "allwinner,sun8i-h3-system-controller", "syscon"; + reg = <0x01c00000 0x1000>; +}; -From patchwork Tue Mar 14 14:18:41 2017 + +From patchwork Mon May 1 12:45:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,05/20] net-next: stmmac: Add dwmac-sun8i +Subject: [v5,05/20] net: stmmac: Add dwmac-sun8i From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623523 -Message-Id: <20170314141856.24560-6-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706473 +Message-Id: <20170501124520.3769-6-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:41 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:05 +0200 The dwmac-sun8i is a heavy hacked version of stmmac hardware by allwinner. @@ -297,11 +290,11 @@ Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + - drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 938 +++++++++++++++++++++ - drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 27 +- + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 973 +++++++++++++++++++++ + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 29 + .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 9 +- include/linux/stmmac.h | 1 + - 6 files changed, 984 insertions(+), 3 deletions(-) + 6 files changed, 1022 insertions(+), 2 deletions(-) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -340,10 +333,10 @@ index 700c603..fd4937a 100644 stmmac-platform-objs:= stmmac_platform.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c new file mode 100644 -index 0000000..52ab67c +index 0000000..66eb980 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -@@ -0,0 +1,938 @@ +@@ -0,0 +1,973 @@ +/* + * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer + * @@ -606,23 +599,24 @@ index 0000000..52ab67c + } +} + -+static void sun8i_dwmac_enable_dma_irq(void __iomem *ioaddr) ++static void sun8i_dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan) +{ + writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN); +} + -+static void sun8i_dwmac_disable_dma_irq(void __iomem *ioaddr) ++static void sun8i_dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan) +{ + writel(0, ioaddr + EMAC_INT_EN); +} + -+static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_TX_CTL0); -+ v |= EMAC_TX_TRANSMITTER_EN; -+ writel(v, ioaddr + EMAC_TX_CTL0); ++ v = readl(ioaddr + EMAC_TX_CTL1); ++ v |= EMAC_TX_DMA_START; ++ v |= EMAC_TX_DMA_EN; ++ writel(v, ioaddr + EMAC_TX_CTL1); +} + +static void sun8i_dwmac_enable_dma_transmission(void __iomem *ioaddr) @@ -632,47 +626,39 @@ index 0000000..52ab67c + v = readl(ioaddr + EMAC_TX_CTL1); + v |= EMAC_TX_DMA_START; + v |= EMAC_TX_DMA_EN; -+ writel_relaxed(v, ioaddr + EMAC_TX_CTL1); ++ writel(v, ioaddr + EMAC_TX_CTL1); +} + -+static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_TX_CTL0); -+ v &= ~EMAC_TX_TRANSMITTER_EN; -+ writel(v, ioaddr + EMAC_TX_CTL0); ++ v = readl(ioaddr + EMAC_TX_CTL1); ++ v &= ~EMAC_TX_DMA_EN; ++ writel(v, ioaddr + EMAC_TX_CTL1); +} + -+static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ v |= EMAC_RX_RECEIVER_EN; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ + v = readl(ioaddr + EMAC_RX_CTL1); + v |= EMAC_RX_DMA_START; + v |= EMAC_RX_DMA_EN; + writel(v, ioaddr + EMAC_RX_CTL1); +} + -+static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ v &= ~EMAC_RX_RECEIVER_EN; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ + v = readl(ioaddr + EMAC_RX_CTL1); + v &= ~EMAC_RX_DMA_EN; + writel(v, ioaddr + EMAC_RX_CTL1); +} + +static int sun8i_dwmac_dma_interrupt(void __iomem *ioaddr, -+ struct stmmac_extra_stats *x) ++ struct stmmac_extra_stats *x, u32 chan) +{ + u32 v; + int ret = 0; @@ -825,6 +811,27 @@ index 0000000..52ab67c + writel(v, ioaddr + EMAC_BASIC_CTL1); +} + ++static void sun8i_dwmac_set_mac(void __iomem *ioaddr, bool enable) ++{ ++ u32 t, r; ++ ++ t = readl(ioaddr + EMAC_TX_CTL0); ++ r = readl(ioaddr + EMAC_RX_CTL0); ++ if (enable) { ++ t |= EMAC_TX_TRANSMITTER_EN; ++ r |= EMAC_RX_RECEIVER_EN; ++ } else { ++ t &= ~EMAC_TX_TRANSMITTER_EN; ++ r &= ~EMAC_RX_RECEIVER_EN; ++ } ++ writel(t, ioaddr + EMAC_TX_CTL0); ++ writel(r, ioaddr + EMAC_RX_CTL0); ++} ++ ++/* Set MAC address at slot reg_n ++ * All slot > 0 need to be enabled with MAC_ADDR_TYPE_DST ++ * If addr is NULL, clear the slot ++ */ +static void sun8i_dwmac_set_umac_addr(struct mac_device_info *hw, + unsigned char *addr, + unsigned int reg_n) @@ -832,6 +839,11 @@ index 0000000..52ab67c + void __iomem *ioaddr = hw->pcsr; + u32 v; + ++ if (!addr) { ++ writel(0, ioaddr + EMAC_MACADDR_HI(reg_n)); ++ return; ++ } ++ + stmmac_set_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), + EMAC_MACADDR_LO(reg_n)); + if (reg_n > 0) { @@ -869,39 +881,44 @@ index 0000000..52ab67c +{ + void __iomem *ioaddr = hw->pcsr; + u32 v; -+ int i = 0; ++ int i = 1; + struct netdev_hw_addr *ha; ++ int macaddrs = netdev_uc_count(dev) + netdev_mc_count(dev) + 1; + -+ v = readl(ioaddr + EMAC_RX_FRM_FLT); -+ -+ v |= EMAC_FRM_FLT_CTL; ++ v = EMAC_FRM_FLT_CTL; + + if (dev->flags & IFF_PROMISC) { + v = EMAC_FRM_FLT_RXALL; + } else if (dev->flags & IFF_ALLMULTI) { -+ v = EMAC_FRM_FLT_MULTICAST; -+ } else if (!netdev_mc_empty(dev)) { -+ netdev_for_each_mc_addr(ha, dev) { -+ i++; -+ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ v |= EMAC_FRM_FLT_MULTICAST; ++ } else if (macaddrs <= hw->unicast_filter_entries) { ++ if (!netdev_mc_empty(dev)) { ++ netdev_for_each_mc_addr(ha, dev) { ++ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ i++; ++ } + } -+ } -+ -+ if (netdev_uc_count(dev) + i > hw->unicast_filter_entries) { ++ if (!netdev_uc_empty(dev)) { ++ netdev_for_each_uc_addr(ha, dev) { ++ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ i++; ++ } ++ } ++ } else { + netdev_info(dev, "Too many address, switching to promiscuous\n"); + v = EMAC_FRM_FLT_RXALL; -+ } else { -+ netdev_for_each_uc_addr(ha, dev) { -+ i++; -+ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); -+ } + } ++ ++ /* Disable unused address filter slots */ ++ while (i < hw->unicast_filter_entries) ++ sun8i_dwmac_set_umac_addr(hw, NULL, i++); ++ + writel(v, ioaddr + EMAC_RX_FRM_FLT); +} + +static void sun8i_dwmac_flow_ctrl(struct mac_device_info *hw, -+ unsigned int duplex, -+ unsigned int fc, unsigned int pause_time) ++ unsigned int duplex, unsigned int fc, ++ unsigned int pause_time, u32 tx_cnt) +{ + void __iomem *ioaddr = hw->pcsr; + u32 v; @@ -981,7 +998,12 @@ index 0000000..52ab67c + } + } + -+ if (!of_property_read_u32(node, "allwinner,tx-delay", &val)) { ++ if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) { ++ if (val % 100) { ++ dev_err(priv->device, "tx-delay must be a multiple of 100\n"); ++ return -EINVAL; ++ } ++ val /= 100; + dev_dbg(priv->device, "set tx-delay to %x\n", val); + if (val <= SYSCON_ETXDC_MASK) { + reg &= ~(SYSCON_ETXDC_MASK << SYSCON_ETXDC_SHIFT); @@ -993,7 +1015,12 @@ index 0000000..52ab67c + } + } + -+ if (!of_property_read_u32(node, "allwinner,rx-delay", &val)) { ++ if (!of_property_read_u32(node, "allwinner,rx-delay-ps", &val)) { ++ if (val % 100) { ++ dev_err(priv->device, "rx-delay must be a multiple of 100\n"); ++ return -EINVAL; ++ } ++ val /= 100; + dev_dbg(priv->device, "set rx-delay to %x\n", val); + if (val <= SYSCON_ERXDC_MASK) { + reg &= ~(SYSCON_ERXDC_MASK << SYSCON_ERXDC_SHIFT); @@ -1043,21 +1070,20 @@ index 0000000..52ab67c + struct sunxi_priv_data *gmac = priv->plat->bsp_priv; + int ret; + -+ if (gmac->ephy_clk) { -+ ret = clk_prepare_enable(gmac->ephy_clk); -+ if (ret) { -+ dev_err(priv->device, "Cannot enable ephy\n"); -+ return ret; -+ } ++ if (!gmac->use_internal_phy) ++ return 0; ++ ++ ret = clk_prepare_enable(gmac->ephy_clk); ++ if (ret) { ++ dev_err(priv->device, "Cannot enable ephy\n"); ++ return ret; + } + -+ if (gmac->rst_ephy) { -+ ret = reset_control_deassert(gmac->rst_ephy); -+ if (ret) { -+ dev_err(priv->device, "Cannot deassert ephy\n"); -+ clk_disable_unprepare(gmac->ephy_clk); -+ return ret; -+ } ++ ret = reset_control_deassert(gmac->rst_ephy); ++ if (ret) { ++ dev_err(priv->device, "Cannot deassert ephy\n"); ++ clk_disable_unprepare(gmac->ephy_clk); ++ return ret; + } + + return 0; @@ -1065,10 +1091,11 @@ index 0000000..52ab67c + +static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) +{ -+ if (gmac->ephy_clk) -+ clk_disable_unprepare(gmac->ephy_clk); -+ if (gmac->rst_ephy) -+ reset_control_assert(gmac->rst_ephy); ++ if (!gmac->use_internal_phy) ++ return 0; ++ ++ clk_disable_unprepare(gmac->ephy_clk); ++ reset_control_assert(gmac->rst_ephy); + return 0; +} + @@ -1116,6 +1143,7 @@ index 0000000..52ab67c + +static const struct stmmac_ops sun8i_dwmac_ops = { + .core_init = sun8i_dwmac_core_init, ++ .set_mac = sun8i_dwmac_set_mac, + .dump_regs = sun8i_dwmac_dump_mac_regs, + .rx_ipc = sun8i_dwmac_rx_ipc_enable, + .set_filter = sun8i_dwmac_set_filter, @@ -1124,9 +1152,10 @@ index 0000000..52ab67c + .get_umac_addr = sun8i_dwmac_get_umac_addr, +}; + -+static struct mac_device_info *sun8i_dwmac_setup(struct stmmac_priv *priv) ++static struct mac_device_info *sun8i_dwmac_setup(void *ppriv) +{ + struct mac_device_info *mac; ++ struct stmmac_priv *priv = ppriv; + int ret; + + mac = devm_kzalloc(priv->device, sizeof(*mac), GFP_KERNEL); @@ -1182,13 +1211,13 @@ index 0000000..52ab67c + + gmac->variant = of_device_get_match_data(&pdev->dev); + if (!gmac->variant) { -+ dev_err(&pdev->dev, "Missing sun8i-emac variant\n"); ++ dev_err(&pdev->dev, "Missing dwmac-sun8i variant\n"); + return -EINVAL; + } + + gmac->tx_clk = devm_clk_get(dev, "stmmaceth"); + if (IS_ERR(gmac->tx_clk)) { -+ dev_err(dev, "could not get tx clock\n"); ++ dev_err(dev, "Could not get TX clock\n"); + return PTR_ERR(gmac->tx_clk); + } + @@ -1197,7 +1226,7 @@ index 0000000..52ab67c + if (IS_ERR(gmac->regulator)) { + if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER) + return -EPROBE_DEFER; -+ dev_info(dev, "no regulator found\n"); ++ dev_info(dev, "No regulator found\n"); + gmac->regulator = NULL; + } + @@ -1205,7 +1234,7 @@ index 0000000..52ab67c + "syscon"); + if (IS_ERR(gmac->regmap)) { + ret = PTR_ERR(gmac->regmap); -+ dev_err(&pdev->dev, "unable to map SYSCON:%d\n", ret); ++ dev_err(&pdev->dev, "Unable to map syscon: %d\n", ret); + return ret; + } + @@ -1216,8 +1245,7 @@ index 0000000..52ab67c + gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0); + if (IS_ERR(gmac->ephy_clk)) { + ret = PTR_ERR(gmac->ephy_clk); -+ dev_err(&pdev->dev, "Cannot get EPHY clock err=%d\n", -+ ret); ++ dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret); + return -EINVAL; + } + @@ -1272,7 +1300,7 @@ index 0000000..52ab67c + .probe = sun8i_dwmac_probe, + .remove = stmmac_pltfr_remove, + .driver = { -+ .name = "sun8i-dwmac", ++ .name = "dwmac-sun8i", + .pm = &stmmac_pltfr_pm_ops, + .of_match_table = sun8i_dwmac_match, + }, @@ -1283,10 +1311,10 @@ index 0000000..52ab67c +MODULE_DESCRIPTION("Allwinner sun8i DWMAC specific glue layer"); +MODULE_LICENSE("GPL"); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index 856ac57..05e8018 100644 +index b82ab64..39777a7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -177,6 +177,17 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) +@@ -235,6 +235,17 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M)) priv->clk_csr = STMMAC_CSR_250_300M; } @@ -1304,18 +1332,22 @@ index 856ac57..05e8018 100644 } static void print_pkt(unsigned char *buf, int len) -@@ -697,6 +708,10 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -784,6 +795,14 @@ static void stmmac_adjust_link(struct net_device *dev) if (phydev->link) { u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG); -+ /* disable loopback */ -+ if (priv->plat->has_sun8i) -+ ctrl &= ~BIT(1); ++ /* dwmac-sun8i handle loopback in MAC_CTRL_REG */ ++ if (priv->plat->has_sun8i) { ++ if (dev->features & NETIF_F_LOOPBACK) ++ ctrl |= BIT(1); ++ else ++ ctrl &= ~BIT(1); ++ } + /* Now we make sure that we can be in full duplex mode. * If not, we operate in half-duplex mode. */ if (phydev->duplex != priv->oldduplex) { -@@ -714,6 +729,8 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -800,6 +819,8 @@ static void stmmac_adjust_link(struct net_device *dev) if (phydev->speed != priv->speed) { new_state = 1; @@ -1324,7 +1356,7 @@ index 856ac57..05e8018 100644 switch (phydev->speed) { case 1000: if (priv->plat->has_gmac || -@@ -725,6 +742,8 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -811,6 +832,8 @@ static void stmmac_adjust_link(struct net_device *dev) priv->plat->has_gmac4) { ctrl |= priv->hw->link.port; ctrl |= priv->hw->link.speed; @@ -1333,7 +1365,7 @@ index 856ac57..05e8018 100644 } else { ctrl &= ~priv->hw->link.port; } -@@ -734,6 +753,8 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -820,6 +843,8 @@ static void stmmac_adjust_link(struct net_device *dev) priv->plat->has_gmac4) { ctrl |= priv->hw->link.port; ctrl &= ~(priv->hw->link.speed); @@ -1342,16 +1374,7 @@ index 856ac57..05e8018 100644 } else { ctrl &= ~priv->hw->link.port; } -@@ -1702,7 +1723,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp) - /* Enable the MAC Rx/Tx */ - if (priv->synopsys_id >= DWMAC_CORE_4_00) - stmmac_dwmac4_set_mac(priv->ioaddr, true); -- else -+ else if (!priv->plat->has_sun8i) - stmmac_set_mac(priv->ioaddr, true); - - /* Set the HW DMA mode and the COE */ -@@ -3123,6 +3144,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv) +@@ -3969,6 +3994,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv) priv->hw = mac; @@ -1363,10 +1386,10 @@ index 856ac57..05e8018 100644 if (priv->synopsys_id >= DWMAC_CORE_4_00) { priv->hw->mode = &dwmac4_ring_mode_ops; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -index 0ba1caf..3c21862 100644 +index 7fc3a1e..3840529 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -@@ -160,6 +160,12 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, +@@ -309,6 +309,12 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, struct device_node *np, struct device *dev) { bool mdio = true; @@ -1379,7 +1402,7 @@ index 0ba1caf..3c21862 100644 /* If phy-handle property is passed from DT, use it as the PHY */ plat->phy_node = of_parse_phandle(np, "phy-handle", 0); -@@ -176,8 +182,7 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, +@@ -325,8 +331,7 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, mdio = false; } @@ -1390,10 +1413,10 @@ index 0ba1caf..3c21862 100644 } else { /** diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index 8f09f18..100386c 100644 +index 8bb550b..108739f 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h -@@ -147,6 +147,7 @@ struct plat_stmmacenet_data { +@@ -186,6 +186,7 @@ struct plat_stmmacenet_data { struct reset_control *stmmac_rst; struct stmmac_axi *axi; int has_gmac4; @@ -1401,24 +1424,25 @@ index 8f09f18..100386c 100644 bool tso_en; int mac_port_sel_speed; bool en_tx_lpi_clockgating; -From patchwork Tue Mar 14 14:18:42 2017 + +From patchwork Mon May 1 12:45:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, 06/20] ARM: dts: sunxi-h3-h5: Add dt node for the syscon control +Subject: [v5, + 06/20] arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623549 -Message-Id: <20170314141856.24560-7-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706459 +Message-Id: <20170501124520.3769-7-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:42 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:06 +0200 This patch add the dt node for the syscon register present on the Allwinner H3/H5 @@ -1432,39 +1456,39 @@ Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 2494ea0..07e4f36 100644 +index 1aeeacb..d9691fc 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -102,6 +102,12 @@ +@@ -83,6 +83,12 @@ #size-cells = <1>; ranges; -+ syscon: syscon@01c00000 { -+ compatible = "syscon", -+ "allwinner,sun8i-h3-system-controller"; ++ syscon: syscon@1c00000 { ++ compatible = "allwinner,sun8i-h3-system-controller", ++ "syscon"; + reg = <0x01c00000 0x1000>; + }; + dma: dma-controller@01c02000 { compatible = "allwinner,sun8i-h3-dma"; reg = <0x01c02000 0x1000>; -From patchwork Tue Mar 14 14:18:43 2017 + +From patchwork Mon May 1 12:45:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,07/20] ARM: dts: sunxi-h3-h5: add dwmac-sun8i ethernet driver +Subject: [v5,07/20] arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623561 -Message-Id: <20170314141856.24560-8-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706465 +Message-Id: <20170501124520.3769-8-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:43 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:07 +0200 The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed. @@ -1474,21 +1498,21 @@ SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 33 +++++++++++++++++++++++++++++++++ - 1 file changed, 33 insertions(+) + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 34 ++++++++++++++++++++++++++++++++++ + 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 07e4f36..c35af5e 100644 +index d9691fc..45a9a30 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -272,6 +272,14 @@ +@@ -285,6 +285,14 @@ interrupt-controller; #interrupt-cells = <3>; -+ emac_rgmii_pins: emac0@0 { ++ emac_rgmii_pins: emac0 { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", -+ "PD5", "PD7", "PD8", "PD9", "PD10", -+ "PD12", "PD13", "PD15", "PD16", "PD17"; ++ "PD5", "PD7", "PD8", "PD9", "PD10", ++ "PD12", "PD13", "PD15", "PD16", "PD17"; + function = "emac"; + drive-strength = <40>; + }; @@ -1496,7 +1520,7 @@ index 07e4f36..c35af5e 100644 i2c0_pins: i2c0 { pins = "PA11", "PA12"; function = "i2c0"; -@@ -368,6 +376,31 @@ +@@ -381,6 +389,32 @@ clocks = <&osc24M>; }; @@ -1518,9 +1542,10 @@ index 07e4f36..c35af5e 100644 + #address-cells = <1>; + #size-cells = <0>; + int_mii_phy: ethernet-phy@1 { -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; + }; + }; + }; @@ -1528,107 +1553,23 @@ index 07e4f36..c35af5e 100644 spi0: spi@01c68000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c68000 0x1000>; -From patchwork Tue Mar 14 14:18:44 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,08/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Banana Pi M2+ -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623539 -Message-Id: <20170314141856.24560-9-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, LABBE Corentin <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:44 +0100 - -From: LABBE Corentin <clabbe.montjoie@gmail.com> - -The dwmac-sun8i hardware is present on the Banana Pi M2+ -It uses an external PHY rtl8211e via RGMII. -This patch create the needed regulator, emac and phy nodes. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 37 +++++++++++++++++++++++++ - 1 file changed, 37 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -index 52acbe1..30b0a41 100644 ---- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -@@ -90,6 +90,18 @@ - pinctrl-0 = <&wifi_en_bpi_m2p>; - reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac_power_pin_orangepi>; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; - }; - - &ehci1 { -@@ -186,3 +198,28 @@ - /* USB VBUS is on as long as VCC-IO is on */ - status = "okay"; - }; -+ -+&pio { -+ gmac_power_pin_orangepi: gmac_power_pin@0 { -+ pins = "PD6"; -+ function = "gpio_out"; -+ drive-strength = <10>; -+ }; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <0>; -+ }; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -From patchwork Tue Mar 14 14:18:45 2017 +From patchwork Mon May 1 12:45:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,09/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange PI PC +Subject: [v5,08/20] arm: sun8i: orangepi-pc: Enable dwmac-sun8i From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623555 -Message-Id: <20170314141856.24560-10-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706463 +Message-Id: <20170501124520.3769-9-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, LABBE Corentin <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:45 +0100 - -From: LABBE Corentin <clabbe.montjoie@gmail.com> + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:08 +0200 The dwmac-sun8i hardware is present on the Orange PI PC. It uses the internal PHY. @@ -1641,96 +1582,102 @@ Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -index f148111..746c25a 100644 +index f148111..52e6575 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -@@ -53,6 +53,7 @@ +@@ -52,6 +52,7 @@ + compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3"; aliases { - serial0 = &uart0; + ethernet0 = &emac; + serial0 = &uart0; }; - chosen { -@@ -184,3 +185,10 @@ - /* USB VBUS is always on */ +@@ -109,6 +110,13 @@ status = "okay"; }; -+ + +&emac { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; -From patchwork Tue Mar 14 14:18:46 2017 ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + +From patchwork Mon May 1 12:45:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,10/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange Pi 2 +Subject: [v5,09/20] arm: sun8i: orangepi-zero: Enable dwmac-sun8i From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623557 -Message-Id: <20170314141856.24560-11-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706461 +Message-Id: <20170501124520.3769-10-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:46 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:09 +0200 -The dwmac-sun8i hardware is present on the Orange PI 2. +The dwmac-sun8i hardware is present on the Orange PI Zero. It uses the internal PHY. This patch create the needed emac node. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- - arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ + arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 8 ++++++++ 1 file changed, 8 insertions(+) -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -index 5b6d145..3f54b12 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -@@ -55,6 +55,7 @@ +diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts +index 9e8b082..dd3525a 100644 +--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts ++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts +@@ -57,6 +57,7 @@ + aliases { serial0 = &uart0; /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ - ethernet1 = &rtl8189; + ethernet0 = &emac; + ethernet1 = &xr819; }; - chosen { -@@ -203,3 +204,10 @@ - usb1_vbus-supply = <®_usb1_vbus>; +@@ -103,6 +104,13 @@ status = "okay"; }; -+ + +&emac { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; -From patchwork Tue Mar 14 14:18:47 2017 ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>; + +From patchwork Mon May 1 12:45:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,11/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange PI One +Subject: [v5,10/20] arm: sun8i: orangepi-one: Enable dwmac-sun8i From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623541 -Message-Id: <20170314141856.24560-12-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706471 +Message-Id: <20170501124520.3769-11-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:47 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:10 +0200 The dwmac-sun8i hardware is present on the Orange PI One. It uses the internal PHY. @@ -1743,18 +1690,18 @@ Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -index ea8fd13..1f98ddc 100644 +index 5fea430..6880268 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -@@ -53,6 +53,7 @@ +@@ -52,6 +52,7 @@ + compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3"; aliases { - serial0 = &uart0; + ethernet0 = &emac; + serial0 = &uart0; }; - chosen { -@@ -93,6 +94,13 @@ +@@ -97,6 +98,13 @@ status = "okay"; }; @@ -1768,108 +1715,79 @@ index ea8fd13..1f98ddc 100644 &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; -From patchwork Tue Mar 14 14:18:48 2017 + +From patchwork Mon May 1 12:45:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,12/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange Pi plus +Subject: [v5,11/20] arm: sun8i: orangepi-2: Enable dwmac-sun8i From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623569 -Message-Id: <20170314141856.24560-13-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706467 +Message-Id: <20170501124520.3769-12-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:48 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:11 +0200 -The dwmac-sun8i hardware is present on the Orange PI plus. -It uses an external PHY rtl8211e via RGMII. +The dwmac-sun8i hardware is present on the Orange PI 2. +It uses the internal PHY. -This patch create the needed regulator, emac and phy nodes. +This patch create the needed emac node. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- - arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 35 ++++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ + 1 file changed, 8 insertions(+) -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -index 8c40ab7..4e075a2 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -@@ -58,6 +58,18 @@ - enable-active-high; - gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +index 5b6d145..cedd326 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +@@ -54,6 +54,7 @@ + aliases { + serial0 = &uart0; + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ++ ethernet0 = &emac; + ethernet1 = &rtl8189; }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac_power_pin_orangepi>; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; - }; - &ehci3 { -@@ -86,8 +98,31 @@ - pins = "PG11"; - function = "gpio_out"; - }; -+ -+ gmac_power_pin_orangepi: gmac_power_pin@0 { -+ pins = "PD6"; -+ function = "gpio_out"; -+ drive-strength = <10>; -+ }; +@@ -108,6 +109,13 @@ + status = "okay"; }; - &usbphy { - usb3_vbus-supply = <®_usb3_vbus>; - }; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <0>; -+ }; -+}; -+ +&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; -From patchwork Tue Mar 14 14:18:49 2017 ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + +From patchwork Mon May 1 12:45:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 13/20] ARM: dts: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to - active high +Subject: [v5, + 12/20] arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active + high From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623593 -Message-Id: <20170314141856.24560-14-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706481 +Message-Id: <20170501124520.3769-13-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:49 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:12 +0200 On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet port were changed from active low to active high. @@ -1881,36 +1799,39 @@ Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -index 8b93f5c..0380769 100644 +index 8b93f5c..a10281b 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -@@ -86,3 +86,8 @@ - /* eMMC is missing pull-ups */ - bias-pull-up; +@@ -53,6 +53,11 @@ + }; }; -+ + +&emac { + /* LEDs changed to active high on the plus */ + /delete-property/ allwinner,leds-active-low; +}; -From patchwork Tue Mar 14 14:18:50 2017 ++ + &mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + +From patchwork Mon May 1 12:45:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, 14/20] ARM64: dts: sun50i-a64: Add dt node for the syscon control - module +Subject: [v5, 13/20] arm64: allwinner: sun50i-a64: Add dt node for the syscon + control module From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623591 -Message-Id: <20170314141856.24560-15-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706477 +Message-Id: <20170501124520.3769-14-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:50 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:13 +0200 This patch add the dt node for the syscon register present on the Allwinner A64. @@ -1924,39 +1845,40 @@ Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 1c64ea2..3b09af2 100644 +index c7f669f..d7341ba 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -121,6 +121,12 @@ +@@ -129,6 +129,12 @@ #size-cells = <1>; ranges; -+ syscon: syscon@01c00000 { -+ compatible = "syscon", -+ "allwinner,sun8i-h3-system-controller"; ++ syscon: syscon@1c00000 { ++ compatible = "allwinner,sun50i-a64-system-controller", ++ "syscon"; + reg = <0x01c00000 0x1000>; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun50i-a64-mmc"; reg = <0x01c0f000 0x1000>; -From patchwork Tue Mar 14 14:18:51 2017 + +From patchwork Mon May 1 12:45:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,15/20] ARM64: dts: sun50i-a64: add dwmac-sun8i Ethernet driver +Subject: [v5, + 14/20] arm64: allwinner: sun50i-a64: add dwmac-sun8i Ethernet driver From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623621 -Message-Id: <20170314141856.24560-16-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706485 +Message-Id: <20170501124520.3769-15-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:51 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:14 +0200 The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit connections. It is very similar to the device found in the Allwinner @@ -1967,30 +1889,28 @@ it disabled at this level. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++++++++++++++++++++++++++ - 1 file changed, 37 insertions(+) + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 35 +++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 3b09af2..57d69e5 100644 +index d7341ba..18b3642 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -277,6 +277,23 @@ +@@ -287,6 +287,21 @@ bias-pull-up; }; + rmii_pins: rmii_pins { -+ pins = "PD10", "PD11", "PD13", "PD14", -+ "PD17", "PD18", "PD19", "PD20", -+ "PD22", "PD23"; ++ pins = "PD10", "PD11", "PD13", "PD14", "PD17", ++ "PD18", "PD19", "PD20", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; + }; + + rgmii_pins: rgmii_pins { -+ pins = "PD8", "PD9", "PD10", "PD11", -+ "PD12", "PD13", "PD15", -+ "PD16", "PD17", "PD18", "PD19", -+ "PD20", "PD21", "PD22", "PD23"; ++ pins = "PD8", "PD9", "PD10", "PD11", "PD12", ++ "PD13", "PD15", "PD16", "PD17", "PD18", ++ "PD19", "PD20", "PD21", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; + }; @@ -1998,7 +1918,7 @@ index 3b09af2..57d69e5 100644 uart0_pins_a: uart0@0 { pins = "PB8", "PB9"; function = "uart0"; -@@ -381,6 +398,26 @@ +@@ -391,6 +406,26 @@ #size-cells = <0>; }; @@ -2025,47 +1945,40 @@ index 3b09af2..57d69e5 100644 gic: interrupt-controller@1c81000 { compatible = "arm,gic-400"; reg = <0x01c81000 0x1000>, -From patchwork Tue Mar 14 14:18:52 2017 + +From patchwork Mon May 1 12:45:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,16/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on pine64 +Subject: [v5,15/20] arm64: allwinner: pine64: Enable dwmac-sun8i From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623607 -Message-Id: <20170314141856.24560-17-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706489 +Message-Id: <20170501124520.3769-16-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:52 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:15 +0200 The dwmac-sun8i hardware is present on the pine64 It uses an external PHY via RMII. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -index c680ed3..b53994d 100644 +index c680ed3..3b491c0 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -109,3 +109,18 @@ - &usbphy { +@@ -70,6 +70,15 @@ status = "okay"; }; -+ -+&mdio { -+ ext_rmii_phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rmii_pins>; @@ -2074,37 +1987,55 @@ index c680ed3..b53994d 100644 + status = "okay"; + +}; -From patchwork Tue Mar 14 14:18:53 2017 ++ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +@@ -80,6 +89,13 @@ + bias-pull-up; + }; + ++&mdio { ++ ext_rmii_phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + +From patchwork Mon May 1 12:45:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,17/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on pine64 plus +Subject: [v5,16/20] arm64: allwinner: pine64-plus: Enable dwmac-sun8i From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623597 -Message-Id: <20170314141856.24560-18-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706511 +Message-Id: <20170501124520.3769-17-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:53 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:16 +0200 The dwmac-sun8i hardware is present on the pine64 plus. It uses an external PHY rtl8211e via RGMII. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 16 +++++++++++++++- - 1 file changed, 15 insertions(+), 1 deletion(-) + .../arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -index 790d14d..8e06aed 100644 +index 790d14d..24f1aac 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -@@ -46,5 +46,19 @@ +@@ -46,5 +46,20 @@ model = "Pine64+"; compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; @@ -2112,68 +2043,475 @@ index 790d14d..8e06aed 100644 + /* TODO: Camera, touchscreen, etc. */ +}; + -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; }; -From patchwork Tue Mar 14 14:18:54 2017 + +From patchwork Mon May 1 12:45:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 18/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on the BananaPi M64 +Subject: [v5,17/20] arm64: allwinner: bananapi-m64: Enable dwmac-sun8i From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9623595 -Message-Id: <20170314141856.24560-19-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706509 +Message-Id: <20170501124520.3769-18-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:54 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:17 +0200 The dwmac-sun8i hardware is present on the BananaPi M64. It uses an external PHY rtl8211e via RGMII. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- - arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) + arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -index 6872135..347c262 100644 +index 6872135..0d1f026 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -@@ -77,6 +77,20 @@ +@@ -67,6 +67,14 @@ + }; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ status = "okay"; ++}; ++ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +@@ -77,6 +85,13 @@ bias-pull-up; }; +&mdio { + ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + +From patchwork Mon May 1 12:45:18 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v5,18/20] arm: sunxi: Enable dwmac-sun8i driver on sunxi_defconfig +From: Corentin LABBE <clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706507 +Message-Id: <20170501124520.3769-19-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:18 +0200 + +Enable the dwmac-sun8i driver in the sunxi default configuration + +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> +--- + arch/arm/configs/sunxi_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig +index 5cd5dd70..504e022 100644 +--- a/arch/arm/configs/sunxi_defconfig ++++ b/arch/arm/configs/sunxi_defconfig +@@ -40,6 +40,7 @@ CONFIG_ATA=y + CONFIG_AHCI_SUNXI=y + CONFIG_NETDEVICES=y + CONFIG_SUN4I_EMAC=y ++CONFIG_DWMAC_SUN8I=y + # CONFIG_NET_VENDOR_ARC is not set + # CONFIG_NET_CADENCE is not set + # CONFIG_NET_VENDOR_BROADCOM is not set + +From patchwork Mon May 1 12:45:19 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v5, + 19/20] arm: multi_v7: Enable dwmac-sun8i driver on multi_v7_defconfig +From: Corentin LABBE <clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706513 +Message-Id: <20170501124520.3769-20-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:19 +0200 + +Enable the dwmac-sun8i driver in the multi_v7 default configuration + +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> +--- + arch/arm/configs/multi_v7_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig +index 2685e03..6da6af8 100644 +--- a/arch/arm/configs/multi_v7_defconfig ++++ b/arch/arm/configs/multi_v7_defconfig +@@ -257,6 +257,7 @@ CONFIG_SMSC911X=y + CONFIG_STMMAC_ETH=y + CONFIG_STMMAC_PLATFORM=y + CONFIG_DWMAC_DWC_QOS_ETH=y ++CONFIG_DWMAC_SUN8I=y + CONFIG_TI_CPSW=y + CONFIG_XILINX_EMACLITE=y + CONFIG_AT803X_PHY=y + +From patchwork Mon May 1 12:45:20 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v5,20/20] arm64: defconfig: Enable dwmac-sun8i driver on defconfig +From: Corentin LABBE <clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706505 +Message-Id: <20170501124520.3769-21-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe <clabbe.montjoie@gmail.com> +Date: Mon, 1 May 2017 14:45:20 +0200 + +Enable the dwmac-sun8i ethernet driver as a module in the ARM64 defconfig. + +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> +--- + arch/arm64/configs/defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index ce07285..4575fbb 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -193,6 +193,7 @@ CONFIG_RAVB=y + CONFIG_SMC91X=y + CONFIG_SMSC911X=y + CONFIG_STMMAC_ETH=m ++CONFIG_DWMAC_SUN8I=m + CONFIG_MDIO_BUS_MUX_MMIOREG=y + CONFIG_MESON_GXL_PHY=m + CONFIG_MICREL_PHY=y +From patchwork Mon Jun 5 19:21:26 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [1/5] ARM: sun8i: orangepi-plus: Enable dwmac-sun8i +From: Corentin LABBE <clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9767313 +Message-Id: <20170605192130.25320-2-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, + maxime.ripard@free-electrons.com, wens@csie.org, + catalin.marinas@arm.com, will.deacon@arm.com +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe <clabbe.montjoie@gmail.com>, + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org +Date: Mon, 5 Jun 2017 21:21:26 +0200 + +The dwmac-sun8i hardware is present on the Orange PI plus. +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. + +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> +--- + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 32 ++++++++++++++++++++++++++++ + 1 file changed, 32 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +index 8c40ab7bfa72..331ed683ac62 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +@@ -47,6 +47,20 @@ + model = "Xunlong Orange Pi Plus / Plus 2"; + compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; + ++ aliases { ++ ethernet0 = &emac; ++ }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + reg_usb3_vbus: usb3-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; +@@ -64,6 +78,24 @@ + status = "okay"; + }; + +&emac { + pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; +From patchwork Mon Jun 5 19:21:27 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [2/5] ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i +From: Corentin LABBE <clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9767321 +Message-Id: <20170605192130.25320-3-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, + maxime.ripard@free-electrons.com, wens@csie.org, + catalin.marinas@arm.com, will.deacon@arm.com +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe <clabbe.montjoie@gmail.com>, + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org +Date: Mon, 5 Jun 2017 21:21:27 +0200 + +The dwmac-sun8i hardware is present on the Banana Pi M2+ +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. + +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> +--- + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 29 +++++++++++++++++++++++++ + 1 file changed, 29 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +index 883072b611fa..d756ff825116 100644 +--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +@@ -52,6 +52,7 @@ + compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + serial1 = &uart1; + }; +@@ -84,6 +85,16 @@ + }; + }; + ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; +@@ -104,12 +115,30 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; + phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; + }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; +From patchwork Mon Jun 5 19:21:28 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [3/5] ARM: sun50i: orangepi-pc2: Enable dwmac-sun8i +From: Corentin LABBE <clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9767347 +Message-Id: <20170605192130.25320-4-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, + maxime.ripard@free-electrons.com, wens@csie.org, + catalin.marinas@arm.com, will.deacon@arm.com +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe <clabbe.montjoie@gmail.com>, + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org +Date: Mon, 5 Jun 2017 21:21:28 +0200 + +The dwmac-sun8i hardware is present on the Orange PI PC2. +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> +--- + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 27 ++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +index dfecc17dcc92..a8296feee884 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +@@ -59,6 +59,7 @@ + }; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -91,6 +92,16 @@ + }; + }; + ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + reg_usb0_vbus: usb0-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb0-vbus"; +@@ -126,12 +137,28 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; + status = "okay"; +}; + + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; + }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; +From patchwork Wed May 31 07:18:44 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v6,13/21] arm: sun8i: nanopi-neo: Enable dwmac-sun8i +From: Corentin LABBE <clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9756089 +Message-Id: <20170531071852.12422-14-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe <clabbe.montjoie@gmail.com>, + linux-arm-kernel@lists.infradead.org +Date: Wed, 31 May 2017 09:18:44 +0200 + +The dwmac-sun8i hardware is present on the NanoPi Neo. +It uses the internal PHY. +This patch create the needed emac node. + +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> +--- + arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts +index 8d2cc6e9a03f..78f6c24952dd 100644 +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts +@@ -46,3 +46,10 @@ + model = "FriendlyARM NanoPi NEO"; + compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; + }; ++ ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; |