diff options
Diffstat (limited to 'ARM-OMAP4-Fix-crashes.patch')
| -rw-r--r-- | ARM-OMAP4-Fix-crashes.patch | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/ARM-OMAP4-Fix-crashes.patch b/ARM-OMAP4-Fix-crashes.patch new file mode 100644 index 000000000..5a4a257e1 --- /dev/null +++ b/ARM-OMAP4-Fix-crashes.patch @@ -0,0 +1,46 @@ +From patchwork Wed Oct 26 15:17:01 2016 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [3/5] ARM: OMAP4+: Fix bad fallthrough for cpuidle +From: Tony Lindgren <tony@atomide.com> +X-Patchwork-Id: 9397501 +Message-Id: <20161026151703.24730-4-tony@atomide.com> +To: linux-omap@vger.kernel.org +Cc: Nishanth Menon <nm@ti.com>, Dmitry Lifshitz <lifshitz@compulab.co.il>, + Dave Gerlach <d-gerlach@ti.com>, + Enric Balletbo Serra <eballetbo@gmail.com>, + "Dr . H . Nikolaus Schaller" <hns@goldelico.com>, + Pau Pajuel <ppajuel@gmail.com>, Grazvydas Ignotas <notasas@gmail.com>, + Benoit Cousson <bcousson@baylibre.com>, + Santosh Shilimkar <ssantosh@kernel.org>, + Javier Martinez Canillas <javier@dowhile0.org>, + Robert Nelson <robertcnelson@gmail.com>, + Marek Belisko <marek@goldelico.com>, linux-arm-kernel@lists.infradead.org +Date: Wed, 26 Oct 2016 08:17:01 -0700 + +We don't want to fall through to a bunch of errors for retention +if PM_OMAP4_CPU_OSWR_DISABLE is not configured for a SoC. + +Fixes: 6099dd37c669 ("ARM: OMAP5 / DRA7: Enable CPU RET on suspend") +Signed-off-by: Tony Lindgren <tony@atomide.com> +--- + arch/arm/mach-omap2/omap-mpuss-lowpower.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c +--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c ++++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c +@@ -244,10 +244,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) + save_state = 1; + break; + case PWRDM_POWER_RET: +- if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) { ++ if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) + save_state = 0; +- break; +- } ++ break; + default: + /* + * CPUx CSWR is invalid hardware state. Also CPUx OSWR |