diff options
| -rw-r--r-- | kernel.spec | 13 | ||||
| -rw-r--r-- | x86-Use-correct-byte-sized-register-constraint-in-__add.patch | 35 | ||||
| -rw-r--r-- | x86-Use-correct-byte-sized-register-constraint-in-__xchg_op.patch | 32 |
3 files changed, 79 insertions, 1 deletions
diff --git a/kernel.spec b/kernel.spec index c6fdf3227..894304ecd 100644 --- a/kernel.spec +++ b/kernel.spec @@ -62,7 +62,7 @@ Summary: The Linux kernel # For non-released -rc kernels, this will be appended after the rcX and # gitX tags, so a 3 here would become part of release "0.rcX.gitX.3" # -%global baserelease 3 +%global baserelease 4 %global fedora_build %{baserelease} # base_sublevel is the kernel version we're starting with and patching @@ -742,6 +742,10 @@ Patch21360: uvcvideo-Fix-race-induced-crash-in-uvc_video_clock_update.patch #rhbz 806676 807632 Patch21385: libata-disable-runtime-pm-for-hotpluggable-port.patch +#rhbz 809014 +Patch21390: x86-Use-correct-byte-sized-register-constraint-in-__xchg_op.patch +Patch21391: x86-Use-correct-byte-sized-register-constraint-in-__add.patch + Patch21400: unhandled-irqs-switch-to-polling.patch Patch22000: weird-root-dentry-name-debug.patch @@ -1444,6 +1448,10 @@ ApplyPatch uvcvideo-Fix-race-induced-crash-in-uvc_video_clock_update.patch #rhbz 806676 807632 ApplyPatch libata-disable-runtime-pm-for-hotpluggable-port.patch +#rhbz 809014 +ApplyPatch x86-Use-correct-byte-sized-register-constraint-in-__xchg_op.patch +ApplyPatch x86-Use-correct-byte-sized-register-constraint-in-__add.patch + # END OF PATCH APPLICATIONS %endif @@ -2299,6 +2307,9 @@ fi # ||----w | # || || %changelog +* Tue Apr 10 2012 Josh Boyer <jwboyer@redhat.com> +- Backport fixes for correct register constraints in cmpxchg.h (rhbz 809014) + * Mon Apr 09 2012 Justin M. Forbes <jforbes@redhat.com> - 3.4.0-0.rc2.git0.3 - Reenable debugging options. diff --git a/x86-Use-correct-byte-sized-register-constraint-in-__add.patch b/x86-Use-correct-byte-sized-register-constraint-in-__add.patch new file mode 100644 index 000000000..3ec765691 --- /dev/null +++ b/x86-Use-correct-byte-sized-register-constraint-in-__add.patch @@ -0,0 +1,35 @@ +From: H. Peter Anvin <hpa@zytor.com> +Date: Fri, 6 Apr 2012 16:30:57 +0000 (-0700) +Subject: x86: Use correct byte-sized register constraint in __add() +X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftip%2Ftip.git;a=commitdiff_plain;h=8c91c5325e107ec17e40a59a47c6517387d64eb7 + +x86: Use correct byte-sized register constraint in __add() + +Similar to: + + 2ca052a x86: Use correct byte-sized register constraint in __xchg_op() + +... the __add() macro also needs to use a "q" constraint in the +byte-sized case, lest we try to generate an illegal register. + +Link: http://lkml.kernel.org/r/4F7A3315.501@goop.org +Signed-off-by: H. Peter Anvin <hpa@zytor.com> +Cc: Jeremy Fitzhardinge <jeremy@goop.org> +Cc: Leigh Scott <leigh123linux@googlemail.com> +Cc: Thomas Reitmayr <treitmayr@devbase.at> +Cc: <stable@vger.kernel.org> v3.3 +--- + +diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h +index bc18d0e..99480e5 100644 +--- a/arch/x86/include/asm/cmpxchg.h ++++ b/arch/x86/include/asm/cmpxchg.h +@@ -173,7 +173,7 @@ extern void __add_wrong_size(void) + switch (sizeof(*(ptr))) { \ + case __X86_CASE_B: \ + asm volatile (lock "addb %b1, %0\n" \ +- : "+m" (*(ptr)) : "ri" (inc) \ ++ : "+m" (*(ptr)) : "qi" (inc) \ + : "memory", "cc"); \ + break; \ + case __X86_CASE_W: \ diff --git a/x86-Use-correct-byte-sized-register-constraint-in-__xchg_op.patch b/x86-Use-correct-byte-sized-register-constraint-in-__xchg_op.patch new file mode 100644 index 000000000..a33602f9f --- /dev/null +++ b/x86-Use-correct-byte-sized-register-constraint-in-__xchg_op.patch @@ -0,0 +1,32 @@ +From: Jeremy Fitzhardinge <jeremy@goop.org> +Date: Mon, 2 Apr 2012 23:15:33 +0000 (-0700) +Subject: x86: Use correct byte-sized register constraint in __xchg_op() +X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftip%2Ftip.git;a=commitdiff_plain;h=2ca052a3710fac208eee690faefdeb8bbd4586a1 + +x86: Use correct byte-sized register constraint in __xchg_op() + +x86-64 can access the low half of any register, but i386 can only do +it with a subset of registers. 'r' causes compilation failures on i386, +but 'q' expresses the constraint properly. + +Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org> +Link: http://lkml.kernel.org/r/4F7A3315.501@goop.org +Reported-by: Leigh Scott <leigh123linux@googlemail.com> +Tested-by: Thomas Reitmayr <treitmayr@devbase.at> +Signed-off-by: H. Peter Anvin <hpa@zytor.com> +Cc: <stable@vger.kernel.org> v3.3 +--- + +diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h +index b3b7332..bc18d0e 100644 +--- a/arch/x86/include/asm/cmpxchg.h ++++ b/arch/x86/include/asm/cmpxchg.h +@@ -43,7 +43,7 @@ extern void __add_wrong_size(void) + switch (sizeof(*(ptr))) { \ + case __X86_CASE_B: \ + asm volatile (lock #op "b %b0, %1\n" \ +- : "+r" (__ret), "+m" (*(ptr)) \ ++ : "+q" (__ret), "+m" (*(ptr)) \ + : : "memory", "cc"); \ + break; \ + case __X86_CASE_W: \ |