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-rw-r--r--0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch50
-rw-r--r--0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch227
-rw-r--r--0001-iio-Use-event-header-from-kernel-tree.patch64
-rw-r--r--0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch60
-rw-r--r--0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch214
-rw-r--r--0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch141
-rw-r--r--0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch67
-rw-r--r--0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch68
-rw-r--r--0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch352
-rw-r--r--0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch84
-rw-r--r--0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch244
-rw-r--r--0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch379
-rw-r--r--0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch91
-rw-r--r--0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch156
-rw-r--r--0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch91
-rw-r--r--0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch254
-rw-r--r--0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch302
-rw-r--r--0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch63
-rw-r--r--0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch105
-rw-r--r--ARM-Drop-fixed-200-Hz-timer-requirement-from-Samsung-platforms.patch88
-rw-r--r--ARM-OMAP4-Fix-crashes.patch46
-rw-r--r--ARM-tegra-fix-erroneous-address-in-dts.patch51
-rw-r--r--Add-EFI-signature-data-types.patch27
-rw-r--r--Add-an-EFI-signature-blob-parser-and-key-loader.patch14
-rw-r--r--Add-secure_modules-call.patch16
-rw-r--r--AllWinner-net-emac.patch2669
-rw-r--r--MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch32
-rw-r--r--MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch32
-rw-r--r--PCI-Lock-down-BAR-access-when-module-security-is-ena.patch16
-rw-r--r--Restrict-dev-mem-and-dev-kmem-when-module-loading-is.patch14
-rw-r--r--arm-i.MX6-Utilite-device-dtb.patch354
-rw-r--r--arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch100
-rw-r--r--arm64-mm-Fix-memmap-to-be-initialized-for-the-entire-section.patch93
-rw-r--r--arm64-pcie-quirks.patch977
-rw-r--r--audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch413
-rw-r--r--bcm2837-initial-support.patch154
-rw-r--r--bcm283x-upstream-fixes.patch194
-rw-r--r--bcm283x-vc4-fixes.patch43
-rw-r--r--config-arm-generic117
-rw-r--r--config-arm6492
-rw-r--r--config-armv750
-rw-r--r--config-armv7-generic153
-rw-r--r--config-armv7-lpae22
-rw-r--r--config-debug1
-rw-r--r--config-generic340
-rw-r--r--config-nodebug115
-rw-r--r--config-powerpc642
-rw-r--r--config-powerpc64-generic19
-rw-r--r--config-s390x11
-rw-r--r--config-x86-32-generic21
-rw-r--r--config-x86-generic67
-rw-r--r--config-x86_64-generic16
-rw-r--r--crash-driver.patch262
-rw-r--r--disable-CONFIG_EXPERT-for-ZONE_DMA.patch43
-rw-r--r--drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch70
-rw-r--r--drm-i915-Acquire-audio-powerwell-for-HD-Audio-regist.patch64
-rw-r--r--efi-Add-EFI_SECURE_BOOT-bit.patch12
-rw-r--r--efi-Add-SHIM-and-image-security-database-GUID-defini.patch31
-rw-r--r--filter-aarch64.sh2
-rw-r--r--filter-armv7hl.sh2
-rw-r--r--filter-i686.sh2
-rwxr-xr-xfilter-modules.sh2
-rw-r--r--filter-ppc64.sh2
-rw-r--r--filter-ppc64le.sh2
-rw-r--r--filter-ppc64p7.sh2
-rw-r--r--geekbox-v4-device-tree-support.patch15
-rw-r--r--hp-wmi-fix-wifi-cannot-be-hard-unblock.patch48
-rw-r--r--imx6sx-Add-UDOO-Neo-support.patch619
-rw-r--r--kbuild-AFTER_LINK.patch48
-rw-r--r--kernel.spec137
-rw-r--r--kvm-ppc-Book3S-HV-Pull-out-TM-state-save.patch506
-rw-r--r--kvm-ppc-Book3S-HV-Save-restore-TM-state.patch67
-rw-r--r--qcom-QDF2432-tmp-errata.patch59
-rwxr-xr-xremove-binary-diff.pl34
-rw-r--r--selinux-namespace-fix.patch57
-rw-r--r--sources4
76 files changed, 6054 insertions, 5407 deletions
diff --git a/0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch b/0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch
deleted file mode 100644
index fcafe4d29..000000000
--- a/0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 4196017cd0e50e434ee72ca706742804f75c8827 Mon Sep 17 00:00:00 2001
-From: Laura Abbott <labbott@fedoraproject.org>
-Date: Fri, 8 Jul 2016 11:15:43 -0700
-Subject: [PATCH] Work around for addition of metag def but not relocations
-
-Caused by commit in sync up from
-http://pkgs.fedoraproject.org/cgit/rpms/glibc.git/commit/?id=9a78be1808600ca5e66eab741542447a29cfbeb3
-
-Fixes build errors like:
-
-scripts/recordmcount.c: In function 'do_file':
-scripts/recordmcount.c:466:28: error: 'R_METAG_ADDR32' undeclared (first use in this function)
- case EM_METAG: reltype = R_METAG_ADDR32;
- ^~~~~~~~~~~~~~
-scripts/recordmcount.c:466:28: note: each undeclared identifier is reported only once for each function it appears in
-scripts/recordmcount.c:468:20: error: 'R_METAG_NONE' undeclared (first use in this function)
- rel_type_nop = R_METAG_NONE;
- ^~~~~~~~~~~~
-
-Signed-off-by: Laura Abbott <labbott@fedoraproject.org>
----
- scripts/recordmcount.c | 9 ++++++++-
- 1 file changed, 8 insertions(+), 1 deletion(-)
-
-diff --git a/scripts/recordmcount.c b/scripts/recordmcount.c
-index e1675927..42396a7 100644
---- a/scripts/recordmcount.c
-+++ b/scripts/recordmcount.c
-@@ -33,10 +33,17 @@
- #include <string.h>
- #include <unistd.h>
-
-+/*
-+ * glibc synced up and added the metag number but didn't add the relocations.
-+ * Work around this in a crude manner for now.
-+ */
- #ifndef EM_METAG
--/* Remove this when these make it to the standard system elf.h. */
- #define EM_METAG 174
-+#endif
-+#ifndef R_METAG_ADDR32
- #define R_METAG_ADDR32 2
-+#endif
-+#ifndef R_METAG_NONE
- #define R_METAG_NONE 3
- #endif
-
---
-2.9.0
-
diff --git a/0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch b/0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch
deleted file mode 100644
index f30e32dc4..000000000
--- a/0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch
+++ /dev/null
@@ -1,227 +0,0 @@
-From 0042e1e7a03a2fb5d6c464c03ce84d55b31add11 Mon Sep 17 00:00:00 2001
-From: Matt Roper <matthew.d.roper@intel.com>
-Date: Thu, 12 May 2016 07:05:55 -0700
-Subject: [PATCH 01/17] drm/i915: Reorganize WM structs/unions in CRTC state
-
-Reorganize the nested structures and unions we have for pipe watermark
-data in intel_crtc_state so that platform-specific data can be added in
-a more sensible manner (and save a bit of memory at the same time).
-
-The change basically changes the organization from:
-
- union {
- struct intel_pipe_wm ilk;
- struct intel_pipe_wm skl;
- } optimal;
-
- struct intel_pipe_wm intermediate /* ILK-only */
-
-to
-
- union {
- struct {
- struct intel_pipe_wm intermediate;
- struct intel_pipe_wm optimal;
- } ilk;
-
- struct {
- struct intel_pipe_wm optimal;
- } skl;
- }
-
-There should be no functional change here, but it will allow us to add
-more platform-specific fields going forward (and more easily extend to
-other platform types like VLV).
-
-While we're at it, let's move the entire watermark substructure out to
-its own structure definition to make the code slightly more readable.
-
-Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
-Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-2-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- drivers/gpu/drm/i915/intel_drv.h | 61 +++++++++++++++++++++---------------
- drivers/gpu/drm/i915/intel_pm.c | 18 +++++------
- 3 files changed, 45 insertions(+), 36 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d19b392..4633aec 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -12027,7 +12027,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
- }
- } else if (dev_priv->display.compute_intermediate_wm) {
- if (HAS_PCH_SPLIT(dev_priv) && INTEL_GEN(dev_priv) < 9)
-- pipe_config->wm.intermediate = pipe_config->wm.optimal.ilk;
-+ pipe_config->wm.ilk.intermediate = pipe_config->wm.ilk.optimal;
- }
-
- if (INTEL_INFO(dev)->gen >= 9) {
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 4a24b00..5a186bf 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -405,6 +405,40 @@ struct skl_pipe_wm {
- uint32_t linetime;
- };
-
-+struct intel_crtc_wm_state {
-+ union {
-+ struct {
-+ /*
-+ * Intermediate watermarks; these can be
-+ * programmed immediately since they satisfy
-+ * both the current configuration we're
-+ * switching away from and the new
-+ * configuration we're switching to.
-+ */
-+ struct intel_pipe_wm intermediate;
-+
-+ /*
-+ * Optimal watermarks, programmed post-vblank
-+ * when this state is committed.
-+ */
-+ struct intel_pipe_wm optimal;
-+ } ilk;
-+
-+ struct {
-+ /* gen9+ only needs 1-step wm programming */
-+ struct skl_pipe_wm optimal;
-+ } skl;
-+ };
-+
-+ /*
-+ * Platforms with two-step watermark programming will need to
-+ * update watermark programming post-vblank to switch from the
-+ * safe intermediate watermarks to the optimal final
-+ * watermarks.
-+ */
-+ bool need_postvbl_update;
-+};
-+
- struct intel_crtc_state {
- struct drm_crtc_state base;
-
-@@ -558,32 +592,7 @@ struct intel_crtc_state {
- /* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */
- bool disable_lp_wm;
-
-- struct {
-- /*
-- * Optimal watermarks, programmed post-vblank when this state
-- * is committed.
-- */
-- union {
-- struct intel_pipe_wm ilk;
-- struct skl_pipe_wm skl;
-- } optimal;
--
-- /*
-- * Intermediate watermarks; these can be programmed immediately
-- * since they satisfy both the current configuration we're
-- * switching away from and the new configuration we're switching
-- * to.
-- */
-- struct intel_pipe_wm intermediate;
--
-- /*
-- * Platforms with two-step watermark programming will need to
-- * update watermark programming post-vblank to switch from the
-- * safe intermediate watermarks to the optimal final
-- * watermarks.
-- */
-- bool need_postvbl_update;
-- } wm;
-+ struct intel_crtc_wm_state wm;
-
- /* Gamma mode programmed on the pipe */
- uint32_t gamma_mode;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index a7ef45d..4353fec 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2309,7 +2309,7 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
- int level, max_level = ilk_wm_max_level(dev), usable_level;
- struct ilk_wm_maximums max;
-
-- pipe_wm = &cstate->wm.optimal.ilk;
-+ pipe_wm = &cstate->wm.ilk.optimal;
-
- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
- struct intel_plane_state *ps;
-@@ -2391,7 +2391,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
- struct intel_crtc *intel_crtc,
- struct intel_crtc_state *newstate)
- {
-- struct intel_pipe_wm *a = &newstate->wm.intermediate;
-+ struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate;
- struct intel_pipe_wm *b = &intel_crtc->wm.active.ilk;
- int level, max_level = ilk_wm_max_level(dev);
-
-@@ -2400,7 +2400,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
- * currently active watermarks to get values that are safe both before
- * and after the vblank.
- */
-- *a = newstate->wm.optimal.ilk;
-+ *a = newstate->wm.ilk.optimal;
- a->pipe_enabled |= b->pipe_enabled;
- a->sprites_enabled |= b->sprites_enabled;
- a->sprites_scaled |= b->sprites_scaled;
-@@ -2429,7 +2429,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
- * If our intermediate WM are identical to the final WM, then we can
- * omit the post-vblank programming; only update if it's different.
- */
-- if (memcmp(a, &newstate->wm.optimal.ilk, sizeof(*a)) == 0)
-+ if (memcmp(a, &newstate->wm.ilk.optimal, sizeof(*a)) == 0)
- newstate->wm.need_postvbl_update = false;
-
- return 0;
-@@ -3678,7 +3678,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
- struct drm_i915_private *dev_priv = dev->dev_private;
- struct skl_wm_values *results = &dev_priv->wm.skl_results;
- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
-- struct skl_pipe_wm *pipe_wm = &cstate->wm.optimal.skl;
-+ struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal;
-
-
- /* Clear all dirty flags */
-@@ -3757,7 +3757,7 @@ static void ilk_initial_watermarks(struct intel_crtc_state *cstate)
- struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
-
- mutex_lock(&dev_priv->wm.wm_mutex);
-- intel_crtc->wm.active.ilk = cstate->wm.intermediate;
-+ intel_crtc->wm.active.ilk = cstate->wm.ilk.intermediate;
- ilk_program_watermarks(dev_priv);
- mutex_unlock(&dev_priv->wm.wm_mutex);
- }
-@@ -3769,7 +3769,7 @@ static void ilk_optimize_watermarks(struct intel_crtc_state *cstate)
-
- mutex_lock(&dev_priv->wm.wm_mutex);
- if (cstate->wm.need_postvbl_update) {
-- intel_crtc->wm.active.ilk = cstate->wm.optimal.ilk;
-+ intel_crtc->wm.active.ilk = cstate->wm.ilk.optimal;
- ilk_program_watermarks(dev_priv);
- }
- mutex_unlock(&dev_priv->wm.wm_mutex);
-@@ -3826,7 +3826,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
- struct skl_wm_values *hw = &dev_priv->wm.skl_hw;
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
-- struct skl_pipe_wm *active = &cstate->wm.optimal.skl;
-+ struct skl_pipe_wm *active = &cstate->wm.skl.optimal;
- enum pipe pipe = intel_crtc->pipe;
- int level, i, max_level;
- uint32_t temp;
-@@ -3892,7 +3892,7 @@ static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc)
- struct ilk_wm_values *hw = &dev_priv->wm.hw;
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
-- struct intel_pipe_wm *active = &cstate->wm.optimal.ilk;
-+ struct intel_pipe_wm *active = &cstate->wm.ilk.optimal;
- enum pipe pipe = intel_crtc->pipe;
- static const i915_reg_t wm0_pipe_reg[] = {
- [PIPE_A] = WM0_PIPEA_ILK,
---
-2.7.4
-
diff --git a/0001-iio-Use-event-header-from-kernel-tree.patch b/0001-iio-Use-event-header-from-kernel-tree.patch
new file mode 100644
index 000000000..1724db3fd
--- /dev/null
+++ b/0001-iio-Use-event-header-from-kernel-tree.patch
@@ -0,0 +1,64 @@
+From 0eadbb65c0026fb4eec89c54f6b48a0febd87f92 Mon Sep 17 00:00:00 2001
+From: Laura Abbott <labbott@redhat.com>
+Date: Fri, 9 Sep 2016 08:19:17 -0700
+Subject: [PATCH] iio: Use type header from kernel tree
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+To: Jonathan Cameron <jic23@kernel.org>
+To: Hartmut Knaack <knaack.h@gmx.de>
+To: Lars-Peter Clausen <lars@metafoo.de>
+To: Peter Meerwald-Stadler <pmeerw@pmeerw.net>
+Cc: linux-iio@vger.kernel.org
+Cc: linux-kernel@vger.kernel.org
+
+
+The iio tools have been updated as new event types have been added to
+the kernel. The tools currently use the standard system headers which
+means that the system may not have the newest defintitions. This leads
+to build failures when building newer tools on older hosts:
+
+gcc -Wall -g -D_GNU_SOURCE -c -o iio_event_monitor.o
+iio_event_monitor.c
+iio_event_monitor.c:59:3: error: ‘IIO_UVINDEX’ undeclared here (not in a
+function)
+ [IIO_UVINDEX] = "uvindex",
+ ^~~~~~~~~~~
+iio_event_monitor.c:59:3: error: array index in initializer not of
+integer type
+iio_event_monitor.c:59:3: note: (near initialization for
+‘iio_chan_type_name_spec’)
+iio_event_monitor.c:97:3: error: ‘IIO_MOD_LIGHT_UV’ undeclared here (not
+in a function)
+ [IIO_MOD_LIGHT_UV] = "uv",
+ ^~~~~~~~~~~~~~~~
+iio_event_monitor.c:97:3: error: array index in initializer not of
+integer type
+iio_event_monitor.c:97:3: note: (near initialization for
+‘iio_modifier_names’)
+<builtin>: recipe for target 'iio_event_monitor.o' failed
+
+Switch to using the header from the kernel tree to ensure the newest
+defintions are always picked up.
+
+Signed-off-by: Laura Abbott <labbott@redhat.com>
+---
+ tools/iio/iio_event_monitor.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/tools/iio/iio_event_monitor.c b/tools/iio/iio_event_monitor.c
+index d9b7e0f..f02523d 100644
+--- a/tools/iio/iio_event_monitor.c
++++ b/tools/iio/iio_event_monitor.c
+@@ -26,7 +26,7 @@
+ #include <sys/ioctl.h>
+ #include "iio_utils.h"
+ #include <linux/iio/events.h>
+-#include <linux/iio/types.h>
++#include "../../include/uapi/linux/iio/types.h"
+
+ static const char * const iio_chan_type_name_spec[] = {
+ [IIO_VOLTAGE] = "voltage",
+--
+2.7.4
+
diff --git a/0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch b/0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch
deleted file mode 100644
index f9eecb97a..000000000
--- a/0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 4d428f0fd6aaaa75382885d897900f619b2dad35 Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 11:12:56 +0200
-Subject: [PATCH 02/17] drm/i915: Rename
- s/skl_compute_pipe_wm/skl_build_pipe_wm/
-
-Upstream: since drm-intel-next-2016-05-22
-commit e7649b54777ba6491204acbe1f1a34fce78637d5
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:05:56 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:32:27 2016 -0700
-
- drm/i915: Rename s/skl_compute_pipe_wm/skl_build_pipe_wm/
-
- When we added atomic watermarks, we added a new display vfunc
- 'compute_pipe_wm' that is used to compute any pipe-specific watermark
- information that we can at atomic check time. This was a somewhat poor
- naming choice since we already had a 'skl_compute_pipe_wm' function that
- doesn't quite fit this model --- the existing SKL function is something
- that gets used at atomic commit time, after the DDB allocation has been
- determined. Let's rename the existing SKL function to avoid confusion.
-
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-3-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_pm.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 0da1d60..8f081b2 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3266,9 +3266,9 @@ static void skl_compute_transition_wm(struct intel_crtc_state *cstate,
- }
- }
-
--static void skl_compute_pipe_wm(struct intel_crtc_state *cstate,
-- struct skl_ddb_allocation *ddb,
-- struct skl_pipe_wm *pipe_wm)
-+static void skl_build_pipe_wm(struct intel_crtc_state *cstate,
-+ struct skl_ddb_allocation *ddb,
-+ struct skl_pipe_wm *pipe_wm)
- {
- struct drm_device *dev = cstate->base.crtc->dev;
- const struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -3535,7 +3535,7 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc,
- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
-
- skl_allocate_pipe_ddb(cstate, ddb);
-- skl_compute_pipe_wm(cstate, ddb, pipe_wm);
-+ skl_build_pipe_wm(cstate, ddb, pipe_wm);
-
- if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
- return false;
---
-2.7.4
-
diff --git a/0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch b/0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch
deleted file mode 100644
index 9a9366c1c..000000000
--- a/0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch
+++ /dev/null
@@ -1,214 +0,0 @@
-From 0206aec944641c69815562407b73b6f9df22f041 Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 11:13:09 +0200
-Subject: [PATCH 03/17] drm/i915/gen9: Cache plane data rates in CRTC state
-
-Upstream: since drm-intel-next-2016-05-22
-commit a1de91e5f3039dfc32ac2b77ffb280a68646cbc7
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:05:57 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:32:35 2016 -0700
-
- drm/i915/gen9: Cache plane data rates in CRTC state
-
- This will be important when we start calculating CRTC data rates for
- in-flight CRTC states since it will allow us to calculate the total data
- rate without needing to grab the plane state for any planes that aren't
- updated by the transaction.
-
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-4-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_drv.h | 4 ++
- drivers/gpu/drm/i915/intel_pm.c | 92 ++++++++++++++++++++++++++--------------
- 2 files changed, 63 insertions(+), 33 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 7d19baf..7c00ab6 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -385,6 +385,10 @@ struct intel_crtc_wm_state {
- struct {
- /* gen9+ only needs 1-step wm programming */
- struct skl_pipe_wm optimal;
-+
-+ /* cached plane data rate */
-+ unsigned plane_data_rate[I915_MAX_PLANES];
-+ unsigned plane_y_data_rate[I915_MAX_PLANES];
- } skl;
- };
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 8f081b2..854f0a4 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2879,6 +2879,14 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
- struct intel_plane_state *intel_pstate = to_intel_plane_state(pstate);
- struct drm_framebuffer *fb = pstate->fb;
- uint32_t width = 0, height = 0;
-+ unsigned format = fb ? fb->pixel_format : DRM_FORMAT_XRGB8888;
-+
-+ if (!intel_pstate->visible)
-+ return 0;
-+ if (pstate->plane->type == DRM_PLANE_TYPE_CURSOR)
-+ return 0;
-+ if (y && format != DRM_FORMAT_NV12)
-+ return 0;
-
- width = drm_rect_width(&intel_pstate->src) >> 16;
- height = drm_rect_height(&intel_pstate->src) >> 16;
-@@ -2887,17 +2895,17 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
- swap(width, height);
-
- /* for planar format */
-- if (fb->pixel_format == DRM_FORMAT_NV12) {
-+ if (format == DRM_FORMAT_NV12) {
- if (y) /* y-plane data rate */
- return width * height *
-- drm_format_plane_cpp(fb->pixel_format, 0);
-+ drm_format_plane_cpp(format, 0);
- else /* uv-plane data rate */
- return (width / 2) * (height / 2) *
-- drm_format_plane_cpp(fb->pixel_format, 1);
-+ drm_format_plane_cpp(format, 1);
- }
-
- /* for packed formats */
-- return width * height * drm_format_plane_cpp(fb->pixel_format, 0);
-+ return width * height * drm_format_plane_cpp(format, 0);
- }
-
- /*
-@@ -2906,32 +2914,34 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
- * 3 * 4096 * 8192 * 4 < 2^32
- */
- static unsigned int
--skl_get_total_relative_data_rate(const struct intel_crtc_state *cstate)
-+skl_get_total_relative_data_rate(struct intel_crtc_state *cstate)
- {
- struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
- struct drm_device *dev = intel_crtc->base.dev;
- const struct intel_plane *intel_plane;
-- unsigned int total_data_rate = 0;
-+ unsigned int rate, total_data_rate = 0;
-
-+ /* Calculate and cache data rate for each plane */
- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
- const struct drm_plane_state *pstate = intel_plane->base.state;
-+ int id = skl_wm_plane_id(intel_plane);
-
-- if (pstate->fb == NULL)
-- continue;
-+ /* packed/uv */
-+ rate = skl_plane_relative_data_rate(cstate, pstate, 0);
-+ cstate->wm.skl.plane_data_rate[id] = rate;
-
-- if (intel_plane->base.type == DRM_PLANE_TYPE_CURSOR)
-- continue;
-+ /* y-plane */
-+ rate = skl_plane_relative_data_rate(cstate, pstate, 1);
-+ cstate->wm.skl.plane_y_data_rate[id] = rate;
-+ }
-
-- /* packed/uv */
-- total_data_rate += skl_plane_relative_data_rate(cstate,
-- pstate,
-- 0);
-+ /* Calculate CRTC's total data rate from cached values */
-+ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-+ int id = skl_wm_plane_id(intel_plane);
-
-- if (pstate->fb->pixel_format == DRM_FORMAT_NV12)
-- /* y-plane */
-- total_data_rate += skl_plane_relative_data_rate(cstate,
-- pstate,
-- 1);
-+ /* packed/uv */
-+ total_data_rate += cstate->wm.skl.plane_data_rate[id];
-+ total_data_rate += cstate->wm.skl.plane_y_data_rate[id];
- }
-
- return total_data_rate;
-@@ -2995,6 +3005,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- * FIXME: we may not allocate every single block here.
- */
- total_data_rate = skl_get_total_relative_data_rate(cstate);
-+ if (total_data_rate == 0)
-+ return;
-
- start = alloc->start;
- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-@@ -3009,7 +3021,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- if (plane->type == DRM_PLANE_TYPE_CURSOR)
- continue;
-
-- data_rate = skl_plane_relative_data_rate(cstate, pstate, 0);
-+ data_rate = cstate->wm.skl.plane_data_rate[id];
-
- /*
- * allocation for (packed formats) or (uv-plane part of planar format):
-@@ -3028,20 +3040,16 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- /*
- * allocation for y_plane part of planar format:
- */
-- if (pstate->fb->pixel_format == DRM_FORMAT_NV12) {
-- y_data_rate = skl_plane_relative_data_rate(cstate,
-- pstate,
-- 1);
-- y_plane_blocks = y_minimum[id];
-- y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate,
-- total_data_rate);
--
-- ddb->y_plane[pipe][id].start = start;
-- ddb->y_plane[pipe][id].end = start + y_plane_blocks;
--
-- start += y_plane_blocks;
-- }
-+ y_data_rate = cstate->wm.skl.plane_y_data_rate[id];
-+
-+ y_plane_blocks = y_minimum[id];
-+ y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate,
-+ total_data_rate);
-
-+ ddb->y_plane[pipe][id].start = start;
-+ ddb->y_plane[pipe][id].end = start + y_plane_blocks;
-+
-+ start += y_plane_blocks;
- }
-
- }
-@@ -3820,10 +3828,28 @@ void skl_wm_get_hw_state(struct drm_device *dev)
- struct drm_i915_private *dev_priv = dev->dev_private;
- struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb;
- struct drm_crtc *crtc;
-+ struct intel_crtc *intel_crtc;
-
- skl_ddb_get_hw_state(dev_priv, ddb);
- list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
- skl_pipe_wm_get_hw_state(crtc);
-+
-+ /* Calculate plane data rates */
-+ for_each_intel_crtc(dev, intel_crtc) {
-+ struct intel_crtc_state *cstate = intel_crtc->config;
-+ struct intel_plane *intel_plane;
-+
-+ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-+ const struct drm_plane_state *pstate =
-+ intel_plane->base.state;
-+ int id = skl_wm_plane_id(intel_plane);
-+
-+ cstate->wm.skl.plane_data_rate[id] =
-+ skl_plane_relative_data_rate(cstate, pstate, 0);
-+ cstate->wm.skl.plane_y_data_rate[id] =
-+ skl_plane_relative_data_rate(cstate, pstate, 1);
-+ }
-+ }
- }
-
- static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc)
---
-2.7.4
-
diff --git a/0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch b/0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch
deleted file mode 100644
index 3a2b0aa1c..000000000
--- a/0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch
+++ /dev/null
@@ -1,141 +0,0 @@
-From a75a3c793e2cd3e7648597f2c77d87453f520f31 Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 11:13:23 +0200
-Subject: [PATCH 04/17] drm/i915/gen9: Allow calculation of data rate for
- in-flight state (v2)
-
-Upstream: since drm-intel-next-2016-05-22
-commit 9c74d82621c553f0da1f41bd5d90f5eab5659fdb
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:05:58 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:32:49 2016 -0700
-
- drm/i915/gen9: Allow calculation of data rate for in-flight state (v2)
-
- Our skl_get_total_relative_data_rate() function gets passed a crtc state
- object to calculate the data rate for, but it currently always looks
- up the committed plane states that correspond to that CRTC. Let's
- check whether the CRTC state is an in-flight state (meaning
- cstate->state is non-NULL) and if so, use the corresponding in-flight
- plane states.
-
- We'll soon be using this function exclusively for in-flight states; at
- that time we'll be able to simplify the function a bit, but for now we
- allow it to be used in either mode.
-
- v2:
- - Rebase on top of changes to cache plane data rates.
-
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-5-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_pm.c | 74 +++++++++++++++++++++++++++++++++--------
- 1 file changed, 60 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 854f0a4..b863bfc 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2914,25 +2914,69 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
- * 3 * 4096 * 8192 * 4 < 2^32
- */
- static unsigned int
--skl_get_total_relative_data_rate(struct intel_crtc_state *cstate)
-+skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate)
- {
-- struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
-- struct drm_device *dev = intel_crtc->base.dev;
-+ struct drm_crtc_state *cstate = &intel_cstate->base;
-+ struct drm_atomic_state *state = cstate->state;
-+ struct drm_crtc *crtc = cstate->crtc;
-+ struct drm_device *dev = crtc->dev;
-+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- const struct intel_plane *intel_plane;
- unsigned int rate, total_data_rate = 0;
-+ int id;
-
- /* Calculate and cache data rate for each plane */
-- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-- const struct drm_plane_state *pstate = intel_plane->base.state;
-- int id = skl_wm_plane_id(intel_plane);
-+ /*
-+ * FIXME: At the moment this function can be called on either an
-+ * in-flight or a committed state object. If it's in-flight then we
-+ * only want to re-calculate the plane data rate for planes that are
-+ * part of the transaction (i.e., we don't want to grab any additional
-+ * plane states if we don't have to). If we're operating on committed
-+ * state, we'll just go ahead and recalculate the plane data rate for
-+ * all planes.
-+ *
-+ * Once we finish moving our DDB allocation to the atomic check phase,
-+ * we'll only be calling this function on in-flight state objects, so
-+ * the 'else' branch here will go away.
-+ */
-+ if (state) {
-+ struct drm_plane *plane;
-+ struct drm_plane_state *pstate;
-+ int i;
-+
-+ for_each_plane_in_state(state, plane, pstate, i) {
-+ intel_plane = to_intel_plane(plane);
-+ id = skl_wm_plane_id(intel_plane);
-+
-+ if (intel_plane->pipe != intel_crtc->pipe)
-+ continue;
-+
-+ /* packed/uv */
-+ rate = skl_plane_relative_data_rate(intel_cstate,
-+ pstate, 0);
-+ intel_cstate->wm.skl.plane_data_rate[id] = rate;
-+
-+ /* y-plane */
-+ rate = skl_plane_relative_data_rate(intel_cstate,
-+ pstate, 1);
-+ intel_cstate->wm.skl.plane_y_data_rate[id] = rate;
-+ }
-+ } else {
-+ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-+ const struct drm_plane_state *pstate =
-+ intel_plane->base.state;
-+ int id = skl_wm_plane_id(intel_plane);
-
-- /* packed/uv */
-- rate = skl_plane_relative_data_rate(cstate, pstate, 0);
-- cstate->wm.skl.plane_data_rate[id] = rate;
-+ /* packed/uv */
-+ rate = skl_plane_relative_data_rate(intel_cstate,
-+ pstate, 0);
-+ intel_cstate->wm.skl.plane_data_rate[id] = rate;
-
-- /* y-plane */
-- rate = skl_plane_relative_data_rate(cstate, pstate, 1);
-- cstate->wm.skl.plane_y_data_rate[id] = rate;
-+ /* y-plane */
-+ rate = skl_plane_relative_data_rate(intel_cstate,
-+ pstate, 1);
-+ intel_cstate->wm.skl.plane_y_data_rate[id] = rate;
-+ }
- }
-
- /* Calculate CRTC's total data rate from cached values */
-@@ -2940,10 +2984,12 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *cstate)
- int id = skl_wm_plane_id(intel_plane);
-
- /* packed/uv */
-- total_data_rate += cstate->wm.skl.plane_data_rate[id];
-- total_data_rate += cstate->wm.skl.plane_y_data_rate[id];
-+ total_data_rate += intel_cstate->wm.skl.plane_data_rate[id];
-+ total_data_rate += intel_cstate->wm.skl.plane_y_data_rate[id];
- }
-
-+ WARN_ON(cstate->plane_mask && total_data_rate == 0);
-+
- return total_data_rate;
- }
-
---
-2.7.4
-
diff --git a/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch b/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch
deleted file mode 100644
index 7b1fcb144..000000000
--- a/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From cd21ce996b94fd149b3487398e5250e9f0cc8811 Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 12:39:24 +0200
-Subject: [PATCH 05/17] drm/i915/gen9: Store plane minimum blocks in CRTC wm
- state (v2)
-
-Upstream: since drm-intel-next-2016-05-22
-commit 86a2100a8b96594902bb59b90614377df4f64ce0
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:05:59 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:32:56 2016 -0700
-
- drm/i915/gen9: Store plane minimum blocks in CRTC wm state (v2)
-
- This will eventually allow us to re-use old values without
- re-calculating them for unchanged planes (which also helps us avoid
- re-grabbing extra plane states).
-
- v2:
- - Drop unnecessary memset's; they were meant for a later patch (which
- got reworked anyway to not need them, but were mis-rebased into this
- one. (Maarten)
-
- Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-6-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_drv.h | 4 ++++
- drivers/gpu/drm/i915/intel_pm.c | 4 ++--
- 2 files changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 7c00ab6..d246308 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -389,6 +389,10 @@ struct intel_crtc_wm_state {
- /* cached plane data rate */
- unsigned plane_data_rate[I915_MAX_PLANES];
- unsigned plane_y_data_rate[I915_MAX_PLANES];
-+
-+ /* minimum block allocation */
-+ uint16_t minimum_blocks[I915_MAX_PLANES];
-+ uint16_t minimum_y_blocks[I915_MAX_PLANES];
- } skl;
- };
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index b863bfc..00db6e9 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3006,8 +3006,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- enum pipe pipe = intel_crtc->pipe;
- struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
- uint16_t alloc_size, start, cursor_blocks;
-- uint16_t minimum[I915_MAX_PLANES];
-- uint16_t y_minimum[I915_MAX_PLANES];
-+ uint16_t *minimum = cstate->wm.skl.minimum_blocks;
-+ uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;
- unsigned int total_data_rate;
-
- skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc);
---
-2.7.4
-
diff --git a/0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch b/0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch
deleted file mode 100644
index 7320abf6d..000000000
--- a/0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 00edb23bcefa3ad6931f2a2855fe0801a55523f7 Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 12:39:40 +0200
-Subject: [PATCH 06/17] drm/i915: Track whether an atomic transaction changes
- the active CRTC's
-
-Upstream: since drm-intel-next-2016-05-22
-commit 8b4a7d0597cd9910d7127ffae6ae91d21853a8a2
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:06:00 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:33:10 2016 -0700
-
- drm/i915: Track whether an atomic transaction changes the active CRTC's
-
- For the purposes of DDB re-allocation we need to know whether a
- transaction changes the list of CRTC's that are active. While
- state->modeset could be used for this purpose, that would be slightly
- too aggressive since it would lead us to re-allocate the DDB when a
- CRTC's mode changes, but not its final active state.
-
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-7-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_display.c | 3 +++
- drivers/gpu/drm/i915/intel_drv.h | 10 ++++++++++
- 2 files changed, 13 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 7d855ba..f53df81 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -13183,6 +13183,9 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
- intel_state->active_crtcs |= 1 << i;
- else
- intel_state->active_crtcs &= ~(1 << i);
-+
-+ if (crtc_state->active != crtc->state->active)
-+ intel_state->active_pipe_changes |= drm_crtc_mask(crtc);
- }
-
- /*
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index d246308..672ca56 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -256,6 +256,16 @@ struct intel_atomic_state {
-
- bool dpll_set, modeset;
-
-+ /*
-+ * Does this transaction change the pipes that are active? This mask
-+ * tracks which CRTC's have changed their active state at the end of
-+ * the transaction (not counting the temporary disable during modesets).
-+ * This mask should only be non-zero when intel_state->modeset is true,
-+ * but the converse is not necessarily true; simply changing a mode may
-+ * not flip the final active status of any CRTC's
-+ */
-+ unsigned int active_pipe_changes;
-+
- unsigned int active_crtcs;
- unsigned int min_pixclk[I915_MAX_PIPES];
-
---
-2.7.4
-
diff --git a/0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch b/0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch
deleted file mode 100644
index deb90fb01..000000000
--- a/0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch
+++ /dev/null
@@ -1,352 +0,0 @@
-From 99dd9c3733696d4a2536b21988c9b1b8f5195c5b Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 12:40:00 +0200
-Subject: [PATCH 07/17] drm/i915/gen9: Allow skl_allocate_pipe_ddb() to operate
- on in-flight state (v3)
-
-Upstream: since drm-intel-next-2016-05-22
-commit c107acfeb03187873657ccc8af4fc5c704b3626b
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:06:01 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:33:16 2016 -0700
-
- drm/i915/gen9: Allow skl_allocate_pipe_ddb() to operate on in-flight state (v3)
-
- We eventually want to calculate watermark values at atomic 'check' time
- instead of atomic 'commit' time so that any requested configurations
- that result in impossible watermark requirements are properly rejected.
- The first step along this path is to allocate the DDB at atomic 'check'
- time. As we perform this transition, allow the main allocation function
- to operate successfully on either an in-flight state or an
- already-commited state. Once we complete the transition in a future
- patch, we'll come back and remove the unnecessary logic for the
- already-committed case.
-
- v2: Rebase/refactor; we should no longer need to grab extra plane states
- while allocating the DDB since we can pull cached data rates and
- minimum block counts from the CRTC state for any planes that aren't
- being modified by this transaction.
-
- v3:
- - Simplify memsets to clear DDB plane entries. (Maarten)
- - Drop a redundant memset of plane[pipe][PLANE_CURSOR] that was added
- by an earlier Coccinelle patch. (Maarten)
- - Assign *num_active at the top of skl_ddb_get_pipe_allocation_limits()
- so that no code paths return without setting it. (kbuild robot)
-
- Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-8-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/i915_drv.h | 6 ++
- drivers/gpu/drm/i915/intel_pm.c | 179 +++++++++++++++++++++++++++++-----------
- 2 files changed, 139 insertions(+), 46 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index daba7eb..804af6f 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -281,6 +281,12 @@ struct i915_hotplug {
- &dev->mode_config.plane_list, \
- base.head)
-
-+#define for_each_intel_plane_mask(dev, intel_plane, plane_mask) \
-+ list_for_each_entry(intel_plane, &dev->mode_config.plane_list, \
-+ base.head) \
-+ for_each_if ((plane_mask) & \
-+ (1 << drm_plane_index(&intel_plane->base)))
-+
- #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \
- list_for_each_entry(intel_plane, \
- &(dev)->mode_config.plane_list, \
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 00db6e9..ee82b1f 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2788,13 +2788,25 @@ skl_wm_plane_id(const struct intel_plane *plane)
- static void
- skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
- const struct intel_crtc_state *cstate,
-- const struct intel_wm_config *config,
-- struct skl_ddb_entry *alloc /* out */)
-+ struct intel_wm_config *config,
-+ struct skl_ddb_entry *alloc, /* out */
-+ int *num_active /* out */)
- {
-+ struct drm_atomic_state *state = cstate->base.state;
-+ struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
-+ struct drm_i915_private *dev_priv = to_i915(dev);
- struct drm_crtc *for_crtc = cstate->base.crtc;
- struct drm_crtc *crtc;
- unsigned int pipe_size, ddb_size;
- int nth_active_pipe;
-+ int pipe = to_intel_crtc(for_crtc)->pipe;
-+
-+ if (intel_state && intel_state->active_pipe_changes)
-+ *num_active = hweight32(intel_state->active_crtcs);
-+ else if (intel_state)
-+ *num_active = hweight32(dev_priv->active_crtcs);
-+ else
-+ *num_active = config->num_pipes_active;
-
- if (!cstate->base.active) {
- alloc->start = 0;
-@@ -2809,25 +2821,56 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
-
- ddb_size -= 4; /* 4 blocks for bypass path allocation */
-
-- nth_active_pipe = 0;
-- for_each_crtc(dev, crtc) {
-- if (!to_intel_crtc(crtc)->active)
-- continue;
-+ /*
-+ * FIXME: At the moment we may be called on either in-flight or fully
-+ * committed cstate's. Once we fully move DDB allocation in the check
-+ * phase, we'll only be called on in-flight states and the 'else'
-+ * branch here will go away.
-+ *
-+ * The 'else' branch is slightly racy here, but it was racy to begin
-+ * with; since it's going away soon, no effort is made to address that.
-+ */
-+ if (state) {
-+ /*
-+ * If the state doesn't change the active CRTC's, then there's
-+ * no need to recalculate; the existing pipe allocation limits
-+ * should remain unchanged. Note that we're safe from racing
-+ * commits since any racing commit that changes the active CRTC
-+ * list would need to grab _all_ crtc locks, including the one
-+ * we currently hold.
-+ */
-+ if (!intel_state->active_pipe_changes) {
-+ *alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe];
-+ return;
-+ }
-
-- if (crtc == for_crtc)
-- break;
-+ nth_active_pipe = hweight32(intel_state->active_crtcs &
-+ (drm_crtc_mask(for_crtc) - 1));
-+ pipe_size = ddb_size / hweight32(intel_state->active_crtcs);
-+ alloc->start = nth_active_pipe * ddb_size / *num_active;
-+ alloc->end = alloc->start + pipe_size;
-+ } else {
-+ nth_active_pipe = 0;
-+ for_each_crtc(dev, crtc) {
-+ if (!to_intel_crtc(crtc)->active)
-+ continue;
-
-- nth_active_pipe++;
-- }
-+ if (crtc == for_crtc)
-+ break;
-+
-+ nth_active_pipe++;
-+ }
-
-- pipe_size = ddb_size / config->num_pipes_active;
-- alloc->start = nth_active_pipe * ddb_size / config->num_pipes_active;
-- alloc->end = alloc->start + pipe_size;
-+ pipe_size = ddb_size / config->num_pipes_active;
-+ alloc->start = nth_active_pipe * ddb_size /
-+ config->num_pipes_active;
-+ alloc->end = alloc->start + pipe_size;
-+ }
- }
-
--static unsigned int skl_cursor_allocation(const struct intel_wm_config *config)
-+static unsigned int skl_cursor_allocation(int num_active)
- {
-- if (config->num_pipes_active == 1)
-+ if (num_active == 1)
- return 32;
-
- return 8;
-@@ -2993,33 +3036,44 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate)
- return total_data_rate;
- }
-
--static void
-+static int
- skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- struct skl_ddb_allocation *ddb /* out */)
- {
-+ struct drm_atomic_state *state = cstate->base.state;
- struct drm_crtc *crtc = cstate->base.crtc;
- struct drm_device *dev = crtc->dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_wm_config *config = &dev_priv->wm.config;
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_plane *intel_plane;
-+ struct drm_plane *plane;
-+ struct drm_plane_state *pstate;
- enum pipe pipe = intel_crtc->pipe;
- struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
- uint16_t alloc_size, start, cursor_blocks;
- uint16_t *minimum = cstate->wm.skl.minimum_blocks;
- uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;
- unsigned int total_data_rate;
-+ int num_active;
-+ int id, i;
-+
-+ if (!cstate->base.active) {
-+ ddb->pipe[pipe].start = ddb->pipe[pipe].end = 0;
-+ memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
-+ memset(ddb->y_plane[pipe], 0, sizeof(ddb->y_plane[pipe]));
-+ return 0;
-+ }
-
-- skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc);
-+ skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc,
-+ &num_active);
- alloc_size = skl_ddb_entry_size(alloc);
- if (alloc_size == 0) {
- memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
-- memset(&ddb->plane[pipe][PLANE_CURSOR], 0,
-- sizeof(ddb->plane[pipe][PLANE_CURSOR]));
-- return;
-+ return 0;
- }
-
-- cursor_blocks = skl_cursor_allocation(config);
-+ cursor_blocks = skl_cursor_allocation(num_active);
- ddb->plane[pipe][PLANE_CURSOR].start = alloc->end - cursor_blocks;
- ddb->plane[pipe][PLANE_CURSOR].end = alloc->end;
-
-@@ -3027,21 +3081,55 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- alloc->end -= cursor_blocks;
-
- /* 1. Allocate the mininum required blocks for each active plane */
-- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-- struct drm_plane *plane = &intel_plane->base;
-- struct drm_framebuffer *fb = plane->state->fb;
-- int id = skl_wm_plane_id(intel_plane);
-+ /*
-+ * TODO: Remove support for already-committed state once we
-+ * only allocate DDB on in-flight states.
-+ */
-+ if (state) {
-+ for_each_plane_in_state(state, plane, pstate, i) {
-+ intel_plane = to_intel_plane(plane);
-+ id = skl_wm_plane_id(intel_plane);
-
-- if (!to_intel_plane_state(plane->state)->visible)
-- continue;
-+ if (intel_plane->pipe != pipe)
-+ continue;
-
-- if (plane->type == DRM_PLANE_TYPE_CURSOR)
-- continue;
-+ if (!to_intel_plane_state(pstate)->visible) {
-+ minimum[id] = 0;
-+ y_minimum[id] = 0;
-+ continue;
-+ }
-+ if (plane->type == DRM_PLANE_TYPE_CURSOR) {
-+ minimum[id] = 0;
-+ y_minimum[id] = 0;
-+ continue;
-+ }
-
-- minimum[id] = 8;
-- alloc_size -= minimum[id];
-- y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0;
-- alloc_size -= y_minimum[id];
-+ minimum[id] = 8;
-+ if (pstate->fb->pixel_format == DRM_FORMAT_NV12)
-+ y_minimum[id] = 8;
-+ else
-+ y_minimum[id] = 0;
-+ }
-+ } else {
-+ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-+ struct drm_plane *plane = &intel_plane->base;
-+ struct drm_framebuffer *fb = plane->state->fb;
-+ int id = skl_wm_plane_id(intel_plane);
-+
-+ if (!to_intel_plane_state(plane->state)->visible)
-+ continue;
-+
-+ if (plane->type == DRM_PLANE_TYPE_CURSOR)
-+ continue;
-+
-+ minimum[id] = 8;
-+ y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0;
-+ }
-+ }
-+
-+ for (i = 0; i < PLANE_CURSOR; i++) {
-+ alloc_size -= minimum[i];
-+ alloc_size -= y_minimum[i];
- }
-
- /*
-@@ -3052,21 +3140,14 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- */
- total_data_rate = skl_get_total_relative_data_rate(cstate);
- if (total_data_rate == 0)
-- return;
-+ return 0;
-
- start = alloc->start;
- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-- struct drm_plane *plane = &intel_plane->base;
-- struct drm_plane_state *pstate = intel_plane->base.state;
- unsigned int data_rate, y_data_rate;
- uint16_t plane_blocks, y_plane_blocks = 0;
- int id = skl_wm_plane_id(intel_plane);
-
-- if (!to_intel_plane_state(pstate)->visible)
-- continue;
-- if (plane->type == DRM_PLANE_TYPE_CURSOR)
-- continue;
--
- data_rate = cstate->wm.skl.plane_data_rate[id];
-
- /*
-@@ -3078,8 +3159,11 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- plane_blocks += div_u64((uint64_t)alloc_size * data_rate,
- total_data_rate);
-
-- ddb->plane[pipe][id].start = start;
-- ddb->plane[pipe][id].end = start + plane_blocks;
-+ /* Leave disabled planes at (0,0) */
-+ if (data_rate) {
-+ ddb->plane[pipe][id].start = start;
-+ ddb->plane[pipe][id].end = start + plane_blocks;
-+ }
-
- start += plane_blocks;
-
-@@ -3092,12 +3176,15 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate,
- total_data_rate);
-
-- ddb->y_plane[pipe][id].start = start;
-- ddb->y_plane[pipe][id].end = start + y_plane_blocks;
-+ if (y_data_rate) {
-+ ddb->y_plane[pipe][id].start = start;
-+ ddb->y_plane[pipe][id].end = start + y_plane_blocks;
-+ }
-
- start += y_plane_blocks;
- }
-
-+ return 0;
- }
-
- static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_state *config)
-@@ -3588,7 +3675,7 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc,
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
-
-- skl_allocate_pipe_ddb(cstate, ddb);
-+ WARN_ON(skl_allocate_pipe_ddb(cstate, ddb) != 0);
- skl_build_pipe_wm(cstate, ddb, pipe_wm);
-
- if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
---
-2.7.4
-
diff --git a/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch b/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch
deleted file mode 100644
index 9131a60da..000000000
--- a/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 7207eecfcb3095442bce30227b551003edc7b908 Mon Sep 17 00:00:00 2001
-From: Matt Roper <matthew.d.roper@intel.com>
-Date: Thu, 12 May 2016 07:06:02 -0700
-Subject: [PATCH 08/17] drm/i915: Add distrust_bios_wm flag to dev_priv (v2)
-
-SKL-style platforms can't fully trust the watermark/DDB settings
-programmed by the BIOS and need to do extra sanitization on their first
-atomic update. Add a flag to dev_priv that is set during hardware
-readout and cleared at the end of the first commit.
-
-Note that for the somewhat common case where everything is turned off
-when the driver starts up, we don't need to bother with a recompute...we
-know exactly what the DDB should be (all zero's) so just setup the DDB
-directly in that case.
-
-v2:
- - Move clearing of distrust_bios_wm up below the swap_state call since
- it's a more natural / self-explanatory location. (Maarten)
- - Use dev_priv->active_crtcs to test whether any CRTC's are turned on
- during HW WM readout rather than trying to count the active CRTC's
- again ourselves. (Maarten)
-
-Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
-Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-9-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/i915_drv.h | 7 +++++++
- drivers/gpu/drm/i915/intel_display.c | 1 +
- drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
- 3 files changed, 16 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 611c128..e21960d 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1981,6 +1981,13 @@ struct drm_i915_private {
- * cstate->wm.need_postvbl_update.
- */
- struct mutex wm_mutex;
-+
-+ /*
-+ * Set during HW readout of watermarks/DDB. Some platforms
-+ * need to know when we're still using BIOS-provided values
-+ * (which we don't fully trust).
-+ */
-+ bool distrust_bios_wm;
- } wm;
-
- struct i915_runtime_pm pm;
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index f26d1c5..a9d2e30 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -13621,6 +13621,7 @@ static int intel_atomic_commit(struct drm_device *dev,
-
- drm_atomic_helper_swap_state(dev, state);
- dev_priv->wm.config = intel_state->wm_config;
-+ dev_priv->wm.distrust_bios_wm = false;
- intel_shared_dpll_commit(state);
-
- if (intel_state->modeset) {
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index f009d43..a49faa7 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4026,6 +4026,14 @@ void skl_wm_get_hw_state(struct drm_device *dev)
- list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
- skl_pipe_wm_get_hw_state(crtc);
-
-+ if (dev_priv->active_crtcs) {
-+ /* Fully recompute DDB on first atomic commit */
-+ dev_priv->wm.distrust_bios_wm = true;
-+ } else {
-+ /* Easy/common case; just sanitize DDB now if everything off */
-+ memset(ddb, 0, sizeof(*ddb));
-+ }
-+
- /* Calculate plane data rates */
- for_each_intel_crtc(dev, intel_crtc) {
- struct intel_crtc_state *cstate = intel_crtc->config;
---
-2.7.4
-
diff --git a/0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch b/0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch
deleted file mode 100644
index 80cdacf9a..000000000
--- a/0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch
+++ /dev/null
@@ -1,244 +0,0 @@
-From fbf53d8f1b7d1bcea1411f1f2cd0df6a6cc95332 Mon Sep 17 00:00:00 2001
-From: Matt Roper <matthew.d.roper@intel.com>
-Date: Thu, 12 May 2016 07:06:03 -0700
-Subject: [PATCH 09/17] drm/i915/gen9: Compute DDB allocation at atomic check
- time (v4)
-
-Calculate the DDB blocks needed to satisfy the current atomic
-transaction at atomic check time. This is a prerequisite to calculating
-SKL watermarks during the 'check' phase and rejecting any configurations
-that we can't find valid watermarks for.
-
-Due to the nature of DDB allocation, it's possible for the addition of a
-new CRTC to make the watermark configuration already in use on another,
-unchanged CRTC become invalid. A change in which CRTC's are active
-triggers a recompute of the entire DDB, which unfortunately means we
-need to disallow any other atomic commits from racing with such an
-update. If the active CRTC's change, we need to grab the lock on all
-CRTC's and run all CRTC's through their 'check' handler to recompute and
-re-check their per-CRTC DDB allocations.
-
-Note that with this patch we only compute the DDB allocation but we
-don't actually use the computed values during watermark programming yet.
-For ease of review/testing/bisecting, we still recompute the DDB at
-watermark programming time and just WARN() if it doesn't match the
-precomputed values. A future patch will switch over to using the
-precomputed values once we're sure they're being properly computed.
-
-Another clarifying note: DDB allocation itself shouldn't ever fail with
-the algorithm we use today (i.e., we have enough DDB blocks on BXT to
-support the minimum needs of the worst-case scenario of every pipe/plane
-enabled at full size). However the watermarks calculations based on the
-DDB may fail and we'll be moving those to the atomic check as well in
-future patches.
-
-v2:
- - Skip DDB calculations in the rare case where our transaction doesn't
- actually touch any CRTC's at all. Assuming at least one CRTC state
- is present in our transaction, then it means we can't race with any
- transactions that would update dev_priv->active_crtcs (which requires
- _all_ CRTC locks).
-
-v3:
- - Also calculate DDB during initial hw readout, to prevent using
- incorrect bios values. (Maarten)
-
-v4:
- - Use new distrust_bios_wm flag instead of skip_initial_wm (which was
- never actually set).
- - Set intel_state->active_pipe_changes instead of just realloc_pipes
-
-Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Cc: Lyude Paul <cpaul@redhat.com>
-Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
-Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
-Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-10-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/i915_drv.h | 5 +++
- drivers/gpu/drm/i915/intel_display.c | 18 ++++++++
- drivers/gpu/drm/i915/intel_drv.h | 3 ++
- drivers/gpu/drm/i915/intel_pm.c | 79 ++++++++++++++++++++++++++++++++++++
- 4 files changed, 105 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index e21960d..b908a41 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -339,6 +339,10 @@ struct i915_hotplug {
- #define for_each_intel_crtc(dev, intel_crtc) \
- list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head)
-
-+#define for_each_intel_crtc_mask(dev, intel_crtc, crtc_mask) \
-+ list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head) \
-+ for_each_if ((crtc_mask) & (1 << drm_crtc_index(&intel_crtc->base)))
-+
- #define for_each_intel_encoder(dev, intel_encoder) \
- list_for_each_entry(intel_encoder, \
- &(dev)->mode_config.encoder_list, \
-@@ -594,6 +598,7 @@ struct drm_i915_display_funcs {
- struct intel_crtc_state *newstate);
- void (*initial_watermarks)(struct intel_crtc_state *cstate);
- void (*optimize_watermarks)(struct intel_crtc_state *cstate);
-+ int (*compute_global_watermarks)(struct drm_atomic_state *state);
- void (*update_wm)(struct drm_crtc *crtc);
- int (*modeset_calc_cdclk)(struct drm_atomic_state *state);
- void (*modeset_commit_cdclk)(struct drm_atomic_state *state);
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index a9d2e30..ecad0ef 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -13342,6 +13342,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
- static void calc_watermark_data(struct drm_atomic_state *state)
- {
- struct drm_device *dev = state->dev;
-+ struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
- struct drm_crtc *crtc;
- struct drm_crtc_state *cstate;
-@@ -13371,6 +13372,10 @@ static void calc_watermark_data(struct drm_atomic_state *state)
- pstate->crtc_h != pstate->src_h >> 16)
- intel_state->wm_config.sprites_scaled = true;
- }
-+
-+ /* Is there platform-specific watermark information to calculate? */
-+ if (dev_priv->display.compute_global_watermarks)
-+ dev_priv->display.compute_global_watermarks(state);
- }
-
- /**
-@@ -13739,6 +13744,19 @@ static int intel_atomic_commit(struct drm_device *dev,
- intel_modeset_verify_crtc(crtc, old_crtc_state, crtc->state);
- }
-
-+ /*
-+ * Temporary sanity check: make sure our pre-computed DDB matches the
-+ * one we actually wind up programming.
-+ *
-+ * Not a great place to put this, but the easiest place we have access
-+ * to both the pre-computed and final DDB's; we'll be removing this
-+ * check in the next patch anyway.
-+ */
-+ WARN(IS_GEN9(dev) &&
-+ memcmp(&intel_state->ddb, &dev_priv->wm.skl_results.ddb,
-+ sizeof(intel_state->ddb)),
-+ "Pre-computed DDB does not match final DDB!\n");
-+
- if (intel_state->modeset)
- intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index d19e83e..2218290 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -312,6 +312,9 @@ struct intel_atomic_state {
- * don't bother calculating intermediate watermarks.
- */
- bool skip_intermediate_wm;
-+
-+ /* Gen9+ only */
-+ struct skl_ddb_allocation ddb;
- };
-
- struct intel_plane_state {
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index a49faa7..cfa4f80 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3812,6 +3812,84 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
-
- }
-
-+static int
-+skl_compute_ddb(struct drm_atomic_state *state)
-+{
-+ struct drm_device *dev = state->dev;
-+ struct drm_i915_private *dev_priv = to_i915(dev);
-+ struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
-+ struct intel_crtc *intel_crtc;
-+ unsigned realloc_pipes = dev_priv->active_crtcs;
-+ int ret;
-+
-+ /*
-+ * If this is our first atomic update following hardware readout,
-+ * we can't trust the DDB that the BIOS programmed for us. Let's
-+ * pretend that all pipes switched active status so that we'll
-+ * ensure a full DDB recompute.
-+ */
-+ if (dev_priv->wm.distrust_bios_wm)
-+ intel_state->active_pipe_changes = ~0;
-+
-+ /*
-+ * If the modeset changes which CRTC's are active, we need to
-+ * recompute the DDB allocation for *all* active pipes, even
-+ * those that weren't otherwise being modified in any way by this
-+ * atomic commit. Due to the shrinking of the per-pipe allocations
-+ * when new active CRTC's are added, it's possible for a pipe that
-+ * we were already using and aren't changing at all here to suddenly
-+ * become invalid if its DDB needs exceeds its new allocation.
-+ *
-+ * Note that if we wind up doing a full DDB recompute, we can't let
-+ * any other display updates race with this transaction, so we need
-+ * to grab the lock on *all* CRTC's.
-+ */
-+ if (intel_state->active_pipe_changes)
-+ realloc_pipes = ~0;
-+
-+ for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) {
-+ struct intel_crtc_state *cstate;
-+
-+ cstate = intel_atomic_get_crtc_state(state, intel_crtc);
-+ if (IS_ERR(cstate))
-+ return PTR_ERR(cstate);
-+
-+ ret = skl_allocate_pipe_ddb(cstate, &intel_state->ddb);
-+ if (ret)
-+ return ret;
-+ }
-+
-+ return 0;
-+}
-+
-+static int
-+skl_compute_wm(struct drm_atomic_state *state)
-+{
-+ struct drm_crtc *crtc;
-+ struct drm_crtc_state *cstate;
-+ int ret, i;
-+ bool changed = false;
-+
-+ /*
-+ * If this transaction isn't actually touching any CRTC's, don't
-+ * bother with watermark calculation. Note that if we pass this
-+ * test, we're guaranteed to hold at least one CRTC state mutex,
-+ * which means we can safely use values like dev_priv->active_crtcs
-+ * since any racing commits that want to update them would need to
-+ * hold _all_ CRTC state mutexes.
-+ */
-+ for_each_crtc_in_state(state, crtc, cstate, i)
-+ changed = true;
-+ if (!changed)
-+ return 0;
-+
-+ ret = skl_compute_ddb(state);
-+ if (ret)
-+ return ret;
-+
-+ return 0;
-+}
-+
- static void skl_update_wm(struct drm_crtc *crtc)
- {
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -7384,6 +7462,7 @@ void intel_init_pm(struct drm_device *dev)
- if (INTEL_INFO(dev)->gen >= 9) {
- skl_setup_wm_latency(dev);
- dev_priv->display.update_wm = skl_update_wm;
-+ dev_priv->display.compute_global_watermarks = skl_compute_wm;
- } else if (HAS_PCH_SPLIT(dev)) {
- ilk_setup_wm_latency(dev);
-
---
-2.7.4
-
diff --git a/0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch b/0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch
deleted file mode 100644
index 26f7e750c..000000000
--- a/0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch
+++ /dev/null
@@ -1,379 +0,0 @@
-From a9abdc6767855e1668301a1dcc4b5fa8bed1ddfa Mon Sep 17 00:00:00 2001
-From: Matt Roper <matthew.d.roper@intel.com>
-Date: Thu, 12 May 2016 07:06:04 -0700
-Subject: [PATCH 10/17] drm/i915/gen9: Drop re-allocation of DDB at atomic
- commit (v2)
-
-Now that we're properly pre-allocating the DDB during the atomic check
-phase and we trust that the allocation is appropriate, let's actually
-use the allocation computed and not duplicate that work during the
-commit phase.
-
-v2:
- - Significant rebasing now that we can use cached data rates and
- minimum block allocations to avoid grabbing additional plane states.
-
-Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
-Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-11-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_display.c | 14 +--
- drivers/gpu/drm/i915/intel_pm.c | 224 +++++++++++------------------------
- 2 files changed, 67 insertions(+), 171 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ecad0ef..4db10d7 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -13627,6 +13627,7 @@ static int intel_atomic_commit(struct drm_device *dev,
- drm_atomic_helper_swap_state(dev, state);
- dev_priv->wm.config = intel_state->wm_config;
- dev_priv->wm.distrust_bios_wm = false;
-+ dev_priv->wm.skl_results.ddb = intel_state->ddb;
- intel_shared_dpll_commit(state);
-
- if (intel_state->modeset) {
-@@ -13744,19 +13745,6 @@ static int intel_atomic_commit(struct drm_device *dev,
- intel_modeset_verify_crtc(crtc, old_crtc_state, crtc->state);
- }
-
-- /*
-- * Temporary sanity check: make sure our pre-computed DDB matches the
-- * one we actually wind up programming.
-- *
-- * Not a great place to put this, but the easiest place we have access
-- * to both the pre-computed and final DDB's; we'll be removing this
-- * check in the next patch anyway.
-- */
-- WARN(IS_GEN9(dev) &&
-- memcmp(&intel_state->ddb, &dev_priv->wm.skl_results.ddb,
-- sizeof(intel_state->ddb)),
-- "Pre-computed DDB does not match final DDB!\n");
--
- if (intel_state->modeset)
- intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index cfa4f80..0f0d4e1 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2849,7 +2849,6 @@ skl_wm_plane_id(const struct intel_plane *plane)
- static void
- skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
- const struct intel_crtc_state *cstate,
-- struct intel_wm_config *config,
- struct skl_ddb_entry *alloc, /* out */
- int *num_active /* out */)
- {
-@@ -2857,24 +2856,22 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
- struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct drm_crtc *for_crtc = cstate->base.crtc;
-- struct drm_crtc *crtc;
- unsigned int pipe_size, ddb_size;
- int nth_active_pipe;
- int pipe = to_intel_crtc(for_crtc)->pipe;
-
-- if (intel_state && intel_state->active_pipe_changes)
-- *num_active = hweight32(intel_state->active_crtcs);
-- else if (intel_state)
-- *num_active = hweight32(dev_priv->active_crtcs);
-- else
-- *num_active = config->num_pipes_active;
--
-- if (!cstate->base.active) {
-+ if (WARN_ON(!state) || !cstate->base.active) {
- alloc->start = 0;
- alloc->end = 0;
-+ *num_active = hweight32(dev_priv->active_crtcs);
- return;
- }
-
-+ if (intel_state->active_pipe_changes)
-+ *num_active = hweight32(intel_state->active_crtcs);
-+ else
-+ *num_active = hweight32(dev_priv->active_crtcs);
-+
- if (IS_BROXTON(dev))
- ddb_size = BXT_DDB_SIZE;
- else
-@@ -2883,50 +2880,23 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
- ddb_size -= 4; /* 4 blocks for bypass path allocation */
-
- /*
-- * FIXME: At the moment we may be called on either in-flight or fully
-- * committed cstate's. Once we fully move DDB allocation in the check
-- * phase, we'll only be called on in-flight states and the 'else'
-- * branch here will go away.
-- *
-- * The 'else' branch is slightly racy here, but it was racy to begin
-- * with; since it's going away soon, no effort is made to address that.
-+ * If the state doesn't change the active CRTC's, then there's
-+ * no need to recalculate; the existing pipe allocation limits
-+ * should remain unchanged. Note that we're safe from racing
-+ * commits since any racing commit that changes the active CRTC
-+ * list would need to grab _all_ crtc locks, including the one
-+ * we currently hold.
- */
-- if (state) {
-- /*
-- * If the state doesn't change the active CRTC's, then there's
-- * no need to recalculate; the existing pipe allocation limits
-- * should remain unchanged. Note that we're safe from racing
-- * commits since any racing commit that changes the active CRTC
-- * list would need to grab _all_ crtc locks, including the one
-- * we currently hold.
-- */
-- if (!intel_state->active_pipe_changes) {
-- *alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe];
-- return;
-- }
--
-- nth_active_pipe = hweight32(intel_state->active_crtcs &
-- (drm_crtc_mask(for_crtc) - 1));
-- pipe_size = ddb_size / hweight32(intel_state->active_crtcs);
-- alloc->start = nth_active_pipe * ddb_size / *num_active;
-- alloc->end = alloc->start + pipe_size;
-- } else {
-- nth_active_pipe = 0;
-- for_each_crtc(dev, crtc) {
-- if (!to_intel_crtc(crtc)->active)
-- continue;
--
-- if (crtc == for_crtc)
-- break;
--
-- nth_active_pipe++;
-- }
--
-- pipe_size = ddb_size / config->num_pipes_active;
-- alloc->start = nth_active_pipe * ddb_size /
-- config->num_pipes_active;
-- alloc->end = alloc->start + pipe_size;
-+ if (!intel_state->active_pipe_changes) {
-+ *alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe];
-+ return;
- }
-+
-+ nth_active_pipe = hweight32(intel_state->active_crtcs &
-+ (drm_crtc_mask(for_crtc) - 1));
-+ pipe_size = ddb_size / hweight32(intel_state->active_crtcs);
-+ alloc->start = nth_active_pipe * ddb_size / *num_active;
-+ alloc->end = alloc->start + pipe_size;
- }
-
- static unsigned int skl_cursor_allocation(int num_active)
-@@ -3025,62 +2995,33 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate)
- struct drm_crtc *crtc = cstate->crtc;
- struct drm_device *dev = crtc->dev;
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+ const struct drm_plane *plane;
- const struct intel_plane *intel_plane;
-+ struct drm_plane_state *pstate;
- unsigned int rate, total_data_rate = 0;
- int id;
-+ int i;
-+
-+ if (WARN_ON(!state))
-+ return 0;
-
- /* Calculate and cache data rate for each plane */
-- /*
-- * FIXME: At the moment this function can be called on either an
-- * in-flight or a committed state object. If it's in-flight then we
-- * only want to re-calculate the plane data rate for planes that are
-- * part of the transaction (i.e., we don't want to grab any additional
-- * plane states if we don't have to). If we're operating on committed
-- * state, we'll just go ahead and recalculate the plane data rate for
-- * all planes.
-- *
-- * Once we finish moving our DDB allocation to the atomic check phase,
-- * we'll only be calling this function on in-flight state objects, so
-- * the 'else' branch here will go away.
-- */
-- if (state) {
-- struct drm_plane *plane;
-- struct drm_plane_state *pstate;
-- int i;
--
-- for_each_plane_in_state(state, plane, pstate, i) {
-- intel_plane = to_intel_plane(plane);
-- id = skl_wm_plane_id(intel_plane);
--
-- if (intel_plane->pipe != intel_crtc->pipe)
-- continue;
--
-- /* packed/uv */
-- rate = skl_plane_relative_data_rate(intel_cstate,
-- pstate, 0);
-- intel_cstate->wm.skl.plane_data_rate[id] = rate;
--
-- /* y-plane */
-- rate = skl_plane_relative_data_rate(intel_cstate,
-- pstate, 1);
-- intel_cstate->wm.skl.plane_y_data_rate[id] = rate;
-- }
-- } else {
-- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-- const struct drm_plane_state *pstate =
-- intel_plane->base.state;
-- int id = skl_wm_plane_id(intel_plane);
-+ for_each_plane_in_state(state, plane, pstate, i) {
-+ id = skl_wm_plane_id(to_intel_plane(plane));
-+ intel_plane = to_intel_plane(plane);
-
-- /* packed/uv */
-- rate = skl_plane_relative_data_rate(intel_cstate,
-- pstate, 0);
-- intel_cstate->wm.skl.plane_data_rate[id] = rate;
-+ if (intel_plane->pipe != intel_crtc->pipe)
-+ continue;
-
-- /* y-plane */
-- rate = skl_plane_relative_data_rate(intel_cstate,
-- pstate, 1);
-- intel_cstate->wm.skl.plane_y_data_rate[id] = rate;
-- }
-+ /* packed/uv */
-+ rate = skl_plane_relative_data_rate(intel_cstate,
-+ pstate, 0);
-+ intel_cstate->wm.skl.plane_data_rate[id] = rate;
-+
-+ /* y-plane */
-+ rate = skl_plane_relative_data_rate(intel_cstate,
-+ pstate, 1);
-+ intel_cstate->wm.skl.plane_y_data_rate[id] = rate;
- }
-
- /* Calculate CRTC's total data rate from cached values */
-@@ -3104,8 +3045,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- struct drm_atomic_state *state = cstate->base.state;
- struct drm_crtc *crtc = cstate->base.crtc;
- struct drm_device *dev = crtc->dev;
-- struct drm_i915_private *dev_priv = to_i915(dev);
-- struct intel_wm_config *config = &dev_priv->wm.config;
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_plane *intel_plane;
- struct drm_plane *plane;
-@@ -3119,6 +3058,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- int num_active;
- int id, i;
-
-+ if (WARN_ON(!state))
-+ return 0;
-+
- if (!cstate->base.active) {
- ddb->pipe[pipe].start = ddb->pipe[pipe].end = 0;
- memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
-@@ -3126,8 +3068,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- return 0;
- }
-
-- skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc,
-- &num_active);
-+ skl_ddb_get_pipe_allocation_limits(dev, cstate, alloc, &num_active);
- alloc_size = skl_ddb_entry_size(alloc);
- if (alloc_size == 0) {
- memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
-@@ -3139,53 +3080,31 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
- ddb->plane[pipe][PLANE_CURSOR].end = alloc->end;
-
- alloc_size -= cursor_blocks;
-- alloc->end -= cursor_blocks;
-
- /* 1. Allocate the mininum required blocks for each active plane */
-- /*
-- * TODO: Remove support for already-committed state once we
-- * only allocate DDB on in-flight states.
-- */
-- if (state) {
-- for_each_plane_in_state(state, plane, pstate, i) {
-- intel_plane = to_intel_plane(plane);
-- id = skl_wm_plane_id(intel_plane);
--
-- if (intel_plane->pipe != pipe)
-- continue;
--
-- if (!to_intel_plane_state(pstate)->visible) {
-- minimum[id] = 0;
-- y_minimum[id] = 0;
-- continue;
-- }
-- if (plane->type == DRM_PLANE_TYPE_CURSOR) {
-- minimum[id] = 0;
-- y_minimum[id] = 0;
-- continue;
-- }
--
-- minimum[id] = 8;
-- if (pstate->fb->pixel_format == DRM_FORMAT_NV12)
-- y_minimum[id] = 8;
-- else
-- y_minimum[id] = 0;
-- }
-- } else {
-- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-- struct drm_plane *plane = &intel_plane->base;
-- struct drm_framebuffer *fb = plane->state->fb;
-- int id = skl_wm_plane_id(intel_plane);
--
-- if (!to_intel_plane_state(plane->state)->visible)
-- continue;
-+ for_each_plane_in_state(state, plane, pstate, i) {
-+ intel_plane = to_intel_plane(plane);
-+ id = skl_wm_plane_id(intel_plane);
-
-- if (plane->type == DRM_PLANE_TYPE_CURSOR)
-- continue;
-+ if (intel_plane->pipe != pipe)
-+ continue;
-
-- minimum[id] = 8;
-- y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0;
-+ if (!to_intel_plane_state(pstate)->visible) {
-+ minimum[id] = 0;
-+ y_minimum[id] = 0;
-+ continue;
-+ }
-+ if (plane->type == DRM_PLANE_TYPE_CURSOR) {
-+ minimum[id] = 0;
-+ y_minimum[id] = 0;
-+ continue;
- }
-+
-+ minimum[id] = 8;
-+ if (pstate->fb->pixel_format == DRM_FORMAT_NV12)
-+ y_minimum[id] = 8;
-+ else
-+ y_minimum[id] = 0;
- }
-
- for (i = 0; i < PLANE_CURSOR; i++) {
-@@ -3736,7 +3655,6 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc,
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
-
-- WARN_ON(skl_allocate_pipe_ddb(cstate, ddb) != 0);
- skl_build_pipe_wm(cstate, ddb, pipe_wm);
-
- if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
-@@ -3800,16 +3718,6 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
- memset(watermarks->plane_trans[pipe],
- 0, sizeof(uint32_t) * I915_MAX_PLANES);
- watermarks->plane_trans[pipe][PLANE_CURSOR] = 0;
--
-- /* Clear ddb entries for pipe */
-- memset(&watermarks->ddb.pipe[pipe], 0, sizeof(struct skl_ddb_entry));
-- memset(&watermarks->ddb.plane[pipe], 0,
-- sizeof(struct skl_ddb_entry) * I915_MAX_PLANES);
-- memset(&watermarks->ddb.y_plane[pipe], 0,
-- sizeof(struct skl_ddb_entry) * I915_MAX_PLANES);
-- memset(&watermarks->ddb.plane[pipe][PLANE_CURSOR], 0,
-- sizeof(struct skl_ddb_entry));
--
- }
-
- static int
---
-2.7.4
-
diff --git a/0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch b/0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch
deleted file mode 100644
index 9f839dfa2..000000000
--- a/0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From eacd0ecb98a93e3ff83a4479eadeb9cda05d3579 Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 12:41:01 +0200
-Subject: [PATCH 11/17] drm/i915/gen9: Calculate plane WM's from state
-
-Upstream: since drm-intel-next-2016-05-22
-commit 33815fa55b31a5de4b197c09926ecab3dfb79732
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:06:05 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:34:12 2016 -0700
-
- drm/i915/gen9: Calculate plane WM's from state
-
- In a future patch we'll want to calculate plane watermarks for in-flight
- atomic state rather than the already-committed state.
-
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-12-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_pm.c | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 80f9f18..3164f30 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3179,16 +3179,14 @@ static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb,
-
- static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
- struct intel_crtc_state *cstate,
-- struct intel_plane *intel_plane,
-+ struct intel_plane_state *intel_pstate,
- uint16_t ddb_allocation,
- int level,
- uint16_t *out_blocks, /* out */
- uint8_t *out_lines /* out */)
- {
-- struct drm_plane *plane = &intel_plane->base;
-- struct drm_framebuffer *fb = plane->state->fb;
-- struct intel_plane_state *intel_pstate =
-- to_intel_plane_state(plane->state);
-+ struct drm_plane_state *pstate = &intel_pstate->base;
-+ struct drm_framebuffer *fb = pstate->fb;
- uint32_t latency = dev_priv->wm.skl_latency[level];
- uint32_t method1, method2;
- uint32_t plane_bytes_per_line, plane_blocks_per_line;
-@@ -3203,7 +3201,7 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
- width = drm_rect_width(&intel_pstate->src) >> 16;
- height = drm_rect_height(&intel_pstate->src) >> 16;
-
-- if (intel_rotation_90_or_270(plane->state->rotation))
-+ if (intel_rotation_90_or_270(pstate->rotation))
- swap(width, height);
-
- cpp = drm_format_plane_cpp(fb->pixel_format, 0);
-@@ -3223,7 +3221,7 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
- fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) {
- uint32_t min_scanlines = 4;
- uint32_t y_tile_minimum;
-- if (intel_rotation_90_or_270(plane->state->rotation)) {
-+ if (intel_rotation_90_or_270(pstate->rotation)) {
- int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ?
- drm_format_plane_cpp(fb->pixel_format, 1) :
- drm_format_plane_cpp(fb->pixel_format, 0);
-@@ -3277,17 +3275,19 @@ static void skl_compute_wm_level(const struct drm_i915_private *dev_priv,
- struct drm_device *dev = dev_priv->dev;
- struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
- struct intel_plane *intel_plane;
-+ struct intel_plane_state *intel_pstate;
- uint16_t ddb_blocks;
- enum pipe pipe = intel_crtc->pipe;
-
- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
- int i = skl_wm_plane_id(intel_plane);
-
-+ intel_pstate = to_intel_plane_state(intel_plane->base.state);
- ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]);
-
- result->plane_en[i] = skl_compute_plane_wm(dev_priv,
- cstate,
-- intel_plane,
-+ intel_pstate,
- ddb_blocks,
- level,
- &result->plane_res_b[i],
---
-2.7.4
-
diff --git a/0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch b/0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch
deleted file mode 100644
index d0cb50bac..000000000
--- a/0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch
+++ /dev/null
@@ -1,156 +0,0 @@
-From c3d2591095045a8230361d55fadf15ce5dc9127d Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 12:41:12 +0200
-Subject: [PATCH 12/17] drm/i915/gen9: Allow watermark calculation on in-flight
- atomic state (v3)
-
-Upstream: since drm-intel-next-2016-05-22
-commit f4a967523ec7215a3ec867b7ed2e916bd34840e1
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:06:06 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:34:23 2016 -0700
-
- drm/i915/gen9: Allow watermark calculation on in-flight atomic state (v3)
-
- In an upcoming patch we'll move this calculation to the atomic 'check'
- phase so that the display update can be rejected early if no valid
- watermark programming is possible.
-
- v2:
- - Drop intel_pstate_for_cstate_plane() helper and add note about how
- the code needs to evolve in the future if we start allowing more than
- one pending commit against a CRTC. (Maarten)
-
- v3:
- - Only have skl_compute_wm_level calculate watermarks for enabled
- planes; we can just set the other planes on a CRTC to disabled
- without having to look at the plane state. This is important because
- despite our CRTC lock we can still have racing commits that modify
- a disabled plane's property without turning it on. (Maarten)
-
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-13-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_pm.c | 61 ++++++++++++++++++++++++++++++++---------
- 1 file changed, 48 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 3164f30..cd29ab6 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3266,23 +3266,56 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
- return true;
- }
-
--static void skl_compute_wm_level(const struct drm_i915_private *dev_priv,
-- struct skl_ddb_allocation *ddb,
-- struct intel_crtc_state *cstate,
-- int level,
-- struct skl_wm_level *result)
-+static int
-+skl_compute_wm_level(const struct drm_i915_private *dev_priv,
-+ struct skl_ddb_allocation *ddb,
-+ struct intel_crtc_state *cstate,
-+ int level,
-+ struct skl_wm_level *result)
- {
- struct drm_device *dev = dev_priv->dev;
-+ struct drm_atomic_state *state = cstate->base.state;
- struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
-+ struct drm_plane *plane;
- struct intel_plane *intel_plane;
- struct intel_plane_state *intel_pstate;
- uint16_t ddb_blocks;
- enum pipe pipe = intel_crtc->pipe;
-
-- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-+ /*
-+ * We'll only calculate watermarks for planes that are actually
-+ * enabled, so make sure all other planes are set as disabled.
-+ */
-+ memset(result, 0, sizeof(*result));
-+
-+ for_each_intel_plane_mask(dev, intel_plane, cstate->base.plane_mask) {
- int i = skl_wm_plane_id(intel_plane);
-
-- intel_pstate = to_intel_plane_state(intel_plane->base.state);
-+ plane = &intel_plane->base;
-+ intel_pstate = NULL;
-+ if (state)
-+ intel_pstate =
-+ intel_atomic_get_existing_plane_state(state,
-+ intel_plane);
-+
-+ /*
-+ * Note: If we start supporting multiple pending atomic commits
-+ * against the same planes/CRTC's in the future, plane->state
-+ * will no longer be the correct pre-state to use for the
-+ * calculations here and we'll need to change where we get the
-+ * 'unchanged' plane data from.
-+ *
-+ * For now this is fine because we only allow one queued commit
-+ * against a CRTC. Even if the plane isn't modified by this
-+ * transaction and we don't have a plane lock, we still have
-+ * the CRTC's lock, so we know that no other transactions are
-+ * racing with us to update it.
-+ */
-+ if (!intel_pstate)
-+ intel_pstate = to_intel_plane_state(plane->state);
-+
-+ WARN_ON(!intel_pstate->base.fb);
-+
- ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]);
-
- result->plane_en[i] = skl_compute_plane_wm(dev_priv,
-@@ -3293,6 +3326,8 @@ static void skl_compute_wm_level(const struct drm_i915_private *dev_priv,
- &result->plane_res_b[i],
- &result->plane_res_l[i]);
- }
-+
-+ return 0;
- }
-
- static uint32_t
-@@ -3587,14 +3622,14 @@ static void skl_flush_wm_values(struct drm_i915_private *dev_priv,
- }
- }
-
--static bool skl_update_pipe_wm(struct drm_crtc *crtc,
-+static bool skl_update_pipe_wm(struct drm_crtc_state *cstate,
- struct skl_ddb_allocation *ddb, /* out */
- struct skl_pipe_wm *pipe_wm /* out */)
- {
-- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
-+ struct intel_crtc *intel_crtc = to_intel_crtc(cstate->crtc);
-+ struct intel_crtc_state *intel_cstate = to_intel_crtc_state(cstate);
-
-- skl_build_pipe_wm(cstate, ddb, pipe_wm);
-+ skl_build_pipe_wm(intel_cstate, ddb, pipe_wm);
-
- if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
- return false;
-@@ -3634,7 +3669,7 @@ static void skl_update_other_pipe_wm(struct drm_device *dev,
- if (!intel_crtc->active)
- continue;
-
-- wm_changed = skl_update_pipe_wm(&intel_crtc->base,
-+ wm_changed = skl_update_pipe_wm(intel_crtc->base.state,
- &r->ddb, &pipe_wm);
-
- /*
-@@ -3752,7 +3787,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
-
- skl_clear_wm(results, intel_crtc->pipe);
-
-- if (!skl_update_pipe_wm(crtc, &results->ddb, pipe_wm))
-+ if (!skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm))
- return;
-
- skl_compute_wm_results(dev, pipe_wm, results, intel_crtc);
---
-2.7.4
-
diff --git a/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch b/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch
deleted file mode 100644
index 959860f95..000000000
--- a/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From b43247a865f73fa3b73a878236b5055bfb864169 Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 12:41:23 +0200
-Subject: [PATCH 13/17] drm/i915/gen9: Use a bitmask to track dirty pipe
- watermarks
-
-Upstream: since drm-intel-next-2016-05-22
-commit 2b4b9f35d94b1b533bc23110b040b04316480b28
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:06:07 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:34:40 2016 -0700
-
- drm/i915/gen9: Use a bitmask to track dirty pipe watermarks
-
- Slightly easier to work with than an array of bools.
-
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-14-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/i915_drv.h | 2 +-
- drivers/gpu/drm/i915/intel_pm.c | 10 +++++-----
- 2 files changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 237df9f..67c76b6 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1615,7 +1615,7 @@ struct skl_ddb_allocation {
- };
-
- struct skl_wm_values {
-- bool dirty[I915_MAX_PIPES];
-+ unsigned dirty_pipes;
- struct skl_ddb_allocation ddb;
- uint32_t wm_linetime[I915_MAX_PIPES];
- uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8];
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index cd29ab6..611c5a1 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3455,7 +3455,7 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv,
- int i, level, max_level = ilk_wm_max_level(dev);
- enum pipe pipe = crtc->pipe;
-
-- if (!new->dirty[pipe])
-+ if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0)
- continue;
-
- I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]);
-@@ -3680,7 +3680,7 @@ static void skl_update_other_pipe_wm(struct drm_device *dev,
- WARN_ON(!wm_changed);
-
- skl_compute_wm_results(dev, &pipe_wm, r, intel_crtc);
-- r->dirty[intel_crtc->pipe] = true;
-+ r->dirty_pipes |= drm_crtc_mask(&intel_crtc->base);
- }
- }
-
-@@ -3783,7 +3783,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
-
-
- /* Clear all dirty flags */
-- memset(results->dirty, 0, sizeof(bool) * I915_MAX_PIPES);
-+ results->dirty_pipes = 0;
-
- skl_clear_wm(results, intel_crtc->pipe);
-
-@@ -3791,7 +3791,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
- return;
-
- skl_compute_wm_results(dev, pipe_wm, results, intel_crtc);
-- results->dirty[intel_crtc->pipe] = true;
-+ results->dirty_pipes |= drm_crtc_mask(&intel_crtc->base);
-
- skl_update_other_pipe_wm(dev, crtc, results);
- skl_write_wm_values(dev_priv, results);
-@@ -3952,7 +3952,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
- if (!intel_crtc->active)
- return;
-
-- hw->dirty[pipe] = true;
-+ hw->dirty_pipes |= drm_crtc_mask(crtc);
-
- active->linetime = hw->wm_linetime[pipe];
-
---
-2.7.4
-
diff --git a/0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch b/0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch
deleted file mode 100644
index a868ebd1f..000000000
--- a/0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch
+++ /dev/null
@@ -1,254 +0,0 @@
-From 2dda82bdd570042820241e71c02ea36081835f67 Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 12:41:35 +0200
-Subject: [PATCH 14/17] drm/i915/gen9: Propagate watermark calculation failures
- up the call chain
-
-Upstream: since drm-intel-next-2016-05-22
-commit 55994c2c38a1101f84cdf277b228f830af8a9c1b
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:06:08 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:34:48 2016 -0700
-
- drm/i915/gen9: Propagate watermark calculation failures up the call chain
-
- Once we move watermark calculation to the atomic check phase, we'll want
- to start rejecting display configurations that exceed out watermark
- limits. At the moment we just assume that there's always a valid set of
- watermarks, even though this may not actually be true. Let's prepare by
- passing return codes up through the call stack in preparation.
-
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-15-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_display.c | 10 ++--
- drivers/gpu/drm/i915/intel_pm.c | 90 ++++++++++++++++++++++--------------
- 2 files changed, 61 insertions(+), 39 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b484fda..9ac2346 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -13222,7 +13222,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
- * phase. The code here should be run after the per-crtc and per-plane 'check'
- * handlers to ensure that all derived state has been updated.
- */
--static void calc_watermark_data(struct drm_atomic_state *state)
-+static int calc_watermark_data(struct drm_atomic_state *state)
- {
- struct drm_device *dev = state->dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
-@@ -13258,7 +13258,9 @@ static void calc_watermark_data(struct drm_atomic_state *state)
-
- /* Is there platform-specific watermark information to calculate? */
- if (dev_priv->display.compute_global_watermarks)
-- dev_priv->display.compute_global_watermarks(state);
-+ return dev_priv->display.compute_global_watermarks(state);
-+
-+ return 0;
- }
-
- /**
-@@ -13345,9 +13347,7 @@ static int intel_atomic_check(struct drm_device *dev,
- return ret;
-
- intel_fbc_choose_crtc(dev_priv, state);
-- calc_watermark_data(state);
--
-- return 0;
-+ return calc_watermark_data(state);
- }
-
- static int intel_atomic_prepare_commit(struct drm_device *dev,
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 611c5a1..ec22d93 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3177,13 +3177,14 @@ static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb,
- return false;
- }
-
--static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
-- struct intel_crtc_state *cstate,
-- struct intel_plane_state *intel_pstate,
-- uint16_t ddb_allocation,
-- int level,
-- uint16_t *out_blocks, /* out */
-- uint8_t *out_lines /* out */)
-+static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
-+ struct intel_crtc_state *cstate,
-+ struct intel_plane_state *intel_pstate,
-+ uint16_t ddb_allocation,
-+ int level,
-+ uint16_t *out_blocks, /* out */
-+ uint8_t *out_lines, /* out */
-+ bool *enabled /* out */)
- {
- struct drm_plane_state *pstate = &intel_pstate->base;
- struct drm_framebuffer *fb = pstate->fb;
-@@ -3195,8 +3196,10 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
- uint8_t cpp;
- uint32_t width = 0, height = 0;
-
-- if (latency == 0 || !cstate->base.active || !intel_pstate->visible)
-- return false;
-+ if (latency == 0 || !cstate->base.active || !intel_pstate->visible) {
-+ *enabled = false;
-+ return 0;
-+ }
-
- width = drm_rect_width(&intel_pstate->src) >> 16;
- height = drm_rect_height(&intel_pstate->src) >> 16;
-@@ -3257,13 +3260,16 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
- res_blocks++;
- }
-
-- if (res_blocks >= ddb_allocation || res_lines > 31)
-- return false;
-+ if (res_blocks >= ddb_allocation || res_lines > 31) {
-+ *enabled = false;
-+ return 0;
-+ }
-
- *out_blocks = res_blocks;
- *out_lines = res_lines;
-+ *enabled = true;
-
-- return true;
-+ return 0;
- }
-
- static int
-@@ -3281,6 +3287,7 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv,
- struct intel_plane_state *intel_pstate;
- uint16_t ddb_blocks;
- enum pipe pipe = intel_crtc->pipe;
-+ int ret;
-
- /*
- * We'll only calculate watermarks for planes that are actually
-@@ -3318,13 +3325,16 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv,
-
- ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]);
-
-- result->plane_en[i] = skl_compute_plane_wm(dev_priv,
-- cstate,
-- intel_pstate,
-- ddb_blocks,
-- level,
-- &result->plane_res_b[i],
-- &result->plane_res_l[i]);
-+ ret = skl_compute_plane_wm(dev_priv,
-+ cstate,
-+ intel_pstate,
-+ ddb_blocks,
-+ level,
-+ &result->plane_res_b[i],
-+ &result->plane_res_l[i],
-+ &result->plane_en[i]);
-+ if (ret)
-+ return ret;
- }
-
- return 0;
-@@ -3361,21 +3371,26 @@ static void skl_compute_transition_wm(struct intel_crtc_state *cstate,
- }
- }
-
--static void skl_build_pipe_wm(struct intel_crtc_state *cstate,
-- struct skl_ddb_allocation *ddb,
-- struct skl_pipe_wm *pipe_wm)
-+static int skl_build_pipe_wm(struct intel_crtc_state *cstate,
-+ struct skl_ddb_allocation *ddb,
-+ struct skl_pipe_wm *pipe_wm)
- {
- struct drm_device *dev = cstate->base.crtc->dev;
- const struct drm_i915_private *dev_priv = dev->dev_private;
- int level, max_level = ilk_wm_max_level(dev);
-+ int ret;
-
- for (level = 0; level <= max_level; level++) {
-- skl_compute_wm_level(dev_priv, ddb, cstate,
-- level, &pipe_wm->wm[level]);
-+ ret = skl_compute_wm_level(dev_priv, ddb, cstate,
-+ level, &pipe_wm->wm[level]);
-+ if (ret)
-+ return ret;
- }
- pipe_wm->linetime = skl_compute_linetime_wm(cstate);
-
- skl_compute_transition_wm(cstate, &pipe_wm->trans_wm);
-+
-+ return 0;
- }
-
- static void skl_compute_wm_results(struct drm_device *dev,
-@@ -3622,21 +3637,27 @@ static void skl_flush_wm_values(struct drm_i915_private *dev_priv,
- }
- }
-
--static bool skl_update_pipe_wm(struct drm_crtc_state *cstate,
-- struct skl_ddb_allocation *ddb, /* out */
-- struct skl_pipe_wm *pipe_wm /* out */)
-+static int skl_update_pipe_wm(struct drm_crtc_state *cstate,
-+ struct skl_ddb_allocation *ddb, /* out */
-+ struct skl_pipe_wm *pipe_wm, /* out */
-+ bool *changed /* out */)
- {
- struct intel_crtc *intel_crtc = to_intel_crtc(cstate->crtc);
- struct intel_crtc_state *intel_cstate = to_intel_crtc_state(cstate);
-+ int ret;
-
-- skl_build_pipe_wm(intel_cstate, ddb, pipe_wm);
-+ ret = skl_build_pipe_wm(intel_cstate, ddb, pipe_wm);
-+ if (ret)
-+ return ret;
-
- if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
-- return false;
-+ *changed = false;
-+ else
-+ *changed = true;
-
- intel_crtc->wm.active.skl = *pipe_wm;
-
-- return true;
-+ return 0;
- }
-
- static void skl_update_other_pipe_wm(struct drm_device *dev,
-@@ -3669,8 +3690,8 @@ static void skl_update_other_pipe_wm(struct drm_device *dev,
- if (!intel_crtc->active)
- continue;
-
-- wm_changed = skl_update_pipe_wm(intel_crtc->base.state,
-- &r->ddb, &pipe_wm);
-+ skl_update_pipe_wm(intel_crtc->base.state,
-+ &r->ddb, &pipe_wm, &wm_changed);
-
- /*
- * If we end up re-computing the other pipe WM values, it's
-@@ -3780,14 +3801,15 @@ static void skl_update_wm(struct drm_crtc *crtc)
- struct skl_wm_values *results = &dev_priv->wm.skl_results;
- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
- struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal;
--
-+ bool wm_changed;
-
- /* Clear all dirty flags */
- results->dirty_pipes = 0;
-
- skl_clear_wm(results, intel_crtc->pipe);
-
-- if (!skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm))
-+ skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm, &wm_changed);
-+ if (!wm_changed)
- return;
-
- skl_compute_wm_results(dev, pipe_wm, results, intel_crtc);
---
-2.7.4
-
diff --git a/0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch b/0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch
deleted file mode 100644
index 691b6b985..000000000
--- a/0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch
+++ /dev/null
@@ -1,302 +0,0 @@
-From 664f87c5bfcc7798bd5b16e14792f1e9ba2956ea Mon Sep 17 00:00:00 2001
-From: Matt Roper <matthew.d.roper@intel.com>
-Date: Thu, 12 May 2016 15:11:40 -0700
-Subject: [PATCH 15/17] drm/i915/gen9: Calculate watermarks during atomic
- 'check' (v2)
-
-Moving watermark calculation into the check phase will allow us to to
-reject display configurations for which there are no valid watermark
-values before we start trying to program the hardware (although those
-tests will come in a subsequent patch).
-
-Another advantage of moving this calculation to the check phase is that
-we can calculate the watermarks in a single shot as part of the atomic
-transaction. The watermark interfaces we inherited from our legacy
-modesetting days are a bit broken in the atomic design because they use
-per-crtc entry points but actually re-calculate and re-program something
-that is really more of a global state. That worked okay in the legacy
-modesetting world because operations only ever updated a single CRTC at
-a time. However in the atomic world, a transaction can involve multiple
-CRTC's, which means we wind up computing and programming the watermarks
-NxN times (where N is the number of CRTC's involved). With this patch
-we eliminate the redundant re-calculation of watermark data for atomic
-states (which was the cause of the WARN_ON(!wm_changed) problems that
-have plagued us for a while).
-
-We still need to work on the 'commit' side of watermark handling so that
-we aren't doing redundant NxN programming of watermarks, but that's
-content for future patches.
-
-v2:
- - Bail out of skl_write_wm_values() if the CRTC isn't active. Now that
- we set dirty_pipes to ~0 if the active pipes change (because
- we need to deal with DDB changes), we can now wind up here for
- disabled pipes, whereas we couldn't before.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89055
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92181
-Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
-Tested-by: Daniel Stone <daniels@collabora.com>
-Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1463091100-13747-1-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- drivers/gpu/drm/i915/intel_drv.h | 2 +-
- drivers/gpu/drm/i915/intel_pm.c | 140 +++++++++++++----------------------
- 3 files changed, 54 insertions(+), 90 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2190bac..a75daac 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -13627,7 +13627,7 @@ static int intel_atomic_commit(struct drm_device *dev,
- drm_atomic_helper_swap_state(dev, state);
- dev_priv->wm.config = intel_state->wm_config;
- dev_priv->wm.distrust_bios_wm = false;
-- dev_priv->wm.skl_results.ddb = intel_state->ddb;
-+ dev_priv->wm.skl_results = intel_state->wm_results;
- intel_shared_dpll_commit(state);
-
- if (intel_state->modeset) {
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 2218290..ab0be7a 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -314,7 +314,7 @@ struct intel_atomic_state {
- bool skip_intermediate_wm;
-
- /* Gen9+ only */
-- struct skl_ddb_allocation ddb;
-+ struct skl_wm_values wm_results;
- };
-
- struct intel_plane_state {
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 342aa66..b072417 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3221,23 +3221,6 @@ static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
- return ret;
- }
-
--static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb,
-- const struct intel_crtc *intel_crtc)
--{
-- struct drm_device *dev = intel_crtc->base.dev;
-- struct drm_i915_private *dev_priv = dev->dev_private;
-- const struct skl_ddb_allocation *cur_ddb = &dev_priv->wm.skl_hw.ddb;
--
-- /*
-- * If ddb allocation of pipes changed, it may require recalculation of
-- * watermarks
-- */
-- if (memcmp(new_ddb->pipe, cur_ddb->pipe, sizeof(new_ddb->pipe)))
-- return true;
--
-- return false;
--}
--
- static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
- struct intel_crtc_state *cstate,
- struct intel_plane_state *intel_pstate,
-@@ -3533,6 +3516,8 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv,
-
- if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0)
- continue;
-+ if (!crtc->active)
-+ continue;
-
- I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]);
-
-@@ -3716,66 +3701,9 @@ static int skl_update_pipe_wm(struct drm_crtc_state *cstate,
- else
- *changed = true;
-
-- intel_crtc->wm.active.skl = *pipe_wm;
--
- return 0;
- }
-
--static void skl_update_other_pipe_wm(struct drm_device *dev,
-- struct drm_crtc *crtc,
-- struct skl_wm_values *r)
--{
-- struct intel_crtc *intel_crtc;
-- struct intel_crtc *this_crtc = to_intel_crtc(crtc);
--
-- /*
-- * If the WM update hasn't changed the allocation for this_crtc (the
-- * crtc we are currently computing the new WM values for), other
-- * enabled crtcs will keep the same allocation and we don't need to
-- * recompute anything for them.
-- */
-- if (!skl_ddb_allocation_changed(&r->ddb, this_crtc))
-- return;
--
-- /*
-- * Otherwise, because of this_crtc being freshly enabled/disabled, the
-- * other active pipes need new DDB allocation and WM values.
-- */
-- for_each_intel_crtc(dev, intel_crtc) {
-- struct skl_pipe_wm pipe_wm = {};
-- bool wm_changed;
--
-- if (this_crtc->pipe == intel_crtc->pipe)
-- continue;
--
-- if (!intel_crtc->active)
-- continue;
--
-- skl_update_pipe_wm(intel_crtc->base.state,
-- &r->ddb, &pipe_wm, &wm_changed);
--
-- /*
-- * If we end up re-computing the other pipe WM values, it's
-- * because it was really needed, so we expect the WM values to
-- * be different.
-- */
-- WARN_ON(!wm_changed);
--
-- skl_compute_wm_results(dev, &pipe_wm, r, intel_crtc);
-- r->dirty_pipes |= drm_crtc_mask(&intel_crtc->base);
-- }
--}
--
--static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
--{
-- watermarks->wm_linetime[pipe] = 0;
-- memset(watermarks->plane[pipe], 0,
-- sizeof(uint32_t) * 8 * I915_MAX_PLANES);
-- memset(watermarks->plane_trans[pipe],
-- 0, sizeof(uint32_t) * I915_MAX_PLANES);
-- watermarks->plane_trans[pipe][PLANE_CURSOR] = 0;
--}
--
- static int
- skl_compute_ddb(struct drm_atomic_state *state)
- {
-@@ -3783,6 +3711,7 @@ skl_compute_ddb(struct drm_atomic_state *state)
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
- struct intel_crtc *intel_crtc;
-+ struct skl_ddb_allocation *ddb = &intel_state->wm_results.ddb;
- unsigned realloc_pipes = dev_priv->active_crtcs;
- int ret;
-
-@@ -3808,8 +3737,10 @@ skl_compute_ddb(struct drm_atomic_state *state)
- * any other display updates race with this transaction, so we need
- * to grab the lock on *all* CRTC's.
- */
-- if (intel_state->active_pipe_changes)
-+ if (intel_state->active_pipe_changes) {
- realloc_pipes = ~0;
-+ intel_state->wm_results.dirty_pipes = ~0;
-+ }
-
- for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) {
- struct intel_crtc_state *cstate;
-@@ -3818,7 +3749,7 @@ skl_compute_ddb(struct drm_atomic_state *state)
- if (IS_ERR(cstate))
- return PTR_ERR(cstate);
-
-- ret = skl_allocate_pipe_ddb(cstate, &intel_state->ddb);
-+ ret = skl_allocate_pipe_ddb(cstate, ddb);
- if (ret)
- return ret;
- }
-@@ -3831,8 +3762,11 @@ skl_compute_wm(struct drm_atomic_state *state)
- {
- struct drm_crtc *crtc;
- struct drm_crtc_state *cstate;
-- int ret, i;
-+ struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
-+ struct skl_wm_values *results = &intel_state->wm_results;
-+ struct skl_pipe_wm *pipe_wm;
- bool changed = false;
-+ int ret, i;
-
- /*
- * If this transaction isn't actually touching any CRTC's, don't
-@@ -3847,10 +3781,45 @@ skl_compute_wm(struct drm_atomic_state *state)
- if (!changed)
- return 0;
-
-+ /* Clear all dirty flags */
-+ results->dirty_pipes = 0;
-+
- ret = skl_compute_ddb(state);
- if (ret)
- return ret;
-
-+ /*
-+ * Calculate WM's for all pipes that are part of this transaction.
-+ * Note that the DDB allocation above may have added more CRTC's that
-+ * weren't otherwise being modified (and set bits in dirty_pipes) if
-+ * pipe allocations had to change.
-+ *
-+ * FIXME: Now that we're doing this in the atomic check phase, we
-+ * should allow skl_update_pipe_wm() to return failure in cases where
-+ * no suitable watermark values can be found.
-+ */
-+ for_each_crtc_in_state(state, crtc, cstate, i) {
-+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+ struct intel_crtc_state *intel_cstate =
-+ to_intel_crtc_state(cstate);
-+
-+ pipe_wm = &intel_cstate->wm.skl.optimal;
-+ ret = skl_update_pipe_wm(cstate, &results->ddb, pipe_wm,
-+ &changed);
-+ if (ret)
-+ return ret;
-+
-+ if (changed)
-+ results->dirty_pipes |= drm_crtc_mask(crtc);
-+
-+ if ((results->dirty_pipes & drm_crtc_mask(crtc)) == 0)
-+ /* This pipe's WM's did not change */
-+ continue;
-+
-+ intel_cstate->update_wm_pre = true;
-+ skl_compute_wm_results(crtc->dev, pipe_wm, results, intel_crtc);
-+ }
-+
- return 0;
- }
-
-@@ -3862,26 +3831,21 @@ static void skl_update_wm(struct drm_crtc *crtc)
- struct skl_wm_values *results = &dev_priv->wm.skl_results;
- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
- struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal;
-- bool wm_changed;
--
-- /* Clear all dirty flags */
-- results->dirty_pipes = 0;
-
-- skl_clear_wm(results, intel_crtc->pipe);
--
-- skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm, &wm_changed);
-- if (!wm_changed)
-+ if ((results->dirty_pipes & drm_crtc_mask(crtc)) == 0)
- return;
-
-- skl_compute_wm_results(dev, pipe_wm, results, intel_crtc);
-- results->dirty_pipes |= drm_crtc_mask(&intel_crtc->base);
-+ intel_crtc->wm.active.skl = *pipe_wm;
-+
-+ mutex_lock(&dev_priv->wm.wm_mutex);
-
-- skl_update_other_pipe_wm(dev, crtc, results);
- skl_write_wm_values(dev_priv, results);
- skl_flush_wm_values(dev_priv, results);
-
- /* store the new configuration */
- dev_priv->wm.skl_hw = *results;
-+
-+ mutex_unlock(&dev_priv->wm.wm_mutex);
- }
-
- static void ilk_compute_wm_config(struct drm_device *dev,
---
-2.7.4
-
diff --git a/0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch b/0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch
deleted file mode 100644
index fb59572bd..000000000
--- a/0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 7731c187f1f77501b7dddf419a06c1b42b0f1388 Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Mon, 20 Jun 2016 12:42:00 +0200
-Subject: [PATCH 16/17] drm/i915/gen9: Reject display updates that exceed wm
- limitations (v2)
-
-Upstream: since drm-intel-next-2016-05-22
-commit 6b6bada7d476b586d85b1f9df43125804877e09f
-
-Author: Matt Roper <matthew.d.roper@intel.com>
-AuthorDate: Thu May 12 07:06:10 2016 -0700
-Commit: Matt Roper <matthew.d.roper@intel.com>
-CommitDate: Fri May 13 07:36:04 2016 -0700
-
- drm/i915/gen9: Reject display updates that exceed wm limitations (v2)
-
- If we can't find any valid level 0 watermark values for the requested
- atomic transaction, reject the configuration before we try to start
- programming the hardware.
-
- v2:
- - Add extra debugging output when we reject level 0 watermarks so that
- we can more easily debug how/why they were rejected.
-
- Cc: Lyude Paul <cpaul@redhat.com>
- Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
- Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
- Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-17-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_pm.c | 17 ++++++++++++++++-
- 1 file changed, 16 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 73e5242..70dcd2e 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3245,7 +3245,22 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
-
- if (res_blocks >= ddb_allocation || res_lines > 31) {
- *enabled = false;
-- return 0;
-+
-+ /*
-+ * If there are no valid level 0 watermarks, then we can't
-+ * support this display configuration.
-+ */
-+ if (level) {
-+ return 0;
-+ } else {
-+ DRM_DEBUG_KMS("Requested display configuration exceeds system watermark limitations\n");
-+ DRM_DEBUG_KMS("Plane %d.%d: blocks required = %u/%u, lines required = %u/31\n",
-+ to_intel_crtc(cstate->base.crtc)->pipe,
-+ skl_wm_plane_id(to_intel_plane(pstate->plane)),
-+ res_blocks, ddb_allocation, res_lines);
-+
-+ return -EINVAL;
-+ }
- }
-
- *out_blocks = res_blocks;
---
-2.7.4
-
diff --git a/0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch b/0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch
deleted file mode 100644
index 73a6dacc6..000000000
--- a/0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From 73a35468564f4e47deade0a4a5eb7ec289611ebc Mon Sep 17 00:00:00 2001
-From: Matt Roper <matthew.d.roper@intel.com>
-Date: Thu, 12 May 2016 07:06:11 -0700
-Subject: [PATCH 17/17] drm/i915: Remove wm_config from
- dev_priv/intel_atomic_state
-
-We calculate the watermark config into intel_atomic_state and then save
-it into dev_priv, but never actually use it from there. This is
-left-over from some early ILK-style watermark programming designs that
-got changed over time.
-
-Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
-Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-18-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/i915_drv.h | 3 ---
- drivers/gpu/drm/i915/intel_display.c | 31 -------------------------------
- drivers/gpu/drm/i915/intel_drv.h | 1 -
- 3 files changed, 35 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index e7bde72..608f8e4 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1961,9 +1961,6 @@ struct drm_i915_private {
- */
- uint16_t skl_latency[8];
-
-- /* Committed wm config */
-- struct intel_wm_config config;
--
- /*
- * The skl_wm_values structure is a bit too big for stack
- * allocation, so we keep the staging struct where we store
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index a75daac..9c109c6 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -13343,35 +13343,6 @@ static int calc_watermark_data(struct drm_atomic_state *state)
- {
- struct drm_device *dev = state->dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
-- struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
-- struct drm_crtc *crtc;
-- struct drm_crtc_state *cstate;
-- struct drm_plane *plane;
-- struct drm_plane_state *pstate;
--
-- /*
-- * Calculate watermark configuration details now that derived
-- * plane/crtc state is all properly updated.
-- */
-- drm_for_each_crtc(crtc, dev) {
-- cstate = drm_atomic_get_existing_crtc_state(state, crtc) ?:
-- crtc->state;
--
-- if (cstate->active)
-- intel_state->wm_config.num_pipes_active++;
-- }
-- drm_for_each_legacy_plane(plane, dev) {
-- pstate = drm_atomic_get_existing_plane_state(state, plane) ?:
-- plane->state;
--
-- if (!to_intel_plane_state(pstate)->visible)
-- continue;
--
-- intel_state->wm_config.sprites_enabled = true;
-- if (pstate->crtc_w != pstate->src_w >> 16 ||
-- pstate->crtc_h != pstate->src_h >> 16)
-- intel_state->wm_config.sprites_scaled = true;
-- }
-
- /* Is there platform-specific watermark information to calculate? */
- if (dev_priv->display.compute_global_watermarks)
-@@ -13625,7 +13596,6 @@ static int intel_atomic_commit(struct drm_device *dev,
- }
-
- drm_atomic_helper_swap_state(dev, state);
-- dev_priv->wm.config = intel_state->wm_config;
- dev_priv->wm.distrust_bios_wm = false;
- dev_priv->wm.skl_results = intel_state->wm_results;
- intel_shared_dpll_commit(state);
-@@ -15405,7 +15375,6 @@ retry:
- }
-
- /* Write calculated watermark values back */
-- to_i915(dev)->wm.config = to_intel_atomic_state(state)->wm_config;
- for_each_crtc_in_state(state, crtc, cstate, i) {
- struct intel_crtc_state *cs = to_intel_crtc_state(cstate);
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index ab0be7a..8d73c20 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -305,7 +305,6 @@ struct intel_atomic_state {
- unsigned int min_pixclk[I915_MAX_PIPES];
-
- struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS];
-- struct intel_wm_config wm_config;
-
- /*
- * Current watermarks can't be trusted during hardware readout, so
---
-2.7.4
-
diff --git a/ARM-Drop-fixed-200-Hz-timer-requirement-from-Samsung-platforms.patch b/ARM-Drop-fixed-200-Hz-timer-requirement-from-Samsung-platforms.patch
new file mode 100644
index 000000000..bf389545b
--- /dev/null
+++ b/ARM-Drop-fixed-200-Hz-timer-requirement-from-Samsung-platforms.patch
@@ -0,0 +1,88 @@
+From patchwork Fri Nov 18 11:15:12 2016
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [v3] ARM: Drop fixed 200 Hz timer requirement from Samsung platforms
+From: Krzysztof Kozlowski <krzk@kernel.org>
+X-Patchwork-Id: 9436225
+Message-Id: <1479467712-5218-1-git-send-email-krzk@kernel.org>
+To: Russell King <linux@armlinux.org.uk>, Kukjin Kim <kgene@kernel.org>,
+ Krzysztof Kozlowski <krzk@kernel.org>,
+ Javier Martinez Canillas <javier@osg.samsung.com>,
+ linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org,
+ linux-kernel@vger.kernel.org
+Cc: Arnd Bergmann <arnd@arndb.de>,
+ Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
+ Tomasz Figa <tomasz.figa@gmail.com>,
+ Ben Dooks <ben.dooks@codethink.co.uk>,
+ Sylwester Nawrocki <s.nawrocki@samsung.com>,
+ Lee Jones <lee.jones@linaro.org>,
+ Marek Szyprowski <m.szyprowski@samsung.com>
+Date: Fri, 18 Nov 2016 13:15:12 +0200
+
+All Samsung platforms, including the Exynos, are selecting HZ_FIXED with
+200 Hz. Unfortunately in case of multiplatform image this affects also
+other platforms when Exynos is enabled.
+
+This looks like an very old legacy code, dating back to initial
+upstreaming of S3C24xx. Probably it was required for s3c24xx timer
+driver, which was removed in commit ad38bdd15d5b ("ARM: SAMSUNG: Remove
+unused plat-samsung/time.c").
+
+Since then, this fixed 200 Hz spread everywhere, including out-of-tree
+Samsung kernels (SoC vendor's and Tizen's). I believe this choice
+was rather an effect of coincidence instead of conscious choice.
+
+On S3C24xx, the PWM counter is only 16 bit wide, and with the
+typical 12MHz input clock that overflows every 5.5ms. This works
+with HZ=200 or higher but not with HZ=100 which needs a 10ms
+interval between ticks. On Later chips (S3C64xx, S5P and EXYNOS),
+the counter is 32 bits and does not have this problem.
+
+The new samsung_pwm_timer driver solves the problem by scaling the input
+clock by a factor of 50 on S3C24xx, which makes it less accurate but
+allows HZ=100 as well as CONFIG_NO_HZ with fewer wakeups.
+
+Few perf mem and sched tests on Odroid XU3 board (Exynos5422, 4x Cortex
+A7, 4x Cortex A15) show no regressions when switching from 200 Hz to
+other values.
+
+Reported-by: Lee Jones <lee.jones@linaro.org>
+[Dropping of 200_HZ from S3C/S5P was suggested by Arnd]
+Reported-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
+Cc: Kukjin Kim <kgene@kernel.org>
+[Tested on Exynos5800]
+Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
+Acked-by: Kukjin Kim <kgene@kernel.org>
+[Tested on S3C2440]
+Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
+---
+
+Changes since v2:
+1. Extend message.
+2. Add Kukjin's ack.
+3. Add Sylwester's tested-by.
+
+Changes since v1:
+1. Add Javier's tested-by.
+2. Drop HZ_FIXED also from ARCH_S5PV210 and ARCH_S3C24XX after Arnd
+ suggestions and analysis.
+---
+ arch/arm/Kconfig | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index b5d529fdffab..ced2e08a9d08 100644
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -1496,8 +1496,7 @@ source kernel/Kconfig.preempt
+
+ config HZ_FIXED
+ int
+- default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
+- ARCH_S5PV210 || ARCH_EXYNOS4
++ default 200 if ARCH_EBSA110
+ default 128 if SOC_AT91RM9200
+ default 0
+
diff --git a/ARM-OMAP4-Fix-crashes.patch b/ARM-OMAP4-Fix-crashes.patch
new file mode 100644
index 000000000..5a4a257e1
--- /dev/null
+++ b/ARM-OMAP4-Fix-crashes.patch
@@ -0,0 +1,46 @@
+From patchwork Wed Oct 26 15:17:01 2016
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [3/5] ARM: OMAP4+: Fix bad fallthrough for cpuidle
+From: Tony Lindgren <tony@atomide.com>
+X-Patchwork-Id: 9397501
+Message-Id: <20161026151703.24730-4-tony@atomide.com>
+To: linux-omap@vger.kernel.org
+Cc: Nishanth Menon <nm@ti.com>, Dmitry Lifshitz <lifshitz@compulab.co.il>,
+ Dave Gerlach <d-gerlach@ti.com>,
+ Enric Balletbo Serra <eballetbo@gmail.com>,
+ "Dr . H . Nikolaus Schaller" <hns@goldelico.com>,
+ Pau Pajuel <ppajuel@gmail.com>, Grazvydas Ignotas <notasas@gmail.com>,
+ Benoit Cousson <bcousson@baylibre.com>,
+ Santosh Shilimkar <ssantosh@kernel.org>,
+ Javier Martinez Canillas <javier@dowhile0.org>,
+ Robert Nelson <robertcnelson@gmail.com>,
+ Marek Belisko <marek@goldelico.com>, linux-arm-kernel@lists.infradead.org
+Date: Wed, 26 Oct 2016 08:17:01 -0700
+
+We don't want to fall through to a bunch of errors for retention
+if PM_OMAP4_CPU_OSWR_DISABLE is not configured for a SoC.
+
+Fixes: 6099dd37c669 ("ARM: OMAP5 / DRA7: Enable CPU RET on suspend")
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+---
+ arch/arm/mach-omap2/omap-mpuss-lowpower.c | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
++++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+@@ -244,10 +244,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
+ save_state = 1;
+ break;
+ case PWRDM_POWER_RET:
+- if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) {
++ if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE))
+ save_state = 0;
+- break;
+- }
++ break;
+ default:
+ /*
+ * CPUx CSWR is invalid hardware state. Also CPUx OSWR
diff --git a/ARM-tegra-fix-erroneous-address-in-dts.patch b/ARM-tegra-fix-erroneous-address-in-dts.patch
deleted file mode 100644
index 88521751a..000000000
--- a/ARM-tegra-fix-erroneous-address-in-dts.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From b5c86b7496d74f6e454bcab5166efa023e1f0459 Mon Sep 17 00:00:00 2001
-From: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
-Date: Mon, 18 Jul 2016 11:46:48 +0200
-Subject: [PATCH 1731/1791] ARM: tegra: fix erroneous address in dts
-
-c90bb7b enabled the high speed UARTs of the Jetson TK1. Due to a merge
-quirk, wrong addresses were introduced. Fix it and use the correct
-addresses.
-
-Thierry let me know, that there is another patch (b5896f67ab3c in
-linux-next) in preparation which removes all the '0,' prefixes of unit
-addresses on Tegra124 and is planned to go upstream in 4.8, so
-this patch will get reverted then.
-
-But for the moment, this patch is necessary to fix current misbehaviour.
-
-Fixes: c90bb7b9b9 ("ARM: tegra: Add high speed UARTs to Jetson TK1 device tree")
-Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
-Acked-by: Thierry Reding <thierry.reding@gmail.com>
-Cc: stable@vger.kernel.org # v4.7
-Cc: linux-tegra@vger.kernel.org
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----
- arch/arm/boot/dts/tegra124-jetson-tk1.dts | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
-index e52b824..6403e0d 100644
---- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
-+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
-@@ -1382,7 +1382,7 @@
- * Pin 41: BR_UART1_TXD
- * Pin 44: BR_UART1_RXD
- */
-- serial@70006000 {
-+ serial@0,70006000 {
- compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
- status = "okay";
- };
-@@ -1394,7 +1394,7 @@
- * Pin 71: UART2_CTS_L
- * Pin 74: UART2_RTS_L
- */
-- serial@70006040 {
-+ serial@0,70006040 {
- compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
- status = "okay";
- };
---
-2.9.2
-
diff --git a/Add-EFI-signature-data-types.patch b/Add-EFI-signature-data-types.patch
index 094c5a34c..c376c48b3 100644
--- a/Add-EFI-signature-data-types.patch
+++ b/Add-EFI-signature-data-types.patch
@@ -1,7 +1,7 @@
-From 5216de8394ff599e41c8540c0572368c18c51459 Mon Sep 17 00:00:00 2001
+From ba3f737b8521314b62edaa7d4cc4bdc9aeefe394 Mon Sep 17 00:00:00 2001
From: Dave Howells <dhowells@redhat.com>
Date: Tue, 23 Oct 2012 09:30:54 -0400
-Subject: [PATCH 4/9] Add EFI signature data types
+Subject: [PATCH 15/20] Add EFI signature data types
Add the data types that are used for containing hashes, keys and certificates
for cryptographic verification.
@@ -11,27 +11,24 @@ Upstream-status: Fedora mustard for now
Signed-off-by: David Howells <dhowells@redhat.com>
---
- include/linux/efi.h | 20 ++++++++++++++++++++
- 1 file changed, 20 insertions(+)
+ include/linux/efi.h | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
diff --git a/include/linux/efi.h b/include/linux/efi.h
-index 8cb38cfcba74..8c274b4ea8e6 100644
+index 5af91b58afae..190858d62fe3 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
-@@ -647,6 +647,12 @@ void efi_native_runtime_setup(void);
- EFI_GUID(0x4a67b082, 0x0a4c, 0x41cf, \
- 0xb6, 0xc7, 0x44, 0x0b, 0x29, 0xbb, 0x8c, 0x4f)
+@@ -603,6 +603,9 @@ void efi_native_runtime_setup(void);
+ #define LINUX_EFI_ARM_SCREEN_INFO_TABLE_GUID EFI_GUID(0xe03fc20a, 0x85dc, 0x406e, 0xb9, 0x0e, 0x4a, 0xb5, 0x02, 0x37, 0x1d, 0x95)
+ #define LINUX_EFI_LOADER_ENTRY_GUID EFI_GUID(0x4a67b082, 0x0a4c, 0x41cf, 0xb6, 0xc7, 0x44, 0x0b, 0x29, 0xbb, 0x8c, 0x4f)
-+#define EFI_CERT_SHA256_GUID \
-+ EFI_GUID( 0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28 )
-+
-+#define EFI_CERT_X509_GUID \
-+ EFI_GUID( 0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72 )
++#define EFI_CERT_SHA256_GUID EFI_GUID(0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28)
++#define EFI_CERT_X509_GUID EFI_GUID(0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72)
+
typedef struct {
efi_guid_t guid;
u64 table;
-@@ -879,6 +885,20 @@ typedef struct {
+@@ -853,6 +856,20 @@ typedef struct {
efi_memory_desc_t entry[0];
} efi_memory_attributes_table_t;
@@ -53,5 +50,5 @@ index 8cb38cfcba74..8c274b4ea8e6 100644
* All runtime access to EFI goes through this structure:
*/
--
-2.5.5
+2.9.3
diff --git a/Add-an-EFI-signature-blob-parser-and-key-loader.patch b/Add-an-EFI-signature-blob-parser-and-key-loader.patch
index 3697a4b74..f57abc9f2 100644
--- a/Add-an-EFI-signature-blob-parser-and-key-loader.patch
+++ b/Add-an-EFI-signature-blob-parser-and-key-loader.patch
@@ -1,7 +1,7 @@
-From e36a2d65e25fdf42b50aa5dc17583d7bfd09c4c4 Mon Sep 17 00:00:00 2001
+From 822b4b3eb76ca451a416a51f0a7bfedfa5c5ea39 Mon Sep 17 00:00:00 2001
From: Dave Howells <dhowells@redhat.com>
Date: Tue, 23 Oct 2012 09:36:28 -0400
-Subject: [PATCH 5/9] Add an EFI signature blob parser and key loader.
+Subject: [PATCH 16/20] Add an EFI signature blob parser and key loader.
X.509 certificates are loaded into the specified keyring as asymmetric type
keys.
@@ -17,10 +17,10 @@ Signed-off-by: David Howells <dhowells@redhat.com>
create mode 100644 crypto/asymmetric_keys/efi_parser.c
diff --git a/crypto/asymmetric_keys/Kconfig b/crypto/asymmetric_keys/Kconfig
-index e28e912000a7..94024e8aedaa 100644
+index 331f6baf2df8..5f9002d3192e 100644
--- a/crypto/asymmetric_keys/Kconfig
+++ b/crypto/asymmetric_keys/Kconfig
-@@ -60,4 +60,12 @@ config SIGNED_PE_FILE_VERIFICATION
+@@ -61,4 +61,12 @@ config SIGNED_PE_FILE_VERIFICATION
This option provides support for verifying the signature(s) on a
signed PE binary.
@@ -160,10 +160,10 @@ index 000000000000..636feb18b733
+ return 0;
+}
diff --git a/include/linux/efi.h b/include/linux/efi.h
-index 8c274b4ea8e6..ff1877145aa4 100644
+index 190858d62fe3..668aa1244885 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
-@@ -1044,6 +1044,10 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm,
+@@ -1025,6 +1025,10 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm,
char * __init efi_md_typeattr_format(char *buf, size_t size,
const efi_memory_desc_t *md);
@@ -175,5 +175,5 @@ index 8c274b4ea8e6..ff1877145aa4 100644
* efi_range_is_wc - check the WC bit on an address range
* @start: starting kvirt address
--
-2.5.5
+2.9.3
diff --git a/Add-secure_modules-call.patch b/Add-secure_modules-call.patch
index 5c272a983..99d04c43e 100644
--- a/Add-secure_modules-call.patch
+++ b/Add-secure_modules-call.patch
@@ -1,4 +1,4 @@
-From 0f6eec5ca124baf1372fb4edeacd11a002378f5e Mon Sep 17 00:00:00 2001
+From 80d2d273b36b33d46820ab128c7a5b068389f643 Mon Sep 17 00:00:00 2001
From: Matthew Garrett <matthew.garrett@nebula.com>
Date: Fri, 9 Aug 2013 17:58:15 -0400
Subject: [PATCH 01/20] Add secure_modules() call
@@ -17,10 +17,10 @@ Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
2 files changed, 16 insertions(+)
diff --git a/include/linux/module.h b/include/linux/module.h
-index 3daf2b3..082298a 100644
+index 0c3207d26ac0..05bd6c989a0c 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
-@@ -655,6 +655,8 @@ static inline bool is_livepatch_module(struct module *mod)
+@@ -641,6 +641,8 @@ static inline bool is_livepatch_module(struct module *mod)
}
#endif /* CONFIG_LIVEPATCH */
@@ -28,8 +28,8 @@ index 3daf2b3..082298a 100644
+
#else /* !CONFIG_MODULES... */
- /* Given an address, look for it in the exception tables. */
-@@ -771,6 +773,10 @@ static inline bool module_requested_async_probing(struct module *module)
+ static inline struct module *__module_address(unsigned long addr)
+@@ -750,6 +752,10 @@ static inline bool module_requested_async_probing(struct module *module)
return false;
}
@@ -41,10 +41,10 @@ index 3daf2b3..082298a 100644
#ifdef CONFIG_SYSFS
diff --git a/kernel/module.c b/kernel/module.c
-index 5f71aa6..3c38496 100644
+index f57dd63186e6..cb864505d020 100644
--- a/kernel/module.c
+++ b/kernel/module.c
-@@ -4199,3 +4199,13 @@ void module_layout(struct module *mod,
+@@ -4284,3 +4284,13 @@ void module_layout(struct module *mod,
}
EXPORT_SYMBOL(module_layout);
#endif
@@ -59,5 +59,5 @@ index 5f71aa6..3c38496 100644
+}
+EXPORT_SYMBOL(secure_modules);
--
-2.5.5
+2.9.3
diff --git a/AllWinner-net-emac.patch b/AllWinner-net-emac.patch
new file mode 100644
index 000000000..42dadabab
--- /dev/null
+++ b/AllWinner-net-emac.patch
@@ -0,0 +1,2669 @@
+From fb909e29d6c073f4c5777a0db75df72b726e4314 Mon Sep 17 00:00:00 2001
+From: Corentin LABBE <clabbe.montjoie@gmail.com>
+Date: Fri, 7 Oct 2016 10:25:48 +0200
+Subject: [PATCH 1/8] ethernet: add sun8i-emac driver
+
+This patch add support for sun8i-emac ethernet MAC hardware.
+It could be found in Allwinner H3/A83T/A64 SoCs.
+
+It supports 10/100/1000 Mbit/s speed with half/full duplex.
+It can use an internal PHY (MII 10/100) or an external PHY
+via RGMII/RMII.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+---
+ drivers/net/ethernet/allwinner/Kconfig | 13 +
+ drivers/net/ethernet/allwinner/Makefile | 1 +
+ drivers/net/ethernet/allwinner/sun8i-emac.c | 2266 +++++++++++++++++++++++++++
+ 3 files changed, 2280 insertions(+)
+ create mode 100644 drivers/net/ethernet/allwinner/sun8i-emac.c
+
+diff --git a/drivers/net/ethernet/allwinner/Kconfig b/drivers/net/ethernet/allwinner/Kconfig
+index 47da7e7..060569c 100644
+--- a/drivers/net/ethernet/allwinner/Kconfig
++++ b/drivers/net/ethernet/allwinner/Kconfig
+@@ -33,4 +33,17 @@ config SUN4I_EMAC
+ To compile this driver as a module, choose M here. The module
+ will be called sun4i-emac.
+
++config SUN8I_EMAC
++ tristate "Allwinner sun8i EMAC support"
++ depends on ARCH_SUNXI || COMPILE_TEST
++ depends on OF
++ select MII
++ select PHYLIB
++ ---help---
++ This driver support the sun8i EMAC ethernet driver present on
++ H3/A83T/A64 Allwinner SoCs.
++
++ To compile this driver as a module, choose M here. The module
++ will be called sun8i-emac.
++
+ endif # NET_VENDOR_ALLWINNER
+diff --git a/drivers/net/ethernet/allwinner/Makefile b/drivers/net/ethernet/allwinner/Makefile
+index 03129f7..8bd1693c 100644
+--- a/drivers/net/ethernet/allwinner/Makefile
++++ b/drivers/net/ethernet/allwinner/Makefile
+@@ -3,3 +3,4 @@
+ #
+
+ obj-$(CONFIG_SUN4I_EMAC) += sun4i-emac.o
++obj-$(CONFIG_SUN8I_EMAC) += sun8i-emac.o
+diff --git a/drivers/net/ethernet/allwinner/sun8i-emac.c b/drivers/net/ethernet/allwinner/sun8i-emac.c
+new file mode 100644
+index 0000000..bc74467
+--- /dev/null
++++ b/drivers/net/ethernet/allwinner/sun8i-emac.c
+@@ -0,0 +1,2266 @@
++/*
++ * sun8i-emac driver
++ *
++ * Copyright (C) 2015-2016 Corentin LABBE <clabbe.montjoie@gmail.com>
++ *
++ * This is the driver for Allwinner Ethernet MAC found in H3/A83T/A64 SoC
++ *
++ * TODO:
++ * - MAC filtering
++ * - Jumbo frame
++ * - features rx-all (NETIF_F_RXALL_BIT)
++ * - PM runtime
++ */
++#include <linux/bitops.h>
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/etherdevice.h>
++#include <linux/interrupt.h>
++#include <linux/iopoll.h>
++#include <linux/mii.h>
++#include <linux/module.h>
++#include <linux/netdevice.h>
++#include <linux/of_device.h>
++#include <linux/of_mdio.h>
++#include <linux/of_net.h>
++#include <linux/phy.h>
++#include <linux/pinctrl/consumer.h>
++#include <linux/pinctrl/pinctrl.h>
++#include <linux/platform_device.h>
++#include <linux/reset.h>
++#include <linux/scatterlist.h>
++#include <linux/skbuff.h>
++#include <linux/mfd/syscon.h>
++#include <linux/regmap.h>
++
++#define EMAC_BASIC_CTL0 0x00
++#define EMAC_BASIC_CTL1 0x04
++#define EMAC_INT_STA 0x08
++#define EMAC_INT_EN 0x0C
++#define EMAC_TX_CTL0 0x10
++#define EMAC_TX_CTL1 0x14
++#define EMAC_TX_FLOW_CTL 0x1C
++#define EMAC_RX_CTL0 0x24
++#define EMAC_RX_CTL1 0x28
++#define EMAC_RX_FRM_FLT 0x38
++#define EMAC_MDIO_CMD 0x48
++#define EMAC_MDIO_DATA 0x4C
++#define EMAC_TX_DMA_STA 0xB0
++#define EMAC_TX_CUR_DESC 0xB4
++#define EMAC_TX_CUR_BUF 0xB8
++#define EMAC_RX_DMA_STA 0xC0
++
++#define MDIO_CMD_MII_BUSY BIT(0)
++#define MDIO_CMD_MII_WRITE BIT(1)
++#define MDIO_CMD_MII_PHY_REG_ADDR_MASK GENMASK(8, 4)
++#define MDIO_CMD_MII_PHY_REG_ADDR_SHIFT 4
++#define MDIO_CMD_MII_PHY_ADDR_MASK GENMASK(16, 12)
++#define MDIO_CMD_MII_PHY_ADDR_SHIFT 12
++
++#define EMAC_MACADDR_HI 0x50
++#define EMAC_MACADDR_LO 0x54
++
++#define EMAC_RX_DESC_LIST 0x34
++#define EMAC_TX_DESC_LIST 0x20
++
++#define EMAC_RX_DO_CRC BIT(27)
++#define EMAC_RX_STRIP_FCS BIT(28)
++
++#define LE32_BIT(x) (cpu_to_le32(BIT(x)))
++
++#define EMAC_COULD_BE_USED_BY_DMA LE32_BIT(31)
++
++/* Used in RX_CTL1*/
++#define EMAC_RX_DMA_EN BIT(30)
++#define EMAC_RX_DMA_START BIT(31)
++/* Used in TX_CTL1*/
++#define EMAC_TX_DMA_EN BIT(30)
++#define EMAC_TX_DMA_START BIT(31)
++
++/* Used in RX_CTL0 */
++#define EMAC_RX_RECEIVER_EN BIT(31)
++/* Used in TX_CTL0 */
++#define EMAC_TX_TRANSMITTER_EN BIT(31)
++
++/* Basic CTL0 */
++#define EMAC_BCTL0_FD BIT(0)
++#define EMAC_BCTL0_SPEED_10 2
++#define EMAC_BCTL0_SPEED_100 3
++#define EMAC_BCTL0_SPEED_MASK GENMASK(3, 2)
++#define EMAC_BCTL0_SPEED_SHIFT 2
++
++#define EMAC_FLOW_RX 1
++#define EMAC_FLOW_TX 2
++
++#define EMAC_TX_INT BIT(0)
++#define EMAC_TX_DMA_STOP_INT BIT(1)
++#define EMAC_TX_BUF_UA_INT BIT(2)
++#define EMAC_TX_TIMEOUT_INT BIT(3)
++#define EMAC_TX_UNDERFLOW_INT BIT(4)
++#define EMAC_TX_EARLY_INT BIT(5)
++#define EMAC_RX_INT BIT(8)
++#define EMAC_RX_BUF_UA_INT BIT(9)
++#define EMAC_RX_DMA_STOP_INT BIT(10)
++#define EMAC_RX_TIMEOUT_INT BIT(11)
++#define EMAC_RX_OVERFLOW_INT BIT(12)
++#define EMAC_RX_EARLY_INT BIT(13)
++#define EMAC_RGMII_STA_INT BIT(16)
++
++/* Bits used in frame RX status */
++#define EMAC_DSC_RX_FIRST BIT(9)
++#define EMAC_DSC_RX_LAST BIT(8)
++
++/* Bits used in frame TX ctl */
++#define EMAC_MAGIC_TX_BIT LE32_BIT(24)
++#define EMAC_TX_DO_CRC (LE32_BIT(27) | LE32_BIT(28))
++#define EMAC_DSC_TX_FIRST LE32_BIT(29)
++#define EMAC_DSC_TX_LAST LE32_BIT(30)
++#define EMAC_WANT_INT LE32_BIT(31)
++
++/* struct emac_variant - Describe an emac variant of sun8i-emac
++ * @default_syscon_value: Default value of the syscon EMAC register
++ * The default_syscon_value is also used for powering down the PHY
++ * @internal_phy: which PHY type is internal
++ * @support_mii: Does the SoC support MII
++ * @support_rmii: Does the SoC support RMII
++ * @support_rgmii: Does the SoC support RGMII
++ */
++struct emac_variant {
++ u32 default_syscon_value;
++ int internal_phy;
++ bool support_mii;
++ bool support_rmii;
++ bool support_rgmii;
++};
++
++static const struct emac_variant emac_variant_h3 = {
++ .default_syscon_value = 0x58000,
++ .internal_phy = PHY_INTERFACE_MODE_MII,
++ .support_mii = true,
++ .support_rmii = true,
++ .support_rgmii = true
++};
++
++static const struct emac_variant emac_variant_a83t = {
++ .default_syscon_value = 0,
++ .internal_phy = 0,
++ .support_mii = true,
++ .support_rgmii = true
++};
++
++static const struct emac_variant emac_variant_a64 = {
++ .default_syscon_value = 0,
++ .internal_phy = 0,
++ .support_mii = true,
++ .support_rmii = true,
++ .support_rgmii = true
++};
++
++static const char const estats_str[][ETH_GSTRING_LEN] = {
++ /* errors */
++ "rx_payload_error",
++ "rx_CRC_error",
++ "rx_phy_error",
++ "rx_length_error",
++ "rx_col_error",
++ "rx_header_error",
++ "rx_overflow_error",
++ "rx_saf_error",
++ "rx_daf_error",
++ "rx_buf_error",
++ "rx_invalid_error",
++ "tx_timeout",
++ /* misc infos */
++ "tx_stop_queue",
++ "rx_dma_ua",
++ "rx_dma_stop",
++ "tx_dma_ua",
++ "tx_dma_stop",
++ "rx_hw_csum",
++ "tx_hw_csum",
++ /* interrupts */
++ "rx_int",
++ "tx_int",
++ "tx_early_int",
++ "tx_underflow_int",
++ "tx_timeout_int",
++ "rx_early_int",
++ "rx_overflow_int",
++ "rx_timeout_int",
++ "rgmii_state_int",
++ /* debug */
++ "tx_used_desc",
++ "napi_schedule",
++ "napi_underflow",
++};
++
++struct sun8i_emac_stats {
++ u64 rx_payload_error;
++ u64 rx_crc_error;
++ u64 rx_phy_error;
++ u64 rx_length_error;
++ u64 rx_col_error;
++ u64 rx_header_error;
++ u64 rx_overflow_error;
++ u64 rx_saf_fail;
++ u64 rx_daf_fail;
++ u64 rx_buf_error;
++ u64 rx_invalid_error;
++ u64 tx_timeout;
++
++ u64 tx_stop_queue;
++ u64 rx_dma_ua;
++ u64 rx_dma_stop;
++ u64 tx_dma_ua;
++ u64 tx_dma_stop;
++ u64 rx_hw_csum;
++ u64 tx_hw_csum;
++
++ u64 rx_int;
++ u64 tx_int;
++ u64 tx_early_int;
++ u64 tx_underflow_int;
++ u64 tx_timeout_int;
++ u64 rx_early_int;
++ u64 rx_overflow_int;
++ u64 rx_timeout_int;
++ u64 rgmii_state_int;
++
++ u64 tx_used_desc;
++ u64 napi_schedule;
++ u64 napi_underflow;
++};
++
++/* The datasheet said that each descriptor can transfers up to 4096bytes
++ * But latter, a register documentation reduce that value to 2048
++ * Anyway using 2048 cause strange behaviours and even BSP driver use 2047
++ */
++#define DESC_BUF_MAX 2044
++
++/* MAGIC value for knowing if a descriptor is available or not */
++#define DCLEAN cpu_to_le32(BIT(16) | BIT(14) | BIT(12) | BIT(10) | BIT(9))
++
++/* struct dma_desc - Structure of DMA descriptor used by the hardware
++ * @status: Status of the frame written by HW, so RO for the
++ * driver (except for BIT(31) which is R/W)
++ * @ctl: Information on the frame written by the driver (INT, len,...)
++ * @buf_addr: physical address of the frame data
++ * @next: physical address of next dma_desc
++ */
++struct dma_desc {
++ __le32 status;
++ __le32 ctl;
++ __le32 buf_addr;
++ __le32 next;
++};
++
++/* Describe how data from skb are DMA mapped (used in txinfo map member) */
++#define MAP_SINGLE 1
++#define MAP_PAGE 2
++
++/* Structure for storing information about data in TX ring buffer */
++struct txinfo {
++ struct sk_buff *skb;
++ int map;
++};
++
++struct sun8i_emac_priv {
++ void __iomem *base;
++ struct regmap *regmap;
++ int irq;
++ struct device *dev;
++ struct net_device *ndev;
++ struct mii_bus *mdio;
++ struct napi_struct napi;
++ spinlock_t tx_lock;/* control the access of transmit descriptors */
++ int duplex;
++ int speed;
++ int link;
++ int phy_interface;
++ const struct emac_variant *variant;
++ struct device_node *phy_node;
++ struct device_node *mdio_node;
++ struct clk *ahb_clk;
++ struct clk *ephy_clk;
++ bool use_internal_phy;
++
++ struct reset_control *rst_mac;
++ struct reset_control *rst_ephy;
++
++ struct dma_desc *dd_rx;
++ dma_addr_t dd_rx_phy;
++ struct dma_desc *dd_tx;
++ dma_addr_t dd_tx_phy;
++ struct sk_buff **rx_skb;
++ struct txinfo *txl;
++
++ int nbdesc_tx;
++ int nbdesc_rx;
++ int tx_slot;
++ int tx_dirty;
++ int rx_dirty;
++ struct sun8i_emac_stats estats;
++ u32 msg_enable;
++ int flow_ctrl;
++ int pause;
++};
++
++static irqreturn_t sun8i_emac_dma_interrupt(int irq, void *dev_id);
++
++static void rb_inc(int *p, const int max)
++{
++ (*p)++;
++ (*p) %= max;
++}
++
++/* Locking strategy:
++ * RX queue does not need any lock since only sun8i_emac_poll() access it.
++ * (All other RX modifiers (ringparam/ndo_stop) disable NAPI and so
++ * sun8i_emac_poll())
++ * TX queue is handled by sun8i_emac_xmit(), sun8i_emac_complete_xmit() and
++ * sun8i_emac_tx_timeout()
++ * (All other RX modifiers (ringparam/ndo_stop) disable NAPI and stop queue)
++ *
++ * sun8i_emac_xmit() could fire only once (netif_tx_lock)
++ * sun8i_emac_complete_xmit() could fire only once (called from NAPI)
++ * sun8i_emac_tx_timeout() could fire only once (netif_tx_lock) and could not
++ * race with sun8i_emac_xmit (due to netif_tx_lock) and with
++ * sun8i_emac_complete_xmit which disable NAPI.
++ *
++ * So only sun8i_emac_xmit and sun8i_emac_complete_xmit could fire at the same
++ * time.
++ * But they never could modify the same descriptors:
++ * - sun8i_emac_complete_xmit() will modify only descriptors with empty status
++ * - sun8i_emac_xmit() will modify only descriptors set to DCLEAN
++ * Proper memory barriers ensure that descriptor set to DCLEAN could not be
++ * modified latter by sun8i_emac_complete_xmit().
++ */
++
++/* Return the number of contiguous free descriptors
++ * starting from tx_slot
++ */
++static int rb_tx_numfreedesc(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ if (priv->tx_slot < priv->tx_dirty)
++ return priv->tx_dirty - priv->tx_slot;
++
++ return (priv->nbdesc_tx - priv->tx_slot) + priv->tx_dirty;
++}
++
++/* sun8i_emac_rx_skb - Allocate a skb in a DMA descriptor
++ *
++ * @ndev: The net_device for this interface
++ * @i: index of slot to fill
++ *
++ * Refill a DMA descriptor with a fresh skb and map it for DMA.
++*/
++static int sun8i_emac_rx_skb(struct net_device *ndev, int i)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct dma_desc *ddesc;
++ struct sk_buff *skb;
++
++ ddesc = priv->dd_rx + i;
++
++ ddesc->ctl = 0;
++
++ skb = netdev_alloc_skb_ip_align(ndev, DESC_BUF_MAX);
++ if (!skb)
++ return -ENOMEM;
++
++ /* should not happen */
++ if (unlikely(priv->rx_skb[i]))
++ dev_warn(priv->dev, "BUG: Leaking a skbuff\n");
++
++ priv->rx_skb[i] = skb;
++
++ ddesc->buf_addr = dma_map_single(priv->dev, skb->data,
++ DESC_BUF_MAX, DMA_FROM_DEVICE);
++ if (dma_mapping_error(priv->dev, ddesc->buf_addr)) {
++ dev_err(priv->dev, "ERROR: Cannot map RX buffer for DMA\n");
++ dev_kfree_skb(skb);
++ return -EFAULT;
++ }
++ /* We cannot direcly use cpu_to_le32() after dma_map_single
++ * since dma_mapping_error use it
++ */
++ ddesc->buf_addr = cpu_to_le32(ddesc->buf_addr);
++ ddesc->ctl |= cpu_to_le32(DESC_BUF_MAX);
++ /* EMAC_COULD_BE_USED_BY_DMA must be the last value written */
++ wmb();
++ ddesc->status = EMAC_COULD_BE_USED_BY_DMA;
++
++ return 0;
++}
++
++static void sun8i_emac_stop_tx(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ u32 v;
++
++ netif_stop_queue(ndev);
++
++ v = readl(priv->base + EMAC_TX_CTL0);
++ /* Disable transmitter after current reception */
++ v &= ~EMAC_TX_TRANSMITTER_EN;
++ writel(v, priv->base + EMAC_TX_CTL0);
++
++ v = readl(priv->base + EMAC_TX_CTL1);
++ /* Stop TX DMA */
++ v &= ~EMAC_TX_DMA_EN;
++ writel(v, priv->base + EMAC_TX_CTL1);
++
++ /* We must be sure that all is stopped before leaving this function */
++ wmb();
++}
++
++static void sun8i_emac_stop_rx(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ u32 v;
++
++ v = readl(priv->base + EMAC_RX_CTL0);
++ /* Disable receiver after current reception */
++ v &= ~EMAC_RX_RECEIVER_EN;
++ writel(v, priv->base + EMAC_RX_CTL0);
++
++ v = readl(priv->base + EMAC_RX_CTL1);
++ /* Stop RX DMA */
++ v &= ~EMAC_RX_DMA_EN;
++ writel(v, priv->base + EMAC_RX_CTL1);
++
++ /* We must be sure that all is stopped before leaving this function */
++ wmb();
++}
++
++static void sun8i_emac_start_rx(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ u32 v;
++
++ v = readl(priv->base + EMAC_RX_CTL0);
++ /* Enable receiver */
++ v |= EMAC_RX_RECEIVER_EN;
++ writel(v, priv->base + EMAC_RX_CTL0);
++
++ v = readl(priv->base + EMAC_RX_CTL1);
++ v |= EMAC_RX_DMA_START;
++ v |= EMAC_RX_DMA_EN;
++ writel(v, priv->base + EMAC_RX_CTL1);
++}
++
++static void sun8i_emac_start_tx(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ u32 v;
++
++ v = readl(priv->base + EMAC_TX_CTL0);
++ v |= EMAC_TX_TRANSMITTER_EN;
++ writel(v, priv->base + EMAC_TX_CTL0);
++
++ v = readl(priv->base + EMAC_TX_CTL1);
++ v |= EMAC_TX_DMA_START;
++ v |= EMAC_TX_DMA_EN;
++ writel(v, priv->base + EMAC_TX_CTL1);
++}
++
++/* sun8i_emac_set_macaddr - Set MAC address for slot index
++ *
++ * @addr: the MAC address to set
++ * @index: The index of slot where to set address.
++ *
++ * The slot 0 is the main MAC address
++ */
++static void sun8i_emac_set_macaddr(struct sun8i_emac_priv *priv,
++ const u8 *addr, int index)
++{
++ u32 v;
++
++ dev_info(priv->dev, "device MAC address slot %d %pM", index, addr);
++
++ v = (addr[5] << 8) | addr[4];
++ writel(v, priv->base + EMAC_MACADDR_HI + index * 8);
++
++ v = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
++ writel(v, priv->base + EMAC_MACADDR_LO + index * 8);
++}
++
++static void sun8i_emac_set_link_mode(struct sun8i_emac_priv *priv)
++{
++ u32 v;
++
++ v = readl(priv->base + EMAC_BASIC_CTL0);
++
++ if (priv->duplex)
++ v |= EMAC_BCTL0_FD;
++ else
++ v &= ~EMAC_BCTL0_FD;
++
++ v &= ~EMAC_BCTL0_SPEED_MASK;
++
++ switch (priv->speed) {
++ case 1000:
++ break;
++ case 100:
++ v |= EMAC_BCTL0_SPEED_100 << EMAC_BCTL0_SPEED_SHIFT;
++ break;
++ case 10:
++ v |= EMAC_BCTL0_SPEED_10 << EMAC_BCTL0_SPEED_SHIFT;
++ break;
++ default:
++ dev_err(priv->dev, "Unsupported speed %d\n", priv->speed);
++ return;
++ }
++
++ writel(v, priv->base + EMAC_BASIC_CTL0);
++}
++
++static void sun8i_emac_flow_ctrl(struct sun8i_emac_priv *priv, int duplex,
++ int fc)
++{
++ u32 flow = 0;
++
++ flow = readl(priv->base + EMAC_RX_CTL0);
++ if (fc & EMAC_FLOW_RX)
++ flow |= BIT(16);
++ else
++ flow &= ~BIT(16);
++ writel(flow, priv->base + EMAC_RX_CTL0);
++
++ flow = readl(priv->base + EMAC_TX_FLOW_CTL);
++ if (fc & EMAC_FLOW_TX)
++ flow |= BIT(0);
++ else
++ flow &= ~BIT(0);
++ writel(flow, priv->base + EMAC_TX_FLOW_CTL);
++}
++
++/* Grab a frame into a skb from descriptor number i */
++static int sun8i_emac_rx_from_ddesc(struct net_device *ndev, int i)
++{
++ struct sk_buff *skb;
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct dma_desc *ddesc = priv->dd_rx + i;
++ int frame_len;
++ int rxcsum_done = 0;
++ u32 dstatus = le32_to_cpu(ddesc->status);
++
++ if (ndev->features & NETIF_F_RXCSUM)
++ rxcsum_done = 1;
++
++ /* bit0/bit7 work only on IPv4/IPv6 TCP traffic,
++ * (not on ARP for example) so we do not raise rx_errors/discard frame
++ */
++ /* the checksum or length of received frame's payload is wrong*/
++ if (dstatus & BIT(0)) {
++ priv->estats.rx_payload_error++;
++ rxcsum_done = 0;
++ }
++
++ /* RX_CRC_ERR */
++ if (dstatus & BIT(1)) {
++ priv->ndev->stats.rx_errors++;
++ priv->ndev->stats.rx_crc_errors++;
++ priv->estats.rx_crc_error++;
++ goto discard_frame;
++ }
++
++ /* RX_PHY_ERR */
++ if ((dstatus & BIT(3))) {
++ priv->ndev->stats.rx_errors++;
++ priv->estats.rx_phy_error++;
++ goto discard_frame;
++ }
++
++ /* RX_LENGTH_ERR */
++ if ((dstatus & BIT(4))) {
++ priv->ndev->stats.rx_errors++;
++ priv->ndev->stats.rx_length_errors++;
++ priv->estats.rx_length_error++;
++ goto discard_frame;
++ }
++
++ /* RX_COL_ERR */
++ if ((dstatus & BIT(6))) {
++ priv->ndev->stats.rx_errors++;
++ priv->estats.rx_col_error++;
++ goto discard_frame;
++ }
++
++ /* RX_HEADER_ERR */
++ if ((dstatus & BIT(7))) {
++ priv->estats.rx_header_error++;
++ rxcsum_done = 0;
++ }
++
++ /* RX_OVERFLOW_ERR */
++ if ((dstatus & BIT(11))) {
++ priv->ndev->stats.rx_over_errors++;
++ priv->estats.rx_overflow_error++;
++ goto discard_frame;
++ }
++
++ /* RX_NO_ENOUGTH_BUF_ERR */
++ if ((dstatus & BIT(14))) {
++ priv->ndev->stats.rx_errors++;
++ priv->estats.rx_buf_error++;
++ goto discard_frame;
++ }
++
++ /* BIT(9) is for the first frame, not having it is bad since we do not
++ * handle Jumbo frame
++ */
++ if ((dstatus & EMAC_DSC_RX_FIRST) == 0) {
++ priv->ndev->stats.rx_errors++;
++ priv->estats.rx_invalid_error++;
++ goto discard_frame;
++ }
++
++ /* this frame is not the last */
++ if ((dstatus & EMAC_DSC_RX_LAST) == 0) {
++ priv->ndev->stats.rx_errors++;
++ priv->estats.rx_invalid_error++;
++ goto discard_frame;
++ }
++
++ frame_len = (dstatus >> 16) & 0x3FFF;
++ if (!(ndev->features & NETIF_F_RXFCS))
++ frame_len -= ETH_FCS_LEN;
++
++ skb = priv->rx_skb[i];
++
++ netif_dbg(priv, rx_status, priv->ndev,
++ "%s from %02d %pad len=%d status=%x st=%x\n",
++ __func__, i, &ddesc, frame_len, dstatus,
++ cpu_to_le32(ddesc->ctl));
++
++ skb_put(skb, frame_len);
++
++ dma_unmap_single(priv->dev, le32_to_cpu(ddesc->buf_addr), DESC_BUF_MAX,
++ DMA_FROM_DEVICE);
++ skb->protocol = eth_type_trans(skb, priv->ndev);
++ if (rxcsum_done) {
++ skb->ip_summed = CHECKSUM_UNNECESSARY;
++ priv->estats.rx_hw_csum++;
++ } else {
++ skb->ip_summed = CHECKSUM_PARTIAL;
++ }
++
++ priv->ndev->stats.rx_packets++;
++ priv->ndev->stats.rx_bytes += frame_len;
++ priv->rx_skb[i] = NULL;
++
++ sun8i_emac_rx_skb(ndev, i);
++ napi_gro_receive(&priv->napi, skb);
++
++ return 0;
++ /* If the frame need to be dropped, we simply reuse the buffer */
++discard_frame:
++ ddesc->ctl = cpu_to_le32(DESC_BUF_MAX);
++ /* EMAC_COULD_BE_USED_BY_DMA must be the last value written */
++ wmb();
++ ddesc->status = EMAC_COULD_BE_USED_BY_DMA;
++ return 0;
++}
++
++/* Iterate over dma_desc for finding completed xmit.
++ *
++ * The problem is: how to know that a descriptor is sent and not just in
++ * preparation.
++ * Need to have status=0 and st set but this is the state of first frame just
++ * before setting the own-by-DMA bit.
++ * The solution is to used the artificial value DCLEAN.
++ */
++static int sun8i_emac_complete_xmit(struct net_device *ndev, int budget)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct dma_desc *ddesc;
++ int frame_len;
++ int work = 0;
++ unsigned int bytes_compl = 0, pkts_compl = 0;
++ u32 dstatus;
++
++ do {
++ ddesc = priv->dd_tx + priv->tx_dirty;
++
++ if (ddesc->status & EMAC_COULD_BE_USED_BY_DMA)
++ goto xmit_end;
++
++ if (ddesc->status == DCLEAN)
++ goto xmit_end;
++
++ dstatus = cpu_to_le32(ddesc->status);
++
++ if (ddesc->status == 0 && !ddesc->ctl) {
++ dev_err(priv->dev, "BUG: reached the void %d %d\n",
++ priv->tx_dirty, priv->tx_slot);
++ goto xmit_end;
++ }
++
++ /* TX_UNDERFLOW_ERR */
++ if (dstatus & BIT(1))
++ priv->ndev->stats.tx_errors++;
++ /* TX_DEFER_ERR */
++ if (dstatus & BIT(2))
++ priv->ndev->stats.tx_errors++;
++ /* BIT 6:3 numbers of collisions */
++ if (dstatus & 0x78)
++ priv->ndev->stats.collisions +=
++ (dstatus & 0x78) >> 3;
++ /* TX_COL_ERR_1 */
++ if (dstatus & BIT(8))
++ priv->ndev->stats.tx_errors++;
++ /* TX_COL_ERR_0 */
++ if (dstatus & BIT(9))
++ priv->ndev->stats.tx_errors++;
++ /* TX_CRS_ERR */
++ if (dstatus & BIT(10))
++ priv->ndev->stats.tx_carrier_errors++;
++ /* TX_PAYLOAD_ERR */
++ if (dstatus & BIT(12))
++ priv->ndev->stats.tx_errors++;
++ /* TX_LENGTH_ERR */
++ if (dstatus & BIT(14))
++ priv->ndev->stats.tx_errors++;
++ /* TX_HEADER_ERR */
++ if (dstatus & BIT(16))
++ priv->ndev->stats.tx_errors++;
++
++ frame_len = le32_to_cpu(ddesc->ctl) & 0x3FFF;
++ bytes_compl += frame_len;
++
++ if (priv->txl[priv->tx_dirty].map == MAP_SINGLE)
++ dma_unmap_single(priv->dev,
++ le32_to_cpu(ddesc->buf_addr),
++ frame_len, DMA_TO_DEVICE);
++ else
++ dma_unmap_page(priv->dev,
++ le32_to_cpu(ddesc->buf_addr),
++ frame_len, DMA_TO_DEVICE);
++ /* we can free skb only on last frame */
++ if (priv->txl[priv->tx_dirty].skb &&
++ (ddesc->ctl & EMAC_DSC_TX_LAST)) {
++ dev_kfree_skb_irq(priv->txl[priv->tx_dirty].skb);
++ pkts_compl++;
++ }
++
++ priv->txl[priv->tx_dirty].skb = NULL;
++ priv->txl[priv->tx_dirty].map = 0;
++ ddesc->ctl = 0;
++ /* setting status to DCLEAN is the last value to be set */
++ wmb();
++ ddesc->status = DCLEAN;
++ work++;
++
++ rb_inc(&priv->tx_dirty, priv->nbdesc_tx);
++ ddesc = priv->dd_tx + priv->tx_dirty;
++ } while (ddesc->ctl &&
++ !(ddesc->status & EMAC_COULD_BE_USED_BY_DMA) &&
++ work < budget);
++
++xmit_end:
++ netdev_completed_queue(ndev, pkts_compl, bytes_compl);
++
++ /* if we don't have handled all packets */
++ if (work < budget)
++ work = 0;
++
++ if (netif_queue_stopped(ndev) &&
++ rb_tx_numfreedesc(ndev) > MAX_SKB_FRAGS + 1)
++ netif_wake_queue(ndev);
++ return work;
++}
++
++static int sun8i_emac_poll(struct napi_struct *napi, int budget)
++{
++ struct sun8i_emac_priv *priv =
++ container_of(napi, struct sun8i_emac_priv, napi);
++ struct net_device *ndev = priv->ndev;
++ int worked;
++ struct dma_desc *ddesc;
++
++ priv->estats.napi_schedule++;
++ worked = sun8i_emac_complete_xmit(ndev, budget);
++
++ ddesc = priv->dd_rx + priv->rx_dirty;
++ while (!(ddesc->status & EMAC_COULD_BE_USED_BY_DMA) &&
++ worked < budget) {
++ sun8i_emac_rx_from_ddesc(ndev, priv->rx_dirty);
++ worked++;
++ rb_inc(&priv->rx_dirty, priv->nbdesc_rx);
++ ddesc = priv->dd_rx + priv->rx_dirty;
++ };
++ if (worked < budget) {
++ priv->estats.napi_underflow++;
++ napi_complete(&priv->napi);
++ writel(EMAC_RX_INT | EMAC_TX_INT, priv->base + EMAC_INT_EN);
++ }
++ return worked;
++}
++
++static int sun8i_mdio_read(struct mii_bus *bus, int phy_addr, int phy_reg)
++{
++ struct net_device *ndev = bus->priv;
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ int err;
++ u32 reg;
++
++ err = readl_poll_timeout(priv->base + EMAC_MDIO_CMD, reg,
++ !(reg & MDIO_CMD_MII_BUSY), 100, 10000);
++ if (err) {
++ dev_err(priv->dev, "%s timeout %x\n", __func__, reg);
++ return err;
++ }
++
++ reg &= ~MDIO_CMD_MII_WRITE;
++ reg &= ~MDIO_CMD_MII_PHY_REG_ADDR_MASK;
++ reg |= (phy_reg << MDIO_CMD_MII_PHY_REG_ADDR_SHIFT) &
++ MDIO_CMD_MII_PHY_REG_ADDR_MASK;
++
++ reg &= ~MDIO_CMD_MII_PHY_ADDR_MASK;
++
++ reg |= (phy_addr << MDIO_CMD_MII_PHY_ADDR_SHIFT) &
++ MDIO_CMD_MII_PHY_ADDR_MASK;
++
++ reg |= MDIO_CMD_MII_BUSY;
++
++ writel(reg, priv->base + EMAC_MDIO_CMD);
++
++ err = readl_poll_timeout(priv->base + EMAC_MDIO_CMD, reg,
++ !(reg & MDIO_CMD_MII_BUSY), 100, 10000);
++
++ if (err) {
++ dev_err(priv->dev, "%s timeout %x\n", __func__, reg);
++ return err;
++ }
++
++ return readl(priv->base + EMAC_MDIO_DATA);
++}
++
++static int sun8i_mdio_write(struct mii_bus *bus, int phy_addr, int phy_reg,
++ u16 data)
++{
++ struct net_device *ndev = bus->priv;
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ u32 reg;
++ int err;
++
++ err = readl_poll_timeout(priv->base + EMAC_MDIO_CMD, reg,
++ !(reg & MDIO_CMD_MII_BUSY), 100, 10000);
++ if (err) {
++ dev_err(priv->dev, "%s timeout %x\n", __func__, reg);
++ return err;
++ }
++
++ reg &= ~MDIO_CMD_MII_PHY_REG_ADDR_MASK;
++ reg |= (phy_reg << MDIO_CMD_MII_PHY_REG_ADDR_SHIFT) &
++ MDIO_CMD_MII_PHY_REG_ADDR_MASK;
++
++ reg &= ~MDIO_CMD_MII_PHY_ADDR_MASK;
++ reg |= (phy_addr << MDIO_CMD_MII_PHY_ADDR_SHIFT) &
++ MDIO_CMD_MII_PHY_ADDR_MASK;
++
++ reg |= MDIO_CMD_MII_WRITE;
++ reg |= MDIO_CMD_MII_BUSY;
++
++ writel(reg, priv->base + EMAC_MDIO_CMD);
++ writel(data, priv->base + EMAC_MDIO_DATA);
++
++ err = readl_poll_timeout(priv->base + EMAC_MDIO_CMD, reg,
++ !(reg & MDIO_CMD_MII_BUSY), 100, 10000);
++ if (err) {
++ dev_err(priv->dev, "%s timeout %x\n", __func__, reg);
++ return err;
++ }
++
++ return 0;
++}
++
++static int sun8i_emac_mdio_register(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct mii_bus *bus;
++ int ret;
++
++ bus = mdiobus_alloc();
++ if (!bus) {
++ netdev_err(ndev, "Failed to allocate a new mdio bus\n");
++ return -ENOMEM;
++ }
++
++ bus->name = dev_name(priv->dev);
++ bus->read = &sun8i_mdio_read;
++ bus->write = &sun8i_mdio_write;
++ snprintf(bus->id, MII_BUS_ID_SIZE, "%s-%x", bus->name, priv->dev->id);
++
++ bus->parent = priv->dev;
++ bus->priv = ndev;
++
++ ret = of_mdiobus_register(bus, priv->mdio_node);
++ if (ret) {
++ netdev_err(ndev, "Could not register a MDIO bus: %d\n", ret);
++ mdiobus_free(bus);
++ return ret;
++ }
++
++ priv->mdio = bus;
++
++ return 0;
++}
++
++static void sun8i_emac_mdio_unregister(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ mdiobus_unregister(priv->mdio);
++ mdiobus_free(priv->mdio);
++}
++
++/* Run within phydev->lock */
++static void sun8i_emac_adjust_link(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct phy_device *phydev = ndev->phydev;
++ int new_state = 0;
++
++ netif_dbg(priv, link, priv->ndev,
++ "%s link=%x duplex=%x speed=%x\n", __func__,
++ phydev->link, phydev->duplex, phydev->speed);
++ if (!phydev)
++ return;
++
++ if (phydev->link) {
++ if (phydev->duplex != priv->duplex) {
++ new_state = 1;
++ priv->duplex = phydev->duplex;
++ }
++ if (phydev->pause)
++ sun8i_emac_flow_ctrl(priv, phydev->duplex,
++ priv->flow_ctrl);
++
++ if (phydev->speed != priv->speed) {
++ new_state = 1;
++ priv->speed = phydev->speed;
++ }
++
++ if (priv->link == 0) {
++ new_state = 1;
++ priv->link = phydev->link;
++ }
++
++ netif_dbg(priv, link, priv->ndev,
++ "%s new=%d link=%d pause=%d\n",
++ __func__, new_state, priv->link, phydev->pause);
++ if (new_state)
++ sun8i_emac_set_link_mode(priv);
++ } else if (priv->link != phydev->link) {
++ new_state = 1;
++ priv->link = 0;
++ priv->speed = 0;
++ priv->duplex = -1;
++ }
++
++ if (new_state)
++ phy_print_status(phydev);
++}
++
++/* H3 specific bits for EPHY */
++#define H3_EPHY_ADDR_SHIFT 20
++#define H3_EPHY_LED_POL BIT(17) /* 1: active low, 0: active high */
++#define H3_EPHY_SHUTDOWN BIT(16) /* 1: shutdown, 0: power up */
++#define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
++
++/* H3/A64 specific bits */
++#define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
++
++/* Generic system control EMAC_CLK bits */
++#define SYSCON_ETXDC_MASK GENMASK(2, 0)
++#define SYSCON_ETXDC_SHIFT 10
++#define SYSCON_ERXDC_MASK GENMASK(4, 0)
++#define SYSCON_ERXDC_SHIFT 5
++/* EMAC PHY Interface Type */
++#define SYSCON_EPIT BIT(2) /* 1: RGMII, 0: MII */
++#define SYSCON_ETCS_MASK GENMASK(1, 0)
++#define SYSCON_ETCS_MII 0x0
++#define SYSCON_ETCS_EXT_GMII 0x1
++#define SYSCON_ETCS_INT_GMII 0x2
++#define SYSCON_EMAC_REG 0x30
++
++static int sun8i_emac_set_syscon(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct device_node *node = priv->dev->of_node;
++ int ret;
++ u32 reg, val;
++
++ reg = priv->variant->default_syscon_value;
++
++ if (priv->variant->internal_phy) {
++ if (!priv->use_internal_phy) {
++ /* switch to external PHY interface */
++ reg &= ~H3_EPHY_SELECT;
++ } else {
++ reg |= H3_EPHY_SELECT;
++ reg &= ~H3_EPHY_SHUTDOWN;
++
++ if (of_property_read_bool(priv->phy_node,
++ "allwinner,leds-active-low"))
++ reg |= H3_EPHY_LED_POL;
++
++ ret = of_mdio_parse_addr(priv->dev, priv->phy_node);
++ if (ret < 0) {
++ netdev_err(ndev, "Could not parse MDIO addr\n");
++ return ret;
++ }
++ /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
++ * address. No need to mask it again.
++ */
++ reg |= ret << H3_EPHY_ADDR_SHIFT;
++ }
++ }
++
++ if (!of_property_read_u32(node, "allwinner,tx-delay", &val)) {
++ if (val <= SYSCON_ETXDC_MASK) {
++ reg &= ~(SYSCON_ETXDC_MASK << SYSCON_ETXDC_SHIFT);
++ reg |= (val << SYSCON_ETXDC_SHIFT);
++ } else {
++ netdev_warn(ndev, "Invalid TX clock delay: %d\n", val);
++ }
++ }
++
++ if (!of_property_read_u32(node, "allwinner,rx-delay", &val)) {
++ if (val <= SYSCON_ERXDC_MASK) {
++ reg &= ~(SYSCON_ERXDC_MASK << SYSCON_ERXDC_SHIFT);
++ reg |= (val << SYSCON_ERXDC_SHIFT);
++ } else {
++ netdev_warn(ndev, "Invalid RX clock delay: %d\n", val);
++ }
++ }
++
++ /* Clear interface mode bits */
++ reg &= ~(SYSCON_ETCS_MASK | SYSCON_EPIT);
++ if (priv->variant->support_rmii)
++ reg &= ~SYSCON_RMII_EN;
++
++ switch (priv->phy_interface) {
++ case PHY_INTERFACE_MODE_MII:
++ /* default */
++ break;
++ case PHY_INTERFACE_MODE_RGMII:
++ reg |= SYSCON_EPIT | SYSCON_ETCS_INT_GMII;
++ break;
++ case PHY_INTERFACE_MODE_RMII:
++ reg |= SYSCON_RMII_EN | SYSCON_ETCS_EXT_GMII;
++ break;
++ default:
++ netdev_err(ndev, "Unsupported interface mode: %s",
++ phy_modes(priv->phy_interface));
++ return -EINVAL;
++ }
++
++ regmap_write(priv->regmap, SYSCON_EMAC_REG, reg);
++
++ return 0;
++}
++
++static void sun8i_emac_unset_syscon(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ u32 reg = priv->variant->default_syscon_value;
++
++ regmap_write(priv->regmap, SYSCON_EMAC_REG, reg);
++}
++
++/* Set Management Data Clock, must be call after device reset */
++static void sun8i_emac_set_mdc(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ unsigned long rate;
++ u32 reg;
++
++ rate = clk_get_rate(priv->ahb_clk);
++ if (rate > 160000000)
++ reg = 0x3 << 20; /* AHB / 128 */
++ else if (rate > 80000000)
++ reg = 0x2 << 20; /* AHB / 64 */
++ else if (rate > 40000000)
++ reg = 0x1 << 20; /* AHB / 32 */
++ else
++ reg = 0x0 << 20; /* AHB / 16 */
++ netif_dbg(priv, link, ndev, "MDC auto : %x\n", reg);
++ writel(reg, priv->base + EMAC_MDIO_CMD);
++}
++
++/* "power" the device, by enabling clk/reset/regulators */
++static int sun8i_emac_power(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ int ret;
++
++ ret = clk_prepare_enable(priv->ahb_clk);
++ if (ret) {
++ netdev_err(ndev, "Could not enable AHB clock\n");
++ return ret;
++ }
++
++ if (priv->rst_mac) {
++ ret = reset_control_deassert(priv->rst_mac);
++ if (ret) {
++ netdev_err(ndev, "Could not deassert reset\n");
++ goto err_reset;
++ }
++ }
++
++ if (priv->ephy_clk) {
++ ret = clk_prepare_enable(priv->ephy_clk);
++ if (ret) {
++ netdev_err(ndev, "Could not enable EPHY clock\n");
++ goto err_ephy_clk;
++ }
++ }
++
++ if (priv->rst_ephy) {
++ ret = reset_control_deassert(priv->rst_ephy);
++ if (ret) {
++ netdev_err(ndev, "Could not deassert EPHY reset\n");
++ goto err_ephy_reset;
++ }
++ }
++
++ return 0;
++
++err_ephy_reset:
++ if (priv->ephy_clk)
++ clk_disable_unprepare(priv->ephy_clk);
++err_ephy_clk:
++ if (priv->rst_mac)
++ reset_control_assert(priv->rst_mac);
++err_reset:
++ clk_disable_unprepare(priv->ahb_clk);
++ return ret;
++}
++
++/* "Unpower" the device, disabling clocks and regulators, asserting reset */
++static void sun8i_emac_unpower(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ if (priv->rst_ephy)
++ reset_control_assert(priv->rst_ephy);
++
++ if (priv->ephy_clk)
++ clk_disable_unprepare(priv->ephy_clk);
++
++ if (priv->rst_mac)
++ reset_control_assert(priv->rst_mac);
++
++ clk_disable_unprepare(priv->ahb_clk);
++}
++
++static int sun8i_emac_init(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct device_node *node = priv->dev->of_node;
++ const u8 *addr;
++
++ /* Try to get MAC address from DT, or assign a random one */
++ addr = of_get_mac_address(node);
++ if (addr)
++ ether_addr_copy(ndev->dev_addr, addr);
++ else
++ eth_hw_addr_random(ndev);
++
++ return 0;
++}
++
++static int sun8i_emac_mdio_probe(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct phy_device *phydev = NULL;
++
++ phydev = of_phy_connect(ndev, priv->phy_node, &sun8i_emac_adjust_link,
++ 0, priv->phy_interface);
++
++ if (!phydev) {
++ netdev_err(ndev, "Could not attach to PHY\n");
++ return -ENODEV;
++ }
++
++ phy_attached_info(phydev);
++
++ /* mask with MAC supported features */
++ phydev->supported &= PHY_GBIT_FEATURES;
++ phydev->advertising = phydev->supported;
++
++ priv->link = 0;
++ priv->speed = 0;
++ priv->duplex = -1;
++
++ return 0;
++}
++
++/* Allocate both RX and TX ring buffer and init them
++ * This function also write the startbase of thoses ring in the device.
++ * All structures that help managing thoses rings are also handled
++ * by this functions (rx_skb/txl)
++ */
++static int sun8i_emac_alloc_rings(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct dma_desc *ddesc;
++ int err, i;
++
++ priv->rx_skb = kcalloc(priv->nbdesc_rx, sizeof(struct sk_buff *),
++ GFP_KERNEL);
++ if (!priv->rx_skb) {
++ err = -ENOMEM;
++ goto rx_skb_error;
++ }
++ priv->txl = kcalloc(priv->nbdesc_tx, sizeof(struct txinfo), GFP_KERNEL);
++ if (!priv->txl) {
++ err = -ENOMEM;
++ goto tx_error;
++ }
++
++ /* allocate/init RX ring */
++ priv->dd_rx = dma_zalloc_coherent(priv->dev,
++ priv->nbdesc_rx * sizeof(struct dma_desc),
++ &priv->dd_rx_phy, GFP_KERNEL);
++ if (!priv->dd_rx) {
++ dev_err(priv->dev, "ERROR: cannot allocate DMA RX buffer");
++ err = -ENOMEM;
++ goto dma_rx_error;
++ }
++ ddesc = priv->dd_rx;
++ for (i = 0; i < priv->nbdesc_rx; i++) {
++ sun8i_emac_rx_skb(ndev, i);
++ ddesc->next = cpu_to_le32(priv->dd_rx_phy + (i + 1)
++ * sizeof(struct dma_desc));
++ ddesc++;
++ }
++ /* last descriptor point back to first one */
++ ddesc--;
++ ddesc->next = cpu_to_le32(priv->dd_rx_phy);
++
++ /* allocate/init TX ring */
++ priv->dd_tx = dma_zalloc_coherent(priv->dev,
++ priv->nbdesc_tx * sizeof(struct dma_desc),
++ &priv->dd_tx_phy, GFP_KERNEL);
++ if (!priv->dd_tx) {
++ dev_err(priv->dev, "ERROR: cannot allocate DMA TX buffer");
++ err = -ENOMEM;
++ goto dma_tx_error;
++ }
++ ddesc = priv->dd_tx;
++ for (i = 0; i < priv->nbdesc_tx; i++) {
++ ddesc->status = DCLEAN;
++ ddesc->ctl = 0;
++ ddesc->next = cpu_to_le32(priv->dd_tx_phy + (i + 1)
++ * sizeof(struct dma_desc));
++ ddesc++;
++ }
++ /* last descriptor point back to first one */
++ ddesc--;
++ ddesc->next = cpu_to_le32(priv->dd_tx_phy);
++ i--;
++
++ priv->tx_slot = 0;
++ priv->tx_dirty = 0;
++ priv->rx_dirty = 0;
++
++ /* write start of RX ring descriptor */
++ writel(priv->dd_rx_phy, priv->base + EMAC_RX_DESC_LIST);
++ /* write start of TX ring descriptor */
++ writel(priv->dd_tx_phy, priv->base + EMAC_TX_DESC_LIST);
++
++ return 0;
++dma_tx_error:
++ dma_free_coherent(priv->dev, priv->nbdesc_rx * sizeof(struct dma_desc),
++ priv->dd_rx, priv->dd_rx_phy);
++dma_rx_error:
++ kfree(priv->txl);
++tx_error:
++ kfree(priv->rx_skb);
++rx_skb_error:
++ return err;
++}
++
++static int sun8i_emac_open(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ int err;
++ u32 v;
++
++ err = sun8i_emac_power(ndev);
++ if (err)
++ return err;
++
++ err = request_irq(priv->irq, sun8i_emac_dma_interrupt, 0,
++ dev_name(priv->dev), ndev);
++ if (err) {
++ dev_err(priv->dev, "Cannot request IRQ: %d\n", err);
++ goto err_power;
++ }
++
++ /* Set interface mode (and configure internal PHY on H3) */
++ err = sun8i_emac_set_syscon(ndev);
++ if (err)
++ goto err_irq;
++
++ /* Do SOFT RST */
++ v = readl(priv->base + EMAC_BASIC_CTL1);
++ writel(v | 0x01, priv->base + EMAC_BASIC_CTL1);
++
++ err = readl_poll_timeout(priv->base + EMAC_BASIC_CTL1, v,
++ !(v & 0x01), 100, 10000);
++ if (err) {
++ dev_err(priv->dev, "EMAC reset timeout\n");
++ err = -EFAULT;
++ goto err_syscon;
++ }
++
++ sun8i_emac_set_mdc(ndev);
++
++ err = sun8i_emac_mdio_register(ndev);
++ if (err)
++ goto err_syscon;
++
++ err = sun8i_emac_mdio_probe(ndev);
++ if (err)
++ goto err_syscon;
++
++ /* DMA */
++ v = (8 << 24);/* burst len */
++ writel(v, priv->base + EMAC_BASIC_CTL1);
++
++ writel(EMAC_RX_INT | EMAC_TX_INT, priv->base + EMAC_INT_EN);
++
++ v = readl(priv->base + EMAC_RX_CTL0);
++ /* CHECK_CRC */
++ if (ndev->features & NETIF_F_RXCSUM)
++ v |= EMAC_RX_DO_CRC;
++ else
++ v &= ~EMAC_RX_DO_CRC;
++ /* STRIP_FCS */
++ if (ndev->features & NETIF_F_RXFCS)
++ v &= ~EMAC_RX_STRIP_FCS;
++ else
++ v |= EMAC_RX_STRIP_FCS;
++ writel(v, priv->base + EMAC_RX_CTL0);
++
++ v = readl(priv->base + EMAC_TX_CTL1);
++ /* TX_MD Transmission starts after a full frame located in TX DMA FIFO*/
++ v |= BIT(1);
++ /* Undocumented bit (called TX_NEXT_FRM in BSP), the original comment is
++ * "Operating on second frame increase the performance
++ * especially when transmit store-and-forward is used."
++ */
++ v |= BIT(2);
++ writel(v, priv->base + EMAC_TX_CTL1);
++
++ v = readl(priv->base + EMAC_RX_CTL1);
++ /* RX_MD RX DMA reads data from RX DMA FIFO to host memory after a
++ * complete frame has been written to RX DMA FIFO
++ */
++ v |= BIT(1);
++ writel(v, priv->base + EMAC_RX_CTL1);
++
++ sun8i_emac_set_macaddr(priv, ndev->dev_addr, 0);
++
++ err = sun8i_emac_alloc_rings(ndev);
++ if (err) {
++ netdev_err(ndev, "Fail to allocate rings\n");
++ goto err_mdio;
++ }
++
++ phy_start(ndev->phydev);
++
++ sun8i_emac_start_rx(ndev);
++ sun8i_emac_start_tx(ndev);
++
++ netif_napi_add(ndev, &priv->napi, sun8i_emac_poll, 64);
++ napi_enable(&priv->napi);
++ netif_start_queue(ndev);
++
++ return 0;
++err_mdio:
++ phy_disconnect(ndev->phydev);
++err_syscon:
++ sun8i_emac_unset_syscon(ndev);
++err_irq:
++ free_irq(priv->irq, ndev);
++err_power:
++ sun8i_emac_unpower(ndev);
++ return err;
++}
++
++/* Clean the TX ring of any accepted skb for xmit */
++static void sun8i_emac_tx_clean(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ int i;
++ struct dma_desc *ddesc;
++ int frame_len;
++
++ for (i = 0; i < priv->nbdesc_tx; i++) {
++ if (priv->txl[i].skb) {
++ ddesc = priv->dd_tx + i;
++ frame_len = le32_to_cpu(ddesc->ctl) & 0x3FFF;
++ switch (priv->txl[i].map) {
++ case MAP_SINGLE:
++ dma_unmap_single(priv->dev,
++ le32_to_cpu(ddesc->buf_addr),
++ frame_len, DMA_TO_DEVICE);
++ break;
++ case MAP_PAGE:
++ dma_unmap_page(priv->dev,
++ le32_to_cpu(ddesc->buf_addr),
++ frame_len, DMA_TO_DEVICE);
++ break;
++ default:
++ dev_err(priv->dev, "Trying to free an empty slot\n");
++ continue;
++ }
++ dev_kfree_skb_any(priv->txl[i].skb);
++ priv->txl[i].skb = NULL;
++ ddesc->ctl = 0;
++ ddesc->status = DCLEAN;
++ }
++ }
++ priv->tx_slot = 0;
++ priv->tx_dirty = 0;
++}
++
++/* Clean the RX ring */
++static void sun8i_emac_rx_clean(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ int i;
++ struct dma_desc *ddesc;
++
++ /* clean RX ring */
++ for (i = 0; i < priv->nbdesc_rx; i++)
++ if (priv->rx_skb[i]) {
++ ddesc = priv->dd_rx + i;
++ dma_unmap_single(priv->dev,
++ le32_to_cpu(ddesc->buf_addr),
++ DESC_BUF_MAX, DMA_FROM_DEVICE);
++ dev_kfree_skb_any(priv->rx_skb[i]);
++ priv->rx_skb[i] = NULL;
++ }
++}
++
++static int sun8i_emac_stop(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ napi_disable(&priv->napi);
++
++ sun8i_emac_stop_tx(ndev);
++ sun8i_emac_stop_rx(ndev);
++
++ phy_stop(ndev->phydev);
++ phy_disconnect(ndev->phydev);
++
++ sun8i_emac_mdio_unregister(ndev);
++
++ sun8i_emac_unset_syscon(ndev);
++
++ free_irq(priv->irq, ndev);
++
++ sun8i_emac_rx_clean(ndev);
++ sun8i_emac_tx_clean(ndev);
++
++ kfree(priv->rx_skb);
++ kfree(priv->txl);
++
++ dma_free_coherent(priv->dev, priv->nbdesc_rx * sizeof(struct dma_desc),
++ priv->dd_rx, priv->dd_rx_phy);
++ dma_free_coherent(priv->dev, priv->nbdesc_tx * sizeof(struct dma_desc),
++ priv->dd_tx, priv->dd_tx_phy);
++
++ sun8i_emac_unpower(ndev);
++
++ return 0;
++}
++
++static netdev_tx_t sun8i_emac_xmit(struct sk_buff *skb, struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct dma_desc *ddesc;
++ struct dma_desc *first;
++ int i = 0, rbd_first;
++ unsigned int len, fraglen, tlen;
++ u32 v;
++ int n;
++ int nf;
++ const skb_frag_t *frag;
++ int do_csum = 0;
++
++ if (skb_put_padto(skb, ETH_ZLEN))
++ return NETDEV_TX_OK;
++ len = skb_headlen(skb);
++
++ n = skb_shinfo(skb)->nr_frags;
++
++ if (skb->ip_summed == CHECKSUM_PARTIAL) {
++ do_csum = 1;
++ priv->estats.tx_hw_csum++;
++ }
++ netif_dbg(priv, tx_queued, ndev, "%s len=%u skblen=%u %x\n", __func__,
++ len, skb->len,
++ (skb->ip_summed == CHECKSUM_PARTIAL));
++
++ /* check for contigous space
++ * We need at least 1(skb->data) + n(numfrags) + 1(one clean slot)
++ */
++ if (rb_tx_numfreedesc(ndev) < n + 2) {
++ dev_err_ratelimited(priv->dev, "BUG!: TX is full %d %d\n",
++ priv->tx_dirty, priv->tx_slot);
++ netif_stop_queue(ndev);
++ return NETDEV_TX_BUSY;
++ }
++ i = priv->tx_slot;
++
++ ddesc = priv->dd_tx + i;
++ first = priv->dd_tx + i;
++ rbd_first = i;
++
++ ddesc->buf_addr = dma_map_single(priv->dev, skb->data, len,
++ DMA_TO_DEVICE);
++ if (dma_mapping_error(priv->dev, ddesc->buf_addr)) {
++ dev_err(priv->dev, "ERROR: Cannot map buffer for DMA\n");
++ goto xmit_error;
++ }
++ /* We cannot direcly use cpu_to_le32() after dma_map_single
++ * since dma_mapping_error use it
++ */
++ ddesc->buf_addr = cpu_to_le32(ddesc->buf_addr);
++ priv->txl[i].map = MAP_SINGLE;
++ priv->txl[i].skb = skb;
++
++ tlen = len;
++ ddesc->ctl = le32_to_cpu(len);
++ /* Undocumented bit that make it works
++ * Without it, packets never be sent on H3 SoC
++ */
++ ddesc->ctl |= EMAC_MAGIC_TX_BIT;
++ if (do_csum)
++ ddesc->ctl |= EMAC_TX_DO_CRC;
++
++ /* handle fragmented skb, one descriptor per fragment */
++ for (nf = 0; nf < n; nf++) {
++ frag = &skb_shinfo(skb)->frags[nf];
++ rb_inc(&i, priv->nbdesc_tx);
++ priv->txl[i].skb = skb;
++ ddesc = priv->dd_tx + i;
++ fraglen = skb_frag_size(frag);
++ ddesc->ctl = le32_to_cpu(fraglen);
++ tlen += fraglen,
++ ddesc->ctl |= EMAC_MAGIC_TX_BIT;
++ if (do_csum)
++ ddesc->ctl |= EMAC_TX_DO_CRC;
++
++ ddesc->buf_addr = skb_frag_dma_map(priv->dev, frag, 0,
++ fraglen, DMA_TO_DEVICE);
++ if (dma_mapping_error(priv->dev, ddesc->buf_addr)) {
++ dev_err(priv->dev, "Cannot map buffer for DMA\n");
++ goto xmit_error;
++ }
++ /* Cannot directly use cpu_to_le32() after skb_frag_dma_map
++ * since dma_mapping_error use it
++ */
++ ddesc->buf_addr = cpu_to_le32(ddesc->buf_addr);
++ priv->txl[i].map = MAP_PAGE;
++ ddesc->status = EMAC_COULD_BE_USED_BY_DMA;
++ }
++
++ /* frame end */
++ ddesc->ctl |= EMAC_DSC_TX_LAST;
++ /* We want an interrupt after transmission */
++ ddesc->ctl |= EMAC_WANT_INT;
++
++ rb_inc(&i, priv->nbdesc_tx);
++
++ /* This line was previously after DMA start, but with that we hit a
++ * small race with complete_xmit() where we complete more data than
++ * sent.
++ * The packet is sent just after EMAC_COULD_BE_USED_BY_DMA flag set and
++ * complete_xmit fire just after before netdev_sent_queue().
++ * This race could be observed only when overflowing a gigabit line.
++ */
++ netdev_sent_queue(ndev, skb->len);
++
++ /* frame begin */
++ first->ctl |= EMAC_DSC_TX_FIRST;
++ wmb();/* EMAC_COULD_BE_USED_BY_DMA must be the last value written */
++ first->status = EMAC_COULD_BE_USED_BY_DMA;
++ priv->tx_slot = i;
++
++ /* Trying to optimize this (recording DMA start/stop) seems
++ * to lead to errors. So we always start DMA.
++ */
++ v = readl(priv->base + EMAC_TX_CTL1);
++ v |= EMAC_TX_DMA_START;
++ v |= EMAC_TX_DMA_EN;
++ writel_relaxed(v, priv->base + EMAC_TX_CTL1);
++
++ if (rb_tx_numfreedesc(ndev) < MAX_SKB_FRAGS + 1) {
++ netif_stop_queue(ndev);
++ priv->estats.tx_stop_queue++;
++ }
++ priv->estats.tx_used_desc = rb_tx_numfreedesc(ndev);
++ priv->ndev->stats.tx_packets++;
++ priv->ndev->stats.tx_bytes += tlen;
++
++ return NETDEV_TX_OK;
++
++xmit_error:
++ /* destroy skb and return TX OK Documentation/DMA-API-HOWTO.txt */
++ /* clean descritors from rbd_first to i */
++ ddesc->ctl = 0;
++ /* setting status to DCLEAN is the last value to be set */
++ wmb();
++ ddesc->status = DCLEAN;
++ do {
++ ddesc = priv->dd_tx + rbd_first;
++ ddesc->ctl = 0;
++ /* setting status to DCLEAN is the last value to be set */
++ wmb();
++ ddesc->status = DCLEAN;
++ rb_inc(&rbd_first, priv->nbdesc_tx);
++ } while (rbd_first != i);
++ dev_kfree_skb_any(skb);
++ return NETDEV_TX_OK;
++}
++
++static int sun8i_emac_change_mtu(struct net_device *ndev, int new_mtu)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ int max_mtu;
++
++ dev_info(priv->dev, "%s set MTU to %d\n", __func__, new_mtu);
++
++ if (netif_running(ndev)) {
++ dev_err(priv->dev, "%s: must be stopped to change its MTU\n",
++ ndev->name);
++ return -EBUSY;
++ }
++
++ max_mtu = SKB_MAX_HEAD(NET_SKB_PAD + NET_IP_ALIGN);
++
++ if ((new_mtu < 68) || (new_mtu > max_mtu)) {
++ dev_err(priv->dev, "%s: invalid MTU, max MTU is: %d\n",
++ ndev->name, max_mtu);
++ return -EINVAL;
++ }
++
++ ndev->mtu = new_mtu;
++ netdev_update_features(ndev);
++ return 0;
++}
++
++static int sun8i_emac_set_features(struct net_device *ndev,
++ netdev_features_t features)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ u32 v;
++
++ v = readl(priv->base + EMAC_BASIC_CTL0);
++ if (features & NETIF_F_LOOPBACK && netif_running(ndev)) {
++ netif_info(priv, hw, ndev, "Set loopback features");
++ v |= BIT(1);
++ } else {
++ netif_info(priv, hw, ndev, "Unset loopback features");
++ v &= ~BIT(1);
++ }
++ writel(v, priv->base + EMAC_BASIC_CTL0);
++
++ v = readl(priv->base + EMAC_RX_CTL0);
++ if (features & NETIF_F_RXCSUM) {
++ v |= EMAC_RX_DO_CRC;
++ netif_info(priv, hw, ndev, "Doing RX CRC check by hardware");
++ } else {
++ v &= ~EMAC_RX_DO_CRC;
++ netif_info(priv, hw, ndev, "No RX CRC check by hardware");
++ }
++ if (features & NETIF_F_RXFCS) {
++ v &= ~EMAC_RX_STRIP_FCS;
++ netif_info(priv, hw, ndev, "Keep FCS");
++ } else {
++ v |= EMAC_RX_STRIP_FCS;
++ netif_info(priv, hw, ndev, "Strip FCS");
++ }
++ writel(v, priv->base + EMAC_RX_CTL0);
++
++ netif_dbg(priv, drv, ndev, "%s %llx %x\n", __func__, features, v);
++
++ return 0;
++}
++
++static void sun8i_emac_set_rx_mode(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ u32 v = 0;
++ int i = 0;
++ struct netdev_hw_addr *ha;
++
++ /* Receive all multicast frames */
++ v |= BIT(16);
++ /* Receive all control frames */
++ v |= BIT(13);
++ if (ndev->flags & IFF_PROMISC)
++ v |= BIT(1);
++ if (netdev_uc_count(ndev) > 7) {
++ v |= BIT(1);
++ } else {
++ netdev_for_each_uc_addr(ha, ndev) {
++ i++;
++ sun8i_emac_set_macaddr(priv, ha->addr, i);
++ }
++ }
++ writel(v, priv->base + EMAC_RX_FRM_FLT);
++}
++
++static void sun8i_emac_tx_timeout(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ netdev_err(ndev, "%s\n", __func__);
++
++ sun8i_emac_stop_tx(ndev);
++
++ sun8i_emac_tx_clean(ndev);
++
++ /* write start of the new TX ring descriptor */
++ writel(priv->dd_tx_phy, priv->base + EMAC_TX_DESC_LIST);
++
++ sun8i_emac_start_tx(ndev);
++
++ netdev_reset_queue(ndev);
++
++ priv->estats.tx_timeout++;
++ ndev->stats.tx_errors++;
++ netif_wake_queue(ndev);
++}
++
++static int sun8i_emac_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
++{
++ struct phy_device *phydev = ndev->phydev;
++
++ if (!netif_running(ndev))
++ return -EINVAL;
++
++ if (!phydev)
++ return -ENODEV;
++
++ return phy_mii_ioctl(phydev, rq, cmd);
++}
++
++static int sun8i_emac_check_if_running(struct net_device *ndev)
++{
++ if (!netif_running(ndev))
++ return -EINVAL;
++ return 0;
++}
++
++static int sun8i_emac_get_sset_count(struct net_device *ndev, int sset)
++{
++ switch (sset) {
++ case ETH_SS_STATS:
++ return ARRAY_SIZE(estats_str);
++ }
++ return -EOPNOTSUPP;
++}
++
++static int sun8i_emac_ethtool_get_settings(struct net_device *ndev,
++ struct ethtool_cmd *cmd)
++{
++ struct phy_device *phy = ndev->phydev;
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ if (!phy) {
++ netdev_err(ndev, "%s: %s: PHY is not registered\n",
++ __func__, ndev->name);
++ return -ENODEV;
++ }
++
++ if (!netif_running(ndev)) {
++ dev_err(priv->dev, "interface disabled: we cannot track link speed / duplex setting\n");
++ return -EBUSY;
++ }
++
++ return phy_ethtool_gset(phy, cmd);
++}
++
++static int sun8i_emac_ethtool_set_settings(struct net_device *ndev,
++ struct ethtool_cmd *cmd)
++{
++ struct phy_device *phy = ndev->phydev;
++
++ return phy_ethtool_sset(phy, cmd);
++}
++
++static void sun8i_emac_ethtool_getdrvinfo(struct net_device *ndev,
++ struct ethtool_drvinfo *info)
++{
++ strlcpy(info->driver, "sun8i_emac", sizeof(info->driver));
++ strcpy(info->version, "00");
++ info->fw_version[0] = '\0';
++}
++
++static void sun8i_emac_ethtool_stats(struct net_device *ndev,
++ struct ethtool_stats *dummy, u64 *data)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ memcpy(data, &priv->estats,
++ sun8i_emac_get_sset_count(ndev, ETH_SS_STATS) * sizeof(u64));
++}
++
++static void sun8i_emac_ethtool_strings(struct net_device *dev, u32 stringset,
++ u8 *buffer)
++{
++ switch (stringset) {
++ case ETH_SS_STATS:
++ memcpy(buffer, &estats_str, sizeof(estats_str));
++ break;
++ }
++}
++
++static u32 sun8i_emac_ethtool_getmsglevel(struct net_device *ndev)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ return priv->msg_enable;
++}
++
++static void sun8i_emac_ethtool_setmsglevel(struct net_device *ndev, u32 level)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ priv->msg_enable = level;
++}
++
++static void sun8i_emac_get_pauseparam(struct net_device *ndev,
++ struct ethtool_pauseparam *pause)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ pause->rx_pause = 0;
++ pause->tx_pause = 0;
++ pause->autoneg = ndev->phydev->autoneg;
++
++ if (priv->flow_ctrl & EMAC_FLOW_RX)
++ pause->rx_pause = 1;
++ if (priv->flow_ctrl & EMAC_FLOW_TX)
++ pause->tx_pause = 1;
++}
++
++static int sun8i_emac_set_pauseparam(struct net_device *ndev,
++ struct ethtool_pauseparam *pause)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ struct phy_device *phy = ndev->phydev;
++ int new_pause = 0;
++ int ret = 0;
++
++ if (pause->rx_pause)
++ new_pause |= EMAC_FLOW_RX;
++ if (pause->tx_pause)
++ new_pause |= EMAC_FLOW_TX;
++
++ priv->flow_ctrl = new_pause;
++ phy->autoneg = pause->autoneg;
++
++ if (phy->autoneg) {
++ if (netif_running(ndev))
++ ret = phy_start_aneg(phy);
++ } else {
++ sun8i_emac_flow_ctrl(priv, phy->duplex, priv->flow_ctrl);
++ }
++ return ret;
++}
++
++static void sun8i_emac_ethtool_get_ringparam(struct net_device *ndev,
++ struct ethtool_ringparam *ring)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++
++ ring->rx_pending = priv->nbdesc_rx;
++ ring->tx_pending = priv->nbdesc_tx;
++}
++
++static int sun8i_emac_ethtool_set_ringparam(struct net_device *ndev,
++ struct ethtool_ringparam *ring)
++{
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ int err;
++
++ if (ring->rx_max_pending || ring->rx_mini_max_pending ||
++ ring->rx_jumbo_max_pending || ring->rx_mini_pending ||
++ ring->rx_jumbo_pending || ring->tx_max_pending)
++ return -EINVAL;
++
++ if (ring->tx_pending < MAX_SKB_FRAGS + 1) {
++ netdev_err(ndev, "The number of TX descriptors is too low");
++ return -EINVAL;
++ }
++
++ sun8i_emac_stop_tx(ndev);
++ sun8i_emac_stop_rx(ndev);
++
++ sun8i_emac_rx_clean(ndev);
++ sun8i_emac_tx_clean(ndev);
++
++ kfree(priv->rx_skb);
++ kfree(priv->txl);
++
++ dma_free_coherent(priv->dev, priv->nbdesc_rx * sizeof(struct dma_desc),
++ priv->dd_rx, priv->dd_rx_phy);
++ dma_free_coherent(priv->dev, priv->nbdesc_tx * sizeof(struct dma_desc),
++ priv->dd_tx, priv->dd_tx_phy);
++
++ priv->nbdesc_rx = ring->rx_pending;
++ priv->nbdesc_tx = ring->tx_pending;
++ err = sun8i_emac_alloc_rings(ndev);
++ if (err) {
++ /* Fatal error, we cannot re start */
++ netdev_err(ndev, "Fail to allocate rings\n");
++ return -EFAULT;
++ }
++
++ sun8i_emac_start_rx(ndev);
++ sun8i_emac_start_tx(ndev);
++
++ netif_start_queue(ndev);
++
++ netdev_info(ndev, "Ring Param settings: rx: %d, tx %d\n",
++ ring->rx_pending, ring->tx_pending);
++ return 0;
++}
++
++static const struct ethtool_ops sun8i_emac_ethtool_ops = {
++ .begin = sun8i_emac_check_if_running,
++ .get_settings = sun8i_emac_ethtool_get_settings,
++ .set_settings = sun8i_emac_ethtool_set_settings,
++ .get_link = ethtool_op_get_link,
++ .get_pauseparam = sun8i_emac_get_pauseparam,
++ .set_pauseparam = sun8i_emac_set_pauseparam,
++ .get_ethtool_stats = sun8i_emac_ethtool_stats,
++ .get_strings = sun8i_emac_ethtool_strings,
++ .get_sset_count = sun8i_emac_get_sset_count,
++ .get_drvinfo = sun8i_emac_ethtool_getdrvinfo,
++ .get_msglevel = sun8i_emac_ethtool_getmsglevel,
++ .set_msglevel = sun8i_emac_ethtool_setmsglevel,
++ .get_ringparam = sun8i_emac_ethtool_get_ringparam,
++ .set_ringparam = sun8i_emac_ethtool_set_ringparam,
++};
++
++static const struct net_device_ops sun8i_emac_netdev_ops = {
++ .ndo_init = sun8i_emac_init,
++ .ndo_open = sun8i_emac_open,
++ .ndo_start_xmit = sun8i_emac_xmit,
++ .ndo_stop = sun8i_emac_stop,
++ .ndo_change_mtu = sun8i_emac_change_mtu,
++ .ndo_set_features = sun8i_emac_set_features,
++ .ndo_set_rx_mode = sun8i_emac_set_rx_mode,
++ .ndo_tx_timeout = sun8i_emac_tx_timeout,
++ .ndo_do_ioctl = sun8i_emac_ioctl,
++ .ndo_set_mac_address = eth_mac_addr,
++};
++
++/* No locking in this function since it is guaranteed to be run once and
++ * do actions only done here:
++ * - Scheduling NAPI
++ * - Stopping interrupts
++ * - Updating stats
++ *
++ * Even when not enabled via EMAC_INT_EN, some interrupt could fire, so we need
++ * to handle all of them.
++ * Interrupts know to fire when not enabled are:
++ * - EMAC_TX_DMA_STOP_INT
++ * - EMAC_TX_BUF_UA_INT
++ * - EMAC_TX_EARLY_INT
++ * - EMAC_RX_BUF_UA_INT
++ * - EMAC_RX_EARLY_INT
++ */
++static irqreturn_t sun8i_emac_dma_interrupt(int irq, void *dev_id)
++{
++ struct net_device *ndev = dev_id;
++ struct sun8i_emac_priv *priv = netdev_priv(ndev);
++ u32 v, u;
++
++ v = readl(priv->base + EMAC_INT_STA);
++
++ /* When this bit is asserted, a frame transmission is completed. */
++ if (v & EMAC_TX_INT) {
++ priv->estats.tx_int++;
++ writel(0, priv->base + EMAC_INT_EN);
++ napi_schedule(&priv->napi);
++ }
++
++ /* When this bit is asserted, the TX DMA FSM is stopped.
++ * For the moment only a call to tx_timeout cause this interrupt
++ * to fire.
++ */
++ if (v & EMAC_TX_DMA_STOP_INT)
++ priv->estats.tx_dma_stop++;
++
++ /* When this asserted, the TX DMA can not acquire next TX descriptor
++ * and TX DMA FSM is suspended.
++ */
++ if (v & EMAC_TX_BUF_UA_INT) {
++ priv->estats.tx_dma_ua++;
++ writel(0, priv->base + EMAC_INT_EN);
++ napi_schedule(&priv->napi);
++ }
++
++ if (v & EMAC_TX_TIMEOUT_INT)
++ priv->estats.tx_timeout_int++;
++
++ if (v & EMAC_TX_UNDERFLOW_INT)
++ priv->estats.tx_underflow_int++;
++
++ /* When this bit asserted , the frame is transmitted to FIFO totally. */
++ if (v & EMAC_TX_EARLY_INT)
++ priv->estats.tx_early_int++;
++
++ /* When this bit is asserted, a frame reception is completed */
++ if (v & EMAC_RX_INT) {
++ priv->estats.rx_int++;
++ writel(0, priv->base + EMAC_INT_EN);
++ napi_schedule(&priv->napi);
++ }
++
++ /* When this asserted, the RX DMA can not acquire next RX descriptor
++ * and RX DMA FSM is suspended.
++ */
++ if (v & EMAC_RX_BUF_UA_INT) {
++ u = readl(priv->base + EMAC_RX_CTL1);
++ writel(u | EMAC_RX_DMA_START, priv->base + EMAC_RX_CTL1);
++ priv->estats.rx_dma_ua++;
++ }
++
++ /* Same as TX DMA STOP, but never hit it */
++ if (v & EMAC_RX_DMA_STOP_INT)
++ priv->estats.rx_dma_stop++;
++
++ if (v & EMAC_RX_TIMEOUT_INT)
++ priv->estats.rx_timeout_int++;
++
++ if (v & EMAC_RX_OVERFLOW_INT)
++ priv->estats.rx_overflow_int++;
++
++ if (v & EMAC_RX_EARLY_INT)
++ priv->estats.rx_early_int++;
++
++ if (v & EMAC_RGMII_STA_INT)
++ priv->estats.rgmii_state_int++;
++
++ /* the datasheet state those register as read-only
++ * but nothing work(freeze) without writing to it
++ */
++ writel(v, priv->base + EMAC_INT_STA);
++
++ return IRQ_HANDLED;
++}
++
++static int sun8i_emac_probe(struct platform_device *pdev)
++{
++ struct device_node *node = pdev->dev.of_node;
++ struct sun8i_emac_priv *priv;
++ struct net_device *ndev;
++ struct resource *res;
++ int ret;
++
++ ndev = alloc_etherdev(sizeof(*priv));
++ if (!ndev)
++ return -ENOMEM;
++
++ SET_NETDEV_DEV(ndev, &pdev->dev);
++ priv = netdev_priv(ndev);
++ platform_set_drvdata(pdev, ndev);
++
++ priv->variant = of_device_get_match_data(&pdev->dev);
++ if (!priv->variant) {
++ dev_err(&pdev->dev, "Missing sun8i-emac variant\n");
++ return -EINVAL;
++ }
++
++ priv->mdio_node = of_get_child_by_name(node, "mdio");
++ if (!priv->mdio_node) {
++ netdev_err(ndev, "Could not find a MDIO node\n");
++ return -EINVAL;
++ }
++
++ priv->phy_node = of_parse_phandle(node, "phy-handle", 0);
++ if (!priv->phy_node) {
++ netdev_err(ndev, "No associated PHY\n");
++ return -EINVAL;
++ }
++
++ priv->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
++ "syscon");
++ if (IS_ERR(priv->regmap)) {
++ ret = PTR_ERR(priv->regmap);
++ dev_err(&pdev->dev, "unable to map SYSCON:%d\n", ret);
++ return ret;
++ }
++
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ priv->base = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(priv->base)) {
++ ret = PTR_ERR(priv->base);
++ dev_err(&pdev->dev, "Cannot request MMIO: %d\n", ret);
++ return ret;
++ }
++
++ priv->ahb_clk = devm_clk_get(&pdev->dev, "ahb");
++ if (IS_ERR(priv->ahb_clk)) {
++ ret = PTR_ERR(priv->ahb_clk);
++ dev_err(&pdev->dev, "Cannot get AHB clock err=%d\n", ret);
++ goto probe_err;
++ }
++
++ priv->rst_mac = devm_reset_control_get_optional(&pdev->dev, "ahb");
++ if (IS_ERR(priv->rst_mac)) {
++ ret = PTR_ERR(priv->rst_mac);
++ if (ret == -EPROBE_DEFER)
++ return -EPROBE_DEFER;
++ dev_info(&pdev->dev, "No MAC reset control found %d\n", ret);
++ priv->rst_mac = NULL;
++ }
++
++ priv->phy_interface = of_get_phy_mode(node);
++ if (priv->phy_interface < 0) {
++ netdev_err(ndev, "PHY interface mode node unspecified\n");
++ return priv->phy_interface;
++ }
++
++ switch (priv->phy_interface) {
++ case PHY_INTERFACE_MODE_MII:
++ if (!priv->variant->support_mii)
++ return -EINVAL;
++ break;
++ case PHY_INTERFACE_MODE_RMII:
++ if (!priv->variant->support_rmii)
++ return -EINVAL;
++ break;
++ case PHY_INTERFACE_MODE_RGMII:
++ if (!priv->variant->support_rgmii)
++ return -EINVAL;
++ break;
++ default:
++ netdev_err(ndev, "Unsupported interface mode: %s",
++ phy_modes(priv->phy_interface));
++ return -EINVAL;
++ }
++
++ if (priv->phy_interface == priv->variant->internal_phy)
++ priv->use_internal_phy = true;
++
++ if (priv->use_internal_phy) {
++ priv->ephy_clk = of_clk_get(priv->phy_node, 0);
++ if (IS_ERR(priv->ephy_clk)) {
++ ret = PTR_ERR(priv->ephy_clk);
++ dev_err(&pdev->dev, "Cannot get EPHY clock err=%d\n",
++ ret);
++ goto probe_err;
++ }
++
++ priv->rst_ephy = of_reset_control_get(priv->phy_node, 0);
++ if (IS_ERR(priv->rst_ephy)) {
++ ret = PTR_ERR(priv->rst_ephy);
++ if (ret == -EPROBE_DEFER)
++ goto probe_err;
++ dev_info(&pdev->dev,
++ "No EPHY reset control found %d\n", ret);
++ priv->rst_ephy = NULL;
++ }
++ }
++
++ priv->irq = platform_get_irq(pdev, 0);
++ if (priv->irq < 0) {
++ ret = priv->irq;
++ dev_err(&pdev->dev, "Cannot claim IRQ: %d\n", ret);
++ goto probe_err;
++ }
++
++ spin_lock_init(&priv->tx_lock);
++
++ ndev->netdev_ops = &sun8i_emac_netdev_ops;
++ ndev->ethtool_ops = &sun8i_emac_ethtool_ops;
++
++ priv->ndev = ndev;
++ priv->dev = &pdev->dev;
++
++ ndev->hw_features = NETIF_F_SG | NETIF_F_HIGHDMA;
++ ndev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
++ NETIF_F_RXCSUM;
++ ndev->features |= ndev->hw_features;
++ ndev->hw_features |= NETIF_F_RXFCS;
++ ndev->hw_features |= NETIF_F_RXALL;
++ ndev->hw_features |= NETIF_F_LOOPBACK;
++ ndev->priv_flags |= IFF_UNICAST_FLT;
++
++ ndev->watchdog_timeo = msecs_to_jiffies(5000);
++ netif_carrier_off(ndev);
++
++ /* Benched on OPIPC with 100M, setting more than 256 does not give any
++ * perf boost
++ */
++ priv->nbdesc_rx = 128;
++ priv->nbdesc_tx = 256;
++
++ ret = register_netdev(ndev);
++ if (ret) {
++ dev_err(&pdev->dev, "ERROR: Register %s failed\n", ndev->name);
++ goto probe_err;
++ }
++
++ return 0;
++
++probe_err:
++ free_netdev(ndev);
++ return ret;
++}
++
++static int sun8i_emac_remove(struct platform_device *pdev)
++{
++ struct net_device *ndev = platform_get_drvdata(pdev);
++
++ unregister_netdev(ndev);
++ platform_set_drvdata(pdev, NULL);
++ free_netdev(ndev);
++
++ return 0;
++}
++
++static const struct of_device_id sun8i_emac_of_match_table[] = {
++ { .compatible = "allwinner,sun8i-a83t-emac",
++ .data = &emac_variant_a83t },
++ { .compatible = "allwinner,sun8i-h3-emac",
++ .data = &emac_variant_h3 },
++ { .compatible = "allwinner,sun50i-a64-emac",
++ .data = &emac_variant_a64 },
++ {}
++};
++MODULE_DEVICE_TABLE(of, sun8i_emac_of_match_table);
++
++static struct platform_driver sun8i_emac_driver = {
++ .probe = sun8i_emac_probe,
++ .remove = sun8i_emac_remove,
++ .driver = {
++ .name = "sun8i-emac",
++ .of_match_table = sun8i_emac_of_match_table,
++ },
++};
++
++module_platform_driver(sun8i_emac_driver);
++
++MODULE_DESCRIPTION("sun8i Ethernet driver");
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Corentin Labbe <clabbe.montjoie@gmail.com");
+--
+2.9.3
+
+From 1d9ea1f4df27f3a2e2ed7094852a23a4dd45e2be Mon Sep 17 00:00:00 2001
+From: Corentin LABBE <clabbe.montjoie@gmail.com>
+Date: Fri, 7 Oct 2016 10:25:49 +0200
+Subject: [PATCH 2/8] MAINTAINERS: Add myself as maintainer of sun8i-emac
+
+This patch add myself as maintainer of the sun8i-emac driver.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+---
+ MAINTAINERS | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 411e3b8..e99a087 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -590,6 +590,12 @@ S: Maintained
+ F: Documentation/i2c/busses/i2c-ali1563
+ F: drivers/i2c/busses/i2c-ali1563.c
+
++ALLWINNER SUN8I-EMAC ETHERNET DRIVER
++M: Corentin Labbe <clabbe.montjoie@gmail.com>
++L: netdev@vger.kernel.org
++S: Maintained
++F: drivers/net/ethernet/allwinner/sun8i-emac.c
++
+ ALLWINNER SECURITY SYSTEM
+ M: Corentin Labbe <clabbe.montjoie@gmail.com>
+ L: linux-crypto@vger.kernel.org
+--
+2.9.3
+
+From 6b3093e31b877f39475454b5af3b820dbb3a4f73 Mon Sep 17 00:00:00 2001
+From: Corentin LABBE <clabbe.montjoie@gmail.com>
+Date: Fri, 7 Oct 2016 10:25:50 +0200
+Subject: [PATCH 3/8] ARM: sun8i: dt: Add DT bindings documentation for
+ Allwinner sun8i-emac
+
+This patch adds documentation for Device-Tree bindings for the
+Allwinner sun8i-emac driver.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+---
+ .../bindings/net/allwinner,sun8i-emac.txt | 70 ++++++++++++++++++++++
+ 1 file changed, 70 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt
+
+diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt b/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt
+new file mode 100644
+index 0000000..92e4ef3b
+--- /dev/null
++++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt
+@@ -0,0 +1,70 @@
++* Allwinner sun8i EMAC ethernet controller
++
++Required properties:
++- compatible: should be one of the following string:
++ "allwinner,sun8i-a83t-emac"
++ "allwinner,sun8i-h3-emac"
++ "allwinner,sun50i-a64-emac"
++- reg: address and length of the register for the device.
++- syscon: A phandle to the syscon of the SoC
++- interrupts: interrupt for the device
++- clocks: A phandle to the reference clock for this device
++- clock-names: should be "ahb"
++- resets: A phandle to the reset control for this device
++- reset-names: should be "ahb"
++- phy-mode: See ethernet.txt
++- phy-handle: See ethernet.txt
++- #address-cells: shall be 1
++- #size-cells: shall be 0
++
++Optional properties:
++- allwinner,tx-delay: TX clock delay chain value. Range value is 0-0x07. Default is 0)
++- allwinner,rx-delay: RX clock delay chain value. Range value is 0-0x1F. Default is 0)
++Both delay properties does not have units, there are arbitrary value.
++The TX/RX clock delay chain settings are board specific and could be found
++in vendor FEX files.
++
++Optional properties for "allwinner,sun8i-h3-emac":
++- allwinner,leds-active-low: EPHY LEDs are active low
++
++Required child node of emac:
++- mdio bus node: should be named mdio
++
++Required properties of the mdio node:
++- #address-cells: shall be 1
++- #size-cells: shall be 0
++
++The device node referenced by "phy" or "phy-handle" should be a child node
++of the mdio node. See phy.txt for the generic PHY bindings.
++
++Required properties of the phy node with "allwinner,sun8i-h3-emac":
++- clocks: an extra phandle to the reference clock for the EPHY
++- resets: an extra phandle to the reset control for the EPHY
++
++Example:
++
++emac: ethernet@01c0b000 {
++ compatible = "allwinner,sun8i-h3-emac";
++ syscon = <&syscon>;
++ reg = <0x01c0b000 0x104>;
++ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
++ resets = <&ccu RST_BUS_EMAC>;
++ reset-names = "ahb";
++ clocks = <&ccu CLK_BUS_EMAC>;
++ clock-names = "ahb";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ phy = <&int_mii_phy>;
++ phy-mode = "mii";
++ allwinner,leds-active-low;
++ mdio: mdio {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ int_mii_phy: ethernet-phy@1 {
++ reg = <1>;
++ clocks = <&ccu CLK_BUS_EPHY>;
++ resets = <&ccu RST_BUS_EPHY>;
++ };
++ };
++};
+--
+2.9.3
+
+From aa634aa1b0454befe54a14d03b9a3ba6f750dcfd Mon Sep 17 00:00:00 2001
+From: Corentin LABBE <clabbe.montjoie@gmail.com>
+Date: Fri, 7 Oct 2016 10:25:51 +0200
+Subject: [PATCH 4/8] ARM: dts: sun8i-h3: Add dt node for the syscon control
+ module
+
+This patch add the dt node for the syscon register present on the
+Allwinner H3.
+
+Only two register are present in this syscon and the only one useful is
+the one dedicated to EMAC clock.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+---
+ arch/arm/boot/dts/sun8i-h3.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
+index 75a8654..eac7d00 100644
+--- a/arch/arm/boot/dts/sun8i-h3.dtsi
++++ b/arch/arm/boot/dts/sun8i-h3.dtsi
+@@ -140,6 +140,11 @@
+ #size-cells = <1>;
+ ranges;
+
++ syscon: syscon@01c00000 {
++ compatible = "syscon";
++ reg = <0x01c00000 0x1000>;
++ };
++
+ dma: dma-controller@01c02000 {
+ compatible = "allwinner,sun8i-h3-dma";
+ reg = <0x01c02000 0x1000>;
+--
+2.9.3
+
+From 976cca2d4eb5bf85c26dfaad03ea70bff88981fd Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Tue, 8 Nov 2016 10:23:08 +0000
+Subject: [PATCH 5/8] ARM: dts: sun8i-h3: add sun8i-emac ethernet driver
+
+The sun8i-emac is an ethernet MAC hardware that support 10/100/1000
+speed.
+
+This patch enable the sun8i-emac on the Allwinner H3 SoC Device-tree.
+The SoC H3 have an internal PHY, so optionals syscon and ephy are set.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+---
+ arch/arm/boot/dts/sun8i-h3.dtsi | 24 ++++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
+index eac7d00..86a8665 100644
+--- a/arch/arm/boot/dts/sun8i-h3.dtsi
++++ b/arch/arm/boot/dts/sun8i-h3.dtsi
+@@ -535,6 +535,30 @@
+ #size-cells = <0>;
+ };
+
++ emac: ethernet@1c30000 {
++ compatible = "allwinner,sun8i-h3-emac";
++ syscon = <&syscon>;
++ reg = <0x01c30000 0x104>;
++ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
++ resets = <&ccu RST_BUS_EMAC>;
++ reset-names = "ahb";
++ clocks = <&ccu CLK_BUS_EMAC>;
++ clock-names = "ahb";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++
++ mdio: mdio {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ int_mii_phy: ethernet-phy@1 {
++ reg = <1>;
++ clocks = <&ccu CLK_BUS_EPHY>;
++ resets = <&ccu RST_BUS_EPHY>;
++ };
++ };
++ };
++
+ gic: interrupt-controller@01c81000 {
+ compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+ reg = <0x01c81000 0x1000>,
+--
+2.9.3
+
+From 6e483713dda9e0d5e8e5f37d8b0367ff216c53db Mon Sep 17 00:00:00 2001
+From: Corentin LABBE <clabbe.montjoie@gmail.com>
+Date: Fri, 7 Oct 2016 10:25:53 +0200
+Subject: [PATCH 6/8] ARM: dts: sun8i: Enable sun8i-emac on the Orange PI PC
+
+The sun8i-emac hardware is present on the Orange PI PC.
+It uses the internal PHY.
+
+This patch create the needed emac node.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+---
+ arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+index 3ec9712..1b8dbc0 100644
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+@@ -54,6 +54,7 @@
+
+ aliases {
+ serial0 = &uart0;
++ ethernet0 = &emac;
+ };
+
+ chosen {
+@@ -183,3 +184,10 @@
+ /* USB VBUS is always on */
+ status = "okay";
+ };
++
++&emac {
++ phy-handle = <&int_mii_phy>;
++ phy-mode = "mii";
++ allwinner,leds-active-low;
++ status = "okay";
++};
+--
+2.9.3
+
+From 05cf4e2c77424ad5c9dc8495a65d6695d2831b0a Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede@redhat.com>
+Date: Fri, 7 Oct 2016 10:25:54 +0200
+Subject: [PATCH 7/8] ARM: dts: sun8i: Enable sun8i-emac on the Orange PI One
+
+The sun8i-emac hardware is present on the Orange PI One.
+It uses the internal PHY.
+
+This patch create the needed emac node.
+
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+---
+ arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+index 5c9b5bf..fa398cc 100644
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+@@ -54,6 +54,7 @@
+
+ aliases {
+ serial0 = &uart0;
++ ethernet0 = &emac;
+ };
+
+ chosen {
+@@ -94,6 +95,13 @@
+ status = "okay";
+ };
+
++&emac {
++ phy-handle = <&int_mii_phy>;
++ phy-mode = "mii";
++ allwinner,leds-active-low;
++ status = "okay";
++};
++
+ &mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+--
+2.9.3
+
+From 52c300b614fcb29e81067aa7ed8aafa489b590b7 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Tue, 8 Nov 2016 10:24:42 +0000
+Subject: [PATCH 8/8] ARM: dts: sun8i: Enable sun8i-emac on the Orange Pi 2
+
+The sun8i-emac hardware is present on the Orange PI 2.
+It uses the internal PHY.
+
+This patch create the needed emac node.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+---
+ arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+index e5bcaba..ad66b61 100644
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+@@ -54,6 +54,7 @@
+
+ aliases {
+ serial0 = &uart0;
++ ethernet0 = &emac;
+ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+ ethernet1 = &rtl8189;
+ };
+@@ -212,3 +213,10 @@
+ usb1_vbus-supply = <&reg_usb1_vbus>;
+ status = "okay";
+ };
++
++&emac {
++ phy-handle = <&int_mii_phy>;
++ phy-mode = "mii";
++ allwinner,leds-active-low;
++ status = "okay";
++};
+--
+2.9.3
+
diff --git a/MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch b/MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch
new file mode 100644
index 000000000..6f5d8b6ab
--- /dev/null
+++ b/MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch
@@ -0,0 +1,32 @@
+From 71db1b222ecdf6cb4356f6f1e2bd45cd2f0e85e1 Mon Sep 17 00:00:00 2001
+From: Laura Abbott <labbott@redhat.com>
+Date: Tue, 18 Oct 2016 13:58:44 -0700
+Subject: [PATCH] MODSIGN: Don't try secure boot if EFI runtime is disabled
+
+Secure boot depends on having EFI runtime variable access. The code
+does not handle a lack of runtime variables gracefully. Add a check
+to just bail out of EFI runtime is disabled.
+
+Signed-off-by: Laura Abbott <labbott@redhat.com>
+---
+ kernel/modsign_uefi.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c
+index a41da14..2bdaf76 100644
+--- a/kernel/modsign_uefi.c
++++ b/kernel/modsign_uefi.c
+@@ -71,6 +71,10 @@ static int __init load_uefi_certs(void)
+ if (!efi_enabled(EFI_SECURE_BOOT))
+ return 0;
+
++ /* Things blow up if efi runtime is disabled */
++ if (efi_runtime_disabled())
++ return 0;
++
+ keyring = get_system_keyring();
+ if (!keyring) {
+ pr_err("MODSIGN: Couldn't get system keyring\n");
+--
+2.7.4
+
diff --git a/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch b/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch
index 05be7a028..752ba4631 100644
--- a/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch
+++ b/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch
@@ -1,7 +1,7 @@
-From ba2b209daf984514229626803472e0b055832345 Mon Sep 17 00:00:00 2001
+From 8a4535bcfe24d317be675e53cdc8c61d22fdc7f3 Mon Sep 17 00:00:00 2001
From: Josh Boyer <jwboyer@fedoraproject.org>
Date: Fri, 26 Oct 2012 12:42:16 -0400
-Subject: [PATCH] MODSIGN: Import certificates from UEFI Secure Boot
+Subject: [PATCH 18/20] MODSIGN: Import certificates from UEFI Secure Boot
Secure Boot stores a list of allowed certificates in the 'db' variable.
This imports those certificates into the system trusted keyring. This
@@ -20,11 +20,10 @@ Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org>
---
certs/system_keyring.c | 13 ++++++
include/keys/system_keyring.h | 1 +
- include/linux/efi.h | 6 +++
init/Kconfig | 9 ++++
kernel/Makefile | 3 ++
kernel/modsign_uefi.c | 99 +++++++++++++++++++++++++++++++++++++++++++
- 6 files changed, 131 insertions(+)
+ 5 files changed, 125 insertions(+)
create mode 100644 kernel/modsign_uefi.c
diff --git a/certs/system_keyring.c b/certs/system_keyring.c
@@ -63,28 +62,11 @@ index 5bc291a3d261..56ff5715ab67 100644
#ifdef CONFIG_IMA_BLACKLIST_KEYRING
extern struct key *ima_blacklist_keyring;
-diff --git a/include/linux/efi.h b/include/linux/efi.h
-index ff1877145aa4..2483de19c719 100644
---- a/include/linux/efi.h
-+++ b/include/linux/efi.h
-@@ -658,6 +658,12 @@ typedef struct {
- u64 table;
- } efi_config_table_64_t;
-
-+#define EFI_IMAGE_SECURITY_DATABASE_GUID \
-+ EFI_GUID( 0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f )
-+
-+#define EFI_SHIM_LOCK_GUID \
-+ EFI_GUID( 0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23 )
-+
- typedef struct {
- efi_guid_t guid;
- u32 table;
diff --git a/init/Kconfig b/init/Kconfig
-index e5449d5aeff9..5408c96f6604 100644
+index 461ad575a608..93646fd7b1c8 100644
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -1979,6 +1979,15 @@ config MODULE_SIG_ALL
+@@ -2009,6 +2009,15 @@ config MODULE_SIG_ALL
comment "Do not forget to sign required modules with scripts/sign-file"
depends on MODULE_SIG_FORCE && !MODULE_SIG_ALL
@@ -101,7 +83,7 @@ index e5449d5aeff9..5408c96f6604 100644
prompt "Which hash algorithm should modules be signed with?"
depends on MODULE_SIG
diff --git a/kernel/Makefile b/kernel/Makefile
-index e2ec54e2b952..8dab549985d8 100644
+index eb26e12c6c2a..e0c2268cb97e 100644
--- a/kernel/Makefile
+++ b/kernel/Makefile
@@ -57,6 +57,7 @@ endif
@@ -227,5 +209,5 @@ index 000000000000..fe4a6f2bf10a
+}
+late_initcall(load_uefi_certs);
--
-2.5.5
+2.9.3
diff --git a/PCI-Lock-down-BAR-access-when-module-security-is-ena.patch b/PCI-Lock-down-BAR-access-when-module-security-is-ena.patch
index 23a514f3b..e30b337c1 100644
--- a/PCI-Lock-down-BAR-access-when-module-security-is-ena.patch
+++ b/PCI-Lock-down-BAR-access-when-module-security-is-ena.patch
@@ -1,4 +1,4 @@
-From 655fbf360e1481db4f06001f893d388c15ac307f Mon Sep 17 00:00:00 2001
+From 03a4ad09f20944e1917abfd24d1d0e5f107a2861 Mon Sep 17 00:00:00 2001
From: Matthew Garrett <matthew.garrett@nebula.com>
Date: Thu, 8 Mar 2012 10:10:38 -0500
Subject: [PATCH 02/20] PCI: Lock down BAR access when module security is
@@ -18,7 +18,7 @@ Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
-index 312f23a8429c..93e6ac103dd0 100644
+index bcd10c795284..a950301496f3 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -30,6 +30,7 @@
@@ -29,7 +29,7 @@ index 312f23a8429c..93e6ac103dd0 100644
#include "pci.h"
static int sysfs_initialized; /* = 0 */
-@@ -710,6 +711,9 @@ static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
+@@ -716,6 +717,9 @@ static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
loff_t init_off = off;
u8 *data = (u8 *) buf;
@@ -39,7 +39,7 @@ index 312f23a8429c..93e6ac103dd0 100644
if (off > dev->cfg_size)
return 0;
if (off + count > dev->cfg_size) {
-@@ -1004,6 +1008,9 @@ static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
+@@ -1007,6 +1011,9 @@ static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
resource_size_t start, end;
int i;
@@ -49,7 +49,7 @@ index 312f23a8429c..93e6ac103dd0 100644
for (i = 0; i < PCI_ROM_RESOURCE; i++)
if (res == &pdev->resource[i])
break;
-@@ -1105,6 +1112,9 @@ static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
+@@ -1106,6 +1113,9 @@ static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
struct bin_attribute *attr, char *buf,
loff_t off, size_t count)
{
@@ -60,7 +60,7 @@ index 312f23a8429c..93e6ac103dd0 100644
}
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
-index 3f155e78513f..4265ea07e3b0 100644
+index 2408abe4ee8c..59f321c56c18 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -116,6 +116,9 @@ static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
@@ -85,7 +85,7 @@ index 3f155e78513f..4265ea07e3b0 100644
ret = pci_domain_nr(dev->bus);
@@ -233,7 +239,7 @@ static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
struct pci_filp_private *fpriv = file->private_data;
- int i, ret;
+ int i, ret, write_combine;
- if (!capable(CAP_SYS_RAWIO))
+ if (!capable(CAP_SYS_RAWIO) || secure_modules())
@@ -114,5 +114,5 @@ index b91c4da68365..98f5637304d1 100644
dev = pci_get_bus_and_slot(bus, dfn);
--
-2.4.3
+2.9.3
diff --git a/Restrict-dev-mem-and-dev-kmem-when-module-loading-is.patch b/Restrict-dev-mem-and-dev-kmem-when-module-loading-is.patch
index acf28cf88..24f1d5b5d 100644
--- a/Restrict-dev-mem-and-dev-kmem-when-module-loading-is.patch
+++ b/Restrict-dev-mem-and-dev-kmem-when-module-loading-is.patch
@@ -1,4 +1,4 @@
-From d4ae417828427de74e9f857f9caa49580aecf1fe Mon Sep 17 00:00:00 2001
+From 9f31204f829da97f99f7aacf30f0ddc26e456df7 Mon Sep 17 00:00:00 2001
From: Matthew Garrett <matthew.garrett@nebula.com>
Date: Fri, 9 Mar 2012 09:28:15 -0500
Subject: [PATCH 06/20] Restrict /dev/mem and /dev/kmem when module loading is
@@ -14,10 +14,10 @@ Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
1 file changed, 6 insertions(+)
diff --git a/drivers/char/mem.c b/drivers/char/mem.c
-index 53fe675f9bd7..b52c88860532 100644
+index 7f1a7ab5850d..d6a6f05fbc1c 100644
--- a/drivers/char/mem.c
+++ b/drivers/char/mem.c
-@@ -167,6 +167,9 @@ static ssize_t write_mem(struct file *file, const char __user *buf,
+@@ -164,6 +164,9 @@ static ssize_t write_mem(struct file *file, const char __user *buf,
if (p != *ppos)
return -EFBIG;
@@ -27,9 +27,9 @@ index 53fe675f9bd7..b52c88860532 100644
if (!valid_phys_addr_range(p, count))
return -EFAULT;
-@@ -513,6 +516,9 @@ static ssize_t write_kmem(struct file *file, const char __user *buf,
- char *kbuf; /* k-addr because vwrite() takes vmlist_lock rwlock */
- int err = 0;
+@@ -516,6 +519,9 @@ static ssize_t write_kmem(struct file *file, const char __user *buf,
+ if (!pfn_valid(PFN_DOWN(p)))
+ return -EIO;
+ if (secure_modules())
+ return -EPERM;
@@ -38,5 +38,5 @@ index 53fe675f9bd7..b52c88860532 100644
unsigned long to_write = min_t(unsigned long, count,
(unsigned long)high_memory - p);
--
-2.4.3
+2.9.3
diff --git a/arm-i.MX6-Utilite-device-dtb.patch b/arm-i.MX6-Utilite-device-dtb.patch
deleted file mode 100644
index efffd77bd..000000000
--- a/arm-i.MX6-Utilite-device-dtb.patch
+++ /dev/null
@@ -1,354 +0,0 @@
-From: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
-
-The CompuLab Utilite Pro is a miniature fanless desktop pc based on
-the i.MX6 Quad powered cm-fx6 module. It features two serial ports,
-USB OTG, 4x USB, analog audio and S/PDIF, 2x Gb Ethernet, HDMI and
-DVI ports, an on-board 32GB SSD, a mmc slot, and on-board wifi/bt.
-
-Add initial support for it including USB, Ethernet (both ports), sata
-and HDMI support.
-
-Signed-off-by: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
----
- arch/arm/boot/dts/Makefile | 1 +
- arch/arm/boot/dts/imx6q-utilite-pro.dts | 128 ++++++++++++++++++++++++++++++++
- 2 files changed, 129 insertions(+)
- create mode 100644 arch/arm/boot/dts/imx6q-utilite-pro.dts
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 515a428..287044c 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -369,6 +369,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
- imx6q-tx6q-1110.dtb \
- imx6q-tx6q-11x0-mb7.dtb \
- imx6q-udoo.dtb \
-+ imx6q-utilite-pro.dtb \
- imx6q-wandboard.dtb \
- imx6q-wandboard-revb1.dtb \
- imx6qp-nitrogen6_max.dtb \
-diff --git a/arch/arm/boot/dts/imx6q-utilite-pro.dts b/arch/arm/boot/dts/imx6q-utilite-pro.dts
-new file mode 100644
-index 0000000..bcd8e0d
---- /dev/null
-+++ b/arch/arm/boot/dts/imx6q-utilite-pro.dts
-@@ -0,0 +1,128 @@
-+/*
-+ * Copyright 2016 Christopher Spinrath
-+ * Copyright 2013 CompuLab Ltd.
-+ *
-+ * Based on the GPLv2 licensed devicetree distributed with the vendor
-+ * kernel for the Utilite Pro:
-+ * Copyright 2013 CompuLab Ltd.
-+ * Author: Valentin Raevsky <valentin@xxxxxxxxxxxxxx>
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+#include "imx6q-cm-fx6.dts"
-+
-+/ {
-+ model = "CompuLab Utilite Pro";
-+ compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q";
-+
-+ aliases {
-+ ethernet1 = &eth1;
-+ rtc0 = &em3027;
-+ rtc1 = &snvs_rtc;
-+ };
-+
-+ gpio-keys {
-+ compatible = "gpio-keys";
-+ power {
-+ label = "Power Button";
-+ gpios = <&gpio1 29 1>;
-+ linux,code = <116>; /* KEY_POWER */
-+ gpio-key,wakeup;
-+ };
-+ };
-+};
-+
-+&hdmi {
-+ ddc-i2c-bus = <&i2c2>;
-+ status = "okay";
-+};
-+
-+&i2c1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c1>;
-+ status = "okay";
-+
-+ eeprom@50 {
-+ compatible = "at24,24c02";
-+ reg = <0x50>;
-+ pagesize = <16>;
-+ };
-+
-+ em3027: rtc@56 {
-+ compatible = "emmicro,em3027";
-+ reg = <0x56>;
-+ };
-+};
-+
-+&i2c2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c2>;
-+ status = "okay";
-+};
-+
-+&iomuxc {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_hog>;
-+
-+ hog {
-+ pinctrl_hog: hoggrp {
-+ fsl,pins = <
-+ /* power button */
-+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
-+ >;
-+ };
-+ };
-+
-+ imx6q-utilite-pro {
-+ pinctrl_i2c1: i2c1grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
-+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
-+ >;
-+ };
-+
-+ pinctrl_i2c2: i2c2grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
-+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
-+ >;
-+ };
-+
-+ pinctrl_uart2: uart2grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
-+ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
-+ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
-+ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
-+ >;
-+ };
-+ };
-+};
-+
-+&pcie {
-+ pcie@0,0 {
-+ reg = <0x000000 0 0 0 0>;
-+ #address-cells = <3>;
-+ #size-cells = <2>;
-+
-+ /* non-removable i211 ethernet card */
-+ eth1: intel,i211@pcie0,0 {
-+ reg = <0x010000 0 0 0 0>;
-+ };
-+ };
-+};
-+
-+&uart2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart2>;
-+ fsl,uart-has-rtscts;
-+ dma-names = "rx", "tx";
-+ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
-+ status = "okay";
-+};
---
-2.8.2
-From: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
-
-The cm-fx6 module has an on-board spi-flash chip for its firmware, an
-eeprom (containing e.g. the mac address of the on-board Ethernet),
-a sata port, a pcie controller, an USB hub, and an USB otg port.
-Enable support for them. In addition, enable syscon poweroff support.
-
-Signed-off-by: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
----
- arch/arm/boot/dts/imx6q-cm-fx6.dts | 136 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 136 insertions(+)
-
-diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
-index 99b46f8..f4fc22e 100644
---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
-+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
-@@ -31,6 +31,61 @@
- linux,default-trigger = "heartbeat";
- };
- };
-+
-+ regulators {
-+ compatible = "simple-bus";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ reg_usb_otg_vbus: usb_otg_vbus {
-+ compatible = "regulator-fixed";
-+ regulator-name = "usb_otg_vbus";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ gpio = <&gpio3 22 0>;
-+ enable-active-high;
-+ };
-+
-+ reg_usb_h1_vbus: usb_h1_vbus {
-+ compatible = "regulator-fixed";
-+ regulator-name = "usb_h1_vbus";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ gpio = <&gpio7 8 0>;
-+ enable-active-high;
-+ };
-+ };
-+};
-+
-+&ecspi1 {
-+ fsl,spi-num-chipselects = <2>;
-+ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ecspi1>;
-+ status = "okay";
-+
-+ flash: m25p80@0 {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ compatible = "st,m25p", "jedec,spi-nor";
-+ spi-max-frequency = <20000000>;
-+ reg = <0>;
-+
-+ partition@0 {
-+ label = "uboot";
-+ reg = <0x0 0xc0000>;
-+ };
-+
-+ partition@c0000 {
-+ label = "uboot environment";
-+ reg = <0xc0000 0x40000>;
-+ };
-+
-+ partition@100000 {
-+ label = "reserved";
-+ reg = <0x100000 0x100000>;
-+ };
-+ };
- };
-
- &fec {
-@@ -46,8 +101,31 @@
- status = "okay";
- };
-
-+&i2c3 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c3>;
-+ status = "okay";
-+ clock-frequency = <100000>;
-+
-+ eeprom@50 {
-+ compatible = "at24,24c02";
-+ reg = <0x50>;
-+ pagesize = <16>;
-+ };
-+};
-+
- &iomuxc {
- imx6q-cm-fx6 {
-+ pinctrl_ecspi1: ecspi1grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
-+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
-+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
-+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
-+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
-+ >;
-+ };
-+
- pinctrl_enet: enetgrp {
- fsl,pins = <
- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
-@@ -91,17 +169,75 @@
- >;
- };
-
-+ pinctrl_i2c3: i2c3grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
-+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
-+ >;
-+ };
-+
-+ pinctrl_pcie: pciegrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000
-+ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
-+ >;
-+ };
-+
- pinctrl_uart4: uart4grp {
- fsl,pins = <
- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
- >;
- };
-+
-+ pinctrl_usbh1: usbh1grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
-+ >;
-+ };
-+
-+ pinctrl_usbotg: usbotggrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
-+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
-+ >;
-+ };
- };
- };
-
-+&pcie {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_pcie>;
-+ reset-gpio = <&gpio1 26 0>;
-+ power-on-gpio = <&gpio2 24 0>;
-+ status = "okay";
-+};
-+
-+&sata {
-+ status = "okay";
-+};
-+
-+&snvs_poweroff {
-+ status = "okay";
-+};
-+
- &uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart4>;
- status = "okay";
- };
-+
-+&usbotg {
-+ vbus-supply = <&reg_usb_otg_vbus>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbotg>;
-+ dr_mode = "otg";
-+ status = "okay";
-+};
-+
-+&usbh1 {
-+ vbus-supply = <&reg_usb_h1_vbus>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbh1>;
-+ status = "okay";
-+};
---
-2.8.2
-
diff --git a/arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch b/arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch
new file mode 100644
index 000000000..b55dec0cb
--- /dev/null
+++ b/arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch
@@ -0,0 +1,100 @@
+From bb3e08008c0e48fd4f51a0f0957eecae61a24d69 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Tue, 1 Nov 2016 09:35:30 +0000
+Subject: [PATCH] Revert "mmc: omap_hsmmc: Use dma_request_chan() for
+ requesting DMA channel"
+
+This reverts commit 81eef6ca92014845d40e3f1310e42b7010303acc.
+---
+ drivers/mmc/host/omap_hsmmc.c | 50 ++++++++++++++++++++++++++++++++++---------
+ 1 file changed, 40 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
+index 24ebc9a..3563321 100644
+--- a/drivers/mmc/host/omap_hsmmc.c
++++ b/drivers/mmc/host/omap_hsmmc.c
+@@ -32,6 +32,7 @@
+ #include <linux/of_irq.h>
+ #include <linux/of_gpio.h>
+ #include <linux/of_device.h>
++#include <linux/omap-dmaengine.h>
+ #include <linux/mmc/host.h>
+ #include <linux/mmc/core.h>
+ #include <linux/mmc/mmc.h>
+@@ -1992,6 +1993,8 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
+ struct resource *res;
+ int ret, irq;
+ const struct of_device_id *match;
++ dma_cap_mask_t mask;
++ unsigned tx_req, rx_req;
+ const struct omap_mmc_of_data *data;
+ void __iomem *base;
+
+@@ -2121,17 +2124,44 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
+
+ omap_hsmmc_conf_bus_power(host);
+
+- host->rx_chan = dma_request_chan(&pdev->dev, "rx");
+- if (IS_ERR(host->rx_chan)) {
+- dev_err(mmc_dev(host->mmc), "RX DMA channel request failed\n");
+- ret = PTR_ERR(host->rx_chan);
++ if (!pdev->dev.of_node) {
++ res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
++ if (!res) {
++ dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n");
++ ret = -ENXIO;
++ goto err_irq;
++ }
++ tx_req = res->start;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
++ if (!res) {
++ dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n");
++ ret = -ENXIO;
++ goto err_irq;
++ }
++ rx_req = res->start;
++ }
++
++ dma_cap_zero(mask);
++ dma_cap_set(DMA_SLAVE, mask);
++
++ host->rx_chan =
++ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
++ &rx_req, &pdev->dev, "rx");
++
++ if (!host->rx_chan) {
++ dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel\n");
++ ret = -ENXIO;
+ goto err_irq;
+ }
+
+- host->tx_chan = dma_request_chan(&pdev->dev, "tx");
+- if (IS_ERR(host->tx_chan)) {
+- dev_err(mmc_dev(host->mmc), "TX DMA channel request failed\n");
+- ret = PTR_ERR(host->tx_chan);
++ host->tx_chan =
++ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
++ &tx_req, &pdev->dev, "tx");
++
++ if (!host->tx_chan) {
++ dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel\n");
++ ret = -ENXIO;
+ goto err_irq;
+ }
+
+@@ -2189,9 +2219,9 @@ err_slot_name:
+ mmc_remove_host(mmc);
+ err_irq:
+ device_init_wakeup(&pdev->dev, false);
+- if (!IS_ERR_OR_NULL(host->tx_chan))
++ if (host->tx_chan)
+ dma_release_channel(host->tx_chan);
+- if (!IS_ERR_OR_NULL(host->rx_chan))
++ if (host->rx_chan)
+ dma_release_channel(host->rx_chan);
+ pm_runtime_dont_use_autosuspend(host->dev);
+ pm_runtime_put_sync(host->dev);
+--
+2.9.3
+
diff --git a/arm64-mm-Fix-memmap-to-be-initialized-for-the-entire-section.patch b/arm64-mm-Fix-memmap-to-be-initialized-for-the-entire-section.patch
new file mode 100644
index 000000000..eaf809d53
--- /dev/null
+++ b/arm64-mm-Fix-memmap-to-be-initialized-for-the-entire-section.patch
@@ -0,0 +1,93 @@
+From patchwork Thu Oct 6 09:52:07 2016
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: arm64: mm: Fix memmap to be initialized for the entire section
+From: Robert Richter <rrichter@cavium.com>
+X-Patchwork-Id: 9364537
+Message-Id: <1475747527-32387-1-git-send-email-rrichter@cavium.com>
+To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon
+ <will.deacon@arm.com>
+Cc: Mark Rutland <mark.rutland@arm.com>, linux-efi@vger.kernel.org,
+ David Daney <david.daney@cavium.com>,
+ Ard Biesheuvel <ard.biesheuvel@linaro.org>,
+ linux-kernel@vger.kernel.org, Robert Richter <rrichter@cavium.com>,
+ Hanjun Guo <hanjun.guo@linaro.org>, linux-arm-kernel@lists.infradead.org
+Date: Thu, 6 Oct 2016 11:52:07 +0200
+
+There is a memory setup problem on ThunderX systems with certain
+memory configurations. The symptom is
+
+ kernel BUG at mm/page_alloc.c:1848!
+
+This happens for some configs with 64k page size enabled. The bug
+triggers for page zones with some pages in the zone not assigned to
+this particular zone. In my case some pages that are marked as nomap
+were not reassigned to the new zone of node 1, so those are still
+assigned to node 0.
+
+The reason for the mis-configuration is a change in pfn_valid() which
+reports pages marked nomap as invalid:
+
+ 68709f45385a arm64: only consider memblocks with NOMAP cleared for linear mapping
+
+This causes pages marked as nomap being no long reassigned to the new
+zone in memmap_init_zone() by calling __init_single_pfn().
+
+Fixing this by restoring the old behavior of pfn_valid() to use
+memblock_is_memory(). Also changing users of pfn_valid() in arm64 code
+to use memblock_is_map_memory() where necessary. This only affects
+code in ioremap.c. The code in mmu.c still can use the new version of
+pfn_valid().
+
+Should be marked stable v4.5..
+
+Signed-off-by: Robert Richter <rrichter@cavium.com>
+---
+ arch/arm64/mm/init.c | 2 +-
+ arch/arm64/mm/ioremap.c | 5 +++--
+ 2 files changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
+index bbb7ee76e319..25b8659c2a9f 100644
+--- a/arch/arm64/mm/init.c
++++ b/arch/arm64/mm/init.c
+@@ -147,7 +147,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
+ #ifdef CONFIG_HAVE_ARCH_PFN_VALID
+ int pfn_valid(unsigned long pfn)
+ {
+- return memblock_is_map_memory(pfn << PAGE_SHIFT);
++ return memblock_is_memory(pfn << PAGE_SHIFT);
+ }
+ EXPORT_SYMBOL(pfn_valid);
+ #endif
+diff --git a/arch/arm64/mm/ioremap.c b/arch/arm64/mm/ioremap.c
+index 01e88c8bcab0..c17c220b0c48 100644
+--- a/arch/arm64/mm/ioremap.c
++++ b/arch/arm64/mm/ioremap.c
+@@ -21,6 +21,7 @@
+ */
+
+ #include <linux/export.h>
++#include <linux/memblock.h>
+ #include <linux/mm.h>
+ #include <linux/vmalloc.h>
+ #include <linux/io.h>
+@@ -55,7 +56,7 @@ static void __iomem *__ioremap_caller(phys_addr_t phys_addr, size_t size,
+ /*
+ * Don't allow RAM to be mapped.
+ */
+- if (WARN_ON(pfn_valid(__phys_to_pfn(phys_addr))))
++ if (WARN_ON(memblock_is_map_memory(phys_addr)))
+ return NULL;
+
+ area = get_vm_area_caller(size, VM_IOREMAP, caller);
+@@ -96,7 +97,7 @@ EXPORT_SYMBOL(__iounmap);
+ void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size)
+ {
+ /* For normal memory we already have a cacheable mapping. */
+- if (pfn_valid(__phys_to_pfn(phys_addr)))
++ if (memblock_is_map_memory(phys_addr))
+ return (void __iomem *)__phys_to_virt(phys_addr);
+
+ return __ioremap_caller(phys_addr, size, __pgprot(PROT_NORMAL),
diff --git a/arm64-pcie-quirks.patch b/arm64-pcie-quirks.patch
new file mode 100644
index 000000000..36e8d3724
--- /dev/null
+++ b/arm64-pcie-quirks.patch
@@ -0,0 +1,977 @@
+From 5c4f8b5b68451e5d208a5aefb195fdd108629da4 Mon Sep 17 00:00:00 2001
+From: Tomasz Nowicki <tn@semihalf.com>
+Date: Fri, 9 Sep 2016 21:24:03 +0200
+Subject: [PATCH 1/6] PCI/ACPI: Extend pci_mcfg_lookup() responsibilities
+
+In preparation for adding MCFG platform specific quirk handling move
+CFG resource calculation and ECAM ops assignment to pci_mcfg_lookup().
+It becomes the gate for further ops and CFG resource manipulation
+in arch-agnostic code (drivers/acpi/pci_mcfg.c).
+
+No functionality changes in this patch.
+
+Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
+---
+ arch/arm64/kernel/pci.c | 17 +++++------------
+ drivers/acpi/pci_mcfg.c | 28 +++++++++++++++++++++++++---
+ include/linux/pci-acpi.h | 4 +++-
+ 3 files changed, 33 insertions(+), 16 deletions(-)
+
+diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
+index acf3872..fb439c7 100644
+--- a/arch/arm64/kernel/pci.c
++++ b/arch/arm64/kernel/pci.c
+@@ -125,24 +125,17 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
+ u16 seg = root->segment;
+ struct pci_config_window *cfg;
+ struct resource cfgres;
+- unsigned int bsz;
++ struct pci_ecam_ops *ecam_ops;
++ int ret;
+
+- /* Use address from _CBA if present, otherwise lookup MCFG */
+- if (!root->mcfg_addr)
+- root->mcfg_addr = pci_mcfg_lookup(seg, bus_res);
+-
+- if (!root->mcfg_addr) {
++ ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops);
++ if (ret) {
+ dev_err(&root->device->dev, "%04x:%pR ECAM region not found\n",
+ seg, bus_res);
+ return NULL;
+ }
+
+- bsz = 1 << pci_generic_ecam_ops.bus_shift;
+- cfgres.start = root->mcfg_addr + bus_res->start * bsz;
+- cfgres.end = cfgres.start + resource_size(bus_res) * bsz - 1;
+- cfgres.flags = IORESOURCE_MEM;
+- cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res,
+- &pci_generic_ecam_ops);
++ cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res, ecam_ops);
+ if (IS_ERR(cfg)) {
+ dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n",
+ seg, bus_res, PTR_ERR(cfg));
+diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
+index b5b376e..ffcc651 100644
+--- a/drivers/acpi/pci_mcfg.c
++++ b/drivers/acpi/pci_mcfg.c
+@@ -22,6 +22,7 @@
+ #include <linux/kernel.h>
+ #include <linux/pci.h>
+ #include <linux/pci-acpi.h>
++#include <linux/pci-ecam.h>
+
+ /* Structure to hold entries from the MCFG table */
+ struct mcfg_entry {
+@@ -35,9 +36,18 @@ struct mcfg_entry {
+ /* List to save MCFG entries */
+ static LIST_HEAD(pci_mcfg_list);
+
+-phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res)
++int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
++ struct pci_ecam_ops **ecam_ops)
+ {
++ struct pci_ecam_ops *ops = &pci_generic_ecam_ops;
++ struct resource *bus_res = &root->secondary;
++ u16 seg = root->segment;
+ struct mcfg_entry *e;
++ struct resource res;
++
++ /* Use address from _CBA if present, otherwise lookup MCFG */
++ if (root->mcfg_addr)
++ goto skip_lookup;
+
+ /*
+ * We expect exact match, unless MCFG entry end bus covers more than
+@@ -45,10 +55,22 @@ phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res)
+ */
+ list_for_each_entry(e, &pci_mcfg_list, list) {
+ if (e->segment == seg && e->bus_start == bus_res->start &&
+- e->bus_end >= bus_res->end)
+- return e->addr;
++ e->bus_end >= bus_res->end) {
++ root->mcfg_addr = e->addr;
++ }
++
+ }
+
++ if (!root->mcfg_addr)
++ return -ENXIO;
++
++skip_lookup:
++ memset(&res, 0, sizeof(res));
++ res.start = root->mcfg_addr + (bus_res->start << 20);
++ res.end = res.start + (resource_size(bus_res) << 20) - 1;
++ res.flags = IORESOURCE_MEM;
++ *cfgres = res;
++ *ecam_ops = ops;
+ return 0;
+ }
+
+diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
+index 7d63a66..7a4e83a 100644
+--- a/include/linux/pci-acpi.h
++++ b/include/linux/pci-acpi.h
+@@ -24,7 +24,9 @@ static inline acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev)
+ }
+ extern phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle);
+
+-extern phys_addr_t pci_mcfg_lookup(u16 domain, struct resource *bus_res);
++struct pci_ecam_ops;
++extern int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
++ struct pci_ecam_ops **ecam_ops);
+
+ static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
+ {
+--
+2.9.3
+
+From 16c02d9cc0e67b48c343aecc4b5566e729a97683 Mon Sep 17 00:00:00 2001
+From: Tomasz Nowicki <tn@semihalf.com>
+Date: Fri, 9 Sep 2016 21:24:04 +0200
+Subject: [PATCH 2/6] PCI/ACPI: Check platform specific ECAM quirks
+
+Some platforms may not be fully compliant with generic set of PCI config
+accessors. For these cases we implement the way to overwrite CFG accessors
+set and configuration space range.
+
+In first place pci_mcfg_parse() saves machine's IDs and revision number
+(these come from MCFG header) in order to match against known quirk entries.
+Then the algorithm traverses available quirk list (static array),
+matches against <oem_id, oem_table_id, rev, domain, bus number range> and
+returns custom PCI config ops and/or CFG resource structure.
+
+When adding new quirk there are two possibilities:
+1. Override default pci_generic_ecam_ops ops but CFG resource comes from MCFG
+{ "OEM_ID", "OEM_TABLE_ID", <REV>, <DOMAIN>, <BUS_NR>, &foo_ops, MCFG_RES_EMPTY },
+2. Override default pci_generic_ecam_ops ops and CFG resource. For this case
+it is also allowed get CFG resource from quirk entry w/o having it in MCFG.
+{ "OEM_ID", "OEM_TABLE_ID", <REV>, <DOMAIN>, <BUS_NR>, &boo_ops,
+ DEFINE_RES_MEM(START, SIZE) },
+
+pci_generic_ecam_ops and MCFG entries will be used for platforms
+free from quirks.
+
+Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
+Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
+Signed-off-by: Christopher Covington <cov@codeaurora.org>
+---
+ drivers/acpi/pci_mcfg.c | 80 +++++++++++++++++++++++++++++++++++++++++++++----
+ 1 file changed, 74 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
+index ffcc651..2b8acc7 100644
+--- a/drivers/acpi/pci_mcfg.c
++++ b/drivers/acpi/pci_mcfg.c
+@@ -32,6 +32,59 @@ struct mcfg_entry {
+ u8 bus_start;
+ u8 bus_end;
+ };
++struct mcfg_fixup {
++ char oem_id[ACPI_OEM_ID_SIZE + 1];
++ char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
++ u32 oem_revision;
++ u16 seg;
++ struct resource bus_range;
++ struct pci_ecam_ops *ops;
++ struct resource cfgres;
++};
++
++#define MCFG_DOM_ANY (-1)
++#define MCFG_BUS_RANGE(start, end) DEFINE_RES_NAMED((start), \
++ ((end) - (start) + 1), \
++ NULL, IORESOURCE_BUS)
++#define MCFG_BUS_ANY MCFG_BUS_RANGE(0x0, 0xff)
++#define MCFG_RES_EMPTY DEFINE_RES_NAMED(0, 0, NULL, 0)
++
++static struct mcfg_fixup mcfg_quirks[] = {
++/* { OEM_ID, OEM_TABLE_ID, REV, DOMAIN, BUS_RANGE, cfgres, ops }, */
++};
++
++static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
++static char mcfg_oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
++static u32 mcfg_oem_revision;
++
++static void pci_mcfg_match_quirks(struct acpi_pci_root *root,
++ struct resource *cfgres,
++ struct pci_ecam_ops **ecam_ops)
++{
++ struct mcfg_fixup *f;
++ int i;
++
++ /*
++ * First match against PCI topology <domain:bus> then use OEM ID, OEM
++ * table ID, and OEM revision from MCFG table standard header.
++ */
++ for (i = 0, f = mcfg_quirks; i < ARRAY_SIZE(mcfg_quirks); i++, f++) {
++ if (f->seg == root->segment &&
++ resource_contains(&f->bus_range, &root->secondary) &&
++ !memcmp(f->oem_id, mcfg_oem_id, ACPI_OEM_ID_SIZE) &&
++ !memcmp(f->oem_table_id, mcfg_oem_table_id,
++ ACPI_OEM_TABLE_ID_SIZE) &&
++ f->oem_revision == mcfg_oem_revision) {
++ if (f->cfgres.start)
++ *cfgres = f->cfgres;
++ if (f->ops)
++ *ecam_ops = f->ops;
++ dev_info(&root->device->dev, "Applying PCI MCFG quirks for %s %s rev: %d\n",
++ f->oem_id, f->oem_table_id, f->oem_revision);
++ return;
++ }
++ }
++}
+
+ /* List to save MCFG entries */
+ static LIST_HEAD(pci_mcfg_list);
+@@ -61,14 +114,24 @@ int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
+
+ }
+
+- if (!root->mcfg_addr)
+- return -ENXIO;
+-
+ skip_lookup:
+ memset(&res, 0, sizeof(res));
+- res.start = root->mcfg_addr + (bus_res->start << 20);
+- res.end = res.start + (resource_size(bus_res) << 20) - 1;
+- res.flags = IORESOURCE_MEM;
++ if (root->mcfg_addr) {
++ res.start = root->mcfg_addr + (bus_res->start << 20);
++ res.end = res.start + (resource_size(bus_res) << 20) - 1;
++ res.flags = IORESOURCE_MEM;
++ }
++
++ /*
++ * Let to override default ECAM ops and CFG resource range.
++ * Also, this might even retrieve CFG resource range in case MCFG
++ * does not have it. Invalid CFG start address means MCFG firmware bug
++ * or we need another quirk in array.
++ */
++ pci_mcfg_match_quirks(root, &res, &ops);
++ if (!res.start)
++ return -ENXIO;
++
+ *cfgres = res;
+ *ecam_ops = ops;
+ return 0;
+@@ -101,6 +164,11 @@ static __init int pci_mcfg_parse(struct acpi_table_header *header)
+ list_add(&e->list, &pci_mcfg_list);
+ }
+
++ /* Save MCFG IDs and revision for quirks matching */
++ memcpy(mcfg_oem_id, header->oem_id, ACPI_OEM_ID_SIZE);
++ memcpy(mcfg_oem_table_id, header->oem_table_id, ACPI_OEM_TABLE_ID_SIZE);
++ mcfg_oem_revision = header->revision;
++
+ pr_info("MCFG table detected, %d entries\n", n);
+ return 0;
+ }
+--
+2.9.3
+
+From 2243ab64c12a873e47b72c8e636b40ed09c5f0d4 Mon Sep 17 00:00:00 2001
+From: Tomasz Nowicki <tn@semihalf.com>
+Date: Fri, 9 Sep 2016 21:24:05 +0200
+Subject: [PATCH 3/6] PCI: thunder-pem: Allow to probe PEM-specific register
+ range for ACPI case
+
+thunder-pem driver stands for being ACPI based PCI host controller.
+However, there is no standard way to describe its PEM-specific register
+ranges in ACPI tables. Thus we add thunder_pem_init() ACPI extension
+to obtain hardcoded addresses from static resource array.
+Although it is not pretty, it prevents from creating standard mechanism to
+handle similar cases in future.
+
+Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
+---
+ drivers/pci/host/pci-thunder-pem.c | 61 ++++++++++++++++++++++++++++++--------
+ 1 file changed, 48 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c
+index 6abaf80..b048761 100644
+--- a/drivers/pci/host/pci-thunder-pem.c
++++ b/drivers/pci/host/pci-thunder-pem.c
+@@ -18,6 +18,7 @@
+ #include <linux/init.h>
+ #include <linux/of_address.h>
+ #include <linux/of_pci.h>
++#include <linux/pci-acpi.h>
+ #include <linux/pci-ecam.h>
+ #include <linux/platform_device.h>
+
+@@ -284,6 +285,40 @@ static int thunder_pem_config_write(struct pci_bus *bus, unsigned int devfn,
+ return pci_generic_config_write(bus, devfn, where, size, val);
+ }
+
++#ifdef CONFIG_ACPI
++static struct resource thunder_pem_reg_res[] = {
++ [4] = DEFINE_RES_MEM(0x87e0c0000000UL, SZ_16M),
++ [5] = DEFINE_RES_MEM(0x87e0c1000000UL, SZ_16M),
++ [6] = DEFINE_RES_MEM(0x87e0c2000000UL, SZ_16M),
++ [7] = DEFINE_RES_MEM(0x87e0c3000000UL, SZ_16M),
++ [8] = DEFINE_RES_MEM(0x87e0c4000000UL, SZ_16M),
++ [9] = DEFINE_RES_MEM(0x87e0c5000000UL, SZ_16M),
++ [14] = DEFINE_RES_MEM(0x97e0c0000000UL, SZ_16M),
++ [15] = DEFINE_RES_MEM(0x97e0c1000000UL, SZ_16M),
++ [16] = DEFINE_RES_MEM(0x97e0c2000000UL, SZ_16M),
++ [17] = DEFINE_RES_MEM(0x97e0c3000000UL, SZ_16M),
++ [18] = DEFINE_RES_MEM(0x97e0c4000000UL, SZ_16M),
++ [19] = DEFINE_RES_MEM(0x97e0c5000000UL, SZ_16M),
++};
++
++static struct resource *thunder_pem_acpi_res(struct pci_config_window *cfg)
++{
++ struct acpi_device *adev = to_acpi_device(cfg->parent);
++ struct acpi_pci_root *root = acpi_driver_data(adev);
++
++ if ((root->segment >= 4 && root->segment <= 9) ||
++ (root->segment >= 14 && root->segment <= 19))
++ return &thunder_pem_reg_res[root->segment];
++
++ return NULL;
++}
++#else
++static struct resource *thunder_pem_acpi_res(struct pci_config_window *cfg)
++{
++ return NULL;
++}
++#endif
++
+ static int thunder_pem_init(struct pci_config_window *cfg)
+ {
+ struct device *dev = cfg->parent;
+@@ -292,24 +327,24 @@ static int thunder_pem_init(struct pci_config_window *cfg)
+ struct thunder_pem_pci *pem_pci;
+ struct platform_device *pdev;
+
+- /* Only OF support for now */
+- if (!dev->of_node)
+- return -EINVAL;
+-
+ pem_pci = devm_kzalloc(dev, sizeof(*pem_pci), GFP_KERNEL);
+ if (!pem_pci)
+ return -ENOMEM;
+
+- pdev = to_platform_device(dev);
+-
+- /*
+- * The second register range is the PEM bridge to the PCIe
+- * bus. It has a different config access method than those
+- * devices behind the bridge.
+- */
+- res_pem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++ if (acpi_disabled) {
++ pdev = to_platform_device(dev);
++
++ /*
++ * The second register range is the PEM bridge to the PCIe
++ * bus. It has a different config access method than those
++ * devices behind the bridge.
++ */
++ res_pem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++ } else {
++ res_pem = thunder_pem_acpi_res(cfg);
++ }
+ if (!res_pem) {
+- dev_err(dev, "missing \"reg[1]\"property\n");
++ dev_err(dev, "missing configuration region\n");
+ return -EINVAL;
+ }
+
+--
+2.9.3
+
+From 443d85d47ee00b3f0b6f39d470a11e7eb116817d Mon Sep 17 00:00:00 2001
+From: Tomasz Nowicki <tn@semihalf.com>
+Date: Fri, 9 Sep 2016 21:24:06 +0200
+Subject: [PATCH 4/6] PCI: thunder: Enable ACPI PCI controller for ThunderX
+ pass2.x silicon version
+
+ThunderX PCIe controller to off-chip devices (so-called PEM) is not fully
+compliant with ECAM standard. It uses non-standard configuration space
+accessors (see pci_thunder_pem_ops) and custom configuration space granulation
+(see bus_shift = 24). In order to access configuration space and
+probe PEM as ACPI based PCI host controller we need to add MCFG quirk
+infrastructure. This involves:
+1. Export PEM pci_thunder_pem_ops structure so it is visible to MCFG quirk
+ code.
+2. New quirk entries for each PEM segment. Each contains platform IDs,
+ mentioned pci_thunder_pem_ops and CFG resources.
+
+Quirk is considered for ThunderX silicon pass2.x only which is identified
+via MCFG revision 1.
+
+Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
+---
+ drivers/acpi/pci_mcfg.c | 27 +++++++++++++++++++++++++++
+ drivers/pci/host/pci-thunder-pem.c | 2 +-
+ include/linux/pci-ecam.h | 4 ++++
+ 3 files changed, 32 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
+index 2b8acc7..1f73d7b 100644
+--- a/drivers/acpi/pci_mcfg.c
++++ b/drivers/acpi/pci_mcfg.c
+@@ -51,6 +51,33 @@ struct mcfg_fixup {
+
+ static struct mcfg_fixup mcfg_quirks[] = {
+ /* { OEM_ID, OEM_TABLE_ID, REV, DOMAIN, BUS_RANGE, cfgres, ops }, */
++#ifdef CONFIG_PCI_HOST_THUNDER_PEM
++ /* SoC pass2.x */
++ { "CAVIUM", "THUNDERX", 1, 4, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x88001f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 5, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x884057000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 6, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x88808f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 7, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x89001f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 8, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x894057000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 9, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x89808f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 14, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x98001f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 15, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x984057000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 16, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x98808f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 17, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x99001f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 18, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x994057000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 1, 19, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x99808f000000UL, 0x39 * SZ_16M) },
++#endif
+ };
+
+ static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
+diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c
+index b048761..d7c10cc 100644
+--- a/drivers/pci/host/pci-thunder-pem.c
++++ b/drivers/pci/host/pci-thunder-pem.c
+@@ -367,7 +367,7 @@ static int thunder_pem_init(struct pci_config_window *cfg)
+ return 0;
+ }
+
+-static struct pci_ecam_ops pci_thunder_pem_ops = {
++struct pci_ecam_ops pci_thunder_pem_ops = {
+ .bus_shift = 24,
+ .init = thunder_pem_init,
+ .pci_ops = {
+diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
+index 7adad20..65505ea 100644
+--- a/include/linux/pci-ecam.h
++++ b/include/linux/pci-ecam.h
+@@ -58,6 +58,10 @@ void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
+ int where);
+ /* default ECAM ops */
+ extern struct pci_ecam_ops pci_generic_ecam_ops;
++/* ECAM ops for known quirks */
++#ifdef CONFIG_PCI_HOST_THUNDER_PEM
++extern struct pci_ecam_ops pci_thunder_pem_ops;
++#endif
+
+ #ifdef CONFIG_PCI_HOST_GENERIC
+ /* for DT-based PCI controllers that support ECAM */
+--
+2.9.3
+
+From 6eca99cc392a11bb07b9ef88bca71a85f8bbe273 Mon Sep 17 00:00:00 2001
+From: Tomasz Nowicki <tn@semihalf.com>
+Date: Fri, 9 Sep 2016 21:24:07 +0200
+Subject: [PATCH 5/6] PCI: thunder: Enable ACPI PCI controller for ThunderX
+ pass1.x silicon version
+
+ThunderX pass1.x requires to emulate the EA headers for on-chip devices
+hence it has to use custom pci_thunder_ecam_ops for accessing PCI config
+space (pci-thuner-ecam.c). Add new entries to MCFG quirk array where they
+can be applied while probing ACPI based PCI host controller.
+
+ThunderX pass1.x is using the same way for accessing off-chip devices
+(so-called PEM) as silicon pass-2.x so we need to add PEM quirk
+entries too.
+
+Quirk is considered for ThunderX silicon pass1.x only which is identified
+via MCFG revision 2.
+
+Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
+---
+ drivers/acpi/pci_mcfg.c | 45 +++++++++++++++++++++++++++++++++++++
+ drivers/pci/host/pci-thunder-ecam.c | 2 +-
+ include/linux/pci-ecam.h | 3 +++
+ 3 files changed, 49 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
+index 1f73d7b..eb14f74 100644
+--- a/drivers/acpi/pci_mcfg.c
++++ b/drivers/acpi/pci_mcfg.c
+@@ -77,6 +77,51 @@ static struct mcfg_fixup mcfg_quirks[] = {
+ DEFINE_RES_MEM(0x994057000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 19, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x99808f000000UL, 0x39 * SZ_16M) },
++
++ /* SoC pass1.x */
++ { "CAVIUM", "THUNDERX", 2, 4, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x88001f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 5, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x884057000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 6, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x88808f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 7, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x89001f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 8, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x894057000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 9, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x89808f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 14, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x98001f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 15, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x984057000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 16, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x98808f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 17, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x99001f000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 18, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x994057000000UL, 0x39 * SZ_16M) },
++ { "CAVIUM", "THUNDERX", 2, 19, MCFG_BUS_ANY, &pci_thunder_pem_ops,
++ DEFINE_RES_MEM(0x99808f000000UL, 0x39 * SZ_16M) },
++#endif
++#ifdef CONFIG_PCI_HOST_THUNDER_ECAM
++ /* SoC pass1.x */
++ { "CAVIUM", "THUNDERX", 2, 0, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
++ MCFG_RES_EMPTY},
++ { "CAVIUM", "THUNDERX", 2, 1, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
++ MCFG_RES_EMPTY},
++ { "CAVIUM", "THUNDERX", 2, 2, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
++ MCFG_RES_EMPTY},
++ { "CAVIUM", "THUNDERX", 2, 3, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
++ MCFG_RES_EMPTY},
++ { "CAVIUM", "THUNDERX", 2, 10, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
++ MCFG_RES_EMPTY},
++ { "CAVIUM", "THUNDERX", 2, 11, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
++ MCFG_RES_EMPTY},
++ { "CAVIUM", "THUNDERX", 2, 12, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
++ MCFG_RES_EMPTY},
++ { "CAVIUM", "THUNDERX", 2, 13, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
++ MCFG_RES_EMPTY},
+ #endif
+ };
+
+diff --git a/drivers/pci/host/pci-thunder-ecam.c b/drivers/pci/host/pci-thunder-ecam.c
+index d50a3dc..b6c17e2 100644
+--- a/drivers/pci/host/pci-thunder-ecam.c
++++ b/drivers/pci/host/pci-thunder-ecam.c
+@@ -346,7 +346,7 @@ static int thunder_ecam_config_write(struct pci_bus *bus, unsigned int devfn,
+ return pci_generic_config_write(bus, devfn, where, size, val);
+ }
+
+-static struct pci_ecam_ops pci_thunder_ecam_ops = {
++struct pci_ecam_ops pci_thunder_ecam_ops = {
+ .bus_shift = 20,
+ .pci_ops = {
+ .map_bus = pci_ecam_map_bus,
+diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
+index 65505ea..35f0e81 100644
+--- a/include/linux/pci-ecam.h
++++ b/include/linux/pci-ecam.h
+@@ -62,6 +62,9 @@ extern struct pci_ecam_ops pci_generic_ecam_ops;
+ #ifdef CONFIG_PCI_HOST_THUNDER_PEM
+ extern struct pci_ecam_ops pci_thunder_pem_ops;
+ #endif
++#ifdef CONFIG_PCI_HOST_THUNDER_ECAM
++extern struct pci_ecam_ops pci_thunder_ecam_ops;
++#endif
+
+ #ifdef CONFIG_PCI_HOST_GENERIC
+ /* for DT-based PCI controllers that support ECAM */
+--
+2.9.3
+
+From 3080ac5bb527155ccdf8490ce221b1c6ad01f502 Mon Sep 17 00:00:00 2001
+From: Duc Dang <dhdang@apm.com>
+Date: Sat, 17 Sep 2016 07:24:38 -0700
+Subject: [PATCH 6/6] PCI/ACPI: xgene: Add ECAM quirk for X-Gene PCIe
+ controller
+
+PCIe controller in X-Gene SoCs is not ECAM compliant: software
+needs to configure additional concontroller register to address
+device at bus:dev:function.
+
+This patch depends on "ECAM quirks handling for ARM64 platforms"
+series (http://www.spinics.net/lists/arm-kernel/msg530692.html)
+to address the limitation above for X-Gene PCIe controller.
+
+The quirk will only be applied for X-Gene PCIe MCFG table with
+OEM revison 1, 2, 3 or 4 (PCIe controller v1 and v2 on X-Gene SoCs).
+
+Signed-off-by: Duc Dang <dhdang@apm.com>
+---
+ drivers/acpi/pci_mcfg.c | 32 +++++
+ drivers/pci/host/Makefile | 2 +-
+ drivers/pci/host/pci-xgene-ecam.c | 280 ++++++++++++++++++++++++++++++++++++++
+ include/linux/pci-ecam.h | 5 +
+ 4 files changed, 318 insertions(+), 1 deletion(-)
+ create mode 100644 drivers/pci/host/pci-xgene-ecam.c
+
+diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
+index eb14f74..635ab24 100644
+--- a/drivers/acpi/pci_mcfg.c
++++ b/drivers/acpi/pci_mcfg.c
+@@ -123,6 +123,38 @@ static struct mcfg_fixup mcfg_quirks[] = {
+ { "CAVIUM", "THUNDERX", 2, 13, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+ MCFG_RES_EMPTY},
+ #endif
++#ifdef CONFIG_PCI_XGENE
++ {"APM ", "XGENE ", 1, 0, MCFG_BUS_ANY,
++ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 1, 1, MCFG_BUS_ANY,
++ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 1, 2, MCFG_BUS_ANY,
++ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 1, 3, MCFG_BUS_ANY,
++ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 1, 4, MCFG_BUS_ANY,
++ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 2, 0, MCFG_BUS_ANY,
++ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 2, 1, MCFG_BUS_ANY,
++ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 2, 2, MCFG_BUS_ANY,
++ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 2, 3, MCFG_BUS_ANY,
++ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 2, 4, MCFG_BUS_ANY,
++ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 3, 0, MCFG_BUS_ANY,
++ &xgene_v2_1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 3, 1, MCFG_BUS_ANY,
++ &xgene_v2_1_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 4, 0, MCFG_BUS_ANY,
++ &xgene_v2_2_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 4, 1, MCFG_BUS_ANY,
++ &xgene_v2_2_pcie_ecam_ops, MCFG_RES_EMPTY},
++ {"APM ", "XGENE ", 4, 2, MCFG_BUS_ANY,
++ &xgene_v2_2_pcie_ecam_ops, MCFG_RES_EMPTY},
++#endif
+ };
+
+ static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
+diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
+index 8843410..af4f505 100644
+--- a/drivers/pci/host/Makefile
++++ b/drivers/pci/host/Makefile
+@@ -15,7 +15,7 @@ obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o
+ obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone-dw.o pci-keystone.o
+ obj-$(CONFIG_PCIE_XILINX) += pcie-xilinx.o
+ obj-$(CONFIG_PCIE_XILINX_NWL) += pcie-xilinx-nwl.o
+-obj-$(CONFIG_PCI_XGENE) += pci-xgene.o
++obj-$(CONFIG_PCI_XGENE) += pci-xgene.o pci-xgene-ecam.o
+ obj-$(CONFIG_PCI_XGENE_MSI) += pci-xgene-msi.o
+ obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o
+ obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o
+diff --git a/drivers/pci/host/pci-xgene-ecam.c b/drivers/pci/host/pci-xgene-ecam.c
+new file mode 100644
+index 0000000..b66a04f
+--- /dev/null
++++ b/drivers/pci/host/pci-xgene-ecam.c
+@@ -0,0 +1,280 @@
++/*
++ * APM X-Gene PCIe ECAM fixup driver
++ *
++ * Copyright (c) 2016, Applied Micro Circuits Corporation
++ * Author:
++ * Duc Dang <dhdang@apm.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program. If not, see <http://www.gnu.org/licenses/>.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/of_address.h>
++#include <linux/of_pci.h>
++#include <linux/pci-acpi.h>
++#include <linux/platform_device.h>
++#include <linux/pci-ecam.h>
++
++#ifdef CONFIG_ACPI
++#define RTDID 0x160
++#define ROOT_CAP_AND_CTRL 0x5C
++
++/* PCIe IP version */
++#define XGENE_PCIE_IP_VER_UNKN 0
++#define XGENE_PCIE_IP_VER_1 1
++#define XGENE_PCIE_IP_VER_2 2
++
++#define XGENE_CSR_LENGTH 0x10000
++
++struct xgene_pcie_acpi_root {
++ void __iomem *csr_base;
++ u32 version;
++};
++
++static int xgene_v1_pcie_ecam_init(struct pci_config_window *cfg)
++{
++ struct xgene_pcie_acpi_root *xgene_root;
++ struct device *dev = cfg->parent;
++ u32 csr_base;
++
++ xgene_root = devm_kzalloc(dev, sizeof(*xgene_root), GFP_KERNEL);
++ if (!xgene_root)
++ return -ENOMEM;
++
++ switch (cfg->res.start) {
++ case 0xE0D0000000ULL:
++ csr_base = 0x1F2B0000;
++ break;
++ case 0xD0D0000000ULL:
++ csr_base = 0x1F2C0000;
++ break;
++ case 0x90D0000000ULL:
++ csr_base = 0x1F2D0000;
++ break;
++ case 0xA0D0000000ULL:
++ csr_base = 0x1F500000;
++ break;
++ case 0xC0D0000000ULL:
++ csr_base = 0x1F510000;
++ break;
++ default:
++ return -ENODEV;
++ }
++
++ xgene_root->csr_base = ioremap(csr_base, XGENE_CSR_LENGTH);
++ if (!xgene_root->csr_base) {
++ kfree(xgene_root);
++ return -ENODEV;
++ }
++
++ xgene_root->version = XGENE_PCIE_IP_VER_1;
++
++ cfg->priv = xgene_root;
++
++ return 0;
++}
++
++static int xgene_v2_1_pcie_ecam_init(struct pci_config_window *cfg)
++{
++ struct xgene_pcie_acpi_root *xgene_root;
++ struct device *dev = cfg->parent;
++ resource_size_t csr_base;
++
++ xgene_root = devm_kzalloc(dev, sizeof(*xgene_root), GFP_KERNEL);
++ if (!xgene_root)
++ return -ENOMEM;
++
++ switch (cfg->res.start) {
++ case 0xC0D0000000ULL:
++ csr_base = 0x1F2B0000;
++ break;
++ case 0xA0D0000000ULL:
++ csr_base = 0x1F2C0000;
++ break;
++ default:
++ return -ENODEV;
++ }
++
++ xgene_root->csr_base = ioremap(csr_base, XGENE_CSR_LENGTH);
++ if (!xgene_root->csr_base) {
++ kfree(xgene_root);
++ return -ENODEV;
++ }
++
++ xgene_root->version = XGENE_PCIE_IP_VER_2;
++
++ cfg->priv = xgene_root;
++
++ return 0;
++}
++
++static int xgene_v2_2_pcie_ecam_init(struct pci_config_window *cfg)
++{
++ struct xgene_pcie_acpi_root *xgene_root;
++ struct device *dev = cfg->parent;
++ resource_size_t csr_base;
++
++ xgene_root = devm_kzalloc(dev, sizeof(*xgene_root), GFP_KERNEL);
++ if (!xgene_root)
++ return -ENOMEM;
++
++ switch (cfg->res.start) {
++ case 0xE0D0000000ULL:
++ csr_base = 0x1F2B0000;
++ break;
++ case 0xA0D0000000ULL:
++ csr_base = 0x1F500000;
++ break;
++ case 0x90D0000000ULL:
++ csr_base = 0x1F2D0000;
++ break;
++ default:
++ return -ENODEV;
++ }
++
++ xgene_root->csr_base = ioremap(csr_base, XGENE_CSR_LENGTH);
++ if (!xgene_root->csr_base) {
++ kfree(xgene_root);
++ return -ENODEV;
++ }
++
++ xgene_root->version = XGENE_PCIE_IP_VER_2;
++
++ cfg->priv = xgene_root;
++
++ return 0;
++}
++/*
++ * For Configuration request, RTDID register is used as Bus Number,
++ * Device Number and Function number of the header fields.
++ */
++static void xgene_pcie_set_rtdid_reg(struct pci_bus *bus, uint devfn)
++{
++ struct pci_config_window *cfg = bus->sysdata;
++ struct xgene_pcie_acpi_root *port = cfg->priv;
++ unsigned int b, d, f;
++ u32 rtdid_val = 0;
++
++ b = bus->number;
++ d = PCI_SLOT(devfn);
++ f = PCI_FUNC(devfn);
++
++ if (!pci_is_root_bus(bus))
++ rtdid_val = (b << 8) | (d << 3) | f;
++
++ writel(rtdid_val, port->csr_base + RTDID);
++ /* read the register back to ensure flush */
++ readl(port->csr_base + RTDID);
++}
++
++/*
++ * X-Gene PCIe port uses BAR0-BAR1 of RC's configuration space as
++ * the translation from PCI bus to native BUS. Entire DDR region
++ * is mapped into PCIe space using these registers, so it can be
++ * reached by DMA from EP devices. The BAR0/1 of bridge should be
++ * hidden during enumeration to avoid the sizing and resource allocation
++ * by PCIe core.
++ */
++static bool xgene_pcie_hide_rc_bars(struct pci_bus *bus, int offset)
++{
++ if (pci_is_root_bus(bus) && ((offset == PCI_BASE_ADDRESS_0) ||
++ (offset == PCI_BASE_ADDRESS_1)))
++ return true;
++
++ return false;
++}
++
++void __iomem *xgene_pcie_ecam_map_bus(struct pci_bus *bus,
++ unsigned int devfn, int where)
++{
++ struct pci_config_window *cfg = bus->sysdata;
++ unsigned int busn = bus->number;
++ void __iomem *base;
++
++ if (busn < cfg->busr.start || busn > cfg->busr.end)
++ return NULL;
++
++ if ((pci_is_root_bus(bus) && devfn != 0) ||
++ xgene_pcie_hide_rc_bars(bus, where))
++ return NULL;
++
++ xgene_pcie_set_rtdid_reg(bus, devfn);
++
++ if (busn > cfg->busr.start)
++ base = cfg->win + (1 << cfg->ops->bus_shift);
++ else
++ base = cfg->win;
++
++ return base + where;
++}
++
++static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
++ int where, int size, u32 *val)
++{
++ struct pci_config_window *cfg = bus->sysdata;
++ struct xgene_pcie_acpi_root *port = cfg->priv;
++
++ if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) !=
++ PCIBIOS_SUCCESSFUL)
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ /*
++ * The v1 controller has a bug in its Configuration Request
++ * Retry Status (CRS) logic: when CRS is enabled and we read the
++ * Vendor and Device ID of a non-existent device, the controller
++ * fabricates return data of 0xFFFF0001 ("device exists but is not
++ * ready") instead of 0xFFFFFFFF ("device does not exist"). This
++ * causes the PCI core to retry the read until it times out.
++ * Avoid this by not claiming to support CRS.
++ */
++ if (pci_is_root_bus(bus) && (port->version == XGENE_PCIE_IP_VER_1) &&
++ ((where & ~0x3) == ROOT_CAP_AND_CTRL))
++ *val &= ~(PCI_EXP_RTCAP_CRSVIS << 16);
++
++ if (size <= 2)
++ *val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1);
++
++ return PCIBIOS_SUCCESSFUL;
++}
++
++struct pci_ecam_ops xgene_v1_pcie_ecam_ops = {
++ .bus_shift = 16,
++ .init = xgene_v1_pcie_ecam_init,
++ .pci_ops = {
++ .map_bus = xgene_pcie_ecam_map_bus,
++ .read = xgene_pcie_config_read32,
++ .write = pci_generic_config_write,
++ }
++};
++
++struct pci_ecam_ops xgene_v2_1_pcie_ecam_ops = {
++ .bus_shift = 16,
++ .init = xgene_v2_1_pcie_ecam_init,
++ .pci_ops = {
++ .map_bus = xgene_pcie_ecam_map_bus,
++ .read = xgene_pcie_config_read32,
++ .write = pci_generic_config_write,
++ }
++};
++
++struct pci_ecam_ops xgene_v2_2_pcie_ecam_ops = {
++ .bus_shift = 16,
++ .init = xgene_v2_2_pcie_ecam_init,
++ .pci_ops = {
++ .map_bus = xgene_pcie_ecam_map_bus,
++ .read = xgene_pcie_config_read32,
++ .write = pci_generic_config_write,
++ }
++};
++#endif
+diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
+index 35f0e81..40da3e7 100644
+--- a/include/linux/pci-ecam.h
++++ b/include/linux/pci-ecam.h
+@@ -65,6 +65,11 @@ extern struct pci_ecam_ops pci_thunder_pem_ops;
+ #ifdef CONFIG_PCI_HOST_THUNDER_ECAM
+ extern struct pci_ecam_ops pci_thunder_ecam_ops;
+ #endif
++#ifdef CONFIG_PCI_XGENE
++extern struct pci_ecam_ops xgene_v1_pcie_ecam_ops;
++extern struct pci_ecam_ops xgene_v2_1_pcie_ecam_ops;
++extern struct pci_ecam_ops xgene_v2_2_pcie_ecam_ops;
++#endif
+
+ #ifdef CONFIG_PCI_HOST_GENERIC
+ /* for DT-based PCI controllers that support ECAM */
+--
+2.9.3
+
diff --git a/audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch b/audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch
deleted file mode 100644
index 6ee750466..000000000
--- a/audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch
+++ /dev/null
@@ -1,413 +0,0 @@
-From 43761473c254b45883a64441dd0bc85a42f3645c Mon Sep 17 00:00:00 2001
-From: Paul Moore <paul@paul-moore.com>
-Date: Tue, 19 Jul 2016 17:42:57 -0400
-Subject: [PATCH] audit: fix a double fetch in audit_log_single_execve_arg()
-
-There is a double fetch problem in audit_log_single_execve_arg()
-where we first check the execve(2) argumnets for any "bad" characters
-which would require hex encoding and then re-fetch the arguments for
-logging in the audit record[1]. Of course this leaves a window of
-opportunity for an unsavory application to munge with the data.
-
-This patch reworks things by only fetching the argument data once[2]
-into a buffer where it is scanned and logged into the audit
-records(s). In addition to fixing the double fetch, this patch
-improves on the original code in a few other ways: better handling
-of large arguments which require encoding, stricter record length
-checking, and some performance improvements (completely unverified,
-but we got rid of some strlen() calls, that's got to be a good
-thing).
-
-As part of the development of this patch, I've also created a basic
-regression test for the audit-testsuite, the test can be tracked on
-GitHub at the following link:
-
- * https://github.com/linux-audit/audit-testsuite/issues/25
-
-[1] If you pay careful attention, there is actually a triple fetch
-problem due to a strnlen_user() call at the top of the function.
-
-[2] This is a tiny white lie, we do make a call to strnlen_user()
-prior to fetching the argument data. I don't like it, but due to the
-way the audit record is structured we really have no choice unless we
-copy the entire argument at once (which would require a rather
-wasteful allocation). The good news is that with this patch the
-kernel no longer relies on this strnlen_user() value for anything
-beyond recording it in the log, we also update it with a trustworthy
-value whenever possible.
-
-Reported-by: Pengfei Wang <wpengfeinudt@gmail.com>
-Cc: <stable@vger.kernel.org>
-Signed-off-by: Paul Moore <paul@paul-moore.com>
----
- kernel/auditsc.c | 332 +++++++++++++++++++++++++++----------------------------
- 1 file changed, 164 insertions(+), 168 deletions(-)
-
-diff --git a/kernel/auditsc.c b/kernel/auditsc.c
-index aa3feec..c65af21 100644
---- a/kernel/auditsc.c
-+++ b/kernel/auditsc.c
-@@ -73,6 +73,7 @@
- #include <linux/compat.h>
- #include <linux/ctype.h>
- #include <linux/string.h>
-+#include <linux/uaccess.h>
- #include <uapi/linux/limits.h>
-
- #include "audit.h"
-@@ -82,7 +83,8 @@
- #define AUDITSC_SUCCESS 1
- #define AUDITSC_FAILURE 2
-
--/* no execve audit message should be longer than this (userspace limits) */
-+/* no execve audit message should be longer than this (userspace limits),
-+ * see the note near the top of audit_log_execve_info() about this value */
- #define MAX_EXECVE_AUDIT_LEN 7500
-
- /* max length to print of cmdline/proctitle value during audit */
-@@ -992,184 +994,178 @@ static int audit_log_pid_context(struct audit_context *context, pid_t pid,
- return rc;
- }
-
--/*
-- * to_send and len_sent accounting are very loose estimates. We aren't
-- * really worried about a hard cap to MAX_EXECVE_AUDIT_LEN so much as being
-- * within about 500 bytes (next page boundary)
-- *
-- * why snprintf? an int is up to 12 digits long. if we just assumed when
-- * logging that a[%d]= was going to be 16 characters long we would be wasting
-- * space in every audit message. In one 7500 byte message we can log up to
-- * about 1000 min size arguments. That comes down to about 50% waste of space
-- * if we didn't do the snprintf to find out how long arg_num_len was.
-- */
--static int audit_log_single_execve_arg(struct audit_context *context,
-- struct audit_buffer **ab,
-- int arg_num,
-- size_t *len_sent,
-- const char __user *p,
-- char *buf)
-+static void audit_log_execve_info(struct audit_context *context,
-+ struct audit_buffer **ab)
- {
-- char arg_num_len_buf[12];
-- const char __user *tmp_p = p;
-- /* how many digits are in arg_num? 5 is the length of ' a=""' */
-- size_t arg_num_len = snprintf(arg_num_len_buf, 12, "%d", arg_num) + 5;
-- size_t len, len_left, to_send;
-- size_t max_execve_audit_len = MAX_EXECVE_AUDIT_LEN;
-- unsigned int i, has_cntl = 0, too_long = 0;
-- int ret;
--
-- /* strnlen_user includes the null we don't want to send */
-- len_left = len = strnlen_user(p, MAX_ARG_STRLEN) - 1;
--
-- /*
-- * We just created this mm, if we can't find the strings
-- * we just copied into it something is _very_ wrong. Similar
-- * for strings that are too long, we should not have created
-- * any.
-- */
-- if (WARN_ON_ONCE(len < 0 || len > MAX_ARG_STRLEN - 1)) {
-- send_sig(SIGKILL, current, 0);
-- return -1;
-+ long len_max;
-+ long len_rem;
-+ long len_full;
-+ long len_buf;
-+ long len_abuf;
-+ long len_tmp;
-+ bool require_data;
-+ bool encode;
-+ unsigned int iter;
-+ unsigned int arg;
-+ char *buf_head;
-+ char *buf;
-+ const char __user *p = (const char __user *)current->mm->arg_start;
-+
-+ /* NOTE: this buffer needs to be large enough to hold all the non-arg
-+ * data we put in the audit record for this argument (see the
-+ * code below) ... at this point in time 96 is plenty */
-+ char abuf[96];
-+
-+ /* NOTE: we set MAX_EXECVE_AUDIT_LEN to a rather arbitrary limit, the
-+ * current value of 7500 is not as important as the fact that it
-+ * is less than 8k, a setting of 7500 gives us plenty of wiggle
-+ * room if we go over a little bit in the logging below */
-+ WARN_ON_ONCE(MAX_EXECVE_AUDIT_LEN > 7500);
-+ len_max = MAX_EXECVE_AUDIT_LEN;
-+
-+ /* scratch buffer to hold the userspace args */
-+ buf_head = kmalloc(MAX_EXECVE_AUDIT_LEN + 1, GFP_KERNEL);
-+ if (!buf_head) {
-+ audit_panic("out of memory for argv string");
-+ return;
- }
-+ buf = buf_head;
-
-- /* walk the whole argument looking for non-ascii chars */
-+ audit_log_format(*ab, "argc=%d", context->execve.argc);
-+
-+ len_rem = len_max;
-+ len_buf = 0;
-+ len_full = 0;
-+ require_data = true;
-+ encode = false;
-+ iter = 0;
-+ arg = 0;
- do {
-- if (len_left > MAX_EXECVE_AUDIT_LEN)
-- to_send = MAX_EXECVE_AUDIT_LEN;
-- else
-- to_send = len_left;
-- ret = copy_from_user(buf, tmp_p, to_send);
-- /*
-- * There is no reason for this copy to be short. We just
-- * copied them here, and the mm hasn't been exposed to user-
-- * space yet.
-- */
-- if (ret) {
-- WARN_ON(1);
-- send_sig(SIGKILL, current, 0);
-- return -1;
-- }
-- buf[to_send] = '\0';
-- has_cntl = audit_string_contains_control(buf, to_send);
-- if (has_cntl) {
-- /*
-- * hex messages get logged as 2 bytes, so we can only
-- * send half as much in each message
-- */
-- max_execve_audit_len = MAX_EXECVE_AUDIT_LEN / 2;
-- break;
-- }
-- len_left -= to_send;
-- tmp_p += to_send;
-- } while (len_left > 0);
--
-- len_left = len;
--
-- if (len > max_execve_audit_len)
-- too_long = 1;
--
-- /* rewalk the argument actually logging the message */
-- for (i = 0; len_left > 0; i++) {
-- int room_left;
--
-- if (len_left > max_execve_audit_len)
-- to_send = max_execve_audit_len;
-- else
-- to_send = len_left;
--
-- /* do we have space left to send this argument in this ab? */
-- room_left = MAX_EXECVE_AUDIT_LEN - arg_num_len - *len_sent;
-- if (has_cntl)
-- room_left -= (to_send * 2);
-- else
-- room_left -= to_send;
-- if (room_left < 0) {
-- *len_sent = 0;
-- audit_log_end(*ab);
-- *ab = audit_log_start(context, GFP_KERNEL, AUDIT_EXECVE);
-- if (!*ab)
-- return 0;
-- }
-+ /* NOTE: we don't ever want to trust this value for anything
-+ * serious, but the audit record format insists we
-+ * provide an argument length for really long arguments,
-+ * e.g. > MAX_EXECVE_AUDIT_LEN, so we have no choice but
-+ * to use strncpy_from_user() to obtain this value for
-+ * recording in the log, although we don't use it
-+ * anywhere here to avoid a double-fetch problem */
-+ if (len_full == 0)
-+ len_full = strnlen_user(p, MAX_ARG_STRLEN) - 1;
-+
-+ /* read more data from userspace */
-+ if (require_data) {
-+ /* can we make more room in the buffer? */
-+ if (buf != buf_head) {
-+ memmove(buf_head, buf, len_buf);
-+ buf = buf_head;
-+ }
-+
-+ /* fetch as much as we can of the argument */
-+ len_tmp = strncpy_from_user(&buf_head[len_buf], p,
-+ len_max - len_buf);
-+ if (len_tmp == -EFAULT) {
-+ /* unable to copy from userspace */
-+ send_sig(SIGKILL, current, 0);
-+ goto out;
-+ } else if (len_tmp == (len_max - len_buf)) {
-+ /* buffer is not large enough */
-+ require_data = true;
-+ /* NOTE: if we are going to span multiple
-+ * buffers force the encoding so we stand
-+ * a chance at a sane len_full value and
-+ * consistent record encoding */
-+ encode = true;
-+ len_full = len_full * 2;
-+ p += len_tmp;
-+ } else {
-+ require_data = false;
-+ if (!encode)
-+ encode = audit_string_contains_control(
-+ buf, len_tmp);
-+ /* try to use a trusted value for len_full */
-+ if (len_full < len_max)
-+ len_full = (encode ?
-+ len_tmp * 2 : len_tmp);
-+ p += len_tmp + 1;
-+ }
-+ len_buf += len_tmp;
-+ buf_head[len_buf] = '\0';
-
-- /*
-- * first record needs to say how long the original string was
-- * so we can be sure nothing was lost.
-- */
-- if ((i == 0) && (too_long))
-- audit_log_format(*ab, " a%d_len=%zu", arg_num,
-- has_cntl ? 2*len : len);
--
-- /*
-- * normally arguments are small enough to fit and we already
-- * filled buf above when we checked for control characters
-- * so don't bother with another copy_from_user
-- */
-- if (len >= max_execve_audit_len)
-- ret = copy_from_user(buf, p, to_send);
-- else
-- ret = 0;
-- if (ret) {
-- WARN_ON(1);
-- send_sig(SIGKILL, current, 0);
-- return -1;
-+ /* length of the buffer in the audit record? */
-+ len_abuf = (encode ? len_buf * 2 : len_buf + 2);
- }
-- buf[to_send] = '\0';
--
-- /* actually log it */
-- audit_log_format(*ab, " a%d", arg_num);
-- if (too_long)
-- audit_log_format(*ab, "[%d]", i);
-- audit_log_format(*ab, "=");
-- if (has_cntl)
-- audit_log_n_hex(*ab, buf, to_send);
-- else
-- audit_log_string(*ab, buf);
--
-- p += to_send;
-- len_left -= to_send;
-- *len_sent += arg_num_len;
-- if (has_cntl)
-- *len_sent += to_send * 2;
-- else
-- *len_sent += to_send;
-- }
-- /* include the null we didn't log */
-- return len + 1;
--}
-
--static void audit_log_execve_info(struct audit_context *context,
-- struct audit_buffer **ab)
--{
-- int i, len;
-- size_t len_sent = 0;
-- const char __user *p;
-- char *buf;
-+ /* write as much as we can to the audit log */
-+ if (len_buf > 0) {
-+ /* NOTE: some magic numbers here - basically if we
-+ * can't fit a reasonable amount of data into the
-+ * existing audit buffer, flush it and start with
-+ * a new buffer */
-+ if ((sizeof(abuf) + 8) > len_rem) {
-+ len_rem = len_max;
-+ audit_log_end(*ab);
-+ *ab = audit_log_start(context,
-+ GFP_KERNEL, AUDIT_EXECVE);
-+ if (!*ab)
-+ goto out;
-+ }
-
-- p = (const char __user *)current->mm->arg_start;
-+ /* create the non-arg portion of the arg record */
-+ len_tmp = 0;
-+ if (require_data || (iter > 0) ||
-+ ((len_abuf + sizeof(abuf)) > len_rem)) {
-+ if (iter == 0) {
-+ len_tmp += snprintf(&abuf[len_tmp],
-+ sizeof(abuf) - len_tmp,
-+ " a%d_len=%lu",
-+ arg, len_full);
-+ }
-+ len_tmp += snprintf(&abuf[len_tmp],
-+ sizeof(abuf) - len_tmp,
-+ " a%d[%d]=", arg, iter++);
-+ } else
-+ len_tmp += snprintf(&abuf[len_tmp],
-+ sizeof(abuf) - len_tmp,
-+ " a%d=", arg);
-+ WARN_ON(len_tmp >= sizeof(abuf));
-+ abuf[sizeof(abuf) - 1] = '\0';
-+
-+ /* log the arg in the audit record */
-+ audit_log_format(*ab, "%s", abuf);
-+ len_rem -= len_tmp;
-+ len_tmp = len_buf;
-+ if (encode) {
-+ if (len_abuf > len_rem)
-+ len_tmp = len_rem / 2; /* encoding */
-+ audit_log_n_hex(*ab, buf, len_tmp);
-+ len_rem -= len_tmp * 2;
-+ len_abuf -= len_tmp * 2;
-+ } else {
-+ if (len_abuf > len_rem)
-+ len_tmp = len_rem - 2; /* quotes */
-+ audit_log_n_string(*ab, buf, len_tmp);
-+ len_rem -= len_tmp + 2;
-+ /* don't subtract the "2" because we still need
-+ * to add quotes to the remaining string */
-+ len_abuf -= len_tmp;
-+ }
-+ len_buf -= len_tmp;
-+ buf += len_tmp;
-+ }
-
-- audit_log_format(*ab, "argc=%d", context->execve.argc);
-+ /* ready to move to the next argument? */
-+ if ((len_buf == 0) && !require_data) {
-+ arg++;
-+ iter = 0;
-+ len_full = 0;
-+ require_data = true;
-+ encode = false;
-+ }
-+ } while (arg < context->execve.argc);
-
-- /*
-- * we need some kernel buffer to hold the userspace args. Just
-- * allocate one big one rather than allocating one of the right size
-- * for every single argument inside audit_log_single_execve_arg()
-- * should be <8k allocation so should be pretty safe.
-- */
-- buf = kmalloc(MAX_EXECVE_AUDIT_LEN + 1, GFP_KERNEL);
-- if (!buf) {
-- audit_panic("out of memory for argv string");
-- return;
-- }
-+ /* NOTE: the caller handles the final audit_log_end() call */
-
-- for (i = 0; i < context->execve.argc; i++) {
-- len = audit_log_single_execve_arg(context, ab, i,
-- &len_sent, p, buf);
-- if (len <= 0)
-- break;
-- p += len;
-- }
-- kfree(buf);
-+out:
-+ kfree(buf_head);
- }
-
- static void show_special(struct audit_context *context, int *call_panic)
diff --git a/bcm2837-initial-support.patch b/bcm2837-initial-support.patch
new file mode 100644
index 000000000..1bd89f4c8
--- /dev/null
+++ b/bcm2837-initial-support.patch
@@ -0,0 +1,154 @@
+From cdb86691df26e0962f081981f4bfa97ee43bd391 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Mon, 29 Aug 2016 09:14:15 +0100
+Subject: [PATCH] ARM: bcm283x: Add devicetree for the Raspberry Pi 3.
+
+For now this doesn't support the new hardware present on the Pi 3 (BT,
+wifi, GPIO expander).
+
+Rebased to the patch that went upstream for ARM64
+
+Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
+---
+ arch/arm/boot/dts/Makefile | 3 +-
+ arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 30 ++++++++++++++
+ arch/arm/boot/dts/bcm2837.dtsi | 76 +++++++++++++++++++++++++++++++++++
+ 3 files changed, 108 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+ create mode 100644 arch/arm/boot/dts/bcm2837.dtsi
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index befcd26..c96fb38 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -70,7 +70,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
+ bcm2835-rpi-b-plus.dtb \
+ bcm2835-rpi-a-plus.dtb \
+ bcm2836-rpi-2-b.dtb \
+- bcm2835-rpi-zero.dtb
++ bcm2835-rpi-zero.dtb \
++ bcm2837-rpi-3-b.dtb
+ dtb-$(CONFIG_ARCH_BCM_5301X) += \
+ bcm4708-asus-rt-ac56u.dtb \
+ bcm4708-asus-rt-ac68u.dtb \
+diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+new file mode 100644
+index 0000000..7841b72
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+@@ -0,0 +1,30 @@
++/dts-v1/;
++#include "bcm2837.dtsi"
++#include "bcm2835-rpi.dtsi"
++#include "bcm283x-rpi-smsc9514.dtsi"
++
++/ {
++ compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
++ model = "Raspberry Pi 3 Model B";
++
++ memory {
++ reg = <0 0x40000000>;
++ };
++
++ leds {
++ act {
++ gpios = <&gpio 47 0>;
++ };
++
++ pwr {
++ label = "PWR";
++ gpios = <&gpio 35 0>;
++ default-state = "keep";
++ linux,default-trigger = "default-on";
++ };
++ };
++};
++
++&uart1 {
++ status = "okay";
++};
+diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
+new file mode 100644
+index 0000000..8216bbb
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2837.dtsi
+@@ -0,0 +1,76 @@
++#include "bcm283x.dtsi"
++
++/ {
++ compatible = "brcm,bcm2836";
++
++ soc {
++ ranges = <0x7e000000 0x3f000000 0x1000000>,
++ <0x40000000 0x40000000 0x00001000>;
++ dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
++
++ local_intc: local_intc {
++ compatible = "brcm,bcm2836-l1-intc";
++ reg = <0x40000000 0x100>;
++ interrupt-controller;
++ #interrupt-cells = <1>;
++ interrupt-parent = <&local_intc>;
++ };
++ };
++
++ timer {
++ compatible = "arm,armv7-timer";
++ interrupt-parent = <&local_intc>;
++ interrupts = <0>, // PHYS_SECURE_PPI
++ <1>, // PHYS_NONSECURE_PPI
++ <3>, // VIRT_PPI
++ <2>; // HYP_PPI
++ always-on;
++ };
++
++ cpus: cpus {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ cpu0: cpu@0 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a53";
++ reg = <0>;
++ enable-method = "spin-table";
++ cpu-release-addr = <0x0 0x000000d8>;
++ };
++
++ cpu1: cpu@1 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a53";
++ reg = <1>;
++ enable-method = "spin-table";
++ cpu-release-addr = <0x0 0x000000e0>;
++ };
++
++ cpu2: cpu@2 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a53";
++ reg = <2>;
++ enable-method = "spin-table";
++ cpu-release-addr = <0x0 0x000000e8>;
++ };
++
++ cpu3: cpu@3 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a53";
++ reg = <3>;
++ enable-method = "spin-table";
++ cpu-release-addr = <0x0 0x000000f0>;
++ };
++ };
++};
++
++/* Make the BCM2835-style global interrupt controller be a child of the
++ * CPU-local interrupt controller.
++ */
++&intc {
++ compatible = "brcm,bcm2836-armctrl-ic";
++ reg = <0x7e00b200 0x200>;
++ interrupt-parent = <&local_intc>;
++ interrupts = <8>;
++};
+--
+2.7.4
+
diff --git a/bcm283x-upstream-fixes.patch b/bcm283x-upstream-fixes.patch
deleted file mode 100644
index c5ee31784..000000000
--- a/bcm283x-upstream-fixes.patch
+++ /dev/null
@@ -1,194 +0,0 @@
-From da77f737f9f5a487f3a1f80f8546585ee18cd7b9 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 4 Mar 2016 10:39:28 -0800
-Subject: [PATCH 27/36] dt-bindings: Add root properties for Raspberry Pi 3
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Acked-by: Rob Herring <robh@kernel.org>
----
- Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
-index 11d3056..6ffe087 100644
---- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
-+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
-@@ -30,6 +30,10 @@ Raspberry Pi 2 Model B
- Required root node properties:
- compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
-
-+Raspberry Pi 3 Model B
-+Required root node properties:
-+compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
-+
- Raspberry Pi Compute Module
- Required root node properties:
- compatible = "raspberrypi,compute-module", "brcm,bcm2835";
---
-2.7.3
-
-From b76b1cdf2e569cceab41dcf3b3f6a90965d0a02c Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 4 Mar 2016 10:39:29 -0800
-Subject: [PATCH 28/36] ARM: bcm2835: Add devicetree for the Raspberry Pi 3.
-
-For now this doesn't support the new hardware present on the Pi 3 (BT,
-wifi, GPIO expander). Since the GPIO expander isn't supported, we
-also don't have the LEDs like the other board files do.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Acked-by: Stephen Warren <swarren@wwwdotorg.org>
----
- arch/arm/boot/dts/Makefile | 3 +-
- arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 22 ++++++++++++
- arch/arm/boot/dts/bcm2837.dtsi | 68 +++++++++++++++++++++++++++++++++++
- 3 files changed, 92 insertions(+), 1 deletion(-)
- create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts
- create mode 100644 arch/arm/boot/dts/bcm2837.dtsi
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index d000814..a8a0767 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -64,7 +64,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
- bcm2835-rpi-b-rev2.dtb \
- bcm2835-rpi-b-plus.dtb \
- bcm2835-rpi-a-plus.dtb \
-- bcm2836-rpi-2-b.dtb
-+ bcm2836-rpi-2-b.dtb \
-+ bcm2837-rpi-3-b.dtb
- dtb-$(CONFIG_ARCH_BCM_5301X) += \
- bcm4708-asus-rt-ac56u.dtb \
- bcm4708-asus-rt-ac68u.dtb \
-diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
-new file mode 100644
-index 0000000..5e8eafd
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
-@@ -0,0 +1,22 @@
-+/dts-v1/;
-+#include "bcm2837.dtsi"
-+#include "bcm2835-rpi.dtsi"
-+
-+/ {
-+ compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
-+ model = "Raspberry Pi 3 Model B";
-+
-+ memory {
-+ reg = <0 0x40000000>;
-+ };
-+};
-+
-+&gpio {
-+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
-+
-+ /* I2S interface */
-+ i2s_alt0: i2s_alt0 {
-+ brcm,pins = <28 29 30 31>;
-+ brcm,function = <BCM2835_FSEL_ALT2>;
-+ };
-+};
-diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
-new file mode 100644
-index 0000000..2f36722
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm2837.dtsi
-@@ -0,0 +1,68 @@
-+#include "bcm283x.dtsi"
-+
-+/ {
-+ compatible = "brcm,bcm2836";
-+
-+ soc {
-+ ranges = <0x7e000000 0x3f000000 0x1000000>,
-+ <0x40000000 0x40000000 0x00001000>;
-+ dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
-+
-+ local_intc: local_intc {
-+ compatible = "brcm,bcm2836-l1-intc";
-+ reg = <0x40000000 0x100>;
-+ interrupt-controller;
-+ #interrupt-cells = <1>;
-+ interrupt-parent = <&local_intc>;
-+ };
-+ };
-+
-+ timer {
-+ compatible = "arm,armv7-timer";
-+ interrupt-parent = <&local_intc>;
-+ interrupts = <0>, // PHYS_SECURE_PPI
-+ <1>, // PHYS_NONSECURE_PPI
-+ <3>, // VIRT_PPI
-+ <2>; // HYP_PPI
-+ always-on;
-+ };
-+
-+ cpus: cpus {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ cpu0: cpu@0 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a53";
-+ reg = <0>;
-+ };
-+
-+ cpu1: cpu@1 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a53";
-+ reg = <1>;
-+ };
-+
-+ cpu2: cpu@2 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a53";
-+ reg = <2>;
-+ };
-+
-+ cpu3: cpu@3 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a53";
-+ reg = <3>;
-+ };
-+ };
-+};
-+
-+/* Make the BCM2835-style global interrupt controller be a child of the
-+ * CPU-local interrupt controller.
-+ */
-+&intc {
-+ compatible = "brcm,bcm2836-armctrl-ic";
-+ reg = <0x7e00b200 0x200>;
-+ interrupt-parent = <&local_intc>;
-+ interrupts = <8>;
-+};
---
-2.7.3
-
-From 528285e99c25249456023d28f521689bf9e9eb8b Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Wed, 30 Mar 2016 09:35:13 +0100
-Subject: [PATCH 32/36] drop usb power domain support for the moment, kills usb
-
----
- arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
-index caf2707..b1e8145 100644
---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
-+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
-@@ -71,10 +71,6 @@
- status = "okay";
- };
-
--&usb {
-- power-domains = <&power RPI_POWER_DOMAIN_USB>;
--};
--
- &v3d {
- power-domains = <&power RPI_POWER_DOMAIN_V3D>;
- };
---
-2.7.3
-
diff --git a/bcm283x-vc4-fixes.patch b/bcm283x-vc4-fixes.patch
new file mode 100644
index 000000000..d42ceb62a
--- /dev/null
+++ b/bcm283x-vc4-fixes.patch
@@ -0,0 +1,43 @@
+From 30772942cc1095c3129eecfa182e2c568e566b9d Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Thu, 13 Oct 2016 11:54:31 +0300
+Subject: [PATCH] drm/vc4: Fix a couple error codes in vc4_cl_lookup_bos()
+
+If the allocation fails the current code returns success. If
+copy_from_user() fails it returns the number of bytes remaining instead
+of -EFAULT.
+
+Fixes: d5b1a78a772f ("drm/vc4: Add support for drawing 3D frames.")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_gem.c | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c
+index ae1609e..4050540 100644
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -548,14 +548,15 @@ vc4_cl_lookup_bos(struct drm_device *dev,
+
+ handles = drm_malloc_ab(exec->bo_count, sizeof(uint32_t));
+ if (!handles) {
++ ret = -ENOMEM;
+ DRM_ERROR("Failed to allocate incoming GEM handles\n");
+ goto fail;
+ }
+
+- ret = copy_from_user(handles,
+- (void __user *)(uintptr_t)args->bo_handles,
+- exec->bo_count * sizeof(uint32_t));
+- if (ret) {
++ if (copy_from_user(handles,
++ (void __user *)(uintptr_t)args->bo_handles,
++ exec->bo_count * sizeof(uint32_t))) {
++ ret = -EFAULT;
+ DRM_ERROR("Failed to copy in GEM handles\n");
+ goto fail;
+ }
+--
+2.9.3
+
diff --git a/config-arm-generic b/config-arm-generic
index f8d6052d6..5a322f8b0 100644
--- a/config-arm-generic
+++ b/config-arm-generic
@@ -19,7 +19,14 @@ CONFIG_CC_STACKPROTECTOR=y
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_BIG_LITTLE is not set
+# CONFIG_ARM_BIG_LITTLE_CPUIDLE is not set
# CONFIG_IWMMXT is not set
+# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
+
+# https://fedoraproject.org/wiki/Features/Checkpoint_Restore
+CONFIG_CHECKPOINT_RESTORE=y
+
+CONFIG_ARM_CPUIDLE=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_GPIO=y
@@ -31,7 +38,6 @@ CONFIG_INPUT_PWM_BEEPER=m
CONFIG_ARM_SP805_WATCHDOG=m
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
-CONFIG_NR_CPUS=8
CONFIG_SWIOTLB=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
@@ -60,9 +66,10 @@ CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_GLOBAL_TIMER=y
CONFIG_ARM_SMMU=y
CONFIG_MMC_ARMMMCI=y
+CONFIG_COMMON_CLK_SCPI=m
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIO_AMBAKMI=y
+CONFIG_SERIO_AMBAKMI=m
CONFIG_FB_ARMCLCD=y
CONFIG_RTC_DRV_PL031=y
CONFIG_PL330_DMA=m
@@ -70,6 +77,7 @@ CONFIG_GPIO_PL061=y
CONFIG_USB_ISP1760=m
CONFIG_ARM_PL172_MPMC=m
CONFIG_DRM_HDLCD=m
+CONFIG_DRM_MALI_DISPLAY=m
# CONFIG_DRM_HDLCD_SHOW_UNDERRUN is not set
# HW crypto and rng
@@ -82,11 +90,6 @@ CONFIG_CRYPTO_SHA1_ARM_NEON=y
CONFIG_CRYPTO_SHA512_ARM=y
CONFIG_TCG_TIS_I2C_ATMEL=m
-# EDAC
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=m
-CONFIG_EDAC_LEGACY_SYSFS=y
-
# Regulators
CONFIG_REGULATOR=y
CONFIG_RFKILL_REGULATOR=m
@@ -112,6 +115,52 @@ CONFIG_CLKSRC_VERSATILE=y
CONFIG_POWER_RESET_VERSATILE=y
# CONFIG_ARM_CHARLCD is not set
+# Broadcom
+CONFIG_ARCH_BCM=y
+CONFIG_ARCH_BCM2835=y
+# CONFIG_ARCH_BCM_CYGNUS is not set
+# CONFIG_ARCH_BCM_NSP is not set
+# CONFIG_ARCH_BCM_5301X is not set
+# CONFIG_ARCH_BCM_281XX is not set
+# CONFIG_ARCH_BCM_21664 is not set
+# CONFIG_ARCH_BCM_63XX is not set
+# CONFIG_ARCH_BRCMSTB is not set
+# CONFIG_ARCH_BERLIN is not set
+# CONFIG_ARCH_BCM_CYGNUS is not set
+# CONFIG_ARCH_BCM_NSP is not set
+# CONFIG_ARCH_BCM_5301X is not set
+# CONFIG_ARCH_BCM_281XX is not set
+# CONFIG_ARCH_BCM_21664 is not set
+# CONFIG_ARCH_BCM_63XX is not set
+# CONFIG_ARCH_BCM_23550 is not set
+# CONFIG_ARCH_BCM_53573 is not set
+# CONFIG_ARCH_BRCMSTB is not set
+# CONFIG_ARCH_BERLIN is not set
+# BCM 283x
+CONFIG_SERIAL_8250_BCM2835AUX=y
+CONFIG_DMA_BCM2835=m
+CONFIG_MMC_SDHCI_IPROC=m
+CONFIG_BCM2835_MBOX=y
+CONFIG_PWM_BCM2835=m
+CONFIG_HW_RANDOM_BCM2835=m
+CONFIG_I2C_BCM2835=m
+CONFIG_SPI_BCM2835=m
+CONFIG_SPI_BCM2835AUX=m
+# CONFIG_SPI_BCM_QSPI is not set
+CONFIG_BCM2835_WDT=m
+CONFIG_SND_BCM2835_SOC_I2S=m
+CONFIG_DRM_VC4=m
+CONFIG_RASPBERRYPI_FIRMWARE=y
+CONFIG_RASPBERRYPI_POWER=y
+# popular digital audio HATs
+CONFIG_SND_SOC_PCM512x=m
+CONFIG_SND_SOC_PCM512x_I2C=m
+CONFIG_SND_SOC_PCM512x_SPI=m
+CONFIG_SND_SOC_TPA6130A2=m
+CONFIG_SND_SOC_WM8804=m
+CONFIG_SND_SOC_WM8804_I2C=m
+CONFIG_SND_SOC_WM8804_SPI=m
+
# Marvell EBU
CONFIG_ARCH_MVEBU=y
CONFIG_SERIAL_MVEBU_UART=y
@@ -119,6 +168,7 @@ CONFIG_SERIAL_MVEBU_CONSOLE=y
CONFIG_MVEBU_DEVBUS=y
CONFIG_MVEBU_MBUS=y
CONFIG_PCI_MVEBU=y
+CONFIG_PCI_AARDVARK=y
CONFIG_PCIE_ARMADA_8K=y
CONFIG_MV_XOR=y
CONFIG_CRYPTO_DEV_MV_CESA=m
@@ -144,6 +194,7 @@ CONFIG_USB_MV_UDC=m
CONFIG_USB_XHCI_MVEBU=m
CONFIG_PHY_MVEBU_SATA=y
CONFIG_AHCI_MVEBU=m
+CONFIG_I2C_PXA=m
# CONFIG_CACHE_FEROCEON_L2 is not set
# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
@@ -154,7 +205,7 @@ CONFIG_SPI_ROCKCHIP=m
CONFIG_PWM_ROCKCHIP=m
CONFIG_ROCKCHIP_SARADC=m
CONFIG_ROCKCHIP_IODOMAIN=m
-CONFIG_MMC_DW_ROCKCHIP=m
+CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_EMAC_ROCKCHIP=m
CONFIG_MFD_RK808=m
CONFIG_COMMON_CLK_RK808=m
@@ -184,6 +235,11 @@ CONFIG_ROCKCHIP_EFUSE=m
CONFIG_PHY_ROCKCHIP_EMMC=m
CONFIG_PHY_ROCKCHIP_DP=m
CONFIG_ROCKCHIP_MBOX=y
+# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
+CONFIG_PHY_ROCKCHIP_INNO_USB2=m
+CONFIG_PHY_ROCKCHIP_PCIE=m
+CONFIG_PHY_ROCKCHIP_TYPEC=m
+CONFIG_PCIE_ROCKCHIP=y
# Tegra
CONFIG_TEGRA_MC=y
@@ -197,6 +253,7 @@ CONFIG_PCI_TEGRA=y
CONFIG_AHCI_TEGRA=m
CONFIG_MMC_SDHCI_TEGRA=m
CONFIG_TEGRA_WATCHDOG=m
+CONFIG_GPIO_TEGRA=y
CONFIG_I2C_TEGRA=m
CONFIG_SPI_TEGRA114=m
CONFIG_PWM_TEGRA=m
@@ -253,12 +310,12 @@ CONFIG_CLOCK_THERMAL=y
CONFIG_CPUFREQ_DT=m
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_DEVFREQ_THERMAL=y
-# CONFIG_ARM_CPUIDLE is not set
# CONFIG_ARM_DT_BL_CPUFREQ is not set
# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
CONFIG_SPMI=m
CONFIG_MFD_SPMI_PMIC=m
CONFIG_REGMAP_SPMI=m
+# CONFIG_QORIQ_THERMAL is not set
# Device tree
CONFIG_DTC=y
@@ -272,13 +329,11 @@ CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IOMMU=y
CONFIG_OF_IRQ=y
-CONFIG_OF_MTD=y
CONFIG_OF_NET=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_PCI_IRQ=m
CONFIG_OF_PCI=m
CONFIG_PCI_HOST_GENERIC=y
-# CONFIG_PCIE_IPROC is not set
CONFIG_OF_RESERVED_MEM=y
CONFIG_OF_RESOLVE=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
@@ -293,8 +348,10 @@ CONFIG_THERMAL_OF=y
# Mailbox
CONFIG_MAILBOX=y
CONFIG_ARM_MHU=m
+# CONFIG_PLATFORM_MHU is not set
# CONFIG_PL320_MBOX is not set
CONFIG_ARM_SCPI_PROTOCOL=m
+CONFIG_ARM_SCPI_POWER_DOMAIN=m
# NVMem
CONFIG_NVMEM=m
@@ -335,7 +392,6 @@ CONFIG_USB_MUSB_DUAL_ROLE=y
CONFIG_USB_MUSB_DSPS=m
# CONFIG_MUSB_PIO_ONLY is not set
# CONFIG_USB_MUSB_TUSB6010 is not set
-# CONFIG_USB_MUSB_UX500 is not set
CONFIG_USB_GPIO_VBUS=m
CONFIG_USB_CONFIGFS=m
CONFIG_USB_CONFIGFS_ACM=y
@@ -393,9 +449,9 @@ CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
# Designware (used by numerous devices)
CONFIG_MMC_DW=m
-CONFIG_MMC_DW_PLTFM=m
-CONFIG_MMC_DW_K3=m
-CONFIG_MMC_DW_PCI=m
+CONFIG_MMC_DW_PLTFM=y
+CONFIG_MMC_DW_K3=y
+CONFIG_MMC_DW_PCI=y
CONFIG_SPI_DW_MMIO=m
CONFIG_SPI_DW_PCI=m
# CONFIG_SPI_DW_MID_DMA is not set
@@ -447,9 +503,6 @@ CONFIG_GPIO_DEVRES=y
CONFIG_GPIO_GENERIC=m
CONFIG_GPIO_GENERIC_PLATFORM=m
CONFIG_GPIO_WATCHDOG=m
-CONFIG_GPIOLIB=y
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_BACKLIGHT_GPIO=m
CONFIG_KEYBOARD_GPIO=m
CONFIG_KEYBOARD_GPIO_POLLED=m
@@ -489,6 +542,12 @@ CONFIG_SPI_PL022=m
CONFIG_SENSORS_IIO_HWMON=m
CONFIG_IIO_SYSFS_TRIGGER=m
CONFIG_SENSORS_ARM_SCPI=m
+CONFIG_IIO_ST_PRESS=m
+CONFIG_IIO_ST_PRESS_I2C=m
+CONFIG_IIO_ST_PRESS_SPI=m
+CONFIG_TMP006=m
+CONFIG_BMP280=m
+CONFIG_TCS3472=m
# PHY framework
CONFIG_GENERIC_PHY=y
@@ -504,7 +563,7 @@ CONFIG_CMA=y
CONFIG_DMA_CMA=y
# CONFIG_CMA_DEBUG is not set
CONFIG_CMA_DEBUGFS=y
-CONFIG_CMA_SIZE_MBYTES=16
+CONFIG_CMA_SIZE_MBYTES=64
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SIZE_SEL_MIN is not set
@@ -517,13 +576,8 @@ CONFIG_VFIO_PLATFORM=m
CONFIG_VFIO_AMBA=m
# CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET is not set
-# CONFIG_CRYPTO_TEST is not set
# CONFIG_TRANSPARENT_HUGEPAGE is not set
# CONFIG_XEN is not set
-# CONFIG_DRM_RCAR_DU is not set
-# CONFIG_I2C_RCAR is not set
-# CONFIG_DRM_SHMOBILE is not set
-# CONFIG_I2C_SH_MOBILE is not set
# CONFIG_I2C_NOMADIK is not set
# CONFIG_IRQ_DOMAIN_DEBUG is not set
# CONFIG_LOCK_STAT is not set
@@ -533,13 +587,10 @@ CONFIG_VFIO_AMBA=m
# CONFIG_DRM_ARMADA is not set
# CONFIG_COMMON_CLK_SI570 is not set
-# CONFIG_COMMON_CLK_QCOM is not set
-CONFIG_COMMON_CLK_SCPI=m
# CONFIG_ARM_PTDUMP is not set
# CONFIG_PATA_PLATFORM is not set
-# CONFIG_KEYBOARD_OMAP4 is not set
# CONFIG_KEYBOARD_BCM is not set
# CONFIG_PHY_SAMSUNG_USB2 is not set
# CONFIG_OMAP_GPMC_DEBUG is not set
@@ -625,29 +676,23 @@ CONFIG_NET_VENDOR_MELLANOX=y
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
# CONFIG_REGULATOR_TPS6524X is not set
+# CONFIG_REGULATOR_LTC3676 is not set
# drm
# CONFIG_DRM_VMWGFX is not set
# CONFIG_IMX_IPUV3_CORE is not set
+# CONFIG_FB_DA8XX is not set
-# CONFIG_DEBUG_SET_MODULE_RONX is not set
# CONFIG_CORESIGHT is not set
# CONFIG_LATTICE_ECP3_CONFIG is not set
-# CONFIG_BMP085_SPI is not set
# CONFIG_TI_DAC7512 is not set
-# https://fedoraproject.org/wiki/Features/Checkpoint_Restore
-CONFIG_CHECKPOINT_RESTORE=y
-
# Bad Intel shit we don't care about
# CONFIG_PINCTRL_BAYTRAIL is not set
# CONFIG_PINCTRL_CHERRYVIEW is not set
# CONFIG_PINCTRL_BROXTON is not set
# CONFIG_PINCTRL_SUNRISEPOINT is not set
+# CONFIG_XILINX_ZYNQMP_DMA is not set
-# CONFIG_HW_RANDOM_HISI is not set
# CONFIG_HISILICON_IRQ_MBIGEN is not set
# CONFIG_QRTR is not set
-
-# This Xilinx option is now built for arm64 as well as ARM
-CONFIG_XILINX_VDMA=m
diff --git a/config-arm64 b/config-arm64
index a9a02f81f..f6ae174cd 100644
--- a/config-arm64
+++ b/config-arm64
@@ -8,6 +8,7 @@ CONFIG_ARCH_SEATTLE=y
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_XGENE=y
+CONFIG_ARCH_THUNDER=y
# CONFIG_ARCH_ALPINE is not set
# CONFIG_ARCH_BCM_IPROC is not set
# CONFIG_ARCH_BERLIN is not set
@@ -18,11 +19,11 @@ CONFIG_ARCH_XGENE=y
# CONFIG_ARCH_RENESAS is not set
# CONFIG_ARCH_SPRD is not set
# CONFIG_ARCH_STRATIX10 is not set
-# CONFIG_ARCH_THUNDER is not set
# CONFIG_ARCH_VULCAN is not set
# CONFIG_ARCH_ZYNQMP is not set
# CONFIG_ARCH_UNIPHIER is not set
# CONFIG_ARCH_LG1K is not set
+# CONFIG_ARCH_ZX is not set
# Erratum
CONFIG_ARM64_ERRATUM_826319=y
@@ -33,19 +34,24 @@ CONFIG_ARM64_ERRATUM_832075=y
CONFIG_ARM64_ERRATUM_843419=y
CONFIG_ARM64_ERRATUM_834220=y
CONFIG_CAVIUM_ERRATUM_22375=y
+CONFIG_CAVIUM_ERRATUM_23144=y
CONFIG_CAVIUM_ERRATUM_23154=y
CONFIG_CAVIUM_ERRATUM_27456=y
+CONFIG_FSL_ERRATUM_A008585=y
# AMBA / VExpress
# CONFIG_RTC_DRV_PL030 is not set
# CONFIG_SERIAL_AMBA_PL010 is not set
# CONFIG_AMBA_PL08X is not set
CONFIG_ARM_SMMU_V3=y
+CONFIG_NR_CPUS=256
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARM64_64K_PAGES=y
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_ARM64_VA_BITS=48
+
CONFIG_ARM64_HW_AFDBM=y
CONFIG_ARM64_PAN=y
CONFIG_ARM64_LSE_ATOMICS=y
@@ -57,6 +63,7 @@ CONFIG_ARM64_UAO=y
# CONFIG_RANDOMIZE_BASE is not set
CONFIG_ARM64_ACPI_PARKING_PROTOCOL=y
+CONFIG_ACPI_WATCHDOG=y
CONFIG_BCMA_POSSIBLE=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -73,7 +80,6 @@ CONFIG_HVC_DRIVER=y
CONFIG_HZ=100
CONFIG_KVM=y
-CONFIG_KVM_NEW_VGIC=y
CONFIG_RCU_FANOUT=64
CONFIG_SPARSE_IRQ=y
@@ -99,11 +105,23 @@ CONFIG_ACPI_CUSTOM_METHOD=m
CONFIG_ACPI_NFIT=m
# CONFIG_ACPI_NFIT_DEBUG is not set
CONFIG_PCC=y
-CONFIG_ACPI_CPPC_CPUFREQ=y
+# CONFIG_ACPI_CPPC_CPUFREQ is not set
CONFIG_ACPI_PROCESSOR=y
CONFIG_ACPI_THERMAL=y
CONFIG_I2C_SCMI=m
CONFIG_SENSORS_ACPI_POWER=m
+CONFIG_ACPI_TABLE_UPGRADE=y
+CONFIG_ACPI_CONFIGFS=m
+
+CONFIG_NUMA=y
+CONFIG_ACPI_NUMA=y
+CONFIG_NUMA_BALANCING=y
+CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
+CONFIG_NODES_SHIFT=9
+
+CONFIG_DMI=y
+CONFIG_DMIID=y
+CONFIG_DMI_SYSFS=y
CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM64_CE=y
@@ -121,6 +139,7 @@ CONFIG_CRYPTO_DEV_CCP_CRYPTO=m
# APM Xgene
CONFIG_POWER_RESET_XGENE=y
CONFIG_COMMON_CLK_XGENE=y
+CONFIG_XGENE_PMU=y
CONFIG_AHCI_XGENE=y
CONFIG_PHY_XGENE=y
CONFIG_NET_XGENE=m
@@ -134,6 +153,8 @@ CONFIG_PCI_XGENE=y
CONFIG_PCI_XGENE_MSI=y
CONFIG_I2C_XGENE_SLIMPRO=m
CONFIG_XGENE_SLIMPRO_MBOX=m
+CONFIG_MDIO_XGENE=m
+CONFIG_SENSORS_XGENE=m
# AMD Seattle
CONFIG_NET_SB1000=y
@@ -148,6 +169,7 @@ CONFIG_COMMON_CLK_HI6220=y
CONFIG_PCI_HISI=y
CONFIG_POWER_RESET_HISI=y
CONFIG_HISI_THERMAL=m
+CONFIG_HW_RANDOM_HISI=m
CONFIG_STUB_CLK_HI6220=y
CONFIG_REGULATOR_HI655X=m
CONFIG_PHY_HI6220_USB=m
@@ -157,20 +179,26 @@ CONFIG_RESET_HISI=y
CONFIG_MFD_HI655X_PMIC=m
CONFIG_DRM_HISI_KIRIN=m
CONFIG_HISI_KIRIN_DW_DSI=m
+CONFIG_MDIO_HISI_FEMAC=m
+CONFIG_INPUT_HISI_POWERKEY=m
+# CONFIG_K3_DMA is not set
+# CONFIG_I2C_HIX5HD2 is not set
# Tegra
CONFIG_ARCH_TEGRA_132_SOC=y
CONFIG_ARCH_TEGRA_210_SOC=y
CONFIG_TEGRA210_ADMA=y
CONFIG_MFD_MAX77620=y
+CONFIG_PINCTRL_MAX77620=m
CONFIG_REGULATOR_MAX77620=m
-# CONFIG_GPIO_TEGRA is not set
+CONFIG_GPIO_MAX77620=m
+CONFIG_TEGRA_ACONNECT=m
# AllWinner
-CONFIG_MACH_SUN50I=y
CONFIG_SUNXI_RSB=m
CONFIG_AHCI_SUNXI=m
CONFIG_NET_VENDOR_ALLWINNER=y
+CONFIG_SUN8I_EMAC=m
# CONFIG_SUN4I_EMAC is not set
# CONFIG_MDIO_SUN4I is not set
# CONFIG_KEYBOARD_SUN4I_LRADC is not set
@@ -185,6 +213,8 @@ CONFIG_PWM_SUN4I=m
# CONFIG_PHY_SUN4I_USB is not set
# CONFIG_PHY_SUN9I_USB is not set
CONFIG_NVMEM_SUNXI_SID=m
+CONFIG_SUNXI_CCU=y
+# CONFIG_SUN8I_H3_CCU is not set
# qcom
# MSM8996 = SD-820, MSM8916 = SD-410
@@ -201,6 +231,20 @@ CONFIG_MFD_QCOM_RPM=m
CONFIG_PINCTRL_MSM=y
CONFIG_PINCTRL_MSM8916=y
CONFIG_PINCTRL_MSM8996=y
+CONFIG_COMMON_CLK_QCOM=m
+# CONFIG_MSM_GCC_8916 is not set
+# CONFIG_MSM_LCC_8960 is not set
+CONFIG_APQ_GCC_8084=m
+CONFIG_APQ_MMCC_8084=m
+CONFIG_MSM_GCC_8660=m
+CONFIG_MSM_GCC_8960=m
+CONFIG_MSM_MMCC_8960=m
+CONFIG_MSM_GCC_8974=m
+CONFIG_MSM_MMCC_8974=m
+CONFIG_MSM_GCC_8996=m
+CONFIG_MSM_MMCC_8996=m
+# CONFIG_MDM_GCC_9615 is not set
+# CONFIG_MDM_LCC_9615 is not set
CONFIG_REGULATOR_QCOM_RPM=m
CONFIG_REGULATOR_QCOM_SMD_RPM=m
CONFIG_QCOM_BAM_DMA=y
@@ -239,22 +283,35 @@ CONFIG_QCOM_COINCELL=m
# CONFIG_PINCTRL_APQ8084 is not set
# CONFIG_PINCTRL_MSM8660 is not set
# CONFIG_PINCTRL_MSM8960 is not set
+# CONFIG_PINCTRL_MDM9615 is not set
# CONFIG_PINCTRL_MSM8X74 is not set
# CONFIG_PINCTRL_QDF2XXX is not set
# CONFIG_INPUT_PM8941_PWRKEY is not set
# CONFIG_INPUT_REGULATOR_HAPTIC is not set
# CONFIG_CHARGER_MANAGER is not set
# CONFIG_SENSORS_LTC2978_REGULATOR is not set
+# CONFIG_QCOM_Q6V5_PIL is not set
+# CONFIG_QCOM_WCNSS_PIL is not set
+# CONFIG_QCOM_EBI2 is not set
+# CONFIG_QCOM_TSENS is not set
+
+# mvebu
+# CONFIG_MV_XOR_V2 is not set
# ThunderX
# CONFIG_MDIO_OCTEON is not set
-# CONFIG_MDIO_THUNDER is not set
-# CONFIG_PCI_HOST_THUNDER_PEM is not set
-# CONFIG_PCI_HOST_THUNDER_ECAM is not set
-
-CONFIG_DMI=y
-CONFIG_DMIID=y
-CONFIG_DMI_SYSFS=y
+CONFIG_MDIO_THUNDER=m
+CONFIG_PCI_HOST_THUNDER_PEM=y
+CONFIG_PCI_HOST_THUNDER_ECAM=y
+CONFIG_NET_VENDOR_CAVIUM=y
+CONFIG_THUNDER_NIC_PF=m
+CONFIG_THUNDER_NIC_VF=m
+CONFIG_THUNDER_NIC_BGX=m
+CONFIG_THUNDER_NIC_RGX=m
+# CONFIG_LIQUIDIO is not set
+CONFIG_SPI_THUNDERX=m
+CONFIG_I2C_THUNDERX=m
+CONFIG_HW_RANDOM_CAVIUM=m
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_SATA_AHCI_SEATTLE=m
@@ -265,7 +322,7 @@ CONFIG_ND_BTT=m
CONFIG_ND_BLK=m
# CONFIG_PMIC_OPREGION is not set
-# CONFIG_DEBUG_RODATA is not set
+# CONFIG_DEBUG_ALIGN_RODATA is not set
CONFIG_DEBUG_SECTION_MISMATCH=y
@@ -281,12 +338,7 @@ CONFIG_DEBUG_SECTION_MISMATCH=y
# CONFIG_VGA_CONSOLE is not set
# CONFIG_HOTPLUG_PCI_SHPC is not set
-
# CONFIG_FSL_MC_BUS is not set
# CONFIG_FUJITSU_ES is not set
-# CONFIG_IMX_THERMAL is not set
# CONFIG_PNP_DEBUG_MESSAGES is not set
-
-# Will probably need to be changed later
-# CONFIG_NUMA is not set
-
+# CONFIG_BCM_PDC_MBOX is not set
diff --git a/config-armv7 b/config-armv7
index 44685c2fd..0bd02c47e 100644
--- a/config-armv7
+++ b/config-armv7
@@ -9,6 +9,7 @@ CONFIG_ARCH_OMAP4=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_ZYNQ=y
+# CONFIG_ARCH_MDM9615 is not set
# These are supported in the LPAE kernel
# CONFIG_ARM_LPAE is not set
@@ -22,8 +23,6 @@ CONFIG_SOC_OMAP5=y
# CONFIG_SOC_DRA7XX is not set
CONFIG_SOC_OMAP3430=y
CONFIG_SOC_TI81XX=y
-# CONFIG_MACH_NOKIA_RX51 is not set
-# CONFIG_MACH_OMAP_LDP is not set
# CONFIG_MACH_OMAP3517EVM is not set
# CONFIG_MACH_OMAP3_PANDORA is not set
CONFIG_OMAP5_ERRATA_801819=y
@@ -142,6 +141,7 @@ CONFIG_PWM_TIEHRPWM=m
CONFIG_PWM_TWL=m
CONFIG_PWM_TWL_LED=m
CONFIG_PWM_OMAP_DMTIMER=m
+# CONFIG_PWM_STMPE is not set
CONFIG_CRYPTO_DEV_OMAP_SHAM=m
CONFIG_CRYPTO_DEV_OMAP_AES=m
@@ -152,8 +152,20 @@ CONFIG_HW_RANDOM_OMAP3_ROM=m
CONFIG_DRM_OMAP=m
CONFIG_DRM_OMAP_NUM_CRTCS=2
CONFIG_OMAP2_VRFB=y
-# CONFIG_FB_OMAP2 is not set
-# CONFIG_FB_DA8XX is not set
+CONFIG_DRM_OMAP_ENCODER_OPA362=m
+CONFIG_DRM_OMAP_ENCODER_TFP410=m
+CONFIG_DRM_OMAP_ENCODER_TPD12S015=m
+CONFIG_DRM_OMAP_CONNECTOR_DVI=m
+CONFIG_DRM_OMAP_CONNECTOR_HDMI=m
+CONFIG_DRM_OMAP_CONNECTOR_ANALOG_TV=m
+CONFIG_DRM_OMAP_PANEL_DPI=m
+CONFIG_DRM_OMAP_PANEL_DSI_CM=m
+CONFIG_DRM_OMAP_PANEL_SONY_ACX565AKM=m
+CONFIG_DRM_OMAP_PANEL_LGPHILIPS_LB035Q02=m
+CONFIG_DRM_OMAP_PANEL_SHARP_LS037V7DW01=m
+CONFIG_DRM_OMAP_PANEL_TPO_TD028TTEC1=m
+CONFIG_DRM_OMAP_PANEL_TPO_TD043MTEA1=m
+CONFIG_DRM_OMAP_PANEL_NEC_NL8048HL11=m
CONFIG_OMAP2_DSS=m
# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set
@@ -166,21 +178,6 @@ CONFIG_OMAP2_DSS_DSI=y
CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0
CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y
-CONFIG_DISPLAY_ENCODER_OPA362=m
-CONFIG_DISPLAY_ENCODER_TFP410=m
-CONFIG_DISPLAY_ENCODER_TPD12S015=m
-CONFIG_DISPLAY_CONNECTOR_DVI=m
-CONFIG_DISPLAY_CONNECTOR_HDMI=m
-CONFIG_DISPLAY_CONNECTOR_ANALOG_TV=m
-CONFIG_DISPLAY_PANEL_DPI=m
-CONFIG_DISPLAY_PANEL_DSI_CM=m
-CONFIG_DISPLAY_PANEL_SONY_ACX565AKM=m
-CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02=m
-CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01=m
-CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1=m
-CONFIG_DISPLAY_PANEL_NEC_NL8048HL11=m
-CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1=m
-
# Enable V4L2 drivers for OMAP2+
CONFIG_V4L_PLATFORM_DRIVERS=y
# CONFIG_VIDEO_OMAP2_VOUT is not set
@@ -207,12 +204,12 @@ CONFIG_SND_SOC_TLV320AIC23_I2C=m
CONFIG_SND_SOC_TLV320AIC23_SPI=m
CONFIG_SND_SOC_TLV320AIC3X=m
CONFIG_SND_SOC_TLV320AIC31XX=m
-CONFIG_SND_SOC_TPA6130A2=m
CONFIG_SND_SOC_TWL4030=m
CONFIG_SND_SOC_TWL6040=m
CONFIG_RADIO_WL128X=m
CONFIG_OMAP_REMOTEPROC=m
+CONFIG_TI_SYSCON_RESET=m
# CONFIG_OMAP2_DSS_DEBUGFS is not set
# CONFIG_OMAP_IOMMU_DEBUG is not set
@@ -239,7 +236,6 @@ CONFIG_TI_CPSW_ALE=m
CONFIG_TI_CPTS=y
CONFIG_TI_EMIF=m
CONFIG_DRM_TILCDC=m
-# CONFIG_COMMON_CLK_TI_ADPLL is not set
# We only need this until the BBB dts is actually updated
CONFIG_DRM_TILCDC_SLAVE_COMPAT=y
CONFIG_SPI_DAVINCI=m
@@ -302,6 +298,8 @@ CONFIG_MSM_GCC_8974=m
CONFIG_MSM_MMCC_8974=m
CONFIG_MSM_GCC_8996=m
CONFIG_MSM_MMCC_8996=m
+# CONFIG_MDM_GCC_9615 is not set
+# CONFIG_MDM_LCC_9615 is not set
CONFIG_HW_RANDOM_MSM=m
CONFIG_I2C_QUP=m
CONFIG_SPI_QUP=m
@@ -313,7 +311,6 @@ CONFIG_QCOM_BAM_DMA=m
CONFIG_QCOM_GSBI=m
CONFIG_QCOM_PM=y
CONFIG_PHY_QCOM_APQ8064_SATA=m
-CONFIG_USB_DWC3_QCOM=m
CONFIG_CRYPTO_DEV_QCE=m
CONFIG_DRM_MSM=m
# CONFIG_DRM_MSM_DSI is not set
@@ -349,6 +346,10 @@ CONFIG_QCOM_SMSM=y
CONFIG_QCOM_SMP2P=m
CONFIG_PCIE_QCOM=y
CONFIG_MTD_NAND_QCOM=m
+# CONFIG_QCOM_Q6V5_PIL is not set
+# CONFIG_MSM_IOMMU is not set
+# CONFIG_QCOM_WCNSS_PIL is not set
+# CONFIG_QCOM_TSENS is not set
# i.MX
# CONFIG_MXC_DEBUG_BOARD is not set
@@ -395,6 +396,7 @@ CONFIG_STMPE_I2C=y
CONFIG_SPI_IMX=m
CONFIG_SPI_FSL_QUADSPI=m
CONFIG_STMPE_SPI=y
+CONFIG_GPIO_TS4800=m
CONFIG_MFD_MC13XXX_SPI=m
CONFIG_MFD_STMPE=y
CONFIG_MTD_NAND_GPMI_NAND=m
@@ -412,6 +414,7 @@ CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD=8192
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=m
CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=m
CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=m
+CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=m
# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
# CONFIG_CRYPTO_DEV_MXS_DCP is not set
# CONFIG_CRYPTO_DEV_MXC_SCC is not set
@@ -515,7 +518,6 @@ CONFIG_MACH_MMP2_DT=y
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_KEYBOARD_PXA27x=y
-CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
CONFIG_SND_MMP_SOC=y
CONFIG_SND_PXA910_SOC=m
@@ -574,7 +576,7 @@ CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
CONFIG_COMMON_CLK_AXI_CLKGEN=m
CONFIG_COMMON_CLK_SI570=m
CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
-# CONFIG_ARM_ZYNQ_CPUIDLE is not set
+CONFIG_ARM_ZYNQ_CPUIDLE=y
CONFIG_LATTICE_ECP3_CONFIG=m
CONFIG_NET_VENDOR_XILINX=y
CONFIG_XILINX_EMACLITE=m
diff --git a/config-armv7-generic b/config-armv7-generic
index dbbcbc81e..53576d218 100644
--- a/config-armv7-generic
+++ b/config-armv7-generic
@@ -21,9 +21,9 @@ CONFIG_ARM_THUMBEE=y
CONFIG_ARM_ASM_UNIFIED=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_CPU_TOPOLOGY=y
-CONFIG_ARM_DMA_MEM_BUFFERABLE=y
CONFIG_SWP_EMULATE=y
CONFIG_CACHE_L2X0=y
+CONFIG_CACHE_L2X0_PMU=y
CONFIG_HIGHPTE=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_ATAGS=y
@@ -35,6 +35,7 @@ CONFIG_IRQ_CROSSBAR=y
CONFIG_IOMMU_IO_PGTABLE_LPAE=y
CONFIG_CPU_SW_DOMAIN_PAN=y
CONFIG_ARM_CPU_SUSPEND=y
+CONFIG_NR_CPUS=32
# CONFIG_MCPM is not set
# CONFIG_OABI_COMPAT is not set
@@ -52,8 +53,6 @@ CONFIG_ARM_CPU_SUSPEND=y
# CONFIG_DEBUG_ALIGN_RODATA is not set
# Platforms enabled/disabled globally on ARMv7
-CONFIG_ARCH_BCM=y
-CONFIG_ARCH_BCM2835=y
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_SUNXI=y
@@ -61,22 +60,6 @@ CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA=y
CONFIG_ARCH_VIRT=y
# CONFIG_ARCH_ARTPEC is not set
-# CONFIG_ARCH_BCM_CYGNUS is not set
-# CONFIG_ARCH_BCM_NSP is not set
-# CONFIG_ARCH_BCM_5301X is not set
-# CONFIG_ARCH_BCM_281XX is not set
-# CONFIG_ARCH_BCM_21664 is not set
-# CONFIG_ARCH_BCM_63XX is not set
-# CONFIG_ARCH_BRCMSTB is not set
-# CONFIG_ARCH_BERLIN is not set
-# CONFIG_ARCH_BCM_CYGNUS is not set
-# CONFIG_ARCH_BCM_NSP is not set
-# CONFIG_ARCH_BCM_5301X is not set
-# CONFIG_ARCH_BCM_281XX is not set
-# CONFIG_ARCH_BCM_21664 is not set
-# CONFIG_ARCH_BCM_63XX is not set
-# CONFIG_ARCH_BRCMSTB is not set
-# CONFIG_ARCH_BERLIN is not set
# CONFIG_ARCH_HI3xxx is not set
# CONFIG_ARCH_HISI is not set
# CONFIG_ARCH_MEDIATEK is not set
@@ -128,9 +111,14 @@ CONFIG_ARM_ERRATA_775420=y
CONFIG_PL310_ERRATA_753970=y
CONFIG_PL310_ERRATA_769419=y
CONFIG_PJ4B_ERRATA_4742=y
-# Cortex-A15
-# CONFIG_ARM_ERRATA_798181 is not set
-# CONFIG_ARM_ERRATA_773022 is not set
+# Cortex-A12/15/17
+CONFIG_ARM_ERRATA_798181=y
+CONFIG_ARM_ERRATA_773022=y
+CONFIG_ARM_ERRATA_818325_852422=y
+CONFIG_ARM_ERRATA_821420=y
+CONFIG_ARM_ERRATA_825619=y
+CONFIG_ARM_ERRATA_852421=y
+CONFIG_ARM_ERRATA_852423=y
# generic that deviates from or should be merged into config-generic
CONFIG_SMP_ON_UP=y
@@ -147,6 +135,7 @@ CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
CONFIG_DEVFREQ_GOV_PERFORMANCE=y
CONFIG_DEVFREQ_GOV_POWERSAVE=y
CONFIG_DEVFREQ_GOV_USERSPACE=y
+# CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
CONFIG_LSM_MMAP_MIN_ADDR=32768
@@ -158,6 +147,17 @@ CONFIG_LSM_MMAP_MIN_ADDR=32768
CONFIG_LBDAF=y
+# Little.BIG
+CONFIG_BIG_LITTLE=y
+CONFIG_BL_SWITCHER=y
+CONFIG_ARM_BIG_LITTLE_CPUFREQ=m
+CONFIG_ARM_SCPI_CPUFREQ=m
+CONFIG_ARCH_VEXPRESS_DCSCB=y
+CONFIG_ARCH_VEXPRESS_TC2_PM=y
+CONFIG_ARM_VEXPRESS_SPC_CPUFREQ=m
+CONFIG_ARM_BIG_LITTLE_CPUIDLE=y
+# CONFIG_BL_SWITCHER_DUMMY_IF is not set
+
# GRR, needed for MFD_AS3722
CONFIG_I2C=y
@@ -167,10 +167,8 @@ CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_ARM_APPENDED_DTB=y
# General vexpress ARM drivers
-CONFIG_SERIO_AMBAKMI=m
CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
-
CONFIG_RTC_DRV_PL030=y
CONFIG_AMBA_PL08X=y
CONFIG_SND_ARMAACI=m
@@ -190,8 +188,12 @@ CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET=m
CONFIG_MACH_SUN6I=y
CONFIG_MACH_SUN7I=y
CONFIG_MACH_SUN8I=y
-# CONFIG_MACH_SUN9I is not set
-# CONFIG_MACH_SUN50I is not set
+CONFIG_MACH_SUN9I=y
+CONFIG_SUNXI_CCU=y
+CONFIG_SUN6I_A31_CCU=y
+CONFIG_SUN8I_A23_CCU=y
+CONFIG_SUN8I_A33_CCU=y
+CONFIG_SUN8I_H3_CCU=y
CONFIG_SUNXI_SRAM=y
CONFIG_DMA_SUN4I=m
CONFIG_DMA_SUN6I=m
@@ -200,7 +202,7 @@ CONFIG_SUNXI_WATCHDOG=m
CONFIG_NET_VENDOR_ALLWINNER=y
CONFIG_RTC_DRV_SUNXI=m
CONFIG_PHY_SUN4I_USB=m
-# CONFIG_PHY_SUN9I_USB is not set
+CONFIG_PHY_SUN9I_USB=m
CONFIG_AHCI_SUNXI=m
CONFIG_SPI_SUN4I=m
CONFIG_SPI_SUN6I=m
@@ -209,11 +211,11 @@ CONFIG_I2C_SUN6I_P2WI=m
CONFIG_GPIO_PCF857X=m
CONFIG_TOUCHSCREEN_SUN4I=m
CONFIG_MFD_AXP20X=y
-CONFIG_MFD_AXP20X_I2C=m
-CONFIG_MFD_AXP20X_RSB=m
+CONFIG_MFD_AXP20X_I2C=y
+CONFIG_MFD_AXP20X_RSB=y
CONFIG_AXP20X_POWER=m
CONFIG_INPUT_AXP20X_PEK=m
-CONFIG_REGULATOR_AXP20X=m
+CONFIG_REGULATOR_AXP20X=y
CONFIG_AXP288_FUEL_GAUGE=m
CONFIG_AXP288_ADC=m
CONFIG_EXTCON_AXP288=m
@@ -223,38 +225,22 @@ CONFIG_IR_SUNXI=m
CONFIG_MDIO_SUN4I=m
CONFIG_DWMAC_SUNXI=m
CONFIG_SUN4I_EMAC=m
+CONFIG_SUN8I_EMAC=m
CONFIG_RTC_DRV_SUN6I=m
CONFIG_MTD_NAND_SUNXI=m
CONFIG_SERIO_SUN4I_PS2=m
CONFIG_KEYBOARD_SUN4I_LRADC=m
-CONFIG_PWM_SUN4I=m
+CONFIG_PWM_SUN4I=y
CONFIG_CAN_SUN4I=m
CONFIG_USB_MUSB_SUNXI=m
CONFIG_CRYPTO_DEV_SUN4I_SS=m
CONFIG_SND_SUN4I_CODEC=m
CONFIG_SND_SUN4I_SPDIF=m
-CONFIG_SUNXI_RSB=m
+CONFIG_SND_SUN4I_I2S=m
+CONFIG_SND_SOC_WM8978=m
+CONFIG_SUNXI_RSB=y
CONFIG_NVMEM_SUNXI_SID=m
-# BCM 283x
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_8250_BCM2835AUX=y
-CONFIG_DMA_BCM2835=m
-# CONFIG_MMC_SDHCI_BCM2835 is not set
-CONFIG_MMC_SDHCI_IPROC=m
-CONFIG_BCM2835_MBOX=m
-CONFIG_PWM_BCM2835=m
-CONFIG_HW_RANDOM_BCM2835=m
-CONFIG_I2C_BCM2835=m
-CONFIG_SPI_BCM2835=m
-CONFIG_SPI_BCM2835AUX=m
-CONFIG_BCM2835_WDT=m
-CONFIG_SND_BCM2835_SOC_I2S=m
-CONFIG_DRM_VC4=m
-CONFIG_RASPBERRYPI_FIRMWARE=y
-CONFIG_RASPBERRYPI_POWER=y
-
# Exynos
CONFIG_ARCH_EXYNOS3=y
# CONFIG_ARCH_EXYNOS4 is not set
@@ -269,8 +255,8 @@ CONFIG_SOC_EXYNOS5800=y
CONFIG_SERIAL_SAMSUNG=y
CONFIG_SERIAL_SAMSUNG_CONSOLE=y
CONFIG_ARM_EXYNOS5440_CPUFREQ=m
-# CONFIG_ARM_EXYNOS_CPUIDLE is not set
-CONFIG_ARM_EXYNOS5_BUS_DEVFREQ=m
+CONFIG_ARM_EXYNOS_CPUIDLE=y
+CONFIG_EXYNOS5420_MCPM=y
# CONFIG_ARM_EXYNOS_BUS_DEVFREQ is not set
# CONFIG_EXYNOS5420_MCPM not set
CONFIG_DEVFREQ_EVENT_EXYNOS_PPMU=y
@@ -283,7 +269,7 @@ CONFIG_EXYNOS_THERMAL=m
CONFIG_EXYNOS_ADC=m
CONFIG_MMC_SDHCI_S3C=m
CONFIG_MMC_SDHCI_S3C_DMA=y
-CONFIG_MMC_DW_EXYNOS=m
+CONFIG_MMC_DW_EXYNOS=y
# CONFIG_EXYNOS_IOMMU is not set
CONFIG_PCI_EXYNOS=y
CONFIG_PHY_EXYNOS5_USBDRD=m
@@ -335,18 +321,25 @@ CONFIG_VIDEO_EXYNOS4_FIMC_IS=m
CONFIG_VIDEO_EXYNOS4_ISP_DMA_CAPTURE=y
CONFIG_VIDEO_S5P_FIMC=m
CONFIG_VIDEO_S5P_MIPI_CSIS=m
+CONFIG_VIDEO_SAMSUNG_S5P_CEC=m
CONFIG_VIDEO_SAMSUNG_S5P_G2D=m
CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m
CONFIG_VIDEO_SAMSUNG_S5P_MFC=m
# CONFIG_VIDEO_SAMSUNG_S5P_TV is not set
CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m
+CONFIG_MFD_EXYNOS_LPASS=m
CONFIG_SND_SOC_SAMSUNG=m
CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF=m
CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994=m
CONFIG_SND_SOC_SMDK_WM8994_PCM=m
CONFIG_SND_SOC_SNOW=m
-CONFIG_SND_SOC_ODROIDX2=m
+CONFIG_SND_SOC_MAX98090=m
+CONFIG_SND_SOC_MAX98095=m
+CONFIG_SND_SAMSUNG_I2S=m
+CONFIG_SND_SAMSUNG_PCM=m
+CONFIG_SND_SAMSUNG_SPDIF=m
+CONFIG_EXYNOS_AUDSS_CLK_CON=m
# CONFIG_EXYNOS_IOMMU_DEBUG is not set
# CONFIG_SAMSUNG_PM_DEBUG is not set
# CONFIG_SAMSUNG_PM_CHECK is not set
@@ -366,6 +359,8 @@ CONFIG_CHARGER_MAX8997=m
CONFIG_LEDS_MAX8997=m
CONFIG_RTC_DRV_MAX8997=m
CONFIG_EXTCON_MAX8997=m
+CONFIG_SND_SOC_ARNDALE_RT5631_ALC5631=m
+CONFIG_SND_SOC_RT5631=m
# Tegra
CONFIG_ARCH_TEGRA_114_SOC=y
@@ -379,7 +374,6 @@ CONFIG_SND_SOC_TEGRA_RT5677=m
CONFIG_AD525X_DPOT=m
CONFIG_AD525X_DPOT_I2C=m
CONFIG_AD525X_DPOT_SPI=m
-# CONFIG_GPIO_TEGRA is not set
# Jetson TK1
CONFIG_PINCTRL_AS3722=y
@@ -405,7 +399,7 @@ CONFIG_MACH_DOVE=y
CONFIG_CACHE_TAUROS2=y
CONFIG_PINCTRL_ARMADA_370=y
CONFIG_PINCTRL_ARMADA_XP=y
-# CONFIG_ARM_MVEBU_V7_CPUIDLE is not set
+CONFIG_ARM_MVEBU_V7_CPUIDLE=y
CONFIG_PINCTRL_DOVE=y
CONFIG_MMC_SDHCI_DOVE=m
CONFIG_DOVE_THERMAL=m
@@ -417,11 +411,11 @@ CONFIG_USB_EHCI_HCD_ORION=m
CONFIG_MVPP2=m
CONFIG_COMMON_CLK_SI5351=m
CONFIG_RTC_DRV_ARMADA38X=m
+CONFIG_I2C_PXA=m
# CONFIG_CACHE_FEROCEON_L2 is not set
# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
CONFIG_LEDS_NS2=m
-CONFIG_SERIAL_MVEBU_UART=y
-# CONFIG_SERIAL_MVEBU_CONSOLE is not set
+CONFIG_LEDS_PCA963X=m
# CONFIG_PCIE_ARMADA_8K is not set
# DRM panels
@@ -464,17 +458,12 @@ CONFIG_MFD_TPS65912_SPI=y
# CONFIG_MFD_TPS80031 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
-#
# Pin stuff
# CONFIG_PINCTRL_AMD is not set
# CONFIG_PINCTRL_SAMSUNG is not set
-# CONFIG_PINCTRL_MSM8X74 is not set
# CONFIG_PINCTRL_BCM281XX is not set
-# CONFIG_PINCTRL_APQ8064 is not set
-# CONFIG_PINCTRL_APQ8084 is not set
-# CONFIG_PINCTRL_MSM8960 is not set
-# CONFIG_PINCTRL_MSM8660 is not set
+# CONFIG_PINCTRL_MDM9615 is not set
# CONFIG_PINCTRL_MSM8996 is not set
# GPIO
@@ -485,6 +474,7 @@ CONFIG_GPIO_MC33880=m
CONFIG_GPIO_TPS65910=y
CONFIG_GPIO_TPS65912=m
# CONFIG_GPIO_ZEVIO is not set
+CONFIG_GPIO_AXP209=m
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_GPIO_REGISTER=y
CONFIG_MDIO_BUS_MUX=m
@@ -495,7 +485,6 @@ CONFIG_INPUT_GPIO_BEEPER=m
CONFIG_INPUT_GPIO_TILT_POLLED=m
CONFIG_INPUT_MATRIXKMAP=m
CONFIG_KEYBOARD_MATRIX=m
-# CONFIG_GPIO_RCAR is not set
CONFIG_W1_MASTER_GPIO=m
# HW crypto and rng
@@ -528,6 +517,7 @@ CONFIG_MTD_NAND_PXA3xx=m
CONFIG_MTD_NAND_RICOH=m
CONFIG_MTD_NAND_TMIO=m
# CONFIG_MTD_NAND_BRCMNAND is not set
+# CONFIG_MTD_NAND_MTK is not set
# CONFIG_MTD_MT81xx_NOR is not set
CONFIG_MTD_SPI_NOR=m
# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
@@ -542,6 +532,8 @@ CONFIG_EEPROM_93XX46=m
CONFIG_SND_ARM=y
CONFIG_SND_SOC_AC97_BUS=y
CONFIG_SND_SOC_AC97_CODEC=y
+# CONFIG_SND_SOC_RK3399_GRU_SOUND is not set
+# CONFIG_SND_SOC_TEGRA_SGTL5000 is not set
# RTC
CONFIG_RTC_DRV_DS1305=m
@@ -557,7 +549,6 @@ CONFIG_RTC_DRV_TPS80031=m
# CONFIG_RTC_DRV_DS1347 is not set
# CONFIG_RTC_DRV_DS1343 is not set
# CONFIG_RTC_DRV_MCP795 is not set
-# CONFIG_RTC_DRV_XGENE is not set
# Regulators
# CONFIG_REGULATOR_ACT8865 is not set
@@ -609,21 +600,15 @@ CONFIG_GENERIC_ADC_BATTERY=m
CONFIG_BATTERY_SBS=m
# Sensors
-CONFIG_TMP006=m
-CONFIG_BMP085=y
-CONFIG_BMP085_I2C=m
-CONFIG_BMP085_SPI=m
-CONFIG_BMP280=m
+# non iio
CONFIG_SENSORS_AD7314=m
-CONFIG_SENSORS_ADCXX=m
CONFIG_SENSORS_ADS7871=m
-CONFIG_SENSORS_BH1780=m
CONFIG_SENSORS_GPIO_FAN=m
-CONFIG_SENSORS_ISL29018=m
-CONFIG_SENSORS_ISL29028=m
-CONFIG_SENSORS_LIS3_SPI=m
CONFIG_SENSORS_LM70=m
CONFIG_SENSORS_MAX1111=m
+# iio
+CONFIG_SENSORS_ISL29018=m
+CONFIG_SENSORS_ISL29028=m
CONFIG_MPL115=m
CONFIG_MPL3115=m
CONFIG_SI7005=m
@@ -656,7 +641,6 @@ CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_DAC124S085=m
CONFIG_LEDS_PWM=m
CONFIG_LEDS_SYSCON=y
-CONFIG_BMP085_SPI=m
CONFIG_MFD_SYSCON=y
CONFIG_GPIO_SYSCON=m
@@ -705,14 +689,10 @@ CONFIG_I2C_CROS_EC_TUNNEL=m
CONFIG_SND_SOC_TS3A227E=m
CONFIG_CROS_EC_CHARDEV=m
CONFIG_CROS_EC_PROTO=y
+CONFIG_PWM_CROS_EC=m
-# This newly introduced mess needs to be fixed upstream :-(
CONFIG_STMMAC_PLATFORM=m
CONFIG_DWMAC_GENERIC=m
-# CONFIG_DWMAC_LPC18XX is not set
-# CONFIG_DWMAC_MESON is not set
-# CONFIG_DWMAC_SOCFPGA is not set
-# CONFIG_DWMAC_STI is not set
CONFIG_R8188EU=m
@@ -722,6 +702,7 @@ CONFIG_R8188EU=m
# CONFIG_CAN_TI_HECC is not set
# CONFIG_CAN_FLEXCAN is not set
# CONFIG_CAN_RCAR is not set
+# CONFIG_CAN_RCAR_CANFD is not set
# Needs work/investigation
# CONFIG_ARM_KPROBES_TEST is not set
@@ -731,8 +712,6 @@ CONFIG_R8188EU=m
# CONFIG_DRM_IMX is not set
# CONFIG_DRM_STI is not set
# CONFIG_DRM_FSL_DCU is not set
-# CONFIG_AHCI_IMX is not set
-# CONFIG_IMX_THERMAL is not set
# CONFIG_TI_DAC7512 is not set
# Not needed on ARMv7
@@ -746,6 +725,7 @@ CONFIG_R8188EU=m
# CONFIG_DM9000 is not set
# CONFIG_MTD_AFS_PARTS is not set
# CONFIG_SPI_PXA2XX is not set
+# CONFIG_SPI_CADENCE_QUADSPI is not set
# CONFIG_DEPRECATED_PARAM_STRUCT is not set
# CONFIG_LATTICE_ECP3_CONFIG is not set
# CONFIG_SERIAL_8250_EM is not set
@@ -786,6 +766,7 @@ CONFIG_R8188EU=m
# CONFIG_QCOM_SPMI_TEMP_ALARM is not set
# CONFIG_SND_SOC_APQ8016_SBC is not set
# CONFIG_SND_SOC_TAS571X is not set
+# CONFIG_QCOM_EBI2 is not set
# CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set
@@ -798,6 +779,4 @@ CONFIG_R8188EU=m
# CONFIG_DMADEVICES_DEBUG is not set
# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
# CONFIG_OMAP2_DSS_DEBUG is not set
-# CONFIG_CRYPTO_DEV_UX500_DEBUG is not set
-# CONFIG_AB8500_DEBUG is not set
# CONFIG_DEBUG_LL is not set
diff --git a/config-armv7-lpae b/config-armv7-lpae
index 178d36e8f..891087c3c 100644
--- a/config-armv7-lpae
+++ b/config-armv7-lpae
@@ -16,29 +16,9 @@ CONFIG_ARM_LPAE=y
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_ARM_VIRT_EXT=y
-CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8
-
-CONFIG_CMA_SIZE_SEL_MBYTES=y
-CONFIG_CMA_SIZE_MBYTES=64
-
-# Cortex-A15
-CONFIG_ARM_ERRATA_798181=y
-CONFIG_ARM_ERRATA_773022=y
-
-# Little.BIG
-CONFIG_BIG_LITTLE=y
-CONFIG_BL_SWITCHER=y
-CONFIG_EXYNOS5420_MCPM=y
-CONFIG_ARCH_VEXPRESS_DCSCB=y
-CONFIG_ARCH_VEXPRESS_TC2_PM=y
-CONFIG_ARM_BIG_LITTLE_CPUFREQ=m
-CONFIG_ARM_SCPI_CPUFREQ=m
-CONFIG_ARM_VEXPRESS_SPC_CPUFREQ=m
-# CONFIG_BL_SWITCHER_DUMMY_IF is not set
CONFIG_KVM=y
CONFIG_KVM_ARM_HOST=y
-CONFIG_KVM_NEW_VGIC=y
# CONFIG_XEN is not set
CONFIG_XEN_FBDEV_FRONTEND=y
@@ -61,9 +41,11 @@ CONFIG_XEN_WDT=m
# TI Keystone
CONFIG_KEYSTONE_USB_PHY=m
+CONFIG_TI_SYSCON_RESET=m
CONFIG_USB_DWC3_KEYSTONE=m
CONFIG_GPIO_DAVINCI=y
# CONFIG_I2C_DAVINCI is not set
+# CONFIG_MTD_NAND_OMAP2 is not set
CONFIG_TI_AEMIF=m
CONFIG_POWER_RESET_KEYSTONE=y
CONFIG_DAVINCI_WATCHDOG=m
diff --git a/config-debug b/config-debug
index a31d9076c..12abb86ab 100644
--- a/config-debug
+++ b/config-debug
@@ -50,6 +50,7 @@ CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
CONFIG_X86_PTDUMP=y
CONFIG_ARM64_PTDUMP=y
CONFIG_EFI_PGT_DUMP=y
+CONFIG_EFI_TEST=y
CONFIG_CAN_DEBUG_DEVICES=y
diff --git a/config-generic b/config-generic
index 8c2260862..928bd6a3a 100644
--- a/config-generic
+++ b/config-generic
@@ -9,6 +9,7 @@ CONFIG_HOTPLUG_CPU=y
CONFIG_LOCALVERSION=""
CONFIG_CROSS_COMPILE=""
CONFIG_DEFAULT_HOSTNAME="(none)"
+# CONFIG_GCC_PLUGINS is not set
#
# Code maturity level options
@@ -33,6 +34,7 @@ CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_LZMA is not set
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
+CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
# CONFIG_COMPILE_TEST is not set
@@ -74,13 +76,12 @@ CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_PREEMPT is not set
CONFIG_SLUB=y
+CONFIG_SLAB_FREELIST_RANDOM=y
CONFIG_SLUB_CPU_PARTIAL=y
# CONFIG_SLUB_STATS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_KASAN is not set
-# CONFIG_AD525X_DPOT is not set
-
#
# Loadable module support
#
@@ -111,12 +112,13 @@ CONFIG_HOTPLUG_PCI=y
# CONFIG_HOTPLUG_PCI_SHPC is not set
CONFIG_HOTPLUG_PCI_PCIE=y
# CONFIG_PCIE_DW_PLAT is not set
-CONFIG_PCIE_DPC=m
+CONFIG_PCIE_DPC=y
+CONFIG_PCIE_PTM=y
+# CONFIG_NTB is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_ISA is not set
-# CONFIG_SCx200 is not set
#
# PCMCIA/CardBus support
@@ -196,6 +198,8 @@ CONFIG_INFINIBAND_OCRDMA=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_RDMAVT=m
+CONFIG_RDMA_RXE=m
+# CONFIG_INFINIBAND_QEDR is not set
#
# Executable file formats
@@ -205,6 +209,7 @@ CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
# CONFIG_BINFMT_AOUT is not set
CONFIG_BINFMT_SCRIPT=y
CONFIG_BINFMT_MISC=m
+# CONFIG_BINFMT_FLAT is not set
#
# Device Drivers
@@ -212,11 +217,13 @@ CONFIG_BINFMT_MISC=m
# CONFIG_COMMON_CLK_SI5351 is not set
# CONFIG_COMMON_CLK_CDCE706 is not set
+# CONFIG_COMMON_CLK_CDCE925 is not set
# CONFIG_COMMON_CLK_CS2000_CP is not set
# CONFIG_COMMON_CLK_PWM is not set
-# CONFIG_COMMON_CLK_CDCE925 is not set
-# CONFIG_COMMON_CLK_OXNAS is not set
# CONFIG_COMMON_CLK_HI3519 is not set
+# CONFIG_SUN6I_A31_CCU is not set
+# CONFIG_SUN8I_A23_CCU is not set
+# CONFIG_SUN8I_A33_CCU is not set
#
# Generic Driver Options
@@ -228,7 +235,6 @@ CONFIG_EXTRA_FIRMWARE=""
CONFIG_FW_CFG_SYSFS=m
# CONFIG_FW_CFG_SYSFS_CMDLINE is not set
-
# Give this a try in rawhide for now
# CONFIG_FW_LOADER_USER_HELPER is not set
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
@@ -236,6 +242,11 @@ CONFIG_FW_CFG_SYSFS=m
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=m
+# EDAC
+CONFIG_EDAC=y
+CONFIG_EDAC_MM_EDAC=m
+CONFIG_EDAC_LEGACY_SYSFS=y
+
# CONFIG_CMA is not set
# CONFIG_DMA_CMA is not set
# CONFIG_FENCE_TRACE is not set
@@ -376,7 +387,6 @@ CONFIG_BLK_DEV_NULL_BLK=m
CONFIG_BLK_DEV_FD=m
# CONFIG_PARIDE is not set
CONFIG_ZRAM=m
-# CONFIG_ZRAM_LZ4_COMPRESS is not set
CONFIG_BLK_CPQ_CISS_DA=m
CONFIG_CISS_SCSI_TAPE=y
@@ -426,11 +436,13 @@ CONFIG_VIRTIO_INPUT=m
CONFIG_VIRTIO_MMIO=m
# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set
CONFIG_VIRTIO_NET=m
+CONFIG_VIRTIO_VSOCKETS=m
CONFIG_HW_RANDOM_VIRTIO=m
CONFIG_VIRTIO_CONSOLE=m
CONFIG_VHOST_NET=m
CONFIG_VHOST_SCSI=m
# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
+CONFIG_VHOST_VSOCK=m
#
# SCSI device support
@@ -451,6 +463,7 @@ CONFIG_SCSI_DH_RDAC=m
CONFIG_SCSI_DH_HP_SW=m
CONFIG_SCSI_DH_EMC=m
CONFIG_SCSI_DH_ALUA=m
+CONFIG_SCSI_SMARTPQI=m
#
# SCSI support type (disk, tape, CD-ROM)
@@ -524,6 +537,8 @@ CONFIG_SCSI_UFSHCD=m
CONFIG_SCSI_UFSHCD_PCI=m
# CONFIG_SCSI_UFSHCD_PLATFORM is not set
+# CONFIG_SCSI_UFS_DWC_TC_PCI is not set
+
CONFIG_SCSI_MVUMI=m
CONFIG_SCSI_OSD_INITIATOR=m
@@ -596,11 +611,11 @@ CONFIG_SCSI_SNIC=m
CONFIG_ATA=y
CONFIG_ATA_BMDMA=y
+CONFIG_ATA_GENERIC=m
CONFIG_ATA_VERBOSE_ERROR=y
CONFIG_ATA_SFF=y
CONFIG_ATA_PIIX=y
# CONFIG_SATA_DWC is not set
-# CONFIG_SATA_HIGHBANK is not set
CONFIG_ATA_ACPI=y
CONFIG_BLK_DEV_SX8=m
CONFIG_PDC_ADMA=m
@@ -639,7 +654,6 @@ CONFIG_PATA_CS5535=m
CONFIG_PATA_CS5536=m
CONFIG_PATA_CYPRESS=m
CONFIG_PATA_EFAR=m
-CONFIG_ATA_GENERIC=m
CONFIG_PATA_HPT366=m
CONFIG_PATA_HPT37X=m
CONFIG_PATA_HPT3X2N=m
@@ -737,6 +751,14 @@ CONFIG_FUSION_SAS=m
CONFIG_FUSION_LOGGING=y
#
+# NVME support
+#
+CONFIG_NVME_RDMA=m
+CONFIG_NVME_TARGET=m
+CONFIG_NVME_TARGET_LOOP=m
+CONFIG_NVME_TARGET_RDMA=m
+
+#
# IEEE 1394 (FireWire) support (JUJU alternative stack)
#
CONFIG_FIREWIRE=m
@@ -778,9 +800,11 @@ CONFIG_TCP_CONG_CDG=m
CONFIG_TCP_CONG_LP=m
CONFIG_TCP_CONG_SCALABLE=m
CONFIG_TCP_CONG_VEGAS=m
+CONFIG_TCP_CONG_NV=m
CONFIG_TCP_CONG_VENO=m
CONFIG_TCP_CONG_WESTWOOD=m
CONFIG_TCP_CONG_YEAH=m
+CONFIG_TCP_CONG_BBR=m
CONFIG_TCP_MD5SIG=y
@@ -1097,6 +1121,7 @@ CONFIG_NFT_COMPAT=m
CONFIG_NF_DUP_NETDEV=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
+CONFIG_NFT_NUMGEN=m
CONFIG_NF_TABLES_IPV4=m
CONFIG_NF_DUP_IPV4=m
@@ -1112,6 +1137,10 @@ CONFIG_NF_TABLES_ARP=m
CONFIG_NF_TABLES_IPV6=m
CONFIG_NFT_CHAIN_ROUTE_IPV6=m
CONFIG_NFT_CHAIN_NAT_IPV6=m
+CONFIG_NFT_SET_RBTREE=m
+CONFIG_NFT_SET_HASH=m
+CONFIG_NFT_QUOTA=m
+
CONFIG_NF_TABLES_BRIDGE=m
#
@@ -1250,6 +1279,7 @@ CONFIG_NET_CLS_FLOWER=m
CONFIG_NET_CLS_FLOW=m
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_IND=y
+CONFIG_NET_CLS_MATCHALL=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
CONFIG_NET_CLS_RSVP=m
@@ -1282,8 +1312,11 @@ CONFIG_NET_ACT_VLAN=m
CONFIG_NET_ACT_BPF=m
CONFIG_NET_ACT_CONNMARK=m
CONFIG_NET_ACT_IFE=m
+CONFIG_NET_ACT_SKBMOD=m
+CONFIG_NET_ACT_TUNNEL_KEY=m
CONFIG_NET_IFE_SKBMARK=m
CONFIG_NET_IFE_SKBPRIO=m
+CONFIG_NET_IFE_SKBTCINDEX=m
CONFIG_DCB=y
CONFIG_DNS_RESOLVER=m
@@ -1295,6 +1328,7 @@ CONFIG_BATMAN_ADV_MCAST=y
CONFIG_BATMAN_ADV_BATMAN_V=y
# CONFIG_BATMAN_ADV_DEBUG is not set
+# CONFIG_BATMAN_ADV_DEBUGFS is not set
CONFIG_OPENVSWITCH=m
CONFIG_OPENVSWITCH_GRE=y
CONFIG_OPENVSWITCH_VXLAN=y
@@ -1415,6 +1449,8 @@ CONFIG_ACENIC=m
CONFIG_ALTERA_TSE=m
+# CONFIG_NET_VENDOR_AMAZON is not set
+
CONFIG_NET_VENDOR_AMD=y
CONFIG_PCNET32=m
CONFIG_AMD8111_ETH=m
@@ -1447,7 +1483,6 @@ CONFIG_CHELSIO_T4=m
CONFIG_CHELSIO_T4VF=m
CONFIG_CHELSIO_T4_DCB=y
# CONFIG_CHELSIO_T4_FCOE is not set
-# CONFIG_CHELSIO_T4_UWIRE is not set
CONFIG_NET_VENDOR_CISCO=y
CONFIG_ENIC=m
@@ -1478,7 +1513,6 @@ CONFIG_SUNDANCE=m
CONFIG_NET_VENDOR_EMULEX=y
CONFIG_BE2NET=m
-CONFIG_BE2NET_VXLAN=y
# CONFIG_BE2NET_HWMON is not set
CONFIG_NET_VENDOR_EXAR=y
@@ -1504,16 +1538,12 @@ CONFIG_IXGBEVF=m
CONFIG_IXGBE=m
CONFIG_IXGBE_DCA=y
CONFIG_IXGBE_DCB=y
-CONFIG_IXGBE_VXLAN=y
CONFIG_IXGBE_HWMON=y
CONFIG_I40E=m
-CONFIG_I40E_VXLAN=y
# CONFIG_I40E_DCB is not set
# CONFIG_I40E_FCOE is not set
-CONFIG_I40E_GENEVE=y
CONFIG_I40EVF=m
CONFIG_FM10K=m
-# CONFIG_FM10K_VXLAN is not set
# CONFIG_NET_VENDOR_I825XX is not set
CONFIG_NET_VENDOR_MARVELL=y
@@ -1564,15 +1594,12 @@ CONFIG_QLA3XXX=m
CONFIG_QLCNIC=m
CONFIG_QLCNIC_SRIOV=y
CONFIG_QLCNIC_DCB=y
-CONFIG_QLCNIC_VXLAN=y
CONFIG_QLCNIC_HWMON=y
CONFIG_QLGE=m
CONFIG_NETXEN_NIC=m
CONFIG_QED=m
CONFIG_QEDE=m
CONFIG_QED_SRIOV=y
-# CONFIG_QEDE_VXLAN is not set
-# CONFIG_QEDE_GENEVE is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
@@ -1607,7 +1634,6 @@ CONFIG_NET_VENDOR_SIS=y
CONFIG_SIS900=m
CONFIG_SIS190=m
-
CONFIG_NET_VENDOR_SMSC=y
CONFIG_PCMCIA_SMC91C92=m
CONFIG_EPIC100=m
@@ -1656,6 +1682,7 @@ CONFIG_CICADA_PHY=m
CONFIG_DAVICOM_PHY=m
CONFIG_DP83640_PHY=m
CONFIG_MICROCHIP_PHY=m
+CONFIG_MICROSEMI_PHY=m
CONFIG_FIXED_PHY=y
CONFIG_MDIO_BITBANG=m
CONFIG_MDIO_BCM_UNIMAC=m
@@ -1664,6 +1691,8 @@ CONFIG_NATIONAL_PHY=m
CONFIG_ICPLUS_PHY=m
CONFIG_BCM63XX_PHY=m
CONFIG_BCM7XXX_PHY=m
+CONFIG_INTEL_XWAY_PHY=m
+# CONFIG_MDIO_HISI_FEMAC is not set
CONFIG_LSI_ET1011C_PHY=m
CONFIG_LXT_PHY=m
CONFIG_MARVELL_PHY=m
@@ -1672,6 +1701,7 @@ CONFIG_REALTEK_PHY=m
CONFIG_SMSC_PHY=m
CONFIG_STE10XP=m
CONFIG_VITESSE_PHY=m
+CONFIG_XILINX_GMII2RGMII=m
CONFIG_MICREL_PHY=m
CONFIG_DP83867_PHY=m
CONFIG_DP83848_PHY=m
@@ -1692,8 +1722,6 @@ CONFIG_BCMGENET=m
CONFIG_BNX2=m
CONFIG_BNX2X=m
CONFIG_BNX2X_SRIOV=y
-CONFIG_BNX2X_VXLAN=y
-CONFIG_BNX2X_GENEVE=y
CONFIG_CNIC=m
CONFIG_FEALNX=m
CONFIG_ETHOC=m
@@ -1708,16 +1736,13 @@ CONFIG_JME=m
# Ethernet (10000 Mbit)
# CONFIG_NET_VENDOR_AURORA is not set
-#
CONFIG_MLX4_CORE=m
CONFIG_MLX4_EN=m
CONFIG_MLX4_EN_DCB=y
-CONFIG_MLX4_EN_VXLAN=y
CONFIG_MLX4_INFINIBAND=m
CONFIG_MLX5_CORE=m
CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE_EN_DCB=y
-CONFIG_MLX5_CORE_EN_VXLAN=y
CONFIG_MLX5_INFINIBAND=m
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_HWMON=y
@@ -1751,7 +1776,6 @@ CONFIG_SLIP_SMART=y
#
# Wireless LAN
#
-#
CONFIG_WLAN=y
# CONFIG_STRIP is not set
# CONFIG_PCMCIA_RAYCS is not set
@@ -1837,13 +1861,13 @@ CONFIG_B43=m
CONFIG_B43_SDIO=y
CONFIG_B43_BCMA=y
CONFIG_B43_BCMA_PIO=y
-# CONFIG_B43_DEBUG is not set
+CONFIG_B43_DEBUG=y
CONFIG_B43_PHY_LP=y
CONFIG_B43_PHY_N=y
CONFIG_B43_PHY_HT=y
CONFIG_B43_PHY_G=y
CONFIG_B43LEGACY=m
-# CONFIG_B43LEGACY_DEBUG is not set
+CONFIG_B43LEGACY_DEBUG=y
CONFIG_B43LEGACY_DMA=y
CONFIG_B43LEGACY_PIO=y
CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
@@ -1894,7 +1918,6 @@ CONFIG_IWLWIFI=m
CONFIG_IWLDVM=m
CONFIG_IWLMVM=m
# CONFIG_IWLWIFI_BCAST_FILTERING is not set
-# CONFIG_IWLWIFI_UAPSD is not set
CONFIG_IWLWIFI_PCIE_RTPM=y
CONFIG_IWLWIFI_DEBUG=y
CONFIG_IWLWIFI_DEBUGFS=y
@@ -1905,7 +1928,6 @@ CONFIG_IWLEGACY_DEBUGFS=y
CONFIG_IWL4965=y
CONFIG_IWL3945=m
# CONFIG_IWM is not set
-# CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE is not set
CONFIG_MAC80211_HWSIM=m
CONFIG_P54_COMMON=m
@@ -1988,6 +2010,7 @@ CONFIG_MWIFIEX_SDIO=m
CONFIG_MWIFIEX_PCIE=m
CONFIG_MWIFIEX_USB=m
+CONFIG_MAC802154=m
CONFIG_IEEE802154=m
CONFIG_IEEE802154_SOCKET=m
CONFIG_IEEE802154_6LOWPAN=m
@@ -1997,16 +2020,16 @@ CONFIG_IEEE802154_ATUSB=m
CONFIG_IEEE802154_CC2520=m
CONFIG_IEEE802154_AT86RF230=m
# CONFIG_IEEE802154_AT86RF230_DEBUGFS is not set
-# CONFIG_IEEE802154_ADF7242 is not set
-# CONFIG_IEEE802154_MRF24J40 is not set
+CONFIG_IEEE802154_ADF7242=m
+CONFIG_IEEE802154_MRF24J40=m
# CONFIG_IEEE802154_NL802154_EXPERIMENTAL is not set
-CONFIG_MAC802154=m
CONFIG_NET_MPLS_GSO=m
CONFIG_MPLS_ROUTING=m
CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_SWITCHDEV=y
+CONFIG_NET_NCSI=y
CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_NHC=m
@@ -2051,6 +2074,9 @@ CONFIG_HAMRADIO=y
CONFIG_AX25=m
CONFIG_AX25_DAMA_SLAVE=y
+#
+# Controller Area Network support
+#
CONFIG_CAN=m
CONFIG_CAN_RAW=m
CONFIG_CAN_BCM=m
@@ -2200,8 +2226,6 @@ CONFIG_BT_HIDP=m
# Bluetooth device drivers
#
CONFIG_BT_HCIBTUSB=m
-# Disable the BT_HCIUSB driver.
-# It sucks more power than BT_HCIBTUSB which has the same functionality.
CONFIG_BT_HCIBTUSB_BCM=y
CONFIG_BT_HCIBTUSB_RTL=y
CONFIG_BT_HCIUART=m
@@ -2213,6 +2237,7 @@ CONFIG_BT_HCIUART_INTEL=y
CONFIG_BT_HCIUART_BCM=y
CONFIG_BT_HCIUART_QCA=y
CONFIG_BT_HCIUART_AG6XX=y
+CONFIG_BT_HCIUART_MRVL=y
CONFIG_BT_HCIDTL1=m
CONFIG_BT_HCIBT3C=m
CONFIG_BT_HCIBLUECARD=m
@@ -2228,6 +2253,7 @@ CONFIG_BT_MRVL_SDIO=m
CONFIG_BT_ATH3K=m
CONFIG_BT_QCA=m
CONFIG_BT_WILINK=m
+# CONFIG_BT_QCOMSMD is not set
#
# ISDN subsystem
@@ -2241,20 +2267,19 @@ CONFIG_MISDN_SPEEDFAX=m
CONFIG_MISDN_INFINEON=m
CONFIG_MISDN_W6692=m
CONFIG_MISDN_NETJET=m
+CONFIG_MISDN_HFCUSB=m
+CONFIG_MISDN_HFCPCI=m
+CONFIG_MISDN_HFCMULTI=m
#
# mISDN hardware drivers
#
-CONFIG_MISDN_HFCPCI=m
-CONFIG_MISDN_HFCMULTI=m
CONFIG_ISDN_I4L=m
CONFIG_ISDN_DRV_AVMB1_B1PCI=m
CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m
CONFIG_ISDN_DRV_AVMB1_T1PCI=m
CONFIG_ISDN_DRV_AVMB1_C4=m
-CONFIG_MISDN_HFCUSB=m
-
CONFIG_ISDN_PPP=y
CONFIG_ISDN_PPP_VJ=y
CONFIG_ISDN_MPP=y
@@ -2379,6 +2404,7 @@ CONFIG_TABLET_USB_AIPTEK=m
CONFIG_TABLET_USB_GTCO=m
CONFIG_TABLET_USB_HANWANG=m
CONFIG_TABLET_USB_KBTAB=m
+CONFIG_TABLET_USB_PEGASUS=m
CONFIG_TABLET_SERIAL_WACOM4=m
CONFIG_INPUT_POWERMATE=m
@@ -2387,6 +2413,7 @@ CONFIG_INPUT_CM109=m
CONFIG_INPUT_POLLDEV=m
CONFIG_INPUT_SPARSEKMAP=m
# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
# CONFIG_INPUT_BMA150 is not set
# CONFIG_INPUT_IMS_PCU is not set
CONFIG_INPUT_CMA3000=m
@@ -2447,6 +2474,7 @@ CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_TCA8418 is not set
# CONFIG_KEYBOARD_OMAP4 is not set
# CONFIG_KEYBOARD_CAP11XX is not set
+# CONFIG_KEYBOARD_ADC is not set
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=y
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
@@ -2536,7 +2564,11 @@ CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
# CONFIG_TOUCHSCREEN_WM97XX is not set
CONFIG_TOUCHSCREEN_W90X900=m
# CONFIG_TOUCHSCREEN_BU21013 is not set
+CONFIG_TOUCHSCREEN_RM_TS=m
+CONFIG_TOUCHSCREEN_SILEAD=m
+CONFIG_TOUCHSCREEN_SIS_I2C=m
CONFIG_TOUCHSCREEN_ST1232=m
+# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set
CONFIG_TOUCHSCREEN_ATMEL_MXT=m
# CONFIG_TOUCHSCREEN_MAX11801 is not set
CONFIG_TOUCHSCREEN_AUO_PIXCIR=m
@@ -2554,6 +2586,8 @@ CONFIG_TOUCHSCREEN_ZFORCE=m
# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
# CONFIG_TOUCHSCREEN_TSC2004 is not set
# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set
+# CONFIG_TOUCHSCREEN_EKTF2127 is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_E3X0_BUTTON=m
@@ -2578,6 +2612,7 @@ CONFIG_INPUT_MPU3050=m
CONFIG_INPUT_KXTJ9=m
# CONFIG_INPUT_KXTJ9_POLLED_MODE is not set
# CONFIG_INPUT_PWM_BEEPER is not set
+# CONFIG_INPUT_GPIO_DECODER is not set
CONFIG_RMI4_CORE=m
CONFIG_RMI4_I2C=m
@@ -2585,6 +2620,10 @@ CONFIG_RMI4_F11=y
CONFIG_RMI4_F12=y
CONFIG_RMI4_F30=y
CONFIG_RMI4_SPI=m
+# This throws off module filtering because it depends on V4L2 which is filtered
+# Leave this off until someone explicitly requests it and figure out what to
+# do then.
+# CONFIG_RMI4_F54 is not set
#
# Character devices
@@ -2602,7 +2641,6 @@ CONFIG_N_HDLC=m
CONFIG_N_GSM=m
# CONFIG_TRACE_SINK is not set
# CONFIG_DUMMY_IRQ is not set
-# CONFIG_IBM_ASM is not set
CONFIG_TIFM_CORE=m
CONFIG_TIFM_7XX1=m
CONFIG_TCG_TPM=m
@@ -2615,6 +2653,11 @@ CONFIG_TCG_ATMEL=m
# CONFIG_TCG_INFINEON is not set
# CONFIG_TCG_TIS_ST33ZP24 is not set
# CONFIG_TCG_XEN is not set
+# CONFIG_TCG_TIS_SPI is not set
+# CONFIG_TCG_VTPM_PROXY is not set
+# CONFIG_TCG_TIS_ST33ZP24_I2C is not set
+# CONFIG_TCG_TIS_ST33ZP24_SPI is not set
+
CONFIG_TELCLOCK=m
#
@@ -2634,7 +2677,7 @@ CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_8250_DW=y
# CONFIG_SERIAL_8250_INGENIC is not set
CONFIG_SERIAL_8250_RT288X=y
-CONFIG_SERIAL_8250_MID=y
+# CONFIG_SERIAL_8250_MID is not set
CONFIG_SERIAL_8250_MOXA=m
CONFIG_CYCLADES=m
# CONFIG_CYZ_INTR is not set
@@ -2670,7 +2713,6 @@ CONFIG_SERIAL_ARC_NR_PORTS=1
# CONFIG_SERIAL_IFX6X60 is not set
CONFIG_UNIX98_PTYS=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_PRINTER=m
CONFIG_LP_CONSOLE=y
@@ -2733,10 +2775,8 @@ CONFIG_I2C_NFORCE2=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PARPORT_LIGHT=m
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
-CONFIG_I2C_PASEMI=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
-# CONFIG_SCx200_ACB is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
@@ -2757,9 +2797,6 @@ CONFIG_I2C_DIOLAN_U2C=m
#
# I2C Hardware Sensors Chip support
#
-CONFIG_SENSORS_ATK0110=m
-CONFIG_SENSORS_ABITUGURU=m
-CONFIG_SENSORS_ABITUGURU3=m
CONFIG_SENSORS_AD7414=m
CONFIG_SENSORS_AD7418=m
CONFIG_SENSORS_ADC128D818=m
@@ -2775,17 +2812,13 @@ CONFIG_SENSORS_ADS7828=m
CONFIG_SENSORS_ADT7462=m
CONFIG_SENSORS_ADT7470=m
CONFIG_SENSORS_ADT7475=m
-CONFIG_SENSORS_APPLESMC=m
-CONFIG_SENSORS_ASB100=m
CONFIG_SENSORS_ATXP1=m
-CONFIG_SENSORS_CORETEMP=m
CONFIG_SENSORS_DME1737=m
CONFIG_SENSORS_DS1621=m
-# CONFIG_DS1682 is not set
CONFIG_SENSORS_F71805F=m
CONFIG_SENSORS_F71882FG=m
CONFIG_SENSORS_F75375S=m
-CONFIG_SENSORS_FSCHMD=m
+CONFIG_SENSORS_FTSTEUTATES=m
CONFIG_SENSORS_G760A=m
CONFIG_SENSORS_G762=m
CONFIG_SENSORS_GL518SM=m
@@ -2798,9 +2831,6 @@ CONFIG_SENSORS_IBMAEM=m
CONFIG_SENSORS_IBMPEX=m
# CONFIG_SENSORS_IIO_HWMON is not set
CONFIG_SENSORS_IT87=m
-CONFIG_SENSORS_K8TEMP=m
-CONFIG_SENSORS_K10TEMP=m
-CONFIG_SENSORS_LIS3LV02D=m
CONFIG_SENSORS_LIS3_I2C=m
# CONFIG_SENSORS_LIS3_SPI is not set
CONFIG_SENSORS_LM63=m
@@ -2834,6 +2864,7 @@ CONFIG_SENSORS_PC87360=m
CONFIG_SENSORS_PC87427=m
CONFIG_SENSORS_PCF8591=m
CONFIG_SENSORS_SHT15=m
+CONFIG_SENSORS_SHT3x=m
CONFIG_SENSORS_SHTC1=m
CONFIG_SENSORS_SIS5595=m
CONFIG_CHARGER_SMB347=m
@@ -2843,14 +2874,7 @@ CONFIG_SENSORS_SMSC47B397=m
CONFIG_SENSORS_TC74=m
CONFIG_SENSORS_THMC50=m
CONFIG_SENSORS_TMP401=m
-CONFIG_APDS9802ALS=m
-CONFIG_ISL29020=m
-CONFIG_ISL29003=m
-CONFIG_SENSORS_BH1770=m
-CONFIG_SENSORS_APDS990X=m
-CONFIG_SENSORS_TSL2550=m
CONFIG_SENSORS_VIA686A=m
-CONFIG_SENSORS_VIA_CPUTEMP=m
CONFIG_SENSORS_VT1211=m
CONFIG_SENSORS_VT8231=m
CONFIG_SENSORS_W83627HF=m
@@ -2871,12 +2895,12 @@ CONFIG_SENSORS_LM73=m
CONFIG_SENSORS_AMC6821=m
CONFIG_SENSORS_INA2XX=m
CONFIG_SENSORS_INA209=m
+CONFIG_SENSORS_INA3221=m
CONFIG_SENSORS_ADT7411=m
CONFIG_SENSORS_ASC7621=m
CONFIG_SENSORS_EMC1403=m
CONFIG_SENSORS_TMP102=m
CONFIG_SENSORS_LTC4261=m
-# CONFIG_SENSORS_BH1780 is not set
# CONFIG_SENSORS_JC42 is not set
# CONFIG_SENSORS_SMM665 is not set
# CONFIG_SENSORS_EMC2103 is not set
@@ -2908,6 +2932,7 @@ CONFIG_SENSORS_MAX1111=m
CONFIG_SENSORS_POWR1220=m
CONFIG_SENSORS_AD7314=m
+# PMbus sensors
CONFIG_PMBUS=m
CONFIG_SENSORS_PMBUS=m
CONFIG_SENSORS_MAX16064=m
@@ -2922,7 +2947,18 @@ CONFIG_SENSORS_MAX197=m
CONFIG_SENSORS_MAX31790=m
CONFIG_SENSORS_TPS40422=m
-# CONFIG_NTB is not set
+# Misc Sensors
+# CONFIG_AD525X_DPOT is not set
+CONFIG_APDS9802ALS=m
+CONFIG_ISL29003=m
+CONFIG_ISL29020=m
+CONFIG_SENSORS_BH1770=m
+CONFIG_SENSORS_APDS990X=m
+CONFIG_SENSORS_LIS3LV02D=m
+CONFIG_SENSORS_TSL2550=m
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_TI_DAC7512 is not set
# Industrial I/O subsystem configuration
CONFIG_IIO=m
@@ -2932,8 +2968,10 @@ CONFIG_IIO_BUFFER_CB=y
CONFIG_IIO_TRIGGERED_BUFFER=m
CONFIG_IIO_TRIGGER=y
CONFIG_IIO_SW_TRIGGER=y
+CONFIG_IIO_SW_DEVICE=m
CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
CONFIG_IIO_INTERRUPT_TRIGGER=m
+CONFIG_IIO_TIGHTLOOP_TRIGGER=m
CONFIG_HID_SENSOR_IIO_COMMON=m
CONFIG_HID_SENSOR_IIO_TRIGGER=m
CONFIG_IIO_CONFIGFS=m
@@ -2944,6 +2982,7 @@ CONFIG_IIO_CONFIGFS=m
# CONFIG_AD5380 is not set
# CONFIG_AD5064 is not set
# CONFIG_BMA180 is not set
+# CONFIG_BMA220 is not set
CONFIG_BMC150_ACCEL=m
# CONFIG_MAX1363 is not set
# CONFIG_MAX517 is not set
@@ -2975,9 +3014,14 @@ CONFIG_STK3310=m
# CONFIG_CC10001_ADC is not set
# CONFIG_INV_MPU6050_IIO is not set
CONFIG_IIO_ST_GYRO_3AXIS=m
+CONFIG_IIO_ST_GYRO_I2C_3AXIS=m
+CONFIG_IIO_ST_GYRO_SPI_3AXIS=m
CONFIG_IIO_ST_MAGN_3AXIS=m
# CONFIG_BMC150_MAGN is not set
+CONFIG_MMA7660=m
CONFIG_IIO_ST_ACCEL_3AXIS=m
+CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m
+CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m
CONFIG_HID_SENSOR_INCLINOMETER_3D=m
CONFIG_HID_SENSOR_DEVICE_ROTATION=m
CONFIG_ACPI_ALS=m
@@ -3078,7 +3122,6 @@ CONFIG_PA12203001=m
# CONFIG_TSYS01 is not set
# CONFIG_TSYS02D is not set
# CONFIG_HI8435 is not set
-# CONFIG_IMX7D_ADC is not set
# CONFIG_AM2315 is not set
# CONFIG_BMI160_I2C is not set
# CONFIG_BMI160_SPI is not set
@@ -3088,9 +3131,21 @@ CONFIG_PA12203001=m
# CONFIG_BMC150_MAGN_I2C is not set
# CONFIG_BMC150_MAGN_SPI is not set
# CONFIG_DS1803 is not set
+# CONFIG_MAX5487 is not set
# CONFIG_MCP4131 is not set
# CONFIG_HP03 is not set
# CONFIG_HP206C is not set
+# CONFIG_DMARD06 is not set
+# CONFIG_DMARD09 is not set
+# CONFIG_MC3230 is not set
+# CONFIG_TI_ADC12138 is not set
+# CONFIG_TI_ADC161S626 is not set
+# CONFIG_AD8801 is not set
+# CONFIG_SI1145 is not set
+# CONFIG_AK8974 is not set
+# CONFIG_ZPA2326 is not set
+# CONFIG_MAXIM_THERMOCOUPLE is not set
+# CONFIG_LTC2485 is not set
# staging IIO drivers
# CONFIG_AD7291 is not set
@@ -3109,11 +3164,8 @@ CONFIG_PA12203001=m
# CONFIG_IIO_SIMPLE_DUMMY is not set
# CONFIG_ADIS16201 is not set
# CONFIG_ADIS16203 is not set
-# CONFIG_ADIS16204 is not set
# CONFIG_ADIS16209 is not set
-# CONFIG_ADIS16220 is not set
# CONFIG_ADIS16240 is not set
-# CONFIG_LIS3L02DQ is not set
# CONFIG_SCA3000 is not set
# CONFIG_AD7780 is not set
# CONFIG_AD7816 is not set
@@ -3130,16 +3182,10 @@ CONFIG_PA12203001=m
# CONFIG_AD2S1200 is not set
# CONFIG_AD2S1210 is not set
+# End sensors
-
-# CONFIG_HMC6352 is not set
-# CONFIG_BMP085 is not set
-# CONFIG_BMP085_I2C is not set
-# CONFIG_PCH_PHUB is not set
# CONFIG_USB_SWITCH_FSA9480 is not set
# CONFIG_SRAM is not set
-# CONFIG_TI_DAC7512 is not set
-# CONFIG_BMP085_SPI is not set
# CONFIG_MMA7455_SPI is not set
# CONFIG_LATTICE_ECP3_CONFIG is not set
@@ -3177,7 +3223,6 @@ CONFIG_IPMI_HANDLER=m
CONFIG_IPMI_DEVICE_INTERFACE=m
CONFIG_IPMI_WATCHDOG=m
CONFIG_IPMI_SI=m
-# CONFIG_IPMI_SI_PROBE_DEFAULTS is not set
CONFIG_IPMI_SSIF=m
CONFIG_IPMI_POWEROFF=m
@@ -3188,13 +3233,14 @@ CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_CORE=y
CONFIG_WATCHDOG_SYSFS=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
+# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set
CONFIG_SOFT_WATCHDOG=m
+CONFIG_WDAT_WDT=m
CONFIG_WDTPCI=m
# CONFIG_ACQUIRE_WDT is not set
# CONFIG_ADVANTECH_WDT is not set
# CONFIG_EUROTECH_WDT is not set
CONFIG_IB700_WDT=m
-# CONFIG_SCx200_WDT is not set
# CONFIG_60XX_WDT is not set
CONFIG_W83877F_WDT=m
CONFIG_W83627HF_WDT=m
@@ -3251,6 +3297,7 @@ CONFIG_RTC_DRV_CMOS=y
CONFIG_RTC_DRV_ABX80X=m
CONFIG_RTC_DRV_DS1307=m
CONFIG_RTC_DRV_DS1307_HWMON=y
+# CONFIG_RTC_DRV_DS1307_CENTURY is not set
CONFIG_RTC_DRV_DS1511=m
CONFIG_RTC_DRV_DS1553=m
CONFIG_RTC_DRV_DS1685_FAMILY=m
@@ -3268,6 +3315,7 @@ CONFIG_RTC_DRV_M41T80=m
CONFIG_RTC_DRV_M41T80_WDT=y
CONFIG_RTC_DRV_M48T59=m
CONFIG_RTC_DRV_MAX6900=m
+CONFIG_RTC_DRV_MAX6916=m
# CONFIG_RTC_DRV_M48T86 is not set
CONFIG_RTC_DRV_PCF2127=m
CONFIG_RTC_DRV_PCF8563=m
@@ -3326,25 +3374,9 @@ CONFIG_R3964=m
# CONFIG_APPLICOM is not set
# CONFIG_SONYPI is not set
-#
-# AGP Support
-#
-CONFIG_AGP=y
-CONFIG_AGP_ALI=y
-CONFIG_AGP_ATI=y
-CONFIG_AGP_AMD=y
-CONFIG_AGP_AMD64=y
-CONFIG_AGP_INTEL=y
-CONFIG_AGP_NVIDIA=y
-CONFIG_AGP_SIS=y
-CONFIG_AGP_SWORKS=y
-CONFIG_AGP_VIA=y
-CONFIG_AGP_EFFICEON=y
-
CONFIG_VGA_ARB=y
CONFIG_VGA_ARB_MAX_GPUS=16
-
CONFIG_DRM=m
CONFIG_DRM_ANALOGIX_ANX78XX=m
# CONFIG_DRM_ARCPGU is not set
@@ -3360,6 +3392,7 @@ CONFIG_DRM_RADEON_USERPTR=y
CONFIG_DRM_AMDGPU=m
CONFIG_DRM_AMD_ACP=y
# CONFIG_DRM_AMDGPU_CIK is not set
+# CONFIG_DRM_AMDGPU_SI is not set
CONFIG_DRM_AMDGPU_USERPTR=y
# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set
CONFIG_DRM_AMD_POWERPLAY=y
@@ -3371,6 +3404,7 @@ CONFIG_DRM_MGAG200=m # do not enable on f17 or older
CONFIG_DRM_I915=m
# CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT is not set
CONFIG_DRM_I915_USERPTR=y
+CONFIG_DRM_I915_GVT=y
CONFIG_DRM_VIA=m
CONFIG_DRM_NOUVEAU=m
CONFIG_NOUVEAU_DEBUG=5
@@ -3391,7 +3425,15 @@ CONFIG_DRM_VIRTIO_GPU=m
# CONFIG_DRM_PANEL is not set
# CONFIG_DRM_PANEL_SIMPLE is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
+# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
CONFIG_DRM_VGEM=m
+# CONFIG_DRM_SII902X is not set
+# CONFIG_DRM_TOSHIBA_TC358767 is not set
+# CONFIG_DRM_I2C_ADV7533 is not set
+# CONFIG_DRM_DUMB_VGA_DAC is not set
+# CONFIG_DRM_LEGACY is not set
+
+# CONFIG_SW_SYNC is not set
#
# PCMCIA character devices
@@ -3506,7 +3548,6 @@ CONFIG_VIDEO_SAA7164=m
CONFIG_VIDEO_TM6000=m
CONFIG_VIDEO_TM6000_ALSA=m
CONFIG_VIDEO_TM6000_DVB=m
-# CONFIG_VIDEO_TIMBERDALE is not set
# CONFIG_VIDEO_M5MOLS is not set
# CONFIG_VIDEO_TW68 is not set
# CONFIG_VIDEO_VIVID is not set
@@ -3515,6 +3556,7 @@ CONFIG_VIDEO_USBTV=m
CONFIG_VIDEO_TW686X=m
# Staging version?
# CONFIG_VIDEO_TW686X_KH is not set
+# CONFIG_VIDEO_TW5864 is not set
CONFIG_USB_VIDEO_CLASS=m
CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
@@ -3804,12 +3846,10 @@ CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
CONFIG_SND_SEQ_DUMMY=m
CONFIG_SND_SEQUENCER=y
CONFIG_SND_SEQUENCER_OSS=y
-CONFIG_SND_SEQ_RTCTIMER_DEFAULT=y
CONFIG_SND_OSSEMUL=y
CONFIG_SND_MIXER_OSS=y
CONFIG_SND_PCM_OSS=y
CONFIG_SND_PCM_OSS_PLUGINS=y
-CONFIG_SND_RTCTIMER=y
CONFIG_SND_DYNAMIC_MINORS=y
CONFIG_SND_MAX_CARDS=32
# CONFIG_SND_SUPPORT_OLD_API is not set
@@ -4033,10 +4073,9 @@ CONFIG_USB_UAS=m
#
# USB Human Interface Devices (HID)
#
-CONFIG_USB_HID=y
-
CONFIG_HID=y
+CONFIG_USB_HID=y
CONFIG_I2C_HID=m
CONFIG_HID_BATTERY_STRENGTH=y
# debugging default is y upstream now
@@ -4092,6 +4131,7 @@ CONFIG_HID_GREENASIA=m
CONFIG_HID_SMARTJOYPLUS=m
CONFIG_HID_TOPSEED=m
CONFIG_HID_THINGM=m
+CONFIG_HID_LED=m
CONFIG_HID_THRUSTMASTER=m
CONFIG_HID_XINMO=m
CONFIG_HID_ZEROPLUS=m
@@ -4104,6 +4144,7 @@ CONFIG_HID_SENSOR_ALS=m
# CONFIG_HID_SENSOR_PROX is not set
CONFIG_HID_SENSOR_ACCEL_3D=m
# CONFIG_HID_SENSOR_CUSTOM_SENSOR is not set
+CONFIG_HID_ALPS=m
CONFIG_HID_EMS_FF=m
CONFIG_HID_ELECOM=m
CONFIG_HID_ELO=m
@@ -4376,6 +4417,7 @@ CONFIG_USB_ISIGHTFW=m
CONFIG_USB_YUREX=m
CONFIG_USB_EZUSB_FX2=m
CONFIG_USB_HSIC_USB3503=m
+CONFIG_USB_HSIC_USB4604=m
# CONFIG_USB_LINK_LAYER_TEST is not set
CONFIG_USB_CHAOSKEY=m
CONFIG_UCSI=m
@@ -4410,6 +4452,7 @@ CONFIG_USB_XUSBATM=m
# CONFIG_USB_OTG is not set
# CONFIG_USB_OTG_WHITELIST is not set
CONFIG_USB_LED_TRIG=y
+CONFIG_USB_LEDS_TRIGGER_USBPORT=m
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
@@ -4502,6 +4545,7 @@ CONFIG_MFD_VIPERBOARD=m
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_TC6393XB is not set
# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_MFD_TI_LP873X is not set
# CONFIG_MFD_TIMBERDALE is not set
# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
@@ -4521,10 +4565,13 @@ CONFIG_MFD_VIPERBOARD=m
# CONFIG_MFD_WM8350 is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8994 is not set
+# CONFIG_MFD_AC100 is not set
+# CONFIG_MFD_EXYNOS_LPASS is not set
# CONFIG_TPS6507X is not set
# CONFIG_TS4800_IRQ is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
+# CONFIG_QCOM_EBI2 is not set
#
# File systems
@@ -4540,7 +4587,7 @@ CONFIG_EXT4_FS=y
CONFIG_EXT4_USE_FOR_EXT2=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
-# CONFIG_EXT4_ENCRYPTION is not set
+CONFIG_EXT4_ENCRYPTION=y
CONFIG_JBD2=y
CONFIG_FS_MBCACHE=y
CONFIG_REISERFS_FS=m
@@ -4700,6 +4747,7 @@ CONFIG_NFSD_PNFS=y
CONFIG_NFSD_BLOCKLAYOUT=y
CONFIG_NFSD_SCSILAYOUT=y
CONFIG_NFSD_V4_SECURITY_LABEL=y
+CONFIG_NFSD_FLEXFILELAYOUT=y
CONFIG_NFS_FSCACHE=y
# CONFIG_NFS_USE_LEGACY_DNS is not set
CONFIG_PNFS_OBJLAYOUT=m
@@ -4792,11 +4840,10 @@ CONFIG_UNIXWARE_DISKLABEL=y
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_CMDLINE_PARTITION is not set
-CONFIG_NLS=y
-
#
# Native Language Support
#
+CONFIG_NLS=y
CONFIG_NLS_DEFAULT="utf8"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_737=m
@@ -4903,6 +4950,8 @@ CONFIG_BOOT_PRINTK_DELAY=y
CONFIG_DEBUG_LIST=y
CONFIG_DEBUG_SHIRQ=y
CONFIG_DEBUG_DEVRES=y
+# This breaks so many things right now :(
+# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
CONFIG_DEBUG_RODATA_TEST=y
CONFIG_DEBUG_NX_TEST=m
CONFIG_DEBUG_SET_MODULE_RONX=y
@@ -4910,7 +4959,6 @@ CONFIG_DEBUG_BOOT_PARAMS=y
CONFIG_DEBUG_VM=y
# CONFIG_DEBUG_VM_VMACACHE is not set
# CONFIG_DEBUG_VM_RB is not set # revisit this if performance isn't horrible
-# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
CONFIG_LOCKUP_DETECTOR=y
# CONFIG_DEBUG_INFO_REDUCED is not set
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
@@ -4977,7 +5025,6 @@ CONFIG_SECCOMP=y
CONFIG_STRICT_DEVMEM=y
CONFIG_IO_STRICT_DEVMEM=y
-
#
# Cryptographic options
#
@@ -5036,6 +5083,7 @@ CONFIG_CRYPTO_SEED=m
CONFIG_CRYPTO_SEQIV=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_TEA=m
@@ -5053,9 +5101,12 @@ CONFIG_CRYPTO_ANSI_CPRNG=m
# CONFIG_CRYPTO_DRBG_MENU is not set
CONFIG_CRYPTO_DEV_HIFN_795X=m
CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y
+CONFIG_CRYPTO_DEV_CHELSIO=m
CONFIG_CRYPTO_PCRYPT=m
CONFIG_CRYPTO_USER=m
CONFIG_CRYPTO_RSA=m
+CONFIG_CRYPTO_DH=m
+CONFIG_CRYPTO_ECDH=m
CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_ECHAINIV=m
CONFIG_CRYPTO_POLY1305=m
@@ -5065,10 +5116,6 @@ CONFIG_CRYPTO_DRBG_HASH=y
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_KEYWRAP=m
-
-
-# Random number generation
-
#
# Library routines
#
@@ -5218,7 +5265,7 @@ CONFIG_PM_DEBUG=y
# CONFIG_DPM_WATCHDOG is not set # revisit this in debug
CONFIG_PM_TRACE=y
CONFIG_PM_TRACE_RTC=y
-# CONFIG_PM_TEST_SUSPEND is not set
+CONFIG_PM_TEST_SUSPEND=y
# CONFIG_PM_OPP is not set
# CONFIG_PM_AUTOSLEEP is not set
# CONFIG_PM_WAKELOCKS is not set
@@ -5234,11 +5281,9 @@ CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_STAT=m
+CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
-
-
# CONFIG_MOUSE_ATIXL is not set
CONFIG_RADIO_ADAPTERS=y
@@ -5274,22 +5319,27 @@ CONFIG_SND_INDIGODJX=m
CONFIG_SND_SOC=m
CONFIG_SND_SIMPLE_CARD=m
CONFIG_SND_DESIGNWARE_I2S=m
+CONFIG_SND_DESIGNWARE_PCM=m
CONFIG_SND_SOC_ALL_CODECS=m
CONFIG_SND_SOC_DMIC=m
CONFIG_SND_SOC_SPDIF=m
CONFIG_SND_DMAENGINE_PCM=m
CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_ADAU1701 is not set
+# CONFIG_SND_SOC_ADAU7002 is not set
# CONFIG_SND_SOC_AK4104 is not set
# CONFIG_SND_SOC_AK4554 is not set
# CONFIG_SND_SOC_AK4642 is not set
# CONFIG_SND_SOC_AK5386 is not set
# CONFIG_SND_SOC_AK4613 is not set
+# CONFIG_SND_SOC_BT_SCO is not set
+# CONFIG_SND_SOC_CS35L33 is not set
# CONFIG_SND_SOC_CS42L52 is not set
# CONFIG_SND_SOC_CS42L73 is not set
# CONFIG_SND_SOC_CS4270 is not set
# CONFIG_SND_SOC_CS4271 is not set
# CONFIG_SND_SOC_CS42XX8_I2C is not set
+# CONFIG_SND_SOC_CS53L30 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X is not set
# CONFIG_SND_SOC_PCM3168A_I2C is not set
@@ -5298,7 +5348,6 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_PCM512x_SPI is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
# CONFIG_SND_SOC_PCM179X_SPI is not set
-# CONFIG_SND_SOC_QCOM is not set
# CONFIG_SND_SOC_SGTL5000 is not set
# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
# CONFIG_SND_SOC_TAS5086 is not set
@@ -5341,7 +5390,6 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_TLV320AIC31XX is not set
# CONFIG_SND_SOC_TAS2552 is not set
# CONFIG_SND_SOC_CS4265 is not set
-# CONFIG_SND_SOC_IMX_ES8328 is not set
# CONFIG_SND_SOC_FSL_ASOC_CARD is not set
# CONFIG_SND_EDMA_SOC is not set
# CONFIG_SND_SOC_ARNDALE_RT5631_ALC5631 is not set
@@ -5364,7 +5412,11 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
CONFIG_SND_SOC_AMD_ACP=m
# CONFIG_SND_SOC_TAS5720 is not set
# CONFIG_SND_SOC_WM8960 is not set
-
+# CONFIG_SND_SOC_MAX98504 is not set
+# CONFIG_SND_SOC_MAX9860 is not set
+# CONFIG_SND_SOC_WM8985 is not set
+# CONFIG_SND_SOC_NAU8810 is not set
+# CONFIG_SND_SIMPLE_SCU_CARD is not set
CONFIG_BALLOON_COMPACTION=y
CONFIG_COMPACTION=y
@@ -5384,8 +5436,6 @@ CONFIG_LEDS_CLASS_FLASH=m
# CONFIG_LEDS_TLC591XX is not set
# CONFIG_LEDS_KTD2692 is not set
# CONFIG_LEDS_AAT1290 is not set
-#
-CONFIG_LEDS_DELL_NETBOOKS=m
# CONFIG_LEDS_TCA6507 is not set
# CONFIG_LEDS_LM355x is not set
# CONFIG_LEDS_OT200 is not set
@@ -5397,7 +5447,6 @@ CONFIG_LEDS_DELL_NETBOOKS=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=m
CONFIG_LEDS_TRIGGER_ONESHOT=m
-CONFIG_LEDS_TRIGGER_IDE_DISK=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
CONFIG_LEDS_TRIGGER_BACKLIGHT=m
# CONFIG_LEDS_TRIGGER_CPU is not set
@@ -5413,22 +5462,27 @@ CONFIG_LEDS_LM3530=m
# CONFIG_LEDS_IS31FL32XX is not set
CONFIG_LEDS_BLINKM=m
CONFIG_LEDS_LP3944=m
+CONFIG_LEDS_LP3952=m
CONFIG_LEDS_LT3593=m
CONFIG_LEDS_REGULATOR=m
CONFIG_LEDS_TRIGGER_GPIO=m
+CONFIG_LEDS_TRIGGER_DISK=y
CONFIG_LEDS_WM8350=m
CONFIG_LEDS_WM831X_STATUS=m
# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_IS31FL319X is not set
# Do not enable the below. They selects the fw user helper, which we don't want
# CONFIG_LEDS_LP5521 is not set
# CONFIG_LEDS_LP5523 is not set
# CONFIG_LEDS_LP5562 is not set
# CONFIG_LEDS_LP55XX_COMMON is not set
+# CONFIG_LEDS_PM8058 is not set
+CONFIG_LEDS_MLXCPLD=m
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
-CONFIG_DW_DMAC_CORE=m
CONFIG_DW_DMAC=m
+CONFIG_DW_DMAC_CORE=m
CONFIG_DW_DMAC_PCI=m
# CONFIG_IDMA64 is not set
# CONFIG_DW_DMAC_BIG_ENDIAN_IO is not set
@@ -5439,7 +5493,7 @@ CONFIG_DW_DMAC_PCI=m
CONFIG_ASYNC_TX_DMA=y
# CONFIG_HSU_DMA is not set
# CONFIG_HSU_DMA_PCI is not set
-# CONFIG_XGENE_DMA is not set
+# CONFIG_XILINX_DMA is not set
# CONFIG_INTEL_IDMA64 is not set
# CONFIG_QCOM_HIDMA_MGMT is not set
# CONFIG_QCOM_HIDMA is not set
@@ -5452,6 +5506,7 @@ CONFIG_FTRACE=y
CONFIG_DYNAMIC_FTRACE=y
# CONFIG_IRQSOFF_TRACER is not set
CONFIG_SCHED_TRACER=y
+CONFIG_HWLAT_TRACER=y
CONFIG_CONTEXT_SWITCH_TRACER=y
CONFIG_TRACER_SNAPSHOT=y
# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set
@@ -5470,7 +5525,7 @@ CONFIG_RING_BUFFER_BENCHMARK=m
CONFIG_FUNCTION_TRACER=y
CONFIG_STACK_TRACER=y
# CONFIG_FUNCTION_GRAPH_TRACER is not set
-# CONFIG_HIST_TRIGGERS is not set
+CONFIG_HIST_TRIGGERS=y
CONFIG_KPROBES=y
CONFIG_KPROBE_EVENT=y
@@ -5493,6 +5548,7 @@ CONFIG_KS0108_PORT=0x378
CONFIG_KS0108_DELAY=2
CONFIG_CFAG12864B=y
CONFIG_CFAG12864B_RATE=20
+# CONFIG_IMG_ASCII_LCD is not set
# CONFIG_PHANTOM is not set
@@ -5536,6 +5592,8 @@ CONFIG_POWER_RESET=y
# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
# CONFIG_POWER_RESET_RESTART is not set
+# CONFIG_SYSCON_REBOOT_MODE is not set
+# CONFIG_POWER_RESET_BRCMKONA is not set
# CONFIG_PDA_POWER is not set
@@ -5620,6 +5678,14 @@ CONFIG_NET_DSA_HWMON=y
CONFIG_NET_DSA_MV88E6060=m
CONFIG_NET_DSA_MV88E6XXX=m
CONFIG_NET_DSA_BCM_SF2=m
+CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y
+CONFIG_NET_DSA_QCA8K=m
+
+CONFIG_B53=m
+CONFIG_B53_SPI_DRIVER=m
+CONFIG_B53_MDIO_DRIVER=m
+CONFIG_B53_MMAP_DRIVER=m
+CONFIG_B53_SRAB_DRIVER=m
# Used by Maemo, we don't care.
# CONFIG_PHONET is not set
@@ -5651,8 +5717,12 @@ CONFIG_UWB_I1480U=m
CONFIG_STAGING=y
# CONFIG_ANDROID is not set
+# CONFIG_GREYBUS is not set
# CONFIG_STAGING_BOARD is not set
CONFIG_STAGING_MEDIA=y
+CONFIG_MEDIA_CEC=y
+# CONFIG_MEDIA_CEC_DEBUG is not set
+CONFIG_USB_PULSE8_CEC=m
# CONFIG_DVB_AS102 is not set
# CONFIG_SLICOSS is not set
# CONFIG_VIDEO_DT3155 is not set
@@ -5692,8 +5762,9 @@ CONFIG_USBIP_CORE=m
CONFIG_USBIP_VHCI_HCD=m
CONFIG_USBIP_HOST=m
CONFIG_USBIP_VUDC=m
+CONFIG_USBIP_VHCI_HC_PORTS=8
+CONFIG_USBIP_VHCI_NR_HCS=1
# CONFIG_USBIP_DEBUG is not set
-# CONFIG_INTEL_MEI is not set
# CONFIG_VT6655 is not set
# CONFIG_IPACK_BUS is not set
# CONFIG_LUSTRE_FS is not set
@@ -5708,10 +5779,10 @@ CONFIG_USBIP_VUDC=m
# CONFIG_DVB_MN88473 is not set
# CONFIG_FB_TFT is not set
# CONFIG_FB_SM750 is not set
-# CONFIG_STAGING_RDMA is not set
# CONFIG_WILC1000_SDIO is not set
# CONFIG_WILC1000_SPI is not set
# CONFIG_LNET is not set
+# CONFIG_KS7010 is not set
# END OF STAGING
#
@@ -5732,6 +5803,7 @@ CONFIG_PWM=y
# CONFIG_PWM_PCA9685 is not set
CONFIG_LSM_MMAP_MIN_ADDR=65536
+CONFIG_HARDENED_USERCOPY=y
CONFIG_STRIP_ASM_SYMS=y
@@ -5765,6 +5837,7 @@ CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
# CONFIG_EXTCON is not set
# CONFIG_EXTCON_ADC_JACK is not set
+# CONFIG_EXTCON_QCOM_SPMI_MISC is not set
# CONFIG_MEMORY is not set
CONFIG_PPS=m
@@ -5800,7 +5873,8 @@ CONFIG_I2C_DESIGNWARE_PCI=m
# CONFIG_DEBUG_GPIO is not set
# CONFIG_W1_MASTER_GPIO is not set
# CONFIG_LEDS_GPIO is not set
-CONFIG_GPIO_SYSFS=y
+# CONFIG_GPIO_SYSFS is not set
+# CONFIG_GPIO_MOCKUP is not set
# CONFIG_GPIO_GENERIC_PLATFORM is not set
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_PCA953X is not set
@@ -5826,8 +5900,6 @@ CONFIG_GPIO_VIPERBOARD=m
# CONFIG_GPIO_BT8XX is not set
# CONFIG_GPIO_SX150X is not set
# CONFIG_GPIO_GRGPIO is not set
-# CONFIG_GPIO_PL061 is not set
-# CONFIG_GPIO_BCM_KONA is not set
# CONFIG_GPIO_SCH311X is not set
# CONFIG_GPIO_DWAPB is not set
# CONFIG_GPIO_74X164 is not set
@@ -5843,12 +5915,10 @@ CONFIG_GPIO_VIPERBOARD=m
# CONFIG_GPIO_TPIC2810 is not set
# CONFIG_GPIO_MPC8XXX is not set
# CONFIG_GPIO_PISOSR is not set
-# CONFIG_GPIO_TS4800 is not set
# CONFIG_GPIO_TPS65218 is not set
# CONFIG_GPIO_104_DIO_48E is not set
# CONFIG_GPIO_WS16C48 is not set
-
-# FIXME: Why?
+# CONFIG_GPIO_TS4900 is not set
CONFIG_TEST_KSTRTOX=y
CONFIG_XZ_DEC=y
@@ -5903,6 +5973,7 @@ CONFIG_PSTORE_RAM=m
CONFIG_CHROME_PLATFORMS=y
# CONFIG_CROS_KBD_LED_BACKLIGHT is not set
+# CONFIG_GOOGLE_FIRMWARE is not set
CONFIG_BCMA=m
CONFIG_BCMA_BLOCKIO=y
@@ -5913,17 +5984,13 @@ CONFIG_BCMA_DRIVER_GMAC_CMN=y
CONFIG_BCMA_DRIVER_GPIO=y
# CONFIG_BCMA_DEBUG is not set
-# CONFIG_GOOGLE_FIRMWARE is not set
-# CONFIG_INTEL_MID_PTI is not set
CONFIG_IOMMU_SUPPORT=y
-# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
-# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
# CONFIG_MAILBOX is not set
# CONFIG_ALTERA_MBOX is not set
# CONFIG_MAILBOX_TEST is not set
-# CONFIG_RESET_CONTROLLER is not set
+# CONFIG_TI_SYSCON_RESET is not set
CONFIG_FMC=m
CONFIG_FMC_FAKEDEV=m
@@ -5939,10 +6006,8 @@ CONFIG_POWERCAP=y
# CONFIG_HSI is not set
-# CONFIG_CPU_IDLE is not set
-
-# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
-# CONFIG_ASM9260_TIMER is not set
+CONFIG_CPU_IDLE=y
+# CONFIG_CPU_IDLE_GOV_LADDER is not set
# CONFIG_HMC_DRV is not set
@@ -5976,7 +6041,6 @@ CONFIG_SYSTEM_BLACKLIST_KEYRING=y
# CONFIG_MODULE_COMPRESS is not set
# CONFIG_RTC_DRV_EFI is not set
-# CONFIG_NET_XGENE is not set
# CONFIG_GLOB_SELFTEST is not set
diff --git a/config-nodebug b/config-nodebug
index 4bd461d8f..d5ce9dd0f 100644
--- a/config-nodebug
+++ b/config-nodebug
@@ -2,102 +2,103 @@ CONFIG_SND_VERBOSE_PRINTK=y
CONFIG_SND_DEBUG=y
CONFIG_SND_PCM_XRUN_DEBUG=y
-# CONFIG_DEBUG_ATOMIC_SLEEP is not set
-
-# CONFIG_DEBUG_MUTEXES is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_DEBUG_LOCK_ALLOC is not set
-# CONFIG_LOCK_TORTURE_TEST is not set
-# CONFIG_PROVE_LOCKING is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_PROVE_RCU is not set
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_LOCK_ALLOC=y
+CONFIG_LOCK_TORTURE_TEST=m
+CONFIG_PROVE_LOCKING=y
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_PROVE_RCU=y
# CONFIG_PROVE_RCU_REPEATEDLY is not set
-# CONFIG_DEBUG_PER_CPU_MAPS is not set
+CONFIG_DEBUG_PER_CPU_MAPS=y
CONFIG_CPUMASK_OFFSTACK=y
-# CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set
+CONFIG_CPU_NOTIFIER_ERROR_INJECT=m
-# CONFIG_FAULT_INJECTION is not set
-# CONFIG_FAILSLAB is not set
-# CONFIG_FAIL_PAGE_ALLOC is not set
-# CONFIG_FAIL_MAKE_REQUEST is not set
-# CONFIG_FAULT_INJECTION_DEBUG_FS is not set
-# CONFIG_FAULT_INJECTION_STACKTRACE_FILTER is not set
-# CONFIG_FAIL_IO_TIMEOUT is not set
-# CONFIG_FAIL_MMC_REQUEST is not set
+CONFIG_FAULT_INJECTION=y
+CONFIG_FAILSLAB=y
+CONFIG_FAIL_PAGE_ALLOC=y
+CONFIG_FAIL_MAKE_REQUEST=y
+CONFIG_FAULT_INJECTION_DEBUG_FS=y
+CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
+CONFIG_FAIL_IO_TIMEOUT=y
+CONFIG_FAIL_MMC_REQUEST=y
# CONFIG_F2FS_FAULT_INJECTION is not set
-# CONFIG_LOCK_STAT is not set
+CONFIG_LOCK_STAT=y
-# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_STACK_USAGE=y
-# CONFIG_ACPI_DEBUG is not set
+CONFIG_ACPI_DEBUG=y
# CONFIG_ACPI_DEBUGGER is not set
-# CONFIG_DEBUG_SG is not set
-# CONFIG_DEBUG_PI_LIST is not set
+CONFIG_DEBUG_SG=y
+CONFIG_DEBUG_PI_LIST=y
# CONFIG_PAGE_EXTENSION is not set
# CONFIG_PAGE_OWNER is not set
# CONFIG_DEBUG_PAGEALLOC is not set
-# CONFIG_DEBUG_OBJECTS is not set
+CONFIG_DEBUG_OBJECTS=y
# CONFIG_DEBUG_OBJECTS_SELFTEST is not set
-# CONFIG_DEBUG_OBJECTS_FREE is not set
-# CONFIG_DEBUG_OBJECTS_TIMERS is not set
-# CONFIG_DEBUG_OBJECTS_RCU_HEAD is not set
+CONFIG_DEBUG_OBJECTS_FREE=y
+CONFIG_DEBUG_OBJECTS_TIMERS=y
+CONFIG_DEBUG_OBJECTS_RCU_HEAD=y
CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
CONFIG_X86_PTDUMP=y
-# CONFIG_ARM64_PTDUMP is not set
-# CONFIG_EFI_PGT_DUMP is not set
+CONFIG_ARM64_PTDUMP=y
+CONFIG_EFI_PGT_DUMP=y
+# CONFIG_EFI_TEST is not set
-# CONFIG_CAN_DEBUG_DEVICES is not set
+CONFIG_CAN_DEBUG_DEVICES=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_DEBUG_NOTIFIERS is not set
+CONFIG_DEBUG_NOTIFIERS=y
-# CONFIG_DMA_API_DEBUG is not set
+CONFIG_DMA_API_DEBUG=y
-# CONFIG_MMIOTRACE is not set
+CONFIG_MMIOTRACE=y
-# CONFIG_DEBUG_CREDENTIALS is not set
+CONFIG_DEBUG_CREDENTIALS=y
# off in both production debug and nodebug builds,
# on in rawhide nodebug builds
-# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
-# CONFIG_EXT4_DEBUG is not set
+CONFIG_EXT4_DEBUG=y
# CONFIG_XFS_WARN is not set
-# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+CONFIG_DEBUG_PERF_USE_VMALLOC=y
-# CONFIG_JBD2_DEBUG is not set
+CONFIG_JBD2_DEBUG=y
-# CONFIG_NFSD_FAULT_INJECTION is not set
+CONFIG_NFSD_FAULT_INJECTION=y
-# CONFIG_DEBUG_BLK_CGROUP is not set
+CONFIG_DEBUG_BLK_CGROUP=y
-# CONFIG_DRBD_FAULT_INJECTION is not set
+CONFIG_DRBD_FAULT_INJECTION=y
-# CONFIG_ATH_DEBUG is not set
-# CONFIG_CARL9170_DEBUGFS is not set
-# CONFIG_IWLWIFI_DEVICE_TRACING is not set
+CONFIG_ATH_DEBUG=y
+CONFIG_CARL9170_DEBUGFS=y
+CONFIG_IWLWIFI_DEVICE_TRACING=y
# CONFIG_RTLWIFI_DEBUG is not set
-# CONFIG_DEBUG_OBJECTS_WORK is not set
+CONFIG_DEBUG_OBJECTS_WORK=y
-# CONFIG_DMADEVICES_DEBUG is not set
+CONFIG_DMADEVICES_DEBUG=y
# CONFIG_DMADEVICES_VDEBUG is not set
CONFIG_PM_ADVANCED_DEBUG=y
-# CONFIG_CEPH_LIB_PRETTYDEBUG is not set
-# CONFIG_QUOTA_DEBUG is not set
+CONFIG_CEPH_LIB_PRETTYDEBUG=y
+CONFIG_QUOTA_DEBUG=y
CONFIG_KGDB_KDB=y
@@ -105,19 +106,19 @@ CONFIG_KDB_DEFAULT_ENABLE=0x0
CONFIG_KDB_KEYBOARD=y
CONFIG_KDB_CONTINUE_CATASTROPHIC=0
-# CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER is not set
+CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER=y
# CONFIG_PERCPU_TEST is not set
-# CONFIG_TEST_LIST_SORT is not set
+CONFIG_TEST_LIST_SORT=y
# CONFIG_TEST_STRING_HELPERS is not set
-# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
-# CONFIG_WQ_WATCHDOG is not set
+CONFIG_WQ_WATCHDOG=y
-# CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set
+CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
-# CONFIG_DEBUG_KMEMLEAK is not set
+CONFIG_DEBUG_KMEMLEAK=y
CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=1024
# CONFIG_DEBUG_KMEMLEAK_TEST is not set
CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y
@@ -128,4 +129,4 @@ CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y
# CONFIG_SPI_DEBUG is not set
-# CONFIG_DEBUG_VM_PGFLAGS is not set
+CONFIG_DEBUG_VM_PGFLAGS=y
diff --git a/config-powerpc64 b/config-powerpc64
index 0edf37b51..5729ee5d0 100644
--- a/config-powerpc64
+++ b/config-powerpc64
@@ -76,7 +76,6 @@ CONFIG_MACINTOSH_DRIVERS=y
CONFIG_ADB=y
CONFIG_ADB_PMU=y
CONFIG_ADB_PMU_LED=y
-CONFIG_ADB_PMU_LED_IDE=y
CONFIG_I2C_POWERMAC=y
CONFIG_PMAC_RACKMETER=m
CONFIG_PMAC_APM_EMU=m
@@ -97,6 +96,7 @@ CONFIG_WINDFARM_PM121=y
CONFIG_CPU_FREQ_PMAC64=y
CONFIG_SERIAL_PMACZILOG=m
# CONFIG_SERIAL_PMACZILOG_TTYS is not set
+CONFIG_AGP=y
CONFIG_AGP_UNINORTH=y
# CONFIG_PMAC_BACKLIGHT_LEGACY is not set
diff --git a/config-powerpc64-generic b/config-powerpc64-generic
index ba71ccec1..d67acd95a 100644
--- a/config-powerpc64-generic
+++ b/config-powerpc64-generic
@@ -69,8 +69,6 @@ CONFIG_RCU_FANOUT_LEAF=16
CONFIG_FA_DUMP=y
CONFIG_RELOCATABLE=y
-CONFIG_CPU_IDLE=y
-# CONFIG_CPU_IDLE_GOV_LADDER is not set
CONFIG_POWERNV_CPUIDLE=y
CONFIG_PSERIES_CPUIDLE=y
@@ -121,6 +119,8 @@ CONFIG_IPMI_POWERNV=m
CONFIG_RTAS_FLASH=y
CONFIG_OPAL_PRD=m
CONFIG_MTD_POWERNV_FLASH=m
+# CONFIG_HOTPLUG_PCI_POWERNV is not set
+# CONFIG_POWERNV_OP_PANEL is not set
# Power 7 and later
CONFIG_PPC_TRANSACTIONAL_MEM=y
@@ -148,7 +148,6 @@ CONFIG_IO_EVENT_IRQ=y
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
-# CONFIG_GEN_RTC_X is not set
CONFIG_RTC_DRV_GENERIC=y
# CONFIG_CMDLINE_BOOL is not set
@@ -161,6 +160,7 @@ CONFIG_SCSI_IBMVSCSI=m
CONFIG_SCSI_IPR=m
CONFIG_SCSI_IPR_TRACE=y
CONFIG_SCSI_IPR_DUMP=y
+CONFIG_SCSI_IBMVSCSIS=m
CONFIG_SERIAL_ICOM=m
# CONFIG_SERIAL_8250 is not set
@@ -183,6 +183,7 @@ CONFIG_FB_MATROX_G=y
# CONFIG_FB_VGA16 is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_ATY is not set
+# CONFIG_AGP is not set
# CONFIG_SND_SOC is not set
# CONFIG_INPUT_PCSPKR is not set
@@ -209,6 +210,7 @@ CONFIG_LEDS_TRIGGER_TIMER=m
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
CONFIG_LEDS_TRIGGER_GPIO=m
CONFIG_LEDS_POWERNV=m
+CONFIG_ADB_PMU_LED_DISK=y
CONFIG_USB_EHCI_HCD_PPC_OF=y
CONFIG_USB_OHCI_HCD_PCI=y
@@ -220,11 +222,6 @@ CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
# CONFIG_MACINTOSH_DRIVERS is not set
# CONFIG_EDAC_CPC925 is not set
-
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=m
-CONFIG_EDAC_LEGACY_SYSFS=y
-
# CONFIG_AXON_RAM is not set
CONFIG_SUSPEND_FREEZER=y
@@ -308,7 +305,6 @@ CONFIG_PPC_EMULATED_STATS=y
CONFIG_SWIOTLB=y
CONFIG_PPC_DISABLE_WERROR=y
-# CONFIG_STRICT_MM_TYPECHECKS is not set
# CONFIG_XILINX_LL_TEMAC is not set
# CONFIG_XILINX_EMACLITE is not set
@@ -374,3 +370,8 @@ CONFIG_POWER_RESET_GPIO_RESTART=y
CONFIG_FB_SSD1307=m
CONFIG_INPUT_PWM_BEEPER=m
CONFIG_BACKLIGHT_PWM=m
+
+CONFIG_CRYPT_CRC32C_VPMSUM=m
+
+# CONFIG_JUMP_LABEL_FEATURE_CHECKS is not set
+# CONFIG_JUMP_LABEL_FEATURE_CHECK_DEBUG is not set
diff --git a/config-s390x b/config-s390x
index d559c6570..8ead330ec 100644
--- a/config-s390x
+++ b/config-s390x
@@ -1,7 +1,5 @@
CONFIG_64BIT=y
-# CONFIG_MARCH_Z900 is not set
-CONFIG_MARCH_Z9_109=y
-# CONFIG_MARCH_Z990 is not set
+CONFIG_MARCH_Z10=y
CONFIG_NR_CPUS=64
CONFIG_COMPAT=y
@@ -135,6 +133,7 @@ CONFIG_CRYPTO_GHASH_S390=m
CONFIG_CRYPTO_SHA1_S390=m
CONFIG_CRYPTO_SHA256_S390=m
CONFIG_CRYPTO_SHA512_S390=m
+CONFIG_CRYPTO_CRC32_S390=m
#
# Kernel hacking
@@ -158,6 +157,7 @@ CONFIG_MONREADER=m
CONFIG_STACK_GUARD=256
CONFIG_CMM_IUCV=y
+# CONFIG_CPU_IDLE is not set
CONFIG_S390_HYPFS_FS=y
@@ -178,6 +178,7 @@ CONFIG_QETH_L3=m
CONFIG_KVM=m
# CONFIG_KVM_S390_UCONTROL is not set
CONFIG_S390_GUEST=y
+CONFIG_S390_GUEST_OLD_TRANSPORT=y
CONFIG_VIRTIO_CONSOLE=y
@@ -220,7 +221,6 @@ CONFIG_SCM_BLOCK_CLUSTER_WRITE=y
CONFIG_PCI=y
CONFIG_PCI_NR_FUNCTIONS=64
-CONFIG_PCI_NR_MSI=256
CONFIG_HOTPLUG_PCI_CPCI=y
CONFIG_HOTPLUG_PCI_SHPC=y
CONFIG_HOTPLUG_PCI_S390=y
@@ -250,8 +250,7 @@ CONFIG_HOTPLUG_PCI_S390=y
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
-# CONFIG_GAMEPORT_EMU10K1 is not set
-# CONFIG_GAMEPORT_FM801 is not set
+# CONFIG_GAMEPORT is not set
# CONFIG_SERIO is not set
# CONFIG_ACCESSIBILITY is not set
diff --git a/config-x86-32-generic b/config-x86-32-generic
index ddc9f3047..7cf7362e5 100644
--- a/config-x86-32-generic
+++ b/config-x86-32-generic
@@ -22,6 +22,7 @@ CONFIG_M686=y
# CONFIG_MWINCHIP3D is not set
# CONFIG_MCYRIXIII is not set
# CONFIG_MVIAC3_2 is not set
+# CONFIG_SCx200 is not set
# CONFIG_STA2X11 is not set
CONFIG_NR_CPUS=32
@@ -56,8 +57,6 @@ CONFIG_FB_SSD1307=m
# CONFIG_PCI_GOMMCONFIG is not set
CONFIG_PCI_GOANY=y
-CONFIG_IBM_ASM=m
-
#
# APM (Advanced Power Management) BIOS Support
#
@@ -68,7 +67,6 @@ CONFIG_APM_CPU_IDLE=y
# CONFIG_APM_DISPLAY_BLANK is not set
# CONFIG_APM_ALLOW_INTS is not set
-
# CONFIG_X86_POWERNOW_K6 is not set
CONFIG_X86_POWERNOW_K7=y
# CONFIG_X86_GX_SUSPMOD is not set
@@ -82,7 +80,6 @@ CONFIG_X86_LONGRUN=y
# e_powersaver is dangerous
# CONFIG_X86_E_POWERSAVER is not set
-
# CONFIG_4KSTACKS is not set
CONFIG_PCI_DIRECT=y
@@ -98,7 +95,7 @@ CONFIG_I2C_ALI1563=m
CONFIG_I2C_SIS5595=m
CONFIG_I2C_SIS630=m
-CONFIG_SCx200_ACB=m
+# CONFIG_SCx200_ACB is not set
# CONFIG_X86_REBOOTFIXUPS is not set
@@ -118,19 +115,16 @@ CONFIG_PHYSICAL_START=0x400000
# CONFIG_KEXEC_JUMP is not set
CONFIG_CRYPTO_AES_586=y
-CONFIG_CRYPTO_DEV_GEODE=m
CONFIG_CRYPTO_TWOFISH_586=m
CONFIG_VIDEO_CAFE_CCIC=m
-
CONFIG_MTD_NAND_CAFE=m
CONFIG_LBDAF=y
# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set
-
CONFIG_OLPC=y
CONFIG_BATTERY_OLPC=y
CONFIG_MOUSE_PS2_OLPC=y
@@ -138,17 +132,17 @@ CONFIG_OLPC_XO1_PM=y
CONFIG_OLPC_XO15_SCI=y
CONFIG_OLPC_XO1_RTC=y
CONFIG_OLPC_XO1_SCI=y
-# CONFIG_ALIX is not set
-# staging
+CONFIG_CRYPTO_DEV_GEODE=m
# CONFIG_FB_OLPC_DCON is not set
+# CONFIG_ALIX is not set
+
# CONFIG_SPARSE_IRQ is not set
CONFIG_RCU_FANOUT=32
# CONFIG_X86_ANCIENT_MCE is not set
-
CONFIG_I2C_PXA=m
# CONFIG_INTEL_TXT is not set
@@ -167,8 +161,6 @@ CONFIG_X86_32_IRIS=m
CONFIG_POWER_RESET_GPIO=y
# CONFIG_POWER_RESET_GPIO_RESTART is not set
-
-
CONFIG_MTD_OF_PARTS=y
CONFIG_MTD_PHYSMAP_OF=m
CONFIG_SERIAL_OF_PLATFORM=m
@@ -206,10 +198,7 @@ CONFIG_OF=y
# CONFIG_MLX5_INFINIBAND is not set
# CONFIG_PINCTRL_SINGLE is not set
# CONFIG_PINCTRL_BCM281XX is not set
-# CONFIG_PINCTRL_APQ8064 is not set
-# CONFIG_PINCTRL_IPQ8064 is not set
# CONFIG_COMMON_CLK_SI570 is not set
-# CONFIG_COMMON_CLK_QCOM is not set
# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
# CONFIG_KEYBOARD_BCM is not set
diff --git a/config-x86-generic b/config-x86-generic
index 8ae20bab7..06b844710 100644
--- a/config-x86-generic
+++ b/config-x86-generic
@@ -19,7 +19,6 @@ CONFIG_MICROCODE_AMD=y
CONFIG_PERF_EVENTS_AMD_POWER=m
CONFIG_PERF_EVENTS_INTEL_UNCORE=m
CONFIG_PERF_EVENTS_INTEL_RAPL=m
-CONFIG_PERF_EVENTS_CSTATE=m
CONFIG_PERF_EVENTS_INTEL_CSTATE=m
CONFIG_X86_MSR=y
@@ -86,7 +85,6 @@ CONFIG_ACPI_BUTTON=y
CONFIG_ACPI_CONTAINER=y
CONFIG_ACPI_DOCK=y
CONFIG_ACPI_FAN=y
-CONFIG_ACPI_NUMA=y
CONFIG_ACPI_PROCESSOR=y
CONFIG_ACPI_PROCFS=y
CONFIG_ACPI_SBS=m
@@ -94,7 +92,7 @@ CONFIG_ACPI_SLEEP=y
CONFIG_ACPI_THERMAL=y
CONFIG_ACPI_TOSHIBA=m
CONFIG_ACPI_VIDEO=m
-CONFIG_ACPI_INITRD_TABLE_OVERRIDE=y
+CONFIG_ACPI_CONFIGFS=m
# FIXME: Next two are deprecated. Remove them when they disappear upstream
# CONFIG_ACPI_PROCFS_POWER is not set
CONFIG_PNPACPI=y
@@ -105,6 +103,7 @@ CONFIG_ACPI_APEI_PCIEAER=y
CONFIG_ACPI_APEI_GHES=y
CONFIG_ACPI_APEI_MEMORY_FAILURE=y
# CONFIG_ACPI_APEI_EINJ is not set
+CONFIG_DPTF_POWER=m
CONFIG_ACPI_IPMI=m
CONFIG_ACPI_CUSTOM_METHOD=m
CONFIG_ACPI_BGRT=y
@@ -116,11 +115,12 @@ CONFIG_INTEL_SOC_PMIC=y
CONFIG_PMIC_OPREGION=y
CONFIG_CRC_PMIC_OPREGION=y
CONFIG_XPOWER_PMIC_OPREGION=y
+CONFIG_BXT_WC_PMIC_OPREGION=y
CONFIG_GPIO_CRYSTAL_COVE=y
CONFIG_AXP288_ADC=y
CONFIG_AXP288_FUEL_GAUGE=y
-# CONFIG_PWM_CRC is not set
-
+CONFIG_PWM_CRC=y
+CONFIG_GPIO_WHISKEY_COVE=y
CONFIG_X86_INTEL_PSTATE=y
CONFIG_X86_ACPI_CPUFREQ=m
@@ -154,9 +154,12 @@ CONFIG_PCI_MMCONFIG=y
CONFIG_PCI_BIOS=y
CONFIG_VMD=m
+CONFIG_INTEL_BXT_PMIC_THERMAL=m
+
CONFIG_HOTPLUG_PCI_COMPAQ=m
# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
CONFIG_HOTPLUG_PCI_IBM=m
+CONFIG_IBM_ASM=m
CONFIG_IPW2100=m
CONFIG_IPW2100_MONITOR=y
@@ -191,10 +194,7 @@ CONFIG_I2C_DESIGNWARE_BAYTRAIL=y
# CONFIG_DELL_RBU is not set
CONFIG_DCDBAS=m
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=m
-# CONFIG_EDAC_AMD64_ERROR_INJECTION is not set
-CONFIG_EDAC_AMD64=m
+# CONFIG_EDAC_AMD64 is not set
CONFIG_EDAC_AMD76X=m
CONFIG_EDAC_AMD8111=m
CONFIG_EDAC_AMD8131=m
@@ -213,7 +213,6 @@ CONFIG_EDAC_I7CORE=m
CONFIG_EDAC_R82600=m
CONFIG_EDAC_X38=m
CONFIG_EDAC_DECODE_MCE=m
-CONFIG_EDAC_LEGACY_SYSFS=y
CONFIG_EDAC_IE31200=m
CONFIG_SCHED_MC=y
@@ -243,6 +242,7 @@ CONFIG_FUJITSU_TABLET=m
CONFIG_FUJITSU_LAPTOP=m
# CONFIG_FUJITSU_LAPTOP_DEBUG is not set
CONFIG_IDEAPAD_LAPTOP=m
+CONFIG_INTEL_VBTN=m
CONFIG_INTEL_HID_EVENT=m
CONFIG_MSI_LAPTOP=m
CONFIG_PANASONIC_LAPTOP=m
@@ -274,6 +274,22 @@ CONFIG_PVPANIC=m
# CONFIG_TOUCHSCREEN_INTEL_MID is not set
CONFIG_TOUCHSCREEN_GOODIX=m
+CONFIG_TOUCHSCREEN_SURFACE3_SPI=m
+
+#
+# AGP Support
+#
+CONFIG_AGP=y
+CONFIG_AGP_ALI=y
+CONFIG_AGP_ATI=y
+CONFIG_AGP_AMD=y
+CONFIG_AGP_AMD64=y
+CONFIG_AGP_INTEL=y
+CONFIG_AGP_NVIDIA=y
+CONFIG_AGP_SIS=y
+CONFIG_AGP_SWORKS=y
+CONFIG_AGP_VIA=y
+CONFIG_AGP_EFFICEON=y
# CONFIG_SMSC37B787_WDT is not set
CONFIG_VIA_WDT=m
@@ -341,11 +357,6 @@ CONFIG_SPI_PXA2XX=m
CONFIG_MTD_ESB2ROM=m
CONFIG_MTD_CK804XROM=m
-CONFIG_CPU_IDLE=y
-# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set
-# CONFIG_CPU_IDLE_GOV_LADDER is not set
-CONFIG_CPU_IDLE_GOV_MENU=y
-
CONFIG_THINKPAD_ACPI=m
# CONFIG_THINKPAD_ACPI_DEBUG is not set
# CONFIG_THINKPAD_ACPI_DEBUGFACILITIES is not set
@@ -354,6 +365,8 @@ CONFIG_THINKPAD_ACPI_VIDEO=y
CONFIG_THINKPAD_ACPI_ALSA_SUPPORT=y
# CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set
+CONFIG_LEDS_DELL_NETBOOKS=m
+
CONFIG_MACINTOSH_DRIVERS=y
CONFIG_DMIID=y
@@ -365,11 +378,21 @@ CONFIG_ISCSI_IBFT=m
CONFIG_INTEL_IOATDMA=m
CONFIG_INTEL_IDMA64=m
-CONFIG_SENSORS_I5K_AMB=m
-CONFIG_SENSORS_FAM15H_POWER=m
+CONFIG_SENSORS_ABITUGURU=m
+CONFIG_SENSORS_ABITUGURU3=m
CONFIG_SENSORS_ACPI_POWER=m
-CONFIG_SENSORS_I5500=m
+CONFIG_SENSORS_APPLESMC=m
+CONFIG_SENSORS_ASB100=m
+CONFIG_SENSORS_ATK0110=m
+CONFIG_SENSORS_CORETEMP=m
CONFIG_SENSORS_DELL_SMM=m
+CONFIG_SENSORS_FAM15H_POWER=m
+CONFIG_SENSORS_FSCHMD=m
+CONFIG_SENSORS_I5K_AMB=m
+CONFIG_SENSORS_I5500=m
+CONFIG_SENSORS_K8TEMP=m
+CONFIG_SENSORS_K10TEMP=m
+CONFIG_SENSORS_VIA_CPUTEMP=m
# CONFIG_CPA_DEBUG is not set
@@ -381,7 +404,7 @@ CONFIG_SP5100_TCO=m
# CONFIG_MEMTEST is not set
# CONFIG_DEBUG_TLBFLUSH is not set
-# CONFIG_MAXSMP is not set
+CONFIG_MAXSMP=y
CONFIG_HP_ILO=m
@@ -461,7 +484,6 @@ CONFIG_INTEL_PMC_CORE=y
CONFIG_VIDEO_VIA_CAMERA=m
-CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_X86_RESERVE_LOW=64
# CONFIG_IRQ_DOMAIN_DEBUG is not set
@@ -565,10 +587,10 @@ CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m
CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m
CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m
CONFIG_SND_SOC_INTEL_BXT_RT298_MACH=m
+CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH=m
+CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=m
CONFIG_SND_SOC_AC97_CODEC=m
# CONFIG_SND_SOC_TAS571X is not set
-# CONFIG_SND_SUN4I_CODEC is not set
-# CONFIG_SND_SUN4I_SPDIF is not set
CONFIG_INTEL_POWERCLAMP=m
CONFIG_X86_PKG_TEMP_THERMAL=m
@@ -602,4 +624,3 @@ CONFIG_PCH_CAN=m
# CONFIG_X86_DEBUG_FPU is not set
# CONFIG_PUNIT_ATOM_DEBUG is not set
-# CONFIG_AMD_MCE_INJ is not set
diff --git a/config-x86_64-generic b/config-x86_64-generic
index 0614913aa..2496f8539 100644
--- a/config-x86_64-generic
+++ b/config-x86_64-generic
@@ -4,19 +4,26 @@ CONFIG_64BIT=y
# CONFIG_MK8 is not set
# CONFIG_MPSC is not set
CONFIG_GENERIC_CPU=y
+# Turn this on to see what exciting things we find
+CONFIG_VMAP_STACK=y
# CONFIG_X86_VSMP is not set
CONFIG_X86_UV=y
CONFIG_UV_MMTIMER=m
CONFIG_NUMA=y
+CONFIG_ACPI_NUMA=y
CONFIG_AMD_NUMA=y
CONFIG_X86_64_ACPI_NUMA=y
CONFIG_ACPI_NFIT=m
# CONFIG_ACPI_NFIT_DEBUG is not set
# CONFIG_NUMA_EMU is not set
CONFIG_X86_NUMACHIP=y
-CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
CONFIG_NUMA_BALANCING=y
+CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
+
+CONFIG_MLX_PLATFORM=m
+
+CONFIG_INTEL_ISH_HID=m
# https://lists.fedoraproject.org/pipermail/kernel/2013-November/004601.html
CONFIG_NR_CPUS=1024
@@ -28,6 +35,7 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y
+CONFIG_RANDOMIZE_MEMORY=y
# enable the 32-bit entry point for Baytrail
CONFIG_EFI_MIXED=y
@@ -35,7 +43,6 @@ CONFIG_IA32_EMULATION=y
# CONFIG_IA32_AOUT is not set
CONFIG_AMD_IOMMU=y
-CONFIG_AMD_IOMMU_STATS=y
CONFIG_AMD_IOMMU_V2=m
# CONFIG_IOMMU_DEBUG is not set
CONFIG_SWIOTLB=y
@@ -80,6 +87,8 @@ CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m
CONFIG_CRYPTO_SHA1_SSSE3=m
CONFIG_CRYPTO_SHA256_SSSE3=m
CONFIG_CRYPTO_SHA512_SSSE3=m
+CONFIG_CRYPTO_SHA256_MB=m
+CONFIG_CRYPTO_SHA512_MB=m
CONFIG_CRYPTO_BLOWFISH_X86_64=m
CONFIG_CRYPTO_TWOFISH_X86_64_3WAY=m
CONFIG_CRYPTO_CAMELLIA_X86_64=m
@@ -106,6 +115,7 @@ CONFIG_CRYPTO_CHACHA20_X86_64=m
CONFIG_EDAC_AMD64=m
# CONFIG_EDAC_AMD64_ERROR_INJECTION is not set
CONFIG_EDAC_SBRIDGE=m
+CONFIG_EDAC_SKX=m
# CONFIG_PC8736x_GPIO is not set
@@ -228,9 +238,9 @@ CONFIG_ND_PFN=m
CONFIG_DEV_DAX=m
CONFIG_DEV_DAX_PMEM=m
+CONFIG_NR_DEV_DAX=32768
# Staging
-CONFIG_STAGING_RDMA=y
CONFIG_INFINIBAND_HFI1=m
# CONFIG_HFI1_DEBUG_SDMA_ORDER is not set
CONFIG_HFI1_VERBS_31BIT_PSN=y
diff --git a/crash-driver.patch b/crash-driver.patch
index d88138440..715ec54e8 100644
--- a/crash-driver.patch
+++ b/crash-driver.patch
@@ -1,3 +1,4 @@
+From 973e23bf27b0b2e5021321357fc570cccea3104c Mon Sep 17 00:00:00 2001
From: Dave Anderson <anderson@redhat.com>
Date: Tue, 26 Nov 2013 12:42:46 -0500
Subject: [PATCH] crash-driver
@@ -29,7 +30,7 @@ Upstream-status: Fedora mustard
diff --git a/arch/arm/include/asm/crash-driver.h b/arch/arm/include/asm/crash-driver.h
new file mode 100644
-index 000000000000..06e7ae916601
+index 0000000..06e7ae9
--- /dev/null
+++ b/arch/arm/include/asm/crash-driver.h
@@ -0,0 +1,6 @@
@@ -41,7 +42,7 @@ index 000000000000..06e7ae916601
+#endif /* _ARM_CRASH_H */
diff --git a/arch/arm64/include/asm/crash-driver.h b/arch/arm64/include/asm/crash-driver.h
new file mode 100644
-index 000000000000..43b26da0c5d6
+index 0000000..43b26da
--- /dev/null
+++ b/arch/arm64/include/asm/crash-driver.h
@@ -0,0 +1,6 @@
@@ -53,7 +54,7 @@ index 000000000000..43b26da0c5d6
+#endif /* _ARM64_CRASH_H */
diff --git a/arch/ia64/include/asm/crash-driver.h b/arch/ia64/include/asm/crash-driver.h
new file mode 100644
-index 000000000000..404bcb93c112
+index 0000000..404bcb9
--- /dev/null
+++ b/arch/ia64/include/asm/crash-driver.h
@@ -0,0 +1,90 @@
@@ -148,22 +149,19 @@ index 000000000000..404bcb93c112
+
+#endif /* _ASM_IA64_CRASH_H */
diff --git a/arch/ia64/kernel/ia64_ksyms.c b/arch/ia64/kernel/ia64_ksyms.c
-index 096731049538..e88887827906 100644
+index d111248..b14b4c6 100644
--- a/arch/ia64/kernel/ia64_ksyms.c
+++ b/arch/ia64/kernel/ia64_ksyms.c
-@@ -84,6 +84,9 @@ EXPORT_SYMBOL(ia64_save_scratch_fpregs);
- #include <asm/unwind.h>
- EXPORT_SYMBOL(unw_init_running);
-
+@@ -9,3 +9,6 @@
+ EXPORT_SYMBOL(min_low_pfn); /* defined by bootmem.c, but not exported by generic code */
+ EXPORT_SYMBOL(max_low_pfn); /* defined by bootmem.c, but not exported by generic code */
+ #endif
++
+#include <linux/efi.h>
+EXPORT_SYMBOL_GPL(efi_mem_type);
-+
- #if defined(CONFIG_IA64_ESI) || defined(CONFIG_IA64_ESI_MODULE)
- extern void esi_call_phys (void);
- EXPORT_SYMBOL_GPL(esi_call_phys);
diff --git a/arch/powerpc/include/asm/crash-driver.h b/arch/powerpc/include/asm/crash-driver.h
new file mode 100644
-index 000000000000..50092d965dc5
+index 0000000..50092d9
--- /dev/null
+++ b/arch/powerpc/include/asm/crash-driver.h
@@ -0,0 +1,6 @@
@@ -175,7 +173,7 @@ index 000000000000..50092d965dc5
+#endif /* _PPC64_CRASH_H */
diff --git a/arch/s390/include/asm/crash-driver.h b/arch/s390/include/asm/crash-driver.h
new file mode 100644
-index 000000000000..552be5e2c571
+index 0000000..552be5e
--- /dev/null
+++ b/arch/s390/include/asm/crash-driver.h
@@ -0,0 +1,60 @@
@@ -240,10 +238,10 @@ index 000000000000..552be5e2c571
+
+#endif /* _S390_CRASH_H */
diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c
-index 8a993a53fcd6..8f511795b52e 100644
+index 792f9c6..3197995 100644
--- a/arch/s390/mm/maccess.c
+++ b/arch/s390/mm/maccess.c
-@@ -197,6 +197,7 @@ void *xlate_dev_mem_ptr(phys_addr_t addr)
+@@ -201,6 +201,7 @@ void *xlate_dev_mem_ptr(phys_addr_t addr)
put_online_cpus();
return bounce;
}
@@ -251,14 +249,14 @@ index 8a993a53fcd6..8f511795b52e 100644
/*
* Free converted buffer for /dev/mem access (if necessary)
-@@ -206,3 +207,4 @@ void unxlate_dev_mem_ptr(phys_addr_t addr, void *buf)
+@@ -210,3 +211,4 @@ void unxlate_dev_mem_ptr(phys_addr_t addr, void *buf)
if ((void *) addr != buf)
free_page((unsigned long) buf);
}
+EXPORT_SYMBOL_GPL(unxlate_dev_mem_ptr);
diff --git a/arch/x86/include/asm/crash-driver.h b/arch/x86/include/asm/crash-driver.h
new file mode 100644
-index 000000000000..fd4736ec99f5
+index 0000000..fd4736e
--- /dev/null
+++ b/arch/x86/include/asm/crash-driver.h
@@ -0,0 +1,6 @@
@@ -269,7 +267,7 @@ index 000000000000..fd4736ec99f5
+
+#endif /* _X86_CRASH_H */
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
-index a043107da2af..b272397f306a 100644
+index dcc0973..99b99d5 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -4,6 +4,9 @@
@@ -283,18 +281,18 @@ index a043107da2af..b272397f306a 100644
config DEVMEM
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
-index d8a7579300d2..31c83630f593 100644
+index 6e6c244..29cc9c8 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -60,3 +60,5 @@ js-rtc-y = rtc.o
-
obj-$(CONFIG_TILE_SROM) += tile-srom.o
obj-$(CONFIG_XILLYBUS) += xillybus/
+ obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o
+
+obj-$(CONFIG_CRASH) += crash.o
diff --git a/drivers/char/crash.c b/drivers/char/crash.c
new file mode 100644
-index 000000000000..085378a1d539
+index 0000000..085378a
--- /dev/null
+++ b/drivers/char/crash.c
@@ -0,0 +1,128 @@
@@ -428,7 +426,7 @@ index 000000000000..085378a1d539
+MODULE_LICENSE("GPL");
diff --git a/include/asm-generic/crash-driver.h b/include/asm-generic/crash-driver.h
new file mode 100644
-index 000000000000..25ab9869d566
+index 0000000..25ab986
--- /dev/null
+++ b/include/asm-generic/crash-driver.h
@@ -0,0 +1,72 @@
@@ -504,3 +502,221 @@ index 000000000000..25ab9869d566
+#endif /* __KERNEL__ */
+
+#endif /* __CRASH_H__ */
+--
+2.7.4
+
+From 23d8bd48303acda2d3a95a3e1a662784a4fa9fcd Mon Sep 17 00:00:00 2001
+From: Fedora Kernel Team <kernel-team@fedoraproject.org>
+Date: Tue, 20 Sep 2016 19:39:46 +0200
+Subject: [PATCH] Update of crash driver to handle CONFIG_HARDENED_USERCOPY and
+ to restrict the supported architectures.
+
+---
+ drivers/char/Kconfig | 1 +
+ drivers/char/crash.c | 33 ++++++++++++++++++++++++++++++---
+ 2 files changed, 31 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
+index 99b99d5..be6a3ae 100644
+--- a/drivers/char/Kconfig
++++ b/drivers/char/Kconfig
+@@ -6,6 +6,7 @@ menu "Character devices"
+
+ config CRASH
+ tristate "Crash Utility memory driver"
++ depends on X86_32 || X86_64 || ARM || ARM64 || PPC64 || S390
+
+ source "drivers/tty/Kconfig"
+
+diff --git a/drivers/char/crash.c b/drivers/char/crash.c
+index 085378a..0258bf8 100644
+--- a/drivers/char/crash.c
++++ b/drivers/char/crash.c
+@@ -32,7 +32,7 @@
+ #include <asm/types.h>
+ #include <asm/crash-driver.h>
+
+-#define CRASH_VERSION "1.0"
++#define CRASH_VERSION "1.2"
+
+ /*
+ * These are the file operation functions that allow crash utility
+@@ -66,6 +66,7 @@ crash_read(struct file *file, char *buf, size_t count, loff_t *poff)
+ struct page *page;
+ u64 offset;
+ ssize_t read;
++ char *buffer = file->private_data;
+
+ offset = *poff;
+ if (offset >> PAGE_SHIFT != (offset+count-1) >> PAGE_SHIFT)
+@@ -74,8 +75,12 @@ crash_read(struct file *file, char *buf, size_t count, loff_t *poff)
+ vaddr = map_virtual(offset, &page);
+ if (!vaddr)
+ return -EFAULT;
+-
+- if (copy_to_user(buf, vaddr, count)) {
++ /*
++ * Use bounce buffer to bypass the CONFIG_HARDENED_USERCOPY
++ * kernel text restriction.
++ */
++ memcpy(buffer, (char *)vaddr, count);
++ if (copy_to_user(buf, buffer, count)) {
+ unmap_virtual(page);
+ return -EFAULT;
+ }
+@@ -86,10 +91,32 @@ crash_read(struct file *file, char *buf, size_t count, loff_t *poff)
+ return read;
+ }
+
++static int
++crash_open(struct inode * inode, struct file * filp)
++{
++ if (!capable(CAP_SYS_RAWIO))
++ return -EPERM;
++
++ filp->private_data = (void *)__get_free_page(GFP_KERNEL);
++ if (!filp->private_data)
++ return -ENOMEM;
++
++ return 0;
++}
++
++static int
++crash_release(struct inode *inode, struct file *filp)
++{
++ free_pages((unsigned long)filp->private_data, 0);
++ return 0;
++}
++
+ static struct file_operations crash_fops = {
+ .owner = THIS_MODULE,
+ .llseek = crash_llseek,
+ .read = crash_read,
++ .open = crash_open,
++ .release = crash_release,
+ };
+
+ static struct miscdevice crash_dev = {
+--
+2.7.4
+
+From: Dave Anderson <anderson@redhat.com>
+Date: Fri, 18 Nov 2016 11:52:35 -0500
+Cc: onestero@redhat.com
+Subject: [PATCH v2] Restore live system crash analysis for ARM64
+
+This v2 version simplifies the copy out of the kimage_voffset value
+to user-space per Oleg's suggestion.
+
+Upstream status: N/A
+
+Test: v2 version tested successfully with a modified crash utility
+
+The following Linux 4.6 commit breaks support for live system
+crash analysis on ARM64:
+
+ commit a7f8de168ace487fa7b88cb154e413cf40e87fc6
+ Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+ arm64: allow kernel Image to be loaded anywhere in physical memory
+
+The patchset drastically modified the kernel's virtual memory layout,
+where notably the static kernel text and data image was moved from the
+unity mapped region into the vmalloc region. Prior to Linux 4.6,
+the kernel's __virt_to_phys() function was this:
+
+ #define __virt_to_phys(x) (((phys_addr_t)(x) - PAGE_OFFSET + PHYS_OFFSET))
+
+When running on a live system, the crash utility could determine PAGE_OFFSET
+by looking at the virtual addresses compiled into the vmlinux file, and
+PHYS_OFFSET can be determined by looking at /proc/iomem.
+
+As of Linux 4.6, it is done differently:
+
+ #define __virt_to_phys(x) ({ \
+ phys_addr_t __x = (phys_addr_t)(x); \
+ __x & BIT(VA_BITS - 1) ? (__x & ~PAGE_OFFSET) + PHYS_OFFSET : \
+ (__x - kimage_voffset); })
+
+The PAGE_OFFSET/PHYS_OFFSET section of the conditional expression is for
+traditional unity-mapped virtual addresses, but kernel text and static
+data requires the new "kimage_voffset" variable. Unfortunately, the
+contents of the new "kimage_voffset" variable is not available or
+calculatable from a user-space perspective, even with root privileges.
+
+At least the ARM64 developers made its contents available to modules
+with an EXPORT_SYMBOL(kimage_voffset) declaration. Accordingly, with
+a modification to the /dev/crash driver to return its contents, the
+crash utility can run on a live system.
+
+The patch allows for architecture-specific DEV_CRASH_ARCH_DATA ioctls
+to be created, where this is the first instance of one.
+
+
+---
+ arch/arm64/include/asm/crash-driver.h | 16 ++++++++++++++++
+ drivers/char/crash.c | 13 ++++++++++++-
+ 2 files changed, 28 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm64/include/asm/crash-driver.h b/arch/arm64/include/asm/crash-driver.h
+index 43b26da..fe68e7c 100644
+--- a/arch/arm64/include/asm/crash-driver.h
++++ b/arch/arm64/include/asm/crash-driver.h
+@@ -3,4 +3,20 @@
+
+ #include <asm-generic/crash-driver.h>
+
++#define DEV_CRASH_ARCH_DATA _IOR('c', 1, long)
++
++static long
++crash_arch_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
++{
++ extern u64 kimage_voffset;
++
++ switch (cmd)
++ {
++ case DEV_CRASH_ARCH_DATA:
++ return put_user(kimage_voffset, (unsigned long __user *)arg);
++ default:
++ return -EINVAL;
++ }
++}
++
+ #endif /* _ARM64_CRASH_H */
+diff --git a/drivers/char/crash.c b/drivers/char/crash.c
+index 0258bf8..dfb767c 100644
+--- a/drivers/char/crash.c
++++ b/drivers/char/crash.c
+@@ -32,7 +32,7 @@
+ #include <asm/types.h>
+ #include <asm/crash-driver.h>
+
+-#define CRASH_VERSION "1.2"
++#define CRASH_VERSION "1.3"
+
+ /*
+ * These are the file operation functions that allow crash utility
+@@ -111,10 +111,21 @@ crash_release(struct inode *inode, struct file *filp)
+ return 0;
+ }
+
++static long
++crash_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
++{
++#ifdef DEV_CRASH_ARCH_DATA
++ return crash_arch_ioctl(file, cmd, arg);
++#else
++ return -EINVAL;
++#endif
++}
++
+ static struct file_operations crash_fops = {
+ .owner = THIS_MODULE,
+ .llseek = crash_llseek,
+ .read = crash_read,
++ .unlocked_ioctl = crash_ioctl,
+ .open = crash_open,
+ .release = crash_release,
+ };
+--
+1.8.3.1
+
diff --git a/disable-CONFIG_EXPERT-for-ZONE_DMA.patch b/disable-CONFIG_EXPERT-for-ZONE_DMA.patch
deleted file mode 100644
index 784cf2035..000000000
--- a/disable-CONFIG_EXPERT-for-ZONE_DMA.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 78bd7226c92c8309d1c6c1378f1224dcd591b49f Mon Sep 17 00:00:00 2001
-From: Fedora Kernel Team <kernel-team@fedoraproject.org>
-Date: Fri, 22 Jan 2016 13:03:36 -0600
-Subject: [PATCH] Make ZONE_DMA not depend on CONFIG_EXPERT
-
-Disable the requirement on CONFIG_EXPERT for ZONE_DMA and ZONE_DEVICE so
-that we can enable NVDIMM_PFN and ND_PFN
-
-Signed-off-by: Justin Forbes <jforbes@fedoraproject.org>
----
- arch/x86/Kconfig | 2 +-
- mm/Kconfig | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
-index 3c74b549ea9a..8a5b7b8cc425 100644
---- a/arch/x86/Kconfig
-+++ b/arch/x86/Kconfig
-@@ -318,7 +318,7 @@ source "kernel/Kconfig.freezer"
- menu "Processor type and features"
-
- config ZONE_DMA
-- bool "DMA memory allocation support" if EXPERT
-+ bool "DMA memory allocation support"
- default y
- help
- DMA memory allocation support allows devices with less than 32-bit
-diff --git a/mm/Kconfig b/mm/Kconfig
-index 05efa6a5199e..c1a01e50c293 100644
---- a/mm/Kconfig
-+++ b/mm/Kconfig
-@@ -650,7 +650,7 @@ config IDLE_PAGE_TRACKING
- See Documentation/vm/idle_page_tracking.txt for more details.
-
- config ZONE_DEVICE
-- bool "Device memory (pmem, etc...) hotplug support" if EXPERT
-+ bool "Device memory (pmem, etc...) hotplug support"
- depends on MEMORY_HOTPLUG
- depends on MEMORY_HOTREMOVE
- depends on SPARSEMEM_VMEMMAP
---
-2.5.0
-
diff --git a/drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch b/drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch
deleted file mode 100644
index 562d20eb5..000000000
--- a/drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From patchwork Fri Jul 8 15:37:35 2016
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: drm/amdgpu: Disable RPM helpers while reprobing connectors on resume
-From: cpaul@redhat.com
-X-Patchwork-Id: 97837
-Message-Id: <1467992256-23832-1-git-send-email-cpaul@redhat.com>
-To: amd-gfx@lists.freedesktop.org
-Cc: Tom St Denis <tom.stdenis@amd.com>, Jammy Zhou <Jammy.Zhou@amd.com>,
- open list <linux-kernel@vger.kernel.org>, stable@vger.kernel.org,
- "open list:RADEON and AMDGPU DRM DRIVERS"
- <dri-devel@lists.freedesktop.org>,
- Alex Deucher <alexander.deucher@amd.com>, Lyude <cpaul@redhat.com>,
- Flora Cui <Flora.Cui@amd.com>,
- =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>,
- Monk Liu <Monk.Liu@amd.com>
-Date: Fri, 8 Jul 2016 11:37:35 -0400
-
-Just about all of amdgpu's connector probing functions try to acquire
-runtime PM refs. If we try to do this in the context of
-amdgpu_resume_kms by calling drm_helper_hpd_irq_event(), we end up
-deadlocking the system.
-
-Since we're guaranteed to be holding the spinlock for RPM in
-amdgpu_resume_kms, and we already know the GPU is in working order, we
-need to prevent the RPM helpers from trying to run during the initial
-connector reprobe on resume.
-
-There's a couple of solutions I've explored for fixing this, but this
-one by far seems to be the simplest and most reliable (plus I'm pretty
-sure that's what disable_depth is there for anyway).
-
-Reproduction recipe:
- - Get any laptop dual GPUs using PRIME
- - Make sure runtime PM is enabled for amdgpu
- - Boot the machine
- - If the machine managed to boot without hanging, switch out of X to
- another VT. This should definitely cause X to hang infinitely.
-
-Cc: stable@vger.kernel.org
-Signed-off-by: Lyude <cpaul@redhat.com>
----
- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
-index 6e92008..46c1fee 100644
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
-@@ -1841,7 +1841,19 @@ int amdgpu_resume_kms(struct drm_device *dev, bool resume, bool fbcon)
- }
-
- drm_kms_helper_poll_enable(dev);
-+
-+ /*
-+ * Most of the connector probing functions try to acquire runtime pm
-+ * refs to ensure that the GPU is powered on when connector polling is
-+ * performed. Since we're calling this from a runtime PM callback,
-+ * trying to acquire rpm refs will cause us to deadlock.
-+ *
-+ * Since we're guaranteed to be holding the rpm lock, it's safe to
-+ * temporarily disable the rpm helpers so this doesn't deadlock us.
-+ */
-+ dev->dev->power.disable_depth++;
- drm_helper_hpd_irq_event(dev);
-+ dev->dev->power.disable_depth--;
-
- if (fbcon) {
- amdgpu_fbdev_set_suspend(adev, 0);
diff --git a/drm-i915-Acquire-audio-powerwell-for-HD-Audio-regist.patch b/drm-i915-Acquire-audio-powerwell-for-HD-Audio-regist.patch
deleted file mode 100644
index a5dc6f3a2..000000000
--- a/drm-i915-Acquire-audio-powerwell-for-HD-Audio-regist.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 74f829a6e44fe217b6161f8935524fc807be0648 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Sat, 9 Jul 2016 11:01:20 +0100
-Subject: [PATCH] drm/i915: Acquire audio powerwell for HD-Audio registers
-
-On Haswell/Broadwell, the HD-Audio block is inside the HDMI/display
-power well and so the sna-hda audio codec acquires the display power
-well while it is operational. However, Skylake separates the powerwells
-again, but yet we still need the audio powerwell to setup the registers.
-(But then the hardware uses those registers even while powered off???)
-
-v2: Grab both rpm wakelock and audio wakelock
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96214
-Fixes: 03b135cebc47 "ALSA: hda - remove dependency on i915 power well for SKL")
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Libin Yang <libin.yang@intel.com>
-Cc: Takashi Iwai <tiwai@suse.de>
-Cc: Marius Vlad <marius.c.vlad@intel.com>
----
- drivers/gpu/drm/i915/intel_audio.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
-index 5d5f6bc10e85..948a7a52e3f8 100644
---- a/drivers/gpu/drm/i915/intel_audio.c
-+++ b/drivers/gpu/drm/i915/intel_audio.c
-@@ -600,6 +600,8 @@ static void i915_audio_component_codec_wake_override(struct device *dev,
- if (!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv))
- return;
-
-+ i915_audio_component_get_power(dev);
-+
- /*
- * Enable/disable generating the codec wake signal, overriding the
- * internal logic to generate the codec wake to controller.
-@@ -615,6 +617,8 @@ static void i915_audio_component_codec_wake_override(struct device *dev,
- I915_WRITE(HSW_AUD_CHICKENBIT, tmp);
- usleep_range(1000, 1500);
- }
-+
-+ i915_audio_component_put_power(dev);
- }
-
- /* Get CDCLK in kHz */
-@@ -648,6 +652,7 @@ static int i915_audio_component_sync_audio_rate(struct device *dev,
- !IS_HASWELL(dev_priv))
- return 0;
-
-+ i915_audio_component_get_power(dev);
- mutex_lock(&dev_priv->av_mutex);
- /* 1. get the pipe */
- intel_encoder = dev_priv->dig_port_map[port];
-@@ -698,6 +703,7 @@ static int i915_audio_component_sync_audio_rate(struct device *dev,
-
- unlock:
- mutex_unlock(&dev_priv->av_mutex);
-+ i915_audio_component_put_power(dev);
- return err;
- }
-
---
-2.8.1
-
diff --git a/efi-Add-EFI_SECURE_BOOT-bit.patch b/efi-Add-EFI_SECURE_BOOT-bit.patch
index 89b9664c7..c44010322 100644
--- a/efi-Add-EFI_SECURE_BOOT-bit.patch
+++ b/efi-Add-EFI_SECURE_BOOT-bit.patch
@@ -1,4 +1,4 @@
-From c01ff700ea4192ae04b306fef725d62189550236 Mon Sep 17 00:00:00 2001
+From a8883aff32f1e15b65e210462804aa2a9ab9a0b6 Mon Sep 17 00:00:00 2001
From: Josh Boyer <jwboyer@fedoraproject.org>
Date: Tue, 27 Aug 2013 13:33:03 -0400
Subject: [PATCH 13/20] efi: Add EFI_SECURE_BOOT bit
@@ -13,10 +13,10 @@ Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org>
2 files changed, 3 insertions(+)
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
-index f3b804f..a401ff8 100644
+index d40e961753c9..b93183336674 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
-@@ -1145,7 +1145,9 @@ void __init setup_arch(char **cmdline_p)
+@@ -1162,7 +1162,9 @@ void __init setup_arch(char **cmdline_p)
#ifdef CONFIG_EFI_SECURE_BOOT_SIG_ENFORCE
if (boot_params.secure_boot) {
@@ -27,10 +27,10 @@ index f3b804f..a401ff8 100644
#endif
diff --git a/include/linux/efi.h b/include/linux/efi.h
-index 569b5a8..4dc970e 100644
+index ce943d5accfd..5af91b58afae 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
-@@ -980,6 +980,7 @@ extern int __init efi_setup_pcdp_console(char *);
+@@ -1046,6 +1046,7 @@ extern int __init efi_setup_pcdp_console(char *);
#define EFI_ARCH_1 7 /* First arch-specific bit */
#define EFI_DBG 8 /* Print additional debug info at runtime */
#define EFI_NX_PE_DATA 9 /* Can runtime data regions be mapped non-executable? */
@@ -39,5 +39,5 @@ index 569b5a8..4dc970e 100644
#ifdef CONFIG_EFI
/*
--
-2.5.0
+2.9.3
diff --git a/efi-Add-SHIM-and-image-security-database-GUID-defini.patch b/efi-Add-SHIM-and-image-security-database-GUID-defini.patch
new file mode 100644
index 000000000..4d380ea76
--- /dev/null
+++ b/efi-Add-SHIM-and-image-security-database-GUID-defini.patch
@@ -0,0 +1,31 @@
+From 3a9fe1504e08824d894bb3a804c6a313f5d1be8a Mon Sep 17 00:00:00 2001
+From: Josh Boyer <jwboyer@fedoraproject.org>
+Date: Tue, 25 Oct 2016 12:54:11 -0400
+Subject: [PATCH 11/20] efi: Add SHIM and image security database GUID
+ definitions
+
+Add the definitions for shim and image security database, both of which
+are used widely in various Linux distros.
+
+Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org>
+---
+ include/linux/efi.h | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/include/linux/efi.h b/include/linux/efi.h
+index 2d089487d2da..ce943d5accfd 100644
+--- a/include/linux/efi.h
++++ b/include/linux/efi.h
+@@ -592,6 +592,9 @@ void efi_native_runtime_setup(void);
+ #define EFI_MEMORY_ATTRIBUTES_TABLE_GUID EFI_GUID(0xdcfa911d, 0x26eb, 0x469f, 0xa2, 0x20, 0x38, 0xb7, 0xdc, 0x46, 0x12, 0x20)
+ #define EFI_CONSOLE_OUT_DEVICE_GUID EFI_GUID(0xd3b36f2c, 0xd551, 0x11d4, 0x9a, 0x46, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d)
+
++#define EFI_IMAGE_SECURITY_DATABASE_GUID EFI_GUID(0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f)
++#define EFI_SHIM_LOCK_GUID EFI_GUID(0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23)
++
+ /*
+ * This GUID is used to pass to the kernel proper the struct screen_info
+ * structure that was populated by the stub based on the GOP protocol instance
+--
+2.9.3
+
diff --git a/filter-aarch64.sh b/filter-aarch64.sh
index 012d39724..ed0bb61a1 100644
--- a/filter-aarch64.sh
+++ b/filter-aarch64.sh
@@ -13,4 +13,4 @@ driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds medi
ethdrvs="3com adaptec arc alteon atheros broadcom cadence calxeda chelsio cisco dec dlink emulex icplus marvell micrel myricom neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis smsc stmicro sun tehuti ti via wiznet xircom"
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr"
diff --git a/filter-armv7hl.sh b/filter-armv7hl.sh
index 6dc3efdfa..be07bd91c 100644
--- a/filter-armv7hl.sh
+++ b/filter-armv7hl.sh
@@ -15,4 +15,4 @@ ethdrvs="3com adaptec alteon altera amd atheros broadcom cadence chelsio cisco d
drmdrvs="amd armada bridge ast exynos i2c imx mgag200 msm omapdrm panel nouveau radeon rockchip tegra tilcdc via"
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr"
diff --git a/filter-i686.sh b/filter-i686.sh
index 628e17c60..01b5bfcb6 100644
--- a/filter-i686.sh
+++ b/filter-i686.sh
@@ -11,4 +11,4 @@
driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick mfd mmc mtd mwave nfc ntb pcmcia platform power ssb staging tty uio uwb w1"
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub hid-sensor-magn-3d hid-sensor-incl-3d hid-sensor-gyro-3d hid-sensor-iio-common hid-sensor-accel-3d hid-sensor-trigger hid-sensor-als hid-sensor-rotation target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub hid-sensor-magn-3d hid-sensor-incl-3d hid-sensor-gyro-3d hid-sensor-iio-common hid-sensor-accel-3d hid-sensor-trigger hid-sensor-als hid-sensor-rotation target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr"
diff --git a/filter-modules.sh b/filter-modules.sh
index f9bfa100c..9db3f9d19 100755
--- a/filter-modules.sh
+++ b/filter-modules.sh
@@ -34,7 +34,7 @@ netprots="6lowpan appletalk atm ax25 batman-adv bluetooth can dccp dsa ieee80215
drmdrvs="amd ast gma500 i2c i915 mgag200 nouveau radeon via "
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr"
# Grab the arch-specific filter list overrides
source ./filter-$2.sh
diff --git a/filter-ppc64.sh b/filter-ppc64.sh
index 0df93835c..81397fbcf 100644
--- a/filter-ppc64.sh
+++ b/filter-ppc64.sh
@@ -11,4 +11,4 @@
driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging tty uio uwb w1"
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr"
diff --git a/filter-ppc64le.sh b/filter-ppc64le.sh
index c14e5cc8c..f53af8e5c 100644
--- a/filter-ppc64le.sh
+++ b/filter-ppc64le.sh
@@ -11,4 +11,4 @@
driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging tty uio uwb w1"
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr"
diff --git a/filter-ppc64p7.sh b/filter-ppc64p7.sh
index 6c9383ac0..c868ddafb 100644
--- a/filter-ppc64p7.sh
+++ b/filter-ppc64p7.sh
@@ -11,4 +11,4 @@
driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging tty uio uwb w1"
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr"
diff --git a/geekbox-v4-device-tree-support.patch b/geekbox-v4-device-tree-support.patch
index 11f30e7b2..8408531bd 100644
--- a/geekbox-v4-device-tree-support.patch
+++ b/geekbox-v4-device-tree-support.patch
@@ -1,4 +1,4 @@
-From 277aa4c25655e8f746f02879d26298772244958a Mon Sep 17 00:00:00 2001
+From 11aa129d33635fb33304b6e9b945e502f5ba707a Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Thu, 17 Mar 2016 15:19:04 +0000
Subject: [PATCH] geekbox v4 patchset
@@ -13,10 +13,10 @@ Subject: [PATCH] geekbox v4 patchset
create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
-index 715d960..7cfadac 100644
+index 55f388f..989a039 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
-@@ -95,6 +95,15 @@ Rockchip platforms device tree bindings
+@@ -99,6 +99,15 @@ Rockchip platforms device tree bindings
Required root node properties:
- compatible = "mqmaker,miqi", "rockchip,rk3288";
@@ -33,12 +33,13 @@ index 715d960..7cfadac 100644
Required root node properties:
- compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
-index 7037a16..e002ebe 100644
+index 87669f6..9aec54e 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
-@@ -1,5 +1,6 @@
+@@ -1,6 +1,7 @@
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox-landingship.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
@@ -120,7 +121,7 @@ index 0000000..a28ace9
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
-index b56b720..5ea68c4 100644
+index eed1ef6..18e2b77 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
@@ -52,7 +52,7 @@
@@ -133,5 +134,5 @@ index b56b720..5ea68c4 100644
reg = <0x0 0x0 0x0 0x40000000>;
};
--
-2.5.5
+2.7.4
diff --git a/hp-wmi-fix-wifi-cannot-be-hard-unblock.patch b/hp-wmi-fix-wifi-cannot-be-hard-unblock.patch
deleted file mode 100644
index 27744a0c3..000000000
--- a/hp-wmi-fix-wifi-cannot-be-hard-unblock.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From patchwork Mon Jun 13 11:44:00 2016
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: hp-wmi: fix wifi cannot be hard-unblock
-From: Alex Hung <alex.hung@canonical.com>
-X-Patchwork-Id: 9172765
-Message-Id: <1465818240-11994-1-git-send-email-alex.hung@canonical.com>
-To: dvhart@infradead.org, platform-driver-x86@vger.kernel.org,
- alex.hung@canonical.com, david.ward@ll.mit.edu
-Date: Mon, 13 Jun 2016 19:44:00 +0800
-
-Several users reported wifi cannot be unblocked as discussed in [1].
-This patch removes the useof 2009 flag by BIOS but uses the actual WMI
-function calls - it will be skipped if WMI reports unsupported
-
-[1] https://bugzilla.kernel.org/show_bug.cgi?id=69131
-
-Signed-off-by: Alex Hung <alex.hung@canonical.com>
----
- drivers/platform/x86/hp-wmi.c | 7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c
-index 6f145f2..96ffda4 100644
---- a/drivers/platform/x86/hp-wmi.c
-+++ b/drivers/platform/x86/hp-wmi.c
-@@ -718,6 +718,11 @@ static int __init hp_wmi_rfkill_setup(struct platform_device *device)
- if (err)
- return err;
-
-+ err = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 1, &wireless,
-+ sizeof(wireless), 0);
-+ if (err)
-+ return err;
-+
- if (wireless & 0x1) {
- wifi_rfkill = rfkill_alloc("hp-wifi", &device->dev,
- RFKILL_TYPE_WLAN,
-@@ -882,7 +887,7 @@ static int __init hp_wmi_bios_setup(struct platform_device *device)
- wwan_rfkill = NULL;
- rfkill2_count = 0;
-
-- if (hp_wmi_bios_2009_later() || hp_wmi_rfkill_setup(device))
-+ if (hp_wmi_rfkill_setup(device))
- hp_wmi_rfkill2_setup(device);
-
- err = device_create_file(&device->dev, &dev_attr_display);
diff --git a/imx6sx-Add-UDOO-Neo-support.patch b/imx6sx-Add-UDOO-Neo-support.patch
new file mode 100644
index 000000000..6d9fd99d4
--- /dev/null
+++ b/imx6sx-Add-UDOO-Neo-support.patch
@@ -0,0 +1,619 @@
+From 76e691fc7653b85d390e58710e5c7db73ca49367 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
+Date: Sun, 16 Oct 2016 16:44:23 +0200
+Subject: [PATCH 0732/2073] ARM: dts: imx6sx: Add UDOO Neo support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add initial device trees for UDOO Neo Basic, Extended and Full boards:
+* Serial console is enabled, other serial ports are prepared.
+* I2C based PMIC is enabled.
+* Ethernet is enabled for Basic and Full.
+* SDHC is enabled, with the SDIO_PWR GPIO modeled as a regulator.
+* Both user LEDs are enabled, with the orange one reserved for the M4
+ and with the SD card as default trigger for the red LED.
+
+The decision on a board compatible string is deferred to later.
+
+Cc: Ettore Chimenti <ettore.chimenti@udoo.org>
+Signed-off-by: Andreas Färber <afaerber@suse.de>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+---
+ arch/arm/boot/dts/Makefile | 5 +-
+ arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts | 69 ++++++
+ arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts | 54 +++++
+ arch/arm/boot/dts/imx6sx-udoo-neo-full.dts | 69 ++++++
+ arch/arm/boot/dts/imx6sx-udoo-neo.dtsi | 293 +++++++++++++++++++++++++
+ 5 files changed, 489 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
+ create mode 100644 arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
+ create mode 100644 arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
+ create mode 100644 arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 019976b..da0197d 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -417,7 +417,10 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
+ imx6sx-sabreauto.dtb \
+ imx6sx-sdb-reva.dtb \
+ imx6sx-sdb-sai.dtb \
+- imx6sx-sdb.dtb
++ imx6sx-sdb.dtb \
++ imx6sx-udoo-neo-basic.dtb \
++ imx6sx-udoo-neo-extended.dtb \
++ imx6sx-udoo-neo-full.dtb
+ dtb-$(CONFIG_SOC_IMX6UL) += \
+ imx6ul-14x14-evk.dtb \
+ imx6ul-geam-kit.dtb \
+diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
+new file mode 100644
+index 0000000..0b88878
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
+@@ -0,0 +1,69 @@
++/*
++ * Copyright (c) 2016 Andreas Färber
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This library is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This library is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use,
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include "imx6sx-udoo-neo.dtsi"
++
++/ {
++ model = "UDOO Neo Basic";
++ compatible = "fsl,imx6sx";
++
++ memory {
++ reg = <0x80000000 0x20000000>;
++ };
++};
++
++&fec1 {
++ phy-handle = <&ethphy1>;
++ status = "okay";
++
++ mdio {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethphy1: ethernet-phy@0 {
++ compatible = "ethernet-phy-ieee802.3-c22";
++ reg = <0>;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
+new file mode 100644
+index 0000000..d6fdd17
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
+@@ -0,0 +1,54 @@
++/*
++ * Copyright (c) 2016 Andreas Färber
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This library is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This library is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use,
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include "imx6sx-udoo-neo.dtsi"
++
++/ {
++ model = "UDOO Neo Extended";
++ compatible = "fsl,imx6sx";
++
++ memory {
++ reg = <0x80000000 0x40000000>;
++ };
++};
+diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
+new file mode 100644
+index 0000000..d8c3577
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
+@@ -0,0 +1,69 @@
++/*
++ * Copyright (c) 2016 Andreas Färber
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This library is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This library is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use,
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include "imx6sx-udoo-neo.dtsi"
++
++/ {
++ model = "UDOO Neo Full";
++ compatible = "fsl,imx6sx";
++
++ memory {
++ reg = <0x80000000 0x40000000>;
++ };
++};
++
++&fec1 {
++ phy-handle = <&ethphy1>;
++ status = "okay";
++
++ mdio {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethphy1: ethernet-phy@0 {
++ compatible = "ethernet-phy-ieee802.3-c22";
++ reg = <0>;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
+new file mode 100644
+index 0000000..2b65d26
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
+@@ -0,0 +1,293 @@
++/*
++ * Copyright (c) 2016 Andreas Färber
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This library is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This library is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use,
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++#include "imx6sx.dtsi"
++
++/ {
++ compatible = "fsl,imx6sx";
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ red {
++ label = "udoo-neo:red:mmc";
++ gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
++ default-state = "off";
++ linux,default-trigger = "mmc0";
++ };
++
++ orange {
++ label = "udoo-neo:orange:user";
++ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
++ default-state = "keep";
++ };
++ };
++
++ reg_sdio_pwr: regulator-sdio-pwr {
++ compatible = "regulator-fixed";
++ gpio = <&gpio6 1 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ regulator-name = "SDIO_PWR";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ };
++};
++
++&cpu0 {
++ arm-supply = <&sw1a_reg>;
++ soc-supply = <&sw1c_reg>;
++};
++
++&fec1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet1>;
++ phy-mode = "rmii";
++ phy-reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c1>;
++ clock-frequency = <100000>;
++ status = "okay";
++
++ pmic: pmic@08 {
++ compatible = "fsl,pfuze3000";
++ reg = <0x08>;
++
++ regulators {
++ sw1a_reg: sw1a {
++ regulator-min-microvolt = <700000>;
++ regulator-max-microvolt = <1475000>;
++ regulator-boot-on;
++ regulator-always-on;
++ regulator-ramp-delay = <6250>;
++ };
++
++ sw1c_reg: sw1b {
++ regulator-min-microvolt = <700000>;
++ regulator-max-microvolt = <1475000>;
++ regulator-boot-on;
++ regulator-always-on;
++ regulator-ramp-delay = <6250>;
++ };
++
++ sw2_reg: sw2 {
++ regulator-min-microvolt = <1500000>;
++ regulator-max-microvolt = <1850000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ sw3a_reg: sw3 {
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <1650000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ swbst_reg: swbst {
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5150000>;
++ };
++
++ snvs_reg: vsnvs {
++ regulator-min-microvolt = <1000000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ vref_reg: vrefddr {
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ vgen1_reg: vldo1 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vgen2_reg: vldo2 {
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <1550000>;
++ };
++
++ vgen3_reg: vccsd {
++ regulator-min-microvolt = <2850000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vgen4_reg: v33 {
++ regulator-min-microvolt = <2850000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vgen5_reg: vldo3 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vgen6_reg: vldo4 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++ };
++ };
++};
++
++&iomuxc {
++ pinctrl_enet1: enet1grp {
++ fsl,pins =
++ <MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0xa0b1>,
++ <MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1>,
++ <MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1>,
++ <MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1>,
++ <MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1>,
++ <MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1>,
++
++ <MX6SX_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x3081>,
++ <MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0x3081>,
++ <MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081>,
++ <MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081>,
++ <MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081>,
++ <MX6SX_PAD_RGMII1_RXC__ENET1_RX_ER 0x3081>,
++
++ <MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91>;
++ };
++
++ pinctrl_i2c1: i2c1grp {
++ fsl,pins =
++ <MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1>,
++ <MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1>;
++ };
++
++ pinctrl_uart1: uart1grp {
++ fsl,pins =
++ <MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1>,
++ <MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1>;
++ };
++
++ pinctrl_uart2: uart2grp {
++ fsl,pins =
++ <MX6SX_PAD_GPIO1_IO06__UART2_TX 0x1b0b1>,
++ <MX6SX_PAD_GPIO1_IO07__UART2_RX 0x1b0b1>;
++ };
++
++ pinctrl_uart5: uart5grp {
++ fsl,pins =
++ <MX6SX_PAD_SD4_DATA4__UART5_RX 0x1b0b1>,
++ <MX6SX_PAD_SD4_DATA5__UART5_TX 0x1b0b1>;
++ };
++
++ pinctrl_uart6: uart6grp {
++ fsl,pins =
++ <MX6SX_PAD_CSI_DATA00__UART6_RI_B 0x1b0b1>,
++ <MX6SX_PAD_CSI_DATA01__UART6_DSR_B 0x1b0b1>,
++ <MX6SX_PAD_CSI_DATA02__UART6_DTR_B 0x1b0b1>,
++ <MX6SX_PAD_CSI_DATA03__UART6_DCD_B 0x1b0b1>,
++ <MX6SX_PAD_CSI_DATA04__UART6_RX 0x1b0b1>,
++ <MX6SX_PAD_CSI_DATA05__UART6_TX 0x1b0b1>,
++ <MX6SX_PAD_CSI_DATA06__UART6_RTS_B 0x1b0b1>,
++ <MX6SX_PAD_CSI_DATA07__UART6_CTS_B 0x1b0b1>;
++ };
++
++ pinctrl_usdhc2: usdhc2grp {
++ fsl,pins =
++ <MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059>,
++ <MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059>,
++ <MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059>,
++ <MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059>,
++ <MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059>,
++ <MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059>,
++ <MX6SX_PAD_SD1_DATA0__GPIO6_IO_2 0x17059>; /* CD */
++ };
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart1>;
++ status = "okay";
++};
++
++/* Cortex-M4 serial */
++&uart2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart2>;
++ status = "disabled";
++};
++
++/* Arduino serial */
++&uart5 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart5>;
++ status = "disabled";
++};
++
++&uart6 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart6>;
++ uart-has-rtscts;
++ status = "disabled";
++};
++
++&usdhc2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc2>;
++ vmmc-supply = <&reg_sdio_pwr>;
++ bus-width = <4>;
++ cd-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;
++ no-1-8-v;
++ keep-power-in-suspend;
++ wakeup-source;
++ status = "okay";
++};
+--
+2.9.3
+
+From 841310d00a76800a8407ee214eb7242541aac178 Mon Sep 17 00:00:00 2001
+From: Fabio Estevam <fabio.estevam@nxp.com>
+Date: Tue, 1 Nov 2016 15:38:12 -0200
+Subject: [PATCH 1789/2073] ARM: dts: imx6sx-udoo: Add board specific
+ compatible strings
+
+Add a compatible entry for the specific board versions.
+
+Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+---
+ arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts | 2 +-
+ arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts | 2 +-
+ arch/arm/boot/dts/imx6sx-udoo-neo-full.dts | 2 +-
+ 3 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
+index 0b88878..0c1fc1a 100644
+--- a/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
++++ b/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
+@@ -46,7 +46,7 @@
+
+ / {
+ model = "UDOO Neo Basic";
+- compatible = "fsl,imx6sx";
++ compatible = "udoo,neobasic", "fsl,imx6sx";
+
+ memory {
+ reg = <0x80000000 0x20000000>;
+diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
+index d6fdd17..5d6c227 100644
+--- a/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
++++ b/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
+@@ -46,7 +46,7 @@
+
+ / {
+ model = "UDOO Neo Extended";
+- compatible = "fsl,imx6sx";
++ compatible = "udoo,neoextended", "fsl,imx6sx";
+
+ memory {
+ reg = <0x80000000 0x40000000>;
+diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
+index d8c3577..653ceb2 100644
+--- a/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
++++ b/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
+@@ -46,7 +46,7 @@
+
+ / {
+ model = "UDOO Neo Full";
+- compatible = "fsl,imx6sx";
++ compatible = "udoo,neofull", "fsl,imx6sx";
+
+ memory {
+ reg = <0x80000000 0x40000000>;
+--
+2.9.3
+
diff --git a/kbuild-AFTER_LINK.patch b/kbuild-AFTER_LINK.patch
index 7e8cba5b9..ab738c62b 100644
--- a/kbuild-AFTER_LINK.patch
+++ b/kbuild-AFTER_LINK.patch
@@ -1,4 +1,4 @@
-From a9488dbeccf188f0bd83b9d5704892f2c0f97fdc Mon Sep 17 00:00:00 2001
+From 649d991ca7737dd227f2a1ca4f30247daf6a7b4b Mon Sep 17 00:00:00 2001
From: Roland McGrath <roland@redhat.com>
Date: Mon, 6 Oct 2008 23:03:03 -0700
Subject: [PATCH] kbuild: AFTER_LINK
@@ -21,10 +21,10 @@ Signed-off-by: Roland McGrath <roland@redhat.com>
7 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/kernel/vdso/Makefile b/arch/arm64/kernel/vdso/Makefile
-index b467fd0..feeff5e 100644
+index 62c84f7..f44236a 100644
--- a/arch/arm64/kernel/vdso/Makefile
+++ b/arch/arm64/kernel/vdso/Makefile
-@@ -55,7 +55,8 @@ $(obj-vdso): %.o: %.S FORCE
+@@ -54,7 +54,8 @@ $(obj-vdso): %.o: %.S FORCE
# Actual build commands
quiet_cmd_vdsold = VDSOL $@
@@ -35,38 +35,38 @@ index b467fd0..feeff5e 100644
cmd_vdsoas = $(CC) $(a_flags) -c -o $@ $<
diff --git a/arch/powerpc/kernel/vdso32/Makefile b/arch/powerpc/kernel/vdso32/Makefile
-index 6abffb7..7b103bb 100644
+index 78a7449..c9592c0 100644
--- a/arch/powerpc/kernel/vdso32/Makefile
+++ b/arch/powerpc/kernel/vdso32/Makefile
-@@ -43,7 +43,8 @@ $(obj-vdso32): %.o: %.S
+@@ -44,7 +44,8 @@ $(obj-vdso32): %.o: %.S FORCE
# actual build commands
quiet_cmd_vdso32ld = VDSO32L $@
-- cmd_vdso32ld = $(CROSS32CC) $(c_flags) -Wl,-T $^ -o $@
-+ cmd_vdso32ld = $(CROSS32CC) $(c_flags) -Wl,-T $^ -o $@ \
+- cmd_vdso32ld = $(CROSS32CC) $(c_flags) -o $@ -Wl,-T$(filter %.lds,$^) $(filter %.o,$^)
++ cmd_vdso32ld = $(CROSS32CC) $(c_flags) -o $@ -Wl,-T$(filter %.lds,$^) $(filter %.o,$^) \
+ $(if $(AFTER_LINK),; $(AFTER_LINK))
quiet_cmd_vdso32as = VDSO32A $@
cmd_vdso32as = $(CROSS32CC) $(a_flags) -c -o $@ $<
diff --git a/arch/powerpc/kernel/vdso64/Makefile b/arch/powerpc/kernel/vdso64/Makefile
-index 8c8f2ae..a743ebe 100644
+index 31107bf..96aded3 100644
--- a/arch/powerpc/kernel/vdso64/Makefile
+++ b/arch/powerpc/kernel/vdso64/Makefile
-@@ -36,7 +36,8 @@ $(obj-vdso64): %.o: %.S
+@@ -33,7 +33,8 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE
# actual build commands
quiet_cmd_vdso64ld = VDSO64L $@
-- cmd_vdso64ld = $(CC) $(c_flags) -Wl,-T $^ -o $@
-+ cmd_vdso64ld = $(CC) $(c_flags) -Wl,-T $^ -o $@ \
-+ $(if $(AFTER_LINK),; $(AFTER_LINK))
- quiet_cmd_vdso64as = VDSO64A $@
- cmd_vdso64as = $(CC) $(a_flags) -c -o $@ $<
+- cmd_vdso64ld = $(CC) $(c_flags) -o $@ -Wl,-T$(filter %.lds,$^) $(filter %.o,$^)
++ cmd_vdso64ld = $(CC) $(c_flags) -o $@ -Wl,-T$(filter %.lds,$^) $(filter %.o,$^) \
++ $(if $(AFTER_LINK),; $(AFTER_LINK))
+ # install commands for the unstripped file
+ quiet_cmd_vdso_install = INSTALL $@
diff --git a/arch/s390/kernel/vdso32/Makefile b/arch/s390/kernel/vdso32/Makefile
-index ee8a18e..63e33fa 100644
+index 6cc9478..94fb536 100644
--- a/arch/s390/kernel/vdso32/Makefile
+++ b/arch/s390/kernel/vdso32/Makefile
-@@ -43,7 +43,8 @@ $(obj-vdso32): %.o: %.S
+@@ -46,7 +46,8 @@ $(obj-vdso32): %.o: %.S
# actual build commands
quiet_cmd_vdso32ld = VDSO32L $@
@@ -77,10 +77,10 @@ index ee8a18e..63e33fa 100644
cmd_vdso32as = $(CC) $(a_flags) -c -o $@ $<
diff --git a/arch/s390/kernel/vdso64/Makefile b/arch/s390/kernel/vdso64/Makefile
-index c4b03f9..550450f 100644
+index 2d54c18..a0e3e9d 100644
--- a/arch/s390/kernel/vdso64/Makefile
+++ b/arch/s390/kernel/vdso64/Makefile
-@@ -43,7 +43,8 @@ $(obj-vdso64): %.o: %.S
+@@ -46,7 +46,8 @@ $(obj-vdso64): %.o: %.S
# actual build commands
quiet_cmd_vdso64ld = VDSO64L $@
@@ -91,10 +91,10 @@ index c4b03f9..550450f 100644
cmd_vdso64as = $(CC) $(a_flags) -c -o $@ $<
diff --git a/arch/x86/entry/vdso/Makefile b/arch/x86/entry/vdso/Makefile
-index 265c0ed..fd90c7d 100644
+index d540966..eeb47b6 100644
--- a/arch/x86/entry/vdso/Makefile
+++ b/arch/x86/entry/vdso/Makefile
-@@ -159,8 +159,9 @@ $(obj)/vdso32.so.dbg: FORCE \
+@@ -167,8 +167,9 @@ $(obj)/vdso32.so.dbg: FORCE \
quiet_cmd_vdso = VDSO $@
cmd_vdso = $(CC) -nostdlib -o $@ \
$(VDSO_LDFLAGS) $(VDSO_LDFLAGS_$(filter %.lds,$(^F))) \
@@ -107,11 +107,11 @@ index 265c0ed..fd90c7d 100644
VDSO_LDFLAGS = -fPIC -shared $(call cc-ldoption, -Wl$(comma)--hash-style=both) \
$(call cc-ldoption, -Wl$(comma)--build-id) -Wl,-Bsymbolic $(LTO_CFLAGS)
diff --git a/scripts/link-vmlinux.sh b/scripts/link-vmlinux.sh
-index dacf71a..72cbefd 100755
+index f742c65..526eee4 100755
--- a/scripts/link-vmlinux.sh
+++ b/scripts/link-vmlinux.sh
-@@ -65,6 +65,10 @@ vmlinux_link()
- -lutil -lrt -lpthread ${1}
+@@ -111,6 +111,10 @@ vmlinux_link()
+ -lutil -lrt -lpthread
rm -f linux
fi
+ if [ -n "${AFTER_LINK}" ]; then
@@ -122,5 +122,5 @@ index dacf71a..72cbefd 100755
--
-2.5.0
+2.7.4
diff --git a/kernel.spec b/kernel.spec
index c543fdc5c..59aedc644 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -48,7 +48,7 @@ Summary: The Linux kernel
# base_sublevel is the kernel version we're starting with and patching
# on top of -- for example, 3.1-rc7-git1 starts with a 3.0 base,
# which yields a base_sublevel of 0.
-%define base_sublevel 7
+%define base_sublevel 9
## If this is a released kernel ##
%if 0%{?released_kernel}
@@ -341,7 +341,7 @@ Summary: The Linux kernel
%endif
# Architectures we build tools/cpupower on
-%define cpupowerarchs %{ix86} x86_64 %{power64} %{arm} aarch64
+%define cpupowerarchs %{ix86} x86_64 %{power64} %{arm} aarch64
#
# Packages that need to be installed before the kernel is, because the %%post
@@ -373,12 +373,12 @@ Requires: kernel-modules-uname-r = %{KVERREL}%{?variant}
BuildRequires: kmod, patch, bash, sh-utils, tar, git
BuildRequires: bzip2, xz, findutils, gzip, m4, perl, perl-Carp, perl-devel, perl-generators, make, diffutils, gawk
BuildRequires: gcc, binutils, redhat-rpm-config, hmaccalc
-BuildRequires: net-tools, hostname, bc
+BuildRequires: net-tools, hostname, bc, elfutils-devel
%if %{with_sparse}
BuildRequires: sparse
%endif
%if %{with_perf}
-BuildRequires: elfutils-devel zlib-devel binutils-devel newt-devel python-devel perl(ExtUtils::Embed) bison flex xz-devel
+BuildRequires: zlib-devel binutils-devel newt-devel python-devel perl(ExtUtils::Embed) bison flex xz-devel
BuildRequires: audit-libs-devel
%ifnarch s390 s390x %{arm}
BuildRequires: numactl-devel
@@ -409,7 +409,7 @@ Source0: ftp://ftp.kernel.org/pub/linux/kernel/v4.x/linux-%{kversion}.tar.xz
Source10: perf-man-%{kversion}.tar.gz
Source11: x509.genkey
-
+Source12: remove-binary-diff.pl
Source15: merge.pl
Source16: mod-extra.list
Source17: mod-extra.sh
@@ -497,29 +497,39 @@ Source5005: kbuild-AFTER_LINK.patch
# Standalone patches
-Patch420: arm64-avoid-needing-console-to-enable-serial-console.patch
+# a tempory patch for QCOM hardware enablement. Will be gone by end of 2016/F-26 GA
+Patch421: qcom-QDF2432-tmp-errata.patch
# http://www.spinics.net/lists/arm-kernel/msg490981.html
Patch422: geekbox-v4-device-tree-support.patch
-# http://www.spinics.net/lists/arm-kernel/msg483898.html
-# This has major conflicts and needs to be rebased
-# Patch423: Initial-AllWinner-A64-and-PINE64-support.patch
-
-Patch424: arm64-pcie-acpi.patch
-Patch425: arm64-pcie-quirks-xgene.patch
+# http://www.spinics.net/lists/linux-pci/msg53991.html
+# https://patchwork.kernel.org/patch/9337113/
+Patch425: arm64-pcie-quirks.patch
# http://www.spinics.net/lists/linux-tegra/msg26029.html
Patch426: usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch
+# Fix OMAP4 (pandaboard)
+Patch427: arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch
+Patch428: ARM-OMAP4-Fix-crashes.patch
+
+# Not particularly happy we don't yet have a proper upstream resolution this is the right direction
+# https://www.spinics.net/lists/arm-kernel/msg535191.html
+Patch429: arm64-mm-Fix-memmap-to-be-initialized-for-the-entire-section.patch
+
# http://patchwork.ozlabs.org/patch/587554/
Patch430: ARM-tegra-usb-no-reset.patch
-Patch431: bcm283x-upstream-fixes.patch
+Patch431: bcm2837-initial-support.patch
-Patch432: arm-i.MX6-Utilite-device-dtb.patch
+Patch432: bcm283x-vc4-fixes.patch
-Patch433: ARM-tegra-fix-erroneous-address-in-dts.patch
+Patch433: AllWinner-net-emac.patch
+
+Patch434: ARM-Drop-fixed-200-Hz-timer-requirement-from-Samsung-platforms.patch
+
+Patch435: imx6sx-Add-UDOO-Neo-support.patch
Patch460: lib-cpumask-Make-CPUMASK_OFFSTACK-usable-without-deb.patch
@@ -555,7 +565,9 @@ Patch481: x86-Restrict-MSR-access-when-module-loading-is-restr.patch
Patch482: Add-option-to-automatically-enforce-module-signature.patch
-Patch483: efi-Disable-secure-boot-if-shim-is-in-insecure-mode.patch
+Patch483: efi-Add-SHIM-and-image-security-database-GUID-defini.patch
+
+Patch484: efi-Disable-secure-boot-if-shim-is-in-insecure-mode.patch
Patch485: efi-Add-EFI_SECURE_BOOT-bit.patch
@@ -600,47 +612,16 @@ Patch502: firmware-Drop-WARN-from-usermodehelper_read_trylock-.patch
Patch508: kexec-uefi-copy-secure_boot-flag-in-boot-params.patch
-#Required for some persistent memory options
-Patch641: disable-CONFIG_EXPERT-for-ZONE_DMA.patch
+Patch509: MODSIGN-Don-t-try-secure-boot-if-EFI-runtime-is-disa.patch
#CVE-2016-3134 rhbz 1317383 1317384
Patch665: netfilter-x_tables-deal-with-bogus-nextoffset-values.patch
-#rhbz 1338025
-Patch728: hp-wmi-fix-wifi-cannot-be-hard-unblock.patch
-
-#skl_update_other_pipe_wm issue patch-series from drm-next, rhbz 1305038
-Patch801: 0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch
-Patch802: 0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch
-Patch803: 0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch
-Patch804: 0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch
-Patch805: 0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch
-Patch806: 0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch
-Patch807: 0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch
-Patch808: 0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch
-Patch809: 0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch
-Patch810: 0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch
-Patch811: 0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch
-Patch812: 0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch
-Patch813: 0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch
-Patch814: 0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch
-Patch815: 0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch
-Patch816: 0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch
-Patch817: 0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch
-
-#Workaround for glibc update
-Patch835: 0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch
-
-# https://lists.fedoraproject.org/archives/list/kernel@lists.fedoraproject.org/message/A4YCP7OGMX6JLFT5V44H57GOMAQLC3M4/
-Patch837: drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch
-Patch838: drm-i915-Acquire-audio-powerwell-for-HD-Audio-regist.patch
-
-#CVE-2016-6136 rhbz 1353533 1353534
-Patch841: audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch
-
-#CVE-2016-5412 rhbz 1349916 1361040
-Patch842: kvm-ppc-Book3S-HV-Pull-out-TM-state-save.patch
-Patch843: kvm-ppc-Book3S-HV-Save-restore-TM-state.patch
+#ongoing complaint, full discussion delayed until ksummit/plumbers
+Patch849: 0001-iio-Use-event-header-from-kernel-tree.patch
+
+# Request from dwalsh
+Patch850: selinux-namespace-fix.patch
# END OF PATCH DEFINITIONS
@@ -818,7 +799,7 @@ This package provides debug information for package kernel-tools.
# symlinks because of the trailing nonmatching alternation and
# the leading .*, because of find-debuginfo.sh's buggy handling
# of matching the pattern against the symlinks file.
-%{expand:%%global debuginfo_args %{?debuginfo_args} -p '.*%%{_bindir}/centrino-decode(\.debug)?|.*%%{_bindir}/powernow-k8-decode(\.debug)?|.*%%{_bindir}/cpupower(\.debug)?|.*%%{_libdir}/libcpupower.*|.*%%{_bindir}/turbostat(\.debug)?|.*%%{_bindir}/x86_energy_perf_policy(\.debug)?|.*%%{_bindir}/tmon(\.debug)?|.*%%{_bindir}/iio_event_monitor(\.debug)?|.*%%{_bindir}/iio_generic_buffer(\.debug)?|.*%%{_bindir}/lsiio(\.debug)?|XXX' -o kernel-tools-debuginfo.list}
+%{expand:%%global debuginfo_args %{?debuginfo_args} -p '.*%%{_bindir}/centrino-decode(\.debug)?|.*%%{_bindir}/powernow-k8-decode(\.debug)?|.*%%{_bindir}/cpupower(\.debug)?|.*%%{_libdir}/libcpupower.*|.*%%{_bindir}/turbostat(\.debug)?|.*%%{_bindir}/x86_energy_perf_policy(\.debug)?|.*%%{_bindir}/tmon(\.debug)?|.*%%{_bindir}/lsgpio(\.debug)?|.*%%{_bindir}/gpio-hammer(\.debug)?|.*%%{_bindir}/gpio-event-mon(\.debug)?|.*%%{_bindir}/iio_event_monitor(\.debug)?|.*%%{_bindir}/iio_generic_buffer(\.debug)?|.*%%{_bindir}/lsiio(\.debug)?|XXX' -o kernel-tools-debuginfo.list}
%endif # with_tools
@@ -988,7 +969,7 @@ on kernel bugs, as some of these options impact performance noticably.
# And finally the main -core package
%define variant_summary The Linux kernel
-%kernel_variant_package
+%kernel_variant_package
%description core
The kernel package contains the Linux kernel (vmlinuz), the core of any
Linux operating system. The kernel handles the basic functions
@@ -1156,17 +1137,19 @@ if [ ! -d kernel-%{kversion}%{?dist}/vanilla-%{vanillaversion} ]; then
cp -al vanilla-%{kversion} vanilla-%{vanillaversion}
cd vanilla-%{vanillaversion}
+cp %{SOURCE12} .
+
# Update vanilla to the latest upstream.
# (non-released_kernel case only)
%if 0%{?rcrev}
- xzcat %{SOURCE5000} | patch -p1 -F1 -s
+ xzcat %{SOURCE5000} | ./remove-binary-diff.pl | patch -p1 -F1 -s
%if 0%{?gitrev}
- xzcat %{SOURCE5001} | patch -p1 -F1 -s
+ xzcat %{SOURCE5001} | ./remove-binary-diff.pl | patch -p1 -F1 -s
%endif
%else
# pre-{base_sublevel+1}-rc1 case
%if 0%{?gitrev}
- xzcat %{SOURCE5000} | patch -p1 -F1 -s
+ xzcat %{SOURCE5000} | ./remove-binary-diff.pl | patch -p1 -F1 -s
%endif
%endif
git init
@@ -1311,7 +1294,7 @@ cd ..
# This affects the vDSO images in vmlinux, and the vmlinux image in bzImage.
export AFTER_LINK=\
'sh -xc "/usr/lib/rpm/debugedit -b $$RPM_BUILD_DIR -d /usr/src/debug \
- -i $@ > $@.id"'
+ -i $@ > $@.id"'
%endif
cp_vmlinux()
@@ -1408,7 +1391,7 @@ BuildKernel() {
mv vmlinuz.signed $KernelImage
%endif
$CopyKernel $KernelImage \
- $RPM_BUILD_ROOT/%{image_install_path}/$InstallName-$KernelVer
+ $RPM_BUILD_ROOT/%{image_install_path}/$InstallName-$KernelVer
chmod 755 $RPM_BUILD_ROOT/%{image_install_path}/$InstallName-$KernelVer
cp $RPM_BUILD_ROOT/%{image_install_path}/$InstallName-$KernelVer $RPM_BUILD_ROOT/lib/modules/$KernelVer/$InstallName
@@ -1480,6 +1463,8 @@ BuildKernel() {
%ifarch aarch64
# arch/arm64/include/asm/xen references arch/arm
cp -a --parents arch/arm/include/asm/xen $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+ # arch/arm64/include/asm/opcodes.h references arch/arm
+ cp -a --parents arch/arm/include/asm/opcodes.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
%endif
# include the machine specific headers for ARM variants, if available.
%ifarch %{arm}
@@ -1557,13 +1542,13 @@ BuildKernel() {
}
collect_modules_list networking \
- 'register_netdev|ieee80211_register_hw|usbnet_probe|phy_driver_register|rt(l_|2x00)(pci|usb)_probe|register_netdevice'
+ 'register_netdev|ieee80211_register_hw|usbnet_probe|phy_driver_register|rt(l_|2x00)(pci|usb)_probe|register_netdevice'
collect_modules_list block \
- 'ata_scsi_ioctl|scsi_add_host|scsi_add_host_with_dma|blk_alloc_queue|blk_init_queue|register_mtd_blktrans|scsi_esp_register|scsi_register_device_handler|blk_queue_physical_block_size' 'pktcdvd.ko|dm-mod.ko'
+ 'ata_scsi_ioctl|scsi_add_host|scsi_add_host_with_dma|blk_alloc_queue|blk_init_queue|register_mtd_blktrans|scsi_esp_register|scsi_register_device_handler|blk_queue_physical_block_size' 'pktcdvd.ko|dm-mod.ko'
collect_modules_list drm \
- 'drm_open|drm_init'
+ 'drm_open|drm_init'
collect_modules_list modesetting \
- 'drm_crtc_init'
+ 'drm_crtc_init'
# detect missing or incorrect license tags
( find $RPM_BUILD_ROOT/lib/modules/$KernelVer -name '*.ko' | xargs /sbin/modinfo -l | \
@@ -1594,9 +1579,9 @@ BuildKernel() {
# Find all the module files and filter them out into the core and modules
# lists. This actually removes anything going into -modules from the dir.
find lib/modules/$KernelVer/kernel -name *.ko | sort -n > modules.list
- cp $RPM_SOURCE_DIR/filter-*.sh .
+ cp $RPM_SOURCE_DIR/filter-*.sh .
%{SOURCE99} modules.list %{_target_cpu}
- rm filter-*.sh
+ rm filter-*.sh
# Run depmod on the resulting module tree and make sure it isn't broken
depmod -b . -aeF ./System.map $KernelVer &> depmod.out
@@ -1614,7 +1599,7 @@ BuildKernel() {
# Go back and find all of the various directories in the tree. We use this
# for the dir lists in kernel-core
- find lib/modules/$KernelVer/kernel -type d | sort -n > module-dirs.list
+ find lib/modules/$KernelVer/kernel -mindepth 1 -type d | sort -n > module-dirs.list
# Cleanup
rm System.map
@@ -1681,7 +1666,7 @@ BuildKernel %make_target %kernel_image
%endif
%global perf_make \
- make -s EXTRA_CFLAGS="${RPM_OPT_FLAGS}" LDFLAGS="%{__global_ldflags}" %{?cross_opts} %{?_smp_mflags} -C tools/perf V=1 NO_PERF_READ_VDSO32=1 NO_PERF_READ_VDSOX32=1 WERROR=0 NO_LIBUNWIND=1 HAVE_CPLUS_DEMANGLE=1 NO_GTK2=1 NO_STRLCPY=1 NO_BIONIC=1 prefix=%{_prefix}
+ make -s EXTRA_CFLAGS="${RPM_OPT_FLAGS}" LDFLAGS="%{__global_ldflags}" %{?cross_opts} -C tools/perf V=1 NO_PERF_READ_VDSO32=1 NO_PERF_READ_VDSOX32=1 WERROR=0 NO_LIBUNWIND=1 HAVE_CPLUS_DEMANGLE=1 NO_GTK2=1 NO_STRLCPY=1 NO_BIONIC=1 prefix=%{_prefix}
%if %{with_perf}
# perf
%{perf_make} DESTDIR=$RPM_BUILD_ROOT all
@@ -1718,6 +1703,9 @@ popd
pushd tools/iio/
%{make}
popd
+pushd tools/gpio/
+%{make}
+popd
%endif
# In the modsign case, we do 3 things. 1) We check the "flavour" and hard
@@ -1801,7 +1789,7 @@ make ARCH=%{hdrarch} INSTALL_HDR_PATH=$RPM_BUILD_ROOT/usr headers_install
find $RPM_BUILD_ROOT/usr/include \
\( -name .install -o -name .check -o \
- -name ..install.cmd -o -name ..check.cmd \) | xargs rm -f
+ -name ..install.cmd -o -name ..check.cmd \) | xargs rm -f
%endif
@@ -1811,7 +1799,7 @@ make ARCH=%{hdrarch} INSTALL_HDR_PATH=$RPM_BUILD_ROOT/usr/tmp-headers headers_in
find $RPM_BUILD_ROOT/usr/tmp-headers/include \
\( -name .install -o -name .check -o \
- -name ..install.cmd -o -name ..check.cmd \) | xargs rm -f
+ -name ..install.cmd -o -name ..check.cmd \) | xargs rm -f
# Copy all the architectures we care about to their respective asm directories
for arch in arm arm64 powerpc s390 x86 ; do
@@ -1888,6 +1876,9 @@ popd
pushd tools/iio
make INSTALL_ROOT=%{buildroot} install
popd
+pushd tools/gpio
+make DESTDIR=%{buildroot} install
+popd
%endif
%if %{with_bootwrapper}
@@ -2082,6 +2073,9 @@ fi
%{_bindir}/iio_event_monitor
%{_bindir}/iio_generic_buffer
%{_bindir}/lsiio
+%{_bindir}/lsgpio
+%{_bindir}/gpio-hammer
+%{_bindir}/gpio-event-mon
%endif
%if %{with_debuginfo}
@@ -2176,6 +2170,9 @@ fi
#
#
%changelog
+* Thu Dec 15 2016 Laura Abbott <labbott@fedoraproject.org>
+- Linux v4.9 rebase
+
* Mon Aug 15 2016 Peter Robinson <pbrobinson@fedoraproject.org>
- Enable Atmel i2c TPM on ARM platforms
- Add upstream patch to fix boot on Jetson TK1
diff --git a/kvm-ppc-Book3S-HV-Pull-out-TM-state-save.patch b/kvm-ppc-Book3S-HV-Pull-out-TM-state-save.patch
deleted file mode 100644
index b4259375f..000000000
--- a/kvm-ppc-Book3S-HV-Pull-out-TM-state-save.patch
+++ /dev/null
@@ -1,506 +0,0 @@
-Subject: [PATCH 1/2] KVM: PPC: Book3S HV: Pull out TM state save/restore into separate procedures
-From: Paul Mackerras <paulus@ozlabs.org>
-Date: 2016-07-28 6:11:18
-
-This moves the transactional memory state save and restore sequences
-out of the guest entry/exit paths into separate procedures. This is
-so that these sequences can be used in going into and out of nap
-in a subsequent patch.
-
-The only code changes here are (a) saving and restore LR on the
-stack, since these new procedures get called with a bl instruction,
-(b) explicitly saving r1 into the PACA instead of assuming that
-HSTATE_HOST_R1(r13) is already set, and (c) removing an unnecessary
-and redundant setting of MSR[TM] that should have been removed by
-commit 9d4d0bdd9e0a ("KVM: PPC: Book3S HV: Add transactional memory
-support", 2013-09-24) but wasn't.
-
-Cc: stable@vger.kernel.org # v3.15+
-Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
----
- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 449 +++++++++++++++++---------------
- 1 file changed, 237 insertions(+), 212 deletions(-)
-
-diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
-index 0d246fc..cfa4031 100644
---- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
-+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
-@@ -689,112 +689,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
-
- #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
- BEGIN_FTR_SECTION
-- b skip_tm
--END_FTR_SECTION_IFCLR(CPU_FTR_TM)
--
-- /* Turn on TM/FP/VSX/VMX so we can restore them. */
-- mfmsr r5
-- li r6, MSR_TM >> 32
-- sldi r6, r6, 32
-- or r5, r5, r6
-- ori r5, r5, MSR_FP
-- oris r5, r5, (MSR_VEC | MSR_VSX)@h
-- mtmsrd r5
--
-- /*
-- * The user may change these outside of a transaction, so they must
-- * always be context switched.
-- */
-- ld r5, VCPU_TFHAR(r4)
-- ld r6, VCPU_TFIAR(r4)
-- ld r7, VCPU_TEXASR(r4)
-- mtspr SPRN_TFHAR, r5
-- mtspr SPRN_TFIAR, r6
-- mtspr SPRN_TEXASR, r7
--
-- ld r5, VCPU_MSR(r4)
-- rldicl. r5, r5, 64 - MSR_TS_S_LG, 62
-- beq skip_tm /* TM not active in guest */
--
-- /* Make sure the failure summary is set, otherwise we'll program check
-- * when we trechkpt. It's possible that this might have been not set
-- * on a kvmppc_set_one_reg() call but we shouldn't let this crash the
-- * host.
-- */
-- oris r7, r7, (TEXASR_FS)@h
-- mtspr SPRN_TEXASR, r7
--
-- /*
-- * We need to load up the checkpointed state for the guest.
-- * We need to do this early as it will blow away any GPRs, VSRs and
-- * some SPRs.
-- */
--
-- mr r31, r4
-- addi r3, r31, VCPU_FPRS_TM
-- bl load_fp_state
-- addi r3, r31, VCPU_VRS_TM
-- bl load_vr_state
-- mr r4, r31
-- lwz r7, VCPU_VRSAVE_TM(r4)
-- mtspr SPRN_VRSAVE, r7
--
-- ld r5, VCPU_LR_TM(r4)
-- lwz r6, VCPU_CR_TM(r4)
-- ld r7, VCPU_CTR_TM(r4)
-- ld r8, VCPU_AMR_TM(r4)
-- ld r9, VCPU_TAR_TM(r4)
-- mtlr r5
-- mtcr r6
-- mtctr r7
-- mtspr SPRN_AMR, r8
-- mtspr SPRN_TAR, r9
--
-- /*
-- * Load up PPR and DSCR values but don't put them in the actual SPRs
-- * till the last moment to avoid running with userspace PPR and DSCR for
-- * too long.
-- */
-- ld r29, VCPU_DSCR_TM(r4)
-- ld r30, VCPU_PPR_TM(r4)
--
-- std r2, PACATMSCRATCH(r13) /* Save TOC */
--
-- /* Clear the MSR RI since r1, r13 are all going to be foobar. */
-- li r5, 0
-- mtmsrd r5, 1
--
-- /* Load GPRs r0-r28 */
-- reg = 0
-- .rept 29
-- ld reg, VCPU_GPRS_TM(reg)(r31)
-- reg = reg + 1
-- .endr
--
-- mtspr SPRN_DSCR, r29
-- mtspr SPRN_PPR, r30
--
-- /* Load final GPRs */
-- ld 29, VCPU_GPRS_TM(29)(r31)
-- ld 30, VCPU_GPRS_TM(30)(r31)
-- ld 31, VCPU_GPRS_TM(31)(r31)
--
-- /* TM checkpointed state is now setup. All GPRs are now volatile. */
-- TRECHKPT
--
-- /* Now let's get back the state we need. */
-- HMT_MEDIUM
-- GET_PACA(r13)
-- ld r29, HSTATE_DSCR(r13)
-- mtspr SPRN_DSCR, r29
-- ld r4, HSTATE_KVM_VCPU(r13)
-- ld r1, HSTATE_HOST_R1(r13)
-- ld r2, PACATMSCRATCH(r13)
--
-- /* Set the MSR RI since we have our registers back. */
-- li r5, MSR_RI
-- mtmsrd r5, 1
--skip_tm:
-+ bl kvmppc_restore_tm
-+END_FTR_SECTION_IFSET(CPU_FTR_TM)
- #endif
-
- /* Load guest PMU registers */
-@@ -875,12 +771,6 @@ BEGIN_FTR_SECTION
- /* Skip next section on POWER7 */
- b 8f
- END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
-- /* Turn on TM so we can access TFHAR/TFIAR/TEXASR */
-- mfmsr r8
-- li r0, 1
-- rldimi r8, r0, MSR_TM_LG, 63-MSR_TM_LG
-- mtmsrd r8
--
- /* Load up POWER8-specific registers */
- ld r5, VCPU_IAMR(r4)
- lwz r6, VCPU_PSPB(r4)
-@@ -1470,106 +1360,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
-
- #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
- BEGIN_FTR_SECTION
-- b 2f
--END_FTR_SECTION_IFCLR(CPU_FTR_TM)
-- /* Turn on TM. */
-- mfmsr r8
-- li r0, 1
-- rldimi r8, r0, MSR_TM_LG, 63-MSR_TM_LG
-- mtmsrd r8
--
-- ld r5, VCPU_MSR(r9)
-- rldicl. r5, r5, 64 - MSR_TS_S_LG, 62
-- beq 1f /* TM not active in guest. */
--
-- li r3, TM_CAUSE_KVM_RESCHED
--
-- /* Clear the MSR RI since r1, r13 are all going to be foobar. */
-- li r5, 0
-- mtmsrd r5, 1
--
-- /* All GPRs are volatile at this point. */
-- TRECLAIM(R3)
--
-- /* Temporarily store r13 and r9 so we have some regs to play with */
-- SET_SCRATCH0(r13)
-- GET_PACA(r13)
-- std r9, PACATMSCRATCH(r13)
-- ld r9, HSTATE_KVM_VCPU(r13)
--
-- /* Get a few more GPRs free. */
-- std r29, VCPU_GPRS_TM(29)(r9)
-- std r30, VCPU_GPRS_TM(30)(r9)
-- std r31, VCPU_GPRS_TM(31)(r9)
--
-- /* Save away PPR and DSCR soon so don't run with user values. */
-- mfspr r31, SPRN_PPR
-- HMT_MEDIUM
-- mfspr r30, SPRN_DSCR
-- ld r29, HSTATE_DSCR(r13)
-- mtspr SPRN_DSCR, r29
--
-- /* Save all but r9, r13 & r29-r31 */
-- reg = 0
-- .rept 29
-- .if (reg != 9) && (reg != 13)
-- std reg, VCPU_GPRS_TM(reg)(r9)
-- .endif
-- reg = reg + 1
-- .endr
-- /* ... now save r13 */
-- GET_SCRATCH0(r4)
-- std r4, VCPU_GPRS_TM(13)(r9)
-- /* ... and save r9 */
-- ld r4, PACATMSCRATCH(r13)
-- std r4, VCPU_GPRS_TM(9)(r9)
--
-- /* Reload stack pointer and TOC. */
-- ld r1, HSTATE_HOST_R1(r13)
-- ld r2, PACATOC(r13)
--
-- /* Set MSR RI now we have r1 and r13 back. */
-- li r5, MSR_RI
-- mtmsrd r5, 1
--
-- /* Save away checkpinted SPRs. */
-- std r31, VCPU_PPR_TM(r9)
-- std r30, VCPU_DSCR_TM(r9)
-- mflr r5
-- mfcr r6
-- mfctr r7
-- mfspr r8, SPRN_AMR
-- mfspr r10, SPRN_TAR
-- std r5, VCPU_LR_TM(r9)
-- stw r6, VCPU_CR_TM(r9)
-- std r7, VCPU_CTR_TM(r9)
-- std r8, VCPU_AMR_TM(r9)
-- std r10, VCPU_TAR_TM(r9)
--
-- /* Restore r12 as trap number. */
-- lwz r12, VCPU_TRAP(r9)
--
-- /* Save FP/VSX. */
-- addi r3, r9, VCPU_FPRS_TM
-- bl store_fp_state
-- addi r3, r9, VCPU_VRS_TM
-- bl store_vr_state
-- mfspr r6, SPRN_VRSAVE
-- stw r6, VCPU_VRSAVE_TM(r9)
--1:
-- /*
-- * We need to save these SPRs after the treclaim so that the software
-- * error code is recorded correctly in the TEXASR. Also the user may
-- * change these outside of a transaction, so they must always be
-- * context switched.
-- */
-- mfspr r5, SPRN_TFHAR
-- mfspr r6, SPRN_TFIAR
-- mfspr r7, SPRN_TEXASR
-- std r5, VCPU_TFHAR(r9)
-- std r6, VCPU_TFIAR(r9)
-- std r7, VCPU_TEXASR(r9)
--2:
-+ bl kvmppc_save_tm
-+END_FTR_SECTION_IFSET(CPU_FTR_TM)
- #endif
-
- /* Increment yield count if they have a VPA */
-@@ -2694,6 +2486,239 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
- mr r4,r31
- blr
-
-+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
-+/*
-+ * Save transactional state and TM-related registers.
-+ * Called with r9 pointing to the vcpu struct.
-+ * This can modify all checkpointed registers, but
-+ * restores r1, r2 and r9 (vcpu pointer) before exit.
-+ */
-+kvmppc_save_tm:
-+ mflr r0
-+ std r0, PPC_LR_STKOFF(r1)
-+
-+ /* Turn on TM. */
-+ mfmsr r8
-+ li r0, 1
-+ rldimi r8, r0, MSR_TM_LG, 63-MSR_TM_LG
-+ mtmsrd r8
-+
-+ ld r5, VCPU_MSR(r9)
-+ rldicl. r5, r5, 64 - MSR_TS_S_LG, 62
-+ beq 1f /* TM not active in guest. */
-+
-+ std r1, HSTATE_HOST_R1(r13)
-+ li r3, TM_CAUSE_KVM_RESCHED
-+
-+ /* Clear the MSR RI since r1, r13 are all going to be foobar. */
-+ li r5, 0
-+ mtmsrd r5, 1
-+
-+ /* All GPRs are volatile at this point. */
-+ TRECLAIM(R3)
-+
-+ /* Temporarily store r13 and r9 so we have some regs to play with */
-+ SET_SCRATCH0(r13)
-+ GET_PACA(r13)
-+ std r9, PACATMSCRATCH(r13)
-+ ld r9, HSTATE_KVM_VCPU(r13)
-+
-+ /* Get a few more GPRs free. */
-+ std r29, VCPU_GPRS_TM(29)(r9)
-+ std r30, VCPU_GPRS_TM(30)(r9)
-+ std r31, VCPU_GPRS_TM(31)(r9)
-+
-+ /* Save away PPR and DSCR soon so don't run with user values. */
-+ mfspr r31, SPRN_PPR
-+ HMT_MEDIUM
-+ mfspr r30, SPRN_DSCR
-+ ld r29, HSTATE_DSCR(r13)
-+ mtspr SPRN_DSCR, r29
-+
-+ /* Save all but r9, r13 & r29-r31 */
-+ reg = 0
-+ .rept 29
-+ .if (reg != 9) && (reg != 13)
-+ std reg, VCPU_GPRS_TM(reg)(r9)
-+ .endif
-+ reg = reg + 1
-+ .endr
-+ /* ... now save r13 */
-+ GET_SCRATCH0(r4)
-+ std r4, VCPU_GPRS_TM(13)(r9)
-+ /* ... and save r9 */
-+ ld r4, PACATMSCRATCH(r13)
-+ std r4, VCPU_GPRS_TM(9)(r9)
-+
-+ /* Reload stack pointer and TOC. */
-+ ld r1, HSTATE_HOST_R1(r13)
-+ ld r2, PACATOC(r13)
-+
-+ /* Set MSR RI now we have r1 and r13 back. */
-+ li r5, MSR_RI
-+ mtmsrd r5, 1
-+
-+ /* Save away checkpinted SPRs. */
-+ std r31, VCPU_PPR_TM(r9)
-+ std r30, VCPU_DSCR_TM(r9)
-+ mflr r5
-+ mfcr r6
-+ mfctr r7
-+ mfspr r8, SPRN_AMR
-+ mfspr r10, SPRN_TAR
-+ std r5, VCPU_LR_TM(r9)
-+ stw r6, VCPU_CR_TM(r9)
-+ std r7, VCPU_CTR_TM(r9)
-+ std r8, VCPU_AMR_TM(r9)
-+ std r10, VCPU_TAR_TM(r9)
-+
-+ /* Restore r12 as trap number. */
-+ lwz r12, VCPU_TRAP(r9)
-+
-+ /* Save FP/VSX. */
-+ addi r3, r9, VCPU_FPRS_TM
-+ bl store_fp_state
-+ addi r3, r9, VCPU_VRS_TM
-+ bl store_vr_state
-+ mfspr r6, SPRN_VRSAVE
-+ stw r6, VCPU_VRSAVE_TM(r9)
-+1:
-+ /*
-+ * We need to save these SPRs after the treclaim so that the software
-+ * error code is recorded correctly in the TEXASR. Also the user may
-+ * change these outside of a transaction, so they must always be
-+ * context switched.
-+ */
-+ mfspr r5, SPRN_TFHAR
-+ mfspr r6, SPRN_TFIAR
-+ mfspr r7, SPRN_TEXASR
-+ std r5, VCPU_TFHAR(r9)
-+ std r6, VCPU_TFIAR(r9)
-+ std r7, VCPU_TEXASR(r9)
-+
-+ ld r0, PPC_LR_STKOFF(r1)
-+ mtlr r0
-+ blr
-+
-+/*
-+ * Restore transactional state and TM-related registers.
-+ * Called with r4 pointing to the vcpu struct.
-+ * This potentially modifies all checkpointed registers.
-+ * It restores r1, r2, r4 from the PACA.
-+ */
-+kvmppc_restore_tm:
-+ mflr r0
-+ std r0, PPC_LR_STKOFF(r1)
-+
-+ /* Turn on TM/FP/VSX/VMX so we can restore them. */
-+ mfmsr r5
-+ li r6, MSR_TM >> 32
-+ sldi r6, r6, 32
-+ or r5, r5, r6
-+ ori r5, r5, MSR_FP
-+ oris r5, r5, (MSR_VEC | MSR_VSX)@h
-+ mtmsrd r5
-+
-+ /*
-+ * The user may change these outside of a transaction, so they must
-+ * always be context switched.
-+ */
-+ ld r5, VCPU_TFHAR(r4)
-+ ld r6, VCPU_TFIAR(r4)
-+ ld r7, VCPU_TEXASR(r4)
-+ mtspr SPRN_TFHAR, r5
-+ mtspr SPRN_TFIAR, r6
-+ mtspr SPRN_TEXASR, r7
-+
-+ ld r5, VCPU_MSR(r4)
-+ rldicl. r5, r5, 64 - MSR_TS_S_LG, 62
-+ beqlr /* TM not active in guest */
-+ std r1, HSTATE_HOST_R1(r13)
-+
-+ /* Make sure the failure summary is set, otherwise we'll program check
-+ * when we trechkpt. It's possible that this might have been not set
-+ * on a kvmppc_set_one_reg() call but we shouldn't let this crash the
-+ * host.
-+ */
-+ oris r7, r7, (TEXASR_FS)@h
-+ mtspr SPRN_TEXASR, r7
-+
-+ /*
-+ * We need to load up the checkpointed state for the guest.
-+ * We need to do this early as it will blow away any GPRs, VSRs and
-+ * some SPRs.
-+ */
-+
-+ mr r31, r4
-+ addi r3, r31, VCPU_FPRS_TM
-+ bl load_fp_state
-+ addi r3, r31, VCPU_VRS_TM
-+ bl load_vr_state
-+ mr r4, r31
-+ lwz r7, VCPU_VRSAVE_TM(r4)
-+ mtspr SPRN_VRSAVE, r7
-+
-+ ld r5, VCPU_LR_TM(r4)
-+ lwz r6, VCPU_CR_TM(r4)
-+ ld r7, VCPU_CTR_TM(r4)
-+ ld r8, VCPU_AMR_TM(r4)
-+ ld r9, VCPU_TAR_TM(r4)
-+ mtlr r5
-+ mtcr r6
-+ mtctr r7
-+ mtspr SPRN_AMR, r8
-+ mtspr SPRN_TAR, r9
-+
-+ /*
-+ * Load up PPR and DSCR values but don't put them in the actual SPRs
-+ * till the last moment to avoid running with userspace PPR and DSCR for
-+ * too long.
-+ */
-+ ld r29, VCPU_DSCR_TM(r4)
-+ ld r30, VCPU_PPR_TM(r4)
-+
-+ std r2, PACATMSCRATCH(r13) /* Save TOC */
-+
-+ /* Clear the MSR RI since r1, r13 are all going to be foobar. */
-+ li r5, 0
-+ mtmsrd r5, 1
-+
-+ /* Load GPRs r0-r28 */
-+ reg = 0
-+ .rept 29
-+ ld reg, VCPU_GPRS_TM(reg)(r31)
-+ reg = reg + 1
-+ .endr
-+
-+ mtspr SPRN_DSCR, r29
-+ mtspr SPRN_PPR, r30
-+
-+ /* Load final GPRs */
-+ ld 29, VCPU_GPRS_TM(29)(r31)
-+ ld 30, VCPU_GPRS_TM(30)(r31)
-+ ld 31, VCPU_GPRS_TM(31)(r31)
-+
-+ /* TM checkpointed state is now setup. All GPRs are now volatile. */
-+ TRECHKPT
-+
-+ /* Now let's get back the state we need. */
-+ HMT_MEDIUM
-+ GET_PACA(r13)
-+ ld r29, HSTATE_DSCR(r13)
-+ mtspr SPRN_DSCR, r29
-+ ld r4, HSTATE_KVM_VCPU(r13)
-+ ld r1, HSTATE_HOST_R1(r13)
-+ ld r2, PACATMSCRATCH(r13)
-+
-+ /* Set the MSR RI since we have our registers back. */
-+ li r5, MSR_RI
-+ mtmsrd r5, 1
-+
-+ ld r0, PPC_LR_STKOFF(r1)
-+ mtlr r0
-+ blr
-+#endif
-+
- /*
- * We come here if we get any exception or interrupt while we are
- * executing host real mode code while in guest MMU context.
---
-2.8.0.rc3
diff --git a/kvm-ppc-Book3S-HV-Save-restore-TM-state.patch b/kvm-ppc-Book3S-HV-Save-restore-TM-state.patch
deleted file mode 100644
index f63aa795d..000000000
--- a/kvm-ppc-Book3S-HV-Save-restore-TM-state.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-Subject: [PATCH 2/2] KVM: PPC: Book3S HV: Save/restore TM state in H_CEDE
-From: Paul Mackerras <paulus@ozlabs.org>
-Date: 2016-07-28 6:11:19
-
-It turns out that if the guest does a H_CEDE while the CPU is in
-a transactional state, and the H_CEDE does a nap, and the nap
-loses the architected state of the CPU (which is is allowed to do),
-then we lose the checkpointed state of the virtual CPU. In addition,
-the transactional-memory state recorded in the MSR gets reset back
-to non-transactional, and when we try to return to the guest, we take
-a TM bad thing type of program interrupt because we are trying to
-transition from non-transactional to transactional with a hrfid
-instruction, which is not permitted.
-
-The result of the program interrupt occurring at that point is that
-the host CPU will hang in an infinite loop with interrupts disabled.
-Thus this is a denial of service vulnerability in the host which can
-be triggered by any guest (and depending on the guest kernel, it can
-potentially triggered by unprivileged userspace in the guest).
-
-This vulnerability has been assigned the ID CVE-2016-5412.
-
-To fix this, we save the TM state before napping and restore it
-on exit from the nap, when handling a H_CEDE in real mode. The
-case where H_CEDE exits to host virtual mode is already OK (as are
-other hcalls which exit to host virtual mode) because the exit
-path saves the TM state.
-
-Cc: stable@vger.kernel.org # v3.15+
-Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
----
- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
-diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
-index cfa4031..543124f 100644
---- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
-+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
-@@ -2093,6 +2093,13 @@ _GLOBAL(kvmppc_h_cede) /* r3 = vcpu pointer, r11 = msr, r13 = paca */
- /* save FP state */
- bl kvmppc_save_fp
-
-+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
-+BEGIN_FTR_SECTION
-+ ld r9, HSTATE_KVM_VCPU(r13)
-+ bl kvmppc_save_tm
-+END_FTR_SECTION_IFSET(CPU_FTR_TM)
-+#endif
-+
- /*
- * Set DEC to the smaller of DEC and HDEC, so that we wake
- * no later than the end of our timeslice (HDEC interrupts
-@@ -2169,6 +2176,12 @@ kvm_end_cede:
- bl kvmhv_accumulate_time
- #endif
-
-+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
-+BEGIN_FTR_SECTION
-+ bl kvmppc_restore_tm
-+END_FTR_SECTION_IFSET(CPU_FTR_TM)
-+#endif
-+
- /* load up FP state */
- bl kvmppc_load_fp
-
---
-2.8.0.rc3
diff --git a/qcom-QDF2432-tmp-errata.patch b/qcom-QDF2432-tmp-errata.patch
new file mode 100644
index 000000000..f7ace4787
--- /dev/null
+++ b/qcom-QDF2432-tmp-errata.patch
@@ -0,0 +1,59 @@
+From edc7986d4d405daebaf2f66269b353da579fce5f Mon Sep 17 00:00:00 2001
+From: Christopher Covington <cov@codeaurora.org>
+Date: Tue, 31 May 2016 16:19:02 -0400
+Subject: arm64: Workaround for QDF2432 ID_AA64 SR accesses
+
+The ARMv8.0 architecture reserves several system register encodings for
+future use. These encodings should behave as read-only and always return
+zero on a read. As described in Errata 94, the CPU cores in the QDF2432
+errantly cause an instruction abort if an AArch64 MRS instruction attempts
+to read any of the following system register encodings:
+
+ Op0, Op1, CRn, CRm, Op2
+ 3, 0, C0, [C4-C7], [2-3, 6-7]
+ 3, 0, C0, C3, [3-7]
+ 3, 0, C0, [C4,C6,C7], [4-5]
+ 3, 0, C0, C2, [6-7]
+
+Naively projecting ARMv8.0 names, this space includes:
+
+ ID_AA64PFR[2-7]_EL1
+ ID_AA64DFR[2-3]_EL1
+ ID_AA64AFR[2-3]_EL1
+ ID_AA64ISAR[2-7]_EL1
+ ID_AA64MMFR[2-7]_EL1
+
+As of v4.8-rc2, Linux only attempts to query one register in this space,
+ID_AA64MMFR2_EL1. As simple workaround, skip that access when the affected
+MIDR is detected.
+
+Signed-off-by: Christopher Covington <cov@codeaurora.org>
+---
+ arch/arm64/kernel/cpuinfo.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
+index ed1b84f..790de6b 100644
+--- a/arch/arm64/kernel/cpuinfo.c
++++ b/arch/arm64/kernel/cpuinfo.c
+@@ -325,6 +325,8 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info)
+
+ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
+ {
++ bool qdf2432_cpu = read_cpuid_id() == 0x510f2811;
++
+ info->reg_cntfrq = arch_timer_get_cntfrq();
+ info->reg_ctr = read_cpuid_cachetype();
+ info->reg_dczid = read_cpuid(DCZID_EL0);
+@@ -337,7 +339,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
+ info->reg_id_aa64isar1 = read_cpuid(ID_AA64ISAR1_EL1);
+ info->reg_id_aa64mmfr0 = read_cpuid(ID_AA64MMFR0_EL1);
+ info->reg_id_aa64mmfr1 = read_cpuid(ID_AA64MMFR1_EL1);
+- info->reg_id_aa64mmfr2 = read_cpuid(ID_AA64MMFR2_EL1);
++ info->reg_id_aa64mmfr2 = qdf2432_cpu ? 0 : read_cpuid(ID_AA64MMFR2_EL1);
+ info->reg_id_aa64pfr0 = read_cpuid(ID_AA64PFR0_EL1);
+ info->reg_id_aa64pfr1 = read_cpuid(ID_AA64PFR1_EL1);
+
+--
+cgit v0.12
+
diff --git a/remove-binary-diff.pl b/remove-binary-diff.pl
new file mode 100755
index 000000000..9048490ca
--- /dev/null
+++ b/remove-binary-diff.pl
@@ -0,0 +1,34 @@
+#!/usr/bin/perl -w
+# A script to remove those terrible binary diffs from the patches which
+# screw up everything and rain on my parade.
+
+use strict;
+
+my @args=@ARGV;
+my @current_patch;
+my $is_binary = 0;
+my $cnt = 0;
+
+while(my $row = <>) {
+ # diff marks the start of a new file to check
+ if ($row =~ /^diff --git.*?(\S+)$/) {
+ if (!$is_binary) {
+ foreach my $line (@current_patch) {
+ print $line;
+ }
+ }
+ $is_binary = 0;
+ @current_patch = ();
+ } elsif ($row =~ /Binary files (.)* differ$/) {
+ $is_binary = 1;
+ } elsif ($row =~ /GIT binary patch/) {
+ $is_binary = 1;
+ }
+ push (@current_patch, $row);
+}
+
+if (!$is_binary) {
+ foreach my $line (@current_patch) {
+ print $line;
+ }
+}
diff --git a/selinux-namespace-fix.patch b/selinux-namespace-fix.patch
new file mode 100644
index 000000000..f94ec15d8
--- /dev/null
+++ b/selinux-namespace-fix.patch
@@ -0,0 +1,57 @@
+From 4a49d45dd58994f4fc9b40c502252403caadee88 Mon Sep 17 00:00:00 2001
+From: Stephen Smalley <sds@tycho.nsa.gov>
+Date: Thu, 8 Dec 2016 09:14:47 -0500
+Subject: [PATCH] selinux: allow context mounts on tmpfs, ramfs, devpts within
+ user namespaces
+
+commit aad82892af261b9903cc11c55be3ecf5f0b0b4f8 ("selinux: Add support for
+unprivileged mounts from user namespaces") prohibited any use of context
+mount options within non-init user namespaces. However, this breaks
+use of context mount options for tmpfs mounts within user namespaces,
+which are being used by Docker/runc. There is no reason to block such
+usage for tmpfs, ramfs or devpts. Exempt these filesystem types
+from this restriction.
+
+Before:
+sh$ userns_child_exec -p -m -U -M '0 1000 1' -G '0 1000 1' bash
+sh# mount -t tmpfs -o context=system_u:object_r:user_tmp_t:s0:c13 none /tmp
+mount: tmpfs is write-protected, mounting read-only
+mount: cannot mount tmpfs read-only
+
+After:
+sh$ userns_child_exec -p -m -U -M '0 1000 1' -G '0 1000 1' bash
+sh# mount -t tmpfs -o context=system_u:object_r:user_tmp_t:s0:c13 none /tmp
+sh# ls -Zd /tmp
+unconfined_u:object_r:user_tmp_t:s0:c13 /tmp
+
+Signed-off-by: Stephen Smalley <sds@tycho.nsa.gov>
+Signed-off-by: Paul Moore <paul@paul-moore.com>
+---
+ security/selinux/hooks.c | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
+index b508a5a..e7c5481 100644
+--- a/security/selinux/hooks.c
++++ b/security/selinux/hooks.c
+@@ -834,10 +834,14 @@ static int selinux_set_mnt_opts(struct super_block *sb,
+ }
+
+ /*
+- * If this is a user namespace mount, no contexts are allowed
+- * on the command line and security labels must be ignored.
++ * If this is a user namespace mount and the filesystem type is not
++ * explicitly whitelisted, then no contexts are allowed on the command
++ * line and security labels must be ignored.
+ */
+- if (sb->s_user_ns != &init_user_ns) {
++ if (sb->s_user_ns != &init_user_ns &&
++ strcmp(sb->s_type->name, "tmpfs") &&
++ strcmp(sb->s_type->name, "ramfs") &&
++ strcmp(sb->s_type->name, "devpts")) {
+ if (context_sid || fscontext_sid || rootcontext_sid ||
+ defcontext_sid) {
+ rc = -EACCES;
+--
+2.4.11
+
diff --git a/sources b/sources
index cc6fb3891..f50efa92a 100644
--- a/sources
+++ b/sources
@@ -1,2 +1,2 @@
-5276563eb1f39a048e4a8a887408c031 linux-4.7.tar.xz
-fe259c02c75eec61d1aa4b1211f3c853 perf-man-4.7.tar.gz
+SHA512 (linux-4.9.tar.xz) = bf67ff812cc3cb7e5059e82cc5db0d9a7c5637f7ed9a42e4730c715bf7047c81ed3a571225f92a33ef0b6d65f35595bc32d773356646df2627da55e9bc7f1f1a
+SHA512 (perf-man-4.9.tar.gz) = d23bb3da1eadd6623fddbf4696948de7675f3dcf57c711a7427dd7ae111394f58d8f42752938bbea7cd219f1e7f6f116fc67a1c74f769711063940a065f37b99