diff options
| -rw-r--r-- | Revert-ALSA-hda-remove-controller-dependency-on-i915.patch | 43 | ||||
| -rw-r--r-- | drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch | 70 | ||||
| -rw-r--r-- | drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch | 230 | ||||
| -rw-r--r-- | gitrev | 2 | ||||
| -rw-r--r-- | kernel.spec | 16 | ||||
| -rw-r--r-- | sources | 2 |
6 files changed, 360 insertions, 3 deletions
diff --git a/Revert-ALSA-hda-remove-controller-dependency-on-i915.patch b/Revert-ALSA-hda-remove-controller-dependency-on-i915.patch new file mode 100644 index 000000000..657f7aab8 --- /dev/null +++ b/Revert-ALSA-hda-remove-controller-dependency-on-i915.patch @@ -0,0 +1,43 @@ +From 89b9366047f51fcef7f7e36f2b351a98326c8656 Mon Sep 17 00:00:00 2001 +From: Hans de Goede <hdegoede@redhat.com> +Date: Tue, 12 Jul 2016 22:40:01 +0200 +Subject: [PATCH] Revert "ALSA: hda - remove controller dependency on i915 + power well for SKL" + +This reverts commit 03b135cebc47d75ea2dc346770374ab741966955. +--- + sound/pci/hda/hda_intel.c | 4 +++- + sound/pci/hda/patch_hdmi.c | 2 +- + 2 files changed, 4 insertions(+), 2 deletions(-) + +diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c +index e320c44..290d60f 100644 +--- a/sound/pci/hda/hda_intel.c ++++ b/sound/pci/hda/hda_intel.c +@@ -361,7 +361,9 @@ enum { + #define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \ + ((pci)->device == 0x0c0c) || \ + ((pci)->device == 0x0d0c) || \ +- ((pci)->device == 0x160c)) ++ ((pci)->device == 0x160c) || \ ++ ((pci)->device == 0xa170) || \ ++ ((pci)->device == 0x9d70)) + + #define IS_SKL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa170) + #define IS_SKL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d70) +diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c +index d0d5ad8..9203da1 100644 +--- a/sound/pci/hda/patch_hdmi.c ++++ b/sound/pci/hda/patch_hdmi.c +@@ -2379,7 +2379,7 @@ static int patch_i915_hsw_hdmi(struct hda_codec *codec) + /* For Haswell/Broadwell, the controller is also in the power well and + * can cover the codec power request, and so need not set this flag. + */ +- if (!is_haswell(codec) && !is_broadwell(codec)) ++ if (!is_haswell(codec) && !is_broadwell(codec) && !is_skylake(codec)) + codec->core.link_power_control = 1; + + codec->patch_ops.set_power_state = haswell_set_power_state; +-- +2.7.4 + diff --git a/drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch b/drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch new file mode 100644 index 000000000..562d20eb5 --- /dev/null +++ b/drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch @@ -0,0 +1,70 @@ +From patchwork Fri Jul 8 15:37:35 2016 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: drm/amdgpu: Disable RPM helpers while reprobing connectors on resume +From: cpaul@redhat.com +X-Patchwork-Id: 97837 +Message-Id: <1467992256-23832-1-git-send-email-cpaul@redhat.com> +To: amd-gfx@lists.freedesktop.org +Cc: Tom St Denis <tom.stdenis@amd.com>, Jammy Zhou <Jammy.Zhou@amd.com>, + open list <linux-kernel@vger.kernel.org>, stable@vger.kernel.org, + "open list:RADEON and AMDGPU DRM DRIVERS" + <dri-devel@lists.freedesktop.org>, + Alex Deucher <alexander.deucher@amd.com>, Lyude <cpaul@redhat.com>, + Flora Cui <Flora.Cui@amd.com>, + =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>, + Monk Liu <Monk.Liu@amd.com> +Date: Fri, 8 Jul 2016 11:37:35 -0400 + +Just about all of amdgpu's connector probing functions try to acquire +runtime PM refs. If we try to do this in the context of +amdgpu_resume_kms by calling drm_helper_hpd_irq_event(), we end up +deadlocking the system. + +Since we're guaranteed to be holding the spinlock for RPM in +amdgpu_resume_kms, and we already know the GPU is in working order, we +need to prevent the RPM helpers from trying to run during the initial +connector reprobe on resume. + +There's a couple of solutions I've explored for fixing this, but this +one by far seems to be the simplest and most reliable (plus I'm pretty +sure that's what disable_depth is there for anyway). + +Reproduction recipe: + - Get any laptop dual GPUs using PRIME + - Make sure runtime PM is enabled for amdgpu + - Boot the machine + - If the machine managed to boot without hanging, switch out of X to + another VT. This should definitely cause X to hang infinitely. + +Cc: stable@vger.kernel.org +Signed-off-by: Lyude <cpaul@redhat.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index 6e92008..46c1fee 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -1841,7 +1841,19 @@ int amdgpu_resume_kms(struct drm_device *dev, bool resume, bool fbcon) + } + + drm_kms_helper_poll_enable(dev); ++ ++ /* ++ * Most of the connector probing functions try to acquire runtime pm ++ * refs to ensure that the GPU is powered on when connector polling is ++ * performed. Since we're calling this from a runtime PM callback, ++ * trying to acquire rpm refs will cause us to deadlock. ++ * ++ * Since we're guaranteed to be holding the rpm lock, it's safe to ++ * temporarily disable the rpm helpers so this doesn't deadlock us. ++ */ ++ dev->dev->power.disable_depth++; + drm_helper_hpd_irq_event(dev); ++ dev->dev->power.disable_depth--; + + if (fbcon) { + amdgpu_fbdev_set_suspend(adev, 0); diff --git a/drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch b/drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch new file mode 100644 index 000000000..a7680e283 --- /dev/null +++ b/drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch @@ -0,0 +1,230 @@ +From 5fc9d375bac02e054fcaaf14a06bebc6c7118008 Mon Sep 17 00:00:00 2001 +From: "cpaul@redhat.com" <cpaul@redhat.com> +Date: Tue, 12 Jul 2016 13:36:03 -0400 +Subject: [PATCH] drm/i915/skl: Add support for the SAGV, fix underrun hangs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Since the watermark calculations for Skylake are still broken, we're apt +to hitting underruns very easily under multi-monitor configurations. +While it would be lovely if this was fixed, it's not. Another problem +that's been coming from this however, is the mysterious issue of +underruns causing full system hangs. An easy way to reproduce this with +a skylake system: + +- Get a laptop with a skylake GPU, and hook up two external monitors to + it +- Move the cursor from the built-in LCD to one of the external displays + as quickly as you can +- You'll get a few pipe underruns, and eventually the entire system will + just freeze. + +After doing a lot of investigation and reading through the bspec, I +found the existence of the SAGV, which is responsible for adjusting the +system agent voltage and clock frequencies depending on how much power +we need. According to the bspec: + +"The display engine access to system memory is blocked during the + adjustment time. SAGV defaults to enabled. Software must use the + GT-driver pcode mailbox to disable SAGV when the display engine is not + able to tolerate the blocking time." + +The rest of the bspec goes on to explain that software can simply leave +the SAGV enabled, and disable it when we use interlaced pipes/have more +then one pipe active. + +Sure enough, with this patchset the system hangs resulting from pipe +underruns on Skylake have completely vanished on my T460s. Additionally, +the bspec mentions turning off the SAGV with more then one pipe enabled +as a workaround for display underruns. While this patch doesn't entirely +fix that, it looks like it does improve the situation a little bit so +it's likely this is going to be required to make watermarks on Skylake +fully functional. + +Changes since v2: + - Really apply minor style nitpicks to patch this time +Changes since v1: + - Added comments about this probably being one of the requirements to + fixing Skylake's watermark issues + - Minor style nitpicks from Matt Roper + - Disable these functions on Broxton, since it doesn't have an SAGV + +Cc: Matt Roper <matthew.d.roper@intel.com> +Cc: Daniel Vetter <daniel.vetter@ffwll.ch> +Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> +Signed-off-by: Lyude <cpaul@redhat.com> +Reviewed-by: Matt Roper <matthew.d.roper@intel.com> +--- + drivers/gpu/drm/i915/i915_drv.h | 2 + + drivers/gpu/drm/i915/i915_reg.h | 5 ++ + drivers/gpu/drm/i915/intel_pm.c | 110 ++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 117 insertions(+) + +diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h +index 608f8e44f353..274b57ac1a91 100644 +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -1942,6 +1942,8 @@ struct drm_i915_private { + struct i915_suspend_saved_registers regfile; + struct vlv_s0ix_state vlv_s0ix_state; + ++ bool skl_sagv_enabled; ++ + struct { + /* + * Raw watermark latency values: +diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h +index b407411e31ba..9472949e8442 100644 +--- a/drivers/gpu/drm/i915/i915_reg.h ++++ b/drivers/gpu/drm/i915/i915_reg.h +@@ -7094,6 +7094,11 @@ enum skl_disp_power_wells { + #define HSW_PCODE_DE_WRITE_FREQ_REQ 0x17 + #define DISPLAY_IPS_CONTROL 0x19 + #define HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL 0x1A ++#define GEN9_PCODE_SAGV_CONTROL 0x21 ++#define GEN9_SAGV_DISABLE 0x0 ++#define GEN9_SAGV_LOW_FREQ 0x1 ++#define GEN9_SAGV_HIGH_FREQ 0x2 ++#define GEN9_SAGV_DYNAMIC_FREQ 0x3 + #define GEN6_PCODE_DATA _MMIO(0x138128) + #define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8 + #define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16 +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index f764d284e6a0..439a38b08760 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2847,6 +2847,109 @@ skl_wm_plane_id(const struct intel_plane *plane) + } + + static void ++skl_sagv_get_hw_state(struct drm_i915_private *dev_priv) ++{ ++ u32 temp; ++ int ret; ++ ++ if (IS_BROXTON(dev_priv)) ++ return; ++ ++ mutex_lock(&dev_priv->rps.hw_lock); ++ ret = sandybridge_pcode_read(dev_priv, GEN9_PCODE_SAGV_CONTROL, &temp); ++ mutex_unlock(&dev_priv->rps.hw_lock); ++ ++ if (!ret) { ++ dev_priv->skl_sagv_enabled = !!(temp & GEN9_SAGV_DYNAMIC_FREQ); ++ } else { ++ /* ++ * If for some reason we can't access the SAGV state, follow ++ * the bspec and assume it's enabled ++ */ ++ DRM_ERROR("Failed to get SAGV state, assuming enabled\n"); ++ dev_priv->skl_sagv_enabled = true; ++ } ++} ++ ++/* ++ * SAGV dynamically adjusts the system agent voltage and clock frequencies ++ * depending on power and performance requirements. The display engine access ++ * to system memory is blocked during the adjustment time. Having this enabled ++ * in multi-pipe configurations can cause issues (such as underruns causing ++ * full system hangs), and the bspec also suggests that software disable it ++ * when more then one pipe is enabled. ++ */ ++static int ++skl_enable_sagv(struct drm_i915_private *dev_priv) ++{ ++ int ret; ++ ++ if (IS_BROXTON(dev_priv)) ++ return 0; ++ if (dev_priv->skl_sagv_enabled) ++ return 0; ++ ++ mutex_lock(&dev_priv->rps.hw_lock); ++ DRM_DEBUG_KMS("Enabling the SAGV\n"); ++ ++ ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL, ++ GEN9_SAGV_DYNAMIC_FREQ); ++ if (!ret) ++ dev_priv->skl_sagv_enabled = true; ++ else ++ DRM_ERROR("Failed to enable the SAGV\n"); ++ ++ /* We don't need to wait for SAGV when enabling */ ++ mutex_unlock(&dev_priv->rps.hw_lock); ++ return ret; ++} ++ ++static int ++skl_disable_sagv(struct drm_i915_private *dev_priv) ++{ ++ int ret = 0; ++ unsigned long timeout; ++ u32 temp; ++ ++ if (IS_BROXTON(dev_priv)) ++ return 0; ++ if (!dev_priv->skl_sagv_enabled) ++ return 0; ++ ++ mutex_lock(&dev_priv->rps.hw_lock); ++ DRM_DEBUG_KMS("Disabling the SAGV\n"); ++ ++ /* bspec says to keep retrying for at least 1 ms */ ++ timeout = jiffies + msecs_to_jiffies(1); ++ do { ++ ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL, ++ GEN9_SAGV_DISABLE); ++ if (ret) { ++ DRM_ERROR("Failed to disable the SAGV\n"); ++ goto out; ++ } ++ ++ ret = sandybridge_pcode_read(dev_priv, GEN9_PCODE_SAGV_CONTROL, ++ &temp); ++ if (ret) { ++ DRM_ERROR("Failed to check the status of the SAGV\n"); ++ goto out; ++ } ++ } while (!(temp & 0x1) && jiffies < timeout); ++ ++ if (temp & 0x1) { ++ dev_priv->skl_sagv_enabled = false; ++ } else { ++ ret = -1; ++ DRM_ERROR("Request to disable SAGV timed out\n"); ++ } ++ ++out: ++ mutex_unlock(&dev_priv->rps.hw_lock); ++ return ret; ++} ++ ++static void + skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, + const struct intel_crtc_state *cstate, + struct skl_ddb_entry *alloc, /* out */ +@@ -3525,6 +3628,11 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv, + struct drm_device *dev = dev_priv->dev; + struct intel_crtc *crtc; + ++ if (dev_priv->active_crtcs == 1) ++ skl_enable_sagv(dev_priv); ++ else ++ skl_disable_sagv(dev_priv); ++ + for_each_intel_crtc(dev, crtc) { + int i, level, max_level = ilk_wm_max_level(dev); + enum pipe pipe = crtc->pipe; +@@ -4072,6 +4180,8 @@ void skl_wm_get_hw_state(struct drm_device *dev) + skl_plane_relative_data_rate(cstate, pstate, 1); + } + } ++ ++ skl_sagv_get_hw_state(dev_priv); + } + + static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc) +-- +2.7.4 + @@ -1 +1 @@ -63bab2203d54529ff1a7181b0575b58a9f3575cd +fa3a9f5744a92c0d7856d4e326c8d920d1d31116 diff --git a/kernel.spec b/kernel.spec index a70eeba03..c59da2ce7 100644 --- a/kernel.spec +++ b/kernel.spec @@ -77,7 +77,7 @@ Summary: The Linux kernel # The rc snapshot level %define rcrev 7 # The git snapshot level -%define gitrev 1 +%define gitrev 3 # Set rpm version accordingly %define rpmversion 4.%{upstream_sublevel}.0 %endif @@ -647,6 +647,11 @@ Patch817: 0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch #CVE-2016-5389 CVE-2016-5969 rhbz 1354708 1355615 Patch836: tcp-make-challenge-acks-less-predictable.patch +# https://lists.fedoraproject.org/archives/list/kernel@lists.fedoraproject.org/message/A4YCP7OGMX6JLFT5V44H57GOMAQLC3M4/ +Patch837: drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch +Patch838: drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch +Patch839: Revert-ALSA-hda-remove-controller-dependency-on-i915.patch + # END OF PATCH DEFINITIONS %endif @@ -2176,6 +2181,15 @@ fi # # %changelog +* Fri Jul 15 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.7.0-0.rc7.git3.1 +- Linux v4.7-rc7-78-gfa3a9f574 + +* Thu Jul 14 2016 Josh Boyer <jwboyer@fedoraproject.org> +- Fix various i915 uncore oopses (rhbz 1340218 1325020 1342722 1347681) + +* Wed Jul 13 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.7.0-0.rc7.git2.1 +- Linux v4.7-rc7-27-gf97d104 + * Tue Jul 12 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.7.0-0.rc7.git1.1 - Linux v4.7-rc7-6-g63bab22 - Reenable debugging options. @@ -1,4 +1,4 @@ d2927020e24a76da4ab482a8bc3e9ef3 linux-4.6.tar.xz fd23b14b9d474c3dfacb6e8ee82d3a51 perf-man-4.6.tar.gz 1ec96a040683561e53e983cfdb09bab8 patch-4.7-rc7.xz -db26234012c105aea198d0a920eeaf23 patch-4.7-rc7-git1.xz +d53b761734ec9c20c291683f6a80df70 patch-4.7-rc7-git3.xz |