diff options
46 files changed, 1167 insertions, 199 deletions
diff --git a/Revert-ARM-dts-bcm2835-Add-the-DSI-module-nodes-and-.patch b/Revert-ARM-dts-bcm2835-Add-the-DSI-module-nodes-and-.patch deleted file mode 100644 index 235c39162..000000000 --- a/Revert-ARM-dts-bcm2835-Add-the-DSI-module-nodes-and-.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 7d9e74c53a4376245b4f05006f42184a1540dee8 Mon Sep 17 00:00:00 2001 -From: Peter Robinson <pbrobinson@gmail.com> -Date: Tue, 18 Jul 2017 23:21:50 +0100 -Subject: [PATCH] Revert "ARM: dts: bcm2835: Add the DSI module nodes and - clocks." - -This reverts commit 4aba4cf820545ca8ec23785c7bac40bba7e505c5. ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 8 ------- - arch/arm/boot/dts/bcm283x.dtsi | 48 +++----------------------------------- - 2 files changed, 3 insertions(+), 53 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index a7b5ce133784..e99bb149065f 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -98,11 +98,3 @@ - power-domains = <&power RPI_POWER_DOMAIN_VEC>; - status = "okay"; - }; -- --&dsi0 { -- power-domains = <&power RPI_POWER_DOMAIN_DSI0>; --}; -- --&dsi1 { -- power-domains = <&power RPI_POWER_DOMAIN_DSI1>; --}; -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 9444a9a9ba10..ce14c9ddf574 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -98,13 +98,10 @@ - #clock-cells = <1>; - reg = <0x7e101000 0x2000>; - -- /* CPRMAN derives almost everything from the -- * platform's oscillator. However, the DSI -- * pixel clocks come from the DSI analog PHY. -+ /* CPRMAN derives everything from the platform's -+ * oscillator. - */ -- clocks = <&clk_osc>, -- <&dsi0 0>, <&dsi0 1>, <&dsi0 2>, -- <&dsi1 0>, <&dsi1 1>, <&dsi1 2>; -+ clocks = <&clk_osc>; - }; - - rng@7e104000 { -@@ -412,25 +409,6 @@ - interrupts = <2 14>; /* pwa1 */ - }; - -- dsi0: dsi@7e209000 { -- compatible = "brcm,bcm2835-dsi0"; -- reg = <0x7e209000 0x78>; -- interrupts = <2 4>; -- #address-cells = <1>; -- #size-cells = <0>; -- #clock-cells = <1>; -- -- clocks = <&clocks BCM2835_PLLA_DSI0>, -- <&clocks BCM2835_CLOCK_DSI0E>, -- <&clocks BCM2835_CLOCK_DSI0P>; -- clock-names = "phy", "escape", "pixel"; -- -- clock-output-names = "dsi0_byte", -- "dsi0_ddr2", -- "dsi0_ddr"; -- -- }; -- - thermal: thermal@7e212000 { - compatible = "brcm,bcm2835-thermal"; - reg = <0x7e212000 0x8>; -@@ -497,26 +475,6 @@ - interrupts = <2 1>; - }; - -- dsi1: dsi@7e700000 { -- compatible = "brcm,bcm2835-dsi1"; -- reg = <0x7e700000 0x8c>; -- interrupts = <2 12>; -- #address-cells = <1>; -- #size-cells = <0>; -- #clock-cells = <1>; -- -- clocks = <&clocks BCM2835_PLLD_DSI1>, -- <&clocks BCM2835_CLOCK_DSI1E>, -- <&clocks BCM2835_CLOCK_DSI1P>; -- clock-names = "phy", "escape", "pixel"; -- -- clock-output-names = "dsi1_byte", -- "dsi1_ddr2", -- "dsi1_ddr"; -- -- status = "disabled"; -- }; -- - i2c1: i2c@7e804000 { - compatible = "brcm,bcm2835-i2c"; - reg = <0x7e804000 0x1000>; --- -2.13.3 - diff --git a/arm-of-restrict-dma-configuration.patch b/arm-of-restrict-dma-configuration.patch new file mode 100644 index 000000000..cc9ddd965 --- /dev/null +++ b/arm-of-restrict-dma-configuration.patch @@ -0,0 +1,121 @@ +From 723288836628bc1c0855f3bb7b64b1803e4b9e4a Mon Sep 17 00:00:00 2001 +From: Robin Murphy <robin.murphy@arm.com> +Date: Thu, 31 Aug 2017 11:32:54 +0100 +Subject: of: restrict DMA configuration + +Moving DMA configuration to happen later at driver probe time had the +unnoticed side-effect that we now perform DMA configuration for *every* +device represented in DT, rather than only those explicitly created by +the of_platform and PCI code. + +As Christoph points out, this is not really the best thing to do. Whilst +there may well be other DMA-capable buses that can benefit from having +their children automatically configured after the bridge has probed, +there are also plenty of others like USB, MDIO, etc. that definitely do +not support DMA and should not be indiscriminately processed. + +The good news is that in most cases the DT "dma-ranges" property serves +as an appropriate indicator - per a strict interpretation of the spec, +anything lacking a "dma-ranges" property should be considered not to +have a mapping of DMA address space from its children to its parent, +thus anything for which of_dma_get_range() does not succeed does not +need DMA configuration. Certain bus types have a general expectation of +DMA capability and carry a well-established precedent that an absent +"dma-ranges" implies the same as the empty property, so we automatically +opt those in to DMA configuration regardless, to avoid regressing most +existing platforms. + +Fixes: 09515ef5ddad ("of/acpi: Configure dma operations at probe time for platform/amba/pci bus devices") +Reported-by: Christoph Hellwig <hch@lst.de> +Signed-off-by: Robin Murphy <robin.murphy@arm.com> +Acked-by: Rob Herring <robh@kernel.org> +Signed-off-by: Christoph Hellwig <hch@lst.de> +--- + drivers/of/device.c | 48 ++++++++++++++++++++++++++++++++---------------- + 1 file changed, 32 insertions(+), 16 deletions(-) + +diff --git a/drivers/of/device.c b/drivers/of/device.c +index e0a28ea..04c4c95 100644 +--- a/drivers/of/device.c ++++ b/drivers/of/device.c +@@ -9,6 +9,9 @@ + #include <linux/module.h> + #include <linux/mod_devicetable.h> + #include <linux/slab.h> ++#include <linux/pci.h> ++#include <linux/platform_device.h> ++#include <linux/amba/bus.h> + + #include <asm/errno.h> + #include "of_private.h" +@@ -84,31 +87,28 @@ int of_device_add(struct platform_device *ofdev) + */ + int of_dma_configure(struct device *dev, struct device_node *np) + { +- u64 dma_addr, paddr, size; ++ u64 dma_addr, paddr, size = 0; + int ret; + bool coherent; + unsigned long offset; + const struct iommu_ops *iommu; + u64 mask; + +- /* +- * Set default coherent_dma_mask to 32 bit. Drivers are expected to +- * setup the correct supported mask. +- */ +- if (!dev->coherent_dma_mask) +- dev->coherent_dma_mask = DMA_BIT_MASK(32); +- +- /* +- * Set it to coherent_dma_mask by default if the architecture +- * code has not set it. +- */ +- if (!dev->dma_mask) +- dev->dma_mask = &dev->coherent_dma_mask; +- + ret = of_dma_get_range(np, &dma_addr, &paddr, &size); + if (ret < 0) { ++ /* ++ * For legacy reasons, we have to assume some devices need ++ * DMA configuration regardless of whether "dma-ranges" is ++ * correctly specified or not. ++ */ ++ if (!dev_is_pci(dev) && ++#ifdef CONFIG_ARM_AMBA ++ dev->bus != &amba_bustype && ++#endif ++ dev->bus != &platform_bus_type) ++ return ret == -ENODEV ? 0 : ret; ++ + dma_addr = offset = 0; +- size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); + } else { + offset = PFN_DOWN(paddr - dma_addr); + +@@ -129,6 +129,22 @@ int of_dma_configure(struct device *dev, struct device_node *np) + dev_dbg(dev, "dma_pfn_offset(%#08lx)\n", offset); + } + ++ /* ++ * Set default coherent_dma_mask to 32 bit. Drivers are expected to ++ * setup the correct supported mask. ++ */ ++ if (!dev->coherent_dma_mask) ++ dev->coherent_dma_mask = DMA_BIT_MASK(32); ++ /* ++ * Set it to coherent_dma_mask by default if the architecture ++ * code has not set it. ++ */ ++ if (!dev->dma_mask) ++ dev->dma_mask = &dev->coherent_dma_mask; ++ ++ if (!size) ++ size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); ++ + dev->dma_pfn_offset = offset; + + /* +-- +cgit v1.1 + diff --git a/baseconfig/CONFIG_MMC_SDHCI_OF b/baseconfig/CONFIG_MMC_SDHCI_OF deleted file mode 100644 index 2e588649a..000000000 --- a/baseconfig/CONFIG_MMC_SDHCI_OF +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MMC_SDHCI_OF is not set diff --git a/baseconfig/CONFIG_PWRSEQ_SD8787 b/baseconfig/CONFIG_PWRSEQ_SD8787 index 243dba034..820984327 100644 --- a/baseconfig/CONFIG_PWRSEQ_SD8787 +++ b/baseconfig/CONFIG_PWRSEQ_SD8787 @@ -1 +1 @@ -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m diff --git a/baseconfig/arm/CONFIG_CRYPTO_GHASH_ARM_CE b/baseconfig/arm/CONFIG_CRYPTO_GHASH_ARM_CE new file mode 100644 index 000000000..5c70cb19a --- /dev/null +++ b/baseconfig/arm/CONFIG_CRYPTO_GHASH_ARM_CE @@ -0,0 +1 @@ +CONFIG_CRYPTO_GHASH_ARM_CE=m diff --git a/baseconfig/arm/CONFIG_MMC b/baseconfig/arm/CONFIG_MMC new file mode 100644 index 000000000..7c2be178c --- /dev/null +++ b/baseconfig/arm/CONFIG_MMC @@ -0,0 +1 @@ +CONFIG_MMC=y diff --git a/baseconfig/arm/CONFIG_MMC_QCOM_DML b/baseconfig/arm/CONFIG_MMC_QCOM_DML deleted file mode 100644 index 11f7e7eba..000000000 --- a/baseconfig/arm/CONFIG_MMC_QCOM_DML +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MMC_QCOM_DML is not set diff --git a/baseconfig/arm/CONFIG_PWRSEQ_EMMC b/baseconfig/arm/CONFIG_PWRSEQ_EMMC new file mode 100644 index 000000000..29e883d93 --- /dev/null +++ b/baseconfig/arm/CONFIG_PWRSEQ_EMMC @@ -0,0 +1 @@ +CONFIG_PWRSEQ_EMMC=y diff --git a/baseconfig/arm/CONFIG_PWRSEQ_SIMPLE b/baseconfig/arm/CONFIG_PWRSEQ_SIMPLE new file mode 100644 index 000000000..7c8ad9b8a --- /dev/null +++ b/baseconfig/arm/CONFIG_PWRSEQ_SIMPLE @@ -0,0 +1 @@ +CONFIG_PWRSEQ_SIMPLE=y diff --git a/baseconfig/arm/arm64/CONFIG_MMC_QCOM_DML b/baseconfig/arm/arm64/CONFIG_MMC_QCOM_DML new file mode 100644 index 000000000..059d0d4f2 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_MMC_QCOM_DML @@ -0,0 +1 @@ +CONFIG_MMC_QCOM_DML=m diff --git a/baseconfig/arm/armv7/CONFIG_CRYPTO_GHASH_ARM_CE b/baseconfig/arm/armv7/CONFIG_CRYPTO_GHASH_ARM_CE deleted file mode 100644 index e2ffa82ef..000000000 --- a/baseconfig/arm/armv7/CONFIG_CRYPTO_GHASH_ARM_CE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_CRYPTO_GHASH_ARM_CE is not set diff --git a/baseconfig/arm/CONFIG_DRM_SUN4I_HDMI b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI index cda1f60f8..cda1f60f8 100644 --- a/baseconfig/arm/CONFIG_DRM_SUN4I_HDMI +++ b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI diff --git a/baseconfig/arm/armv7/CONFIG_EXYNOS5420_MCPM not set b/baseconfig/arm/armv7/CONFIG_EXYNOS5420_MCPM not set deleted file mode 100644 index d161874fe..000000000 --- a/baseconfig/arm/armv7/CONFIG_EXYNOS5420_MCPM not set +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EXYNOS5420_MCPM not set diff --git a/baseconfig/arm/armv7/CONFIG_MMC_QCOM_DML b/baseconfig/arm/armv7/CONFIG_MMC_QCOM_DML new file mode 100644 index 000000000..059d0d4f2 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_MMC_QCOM_DML @@ -0,0 +1 @@ +CONFIG_MMC_QCOM_DML=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MMC_SDHCI_OF_ESDHC b/baseconfig/arm/armv7/armv7/CONFIG_MMC_SDHCI_OF_ESDHC new file mode 100644 index 000000000..40e2f68cb --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_MMC_SDHCI_OF_ESDHC @@ -0,0 +1 @@ +CONFIG_MMC_SDHCI_OF_ESDHC=m diff --git a/baseconfig/powerpc/CONFIG_MMC_SDHCI_OF b/baseconfig/powerpc/CONFIG_MMC_SDHCI_OF deleted file mode 100644 index d2e2790aa..000000000 --- a/baseconfig/powerpc/CONFIG_MMC_SDHCI_OF +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MMC_SDHCI_OF=m diff --git a/baseconfig/powerpc/CONFIG_ADB_PMU_LED_DISK b/baseconfig/powerpc/powerpc64/CONFIG_ADB_PMU_LED_DISK index 74be3ced5..74be3ced5 100644 --- a/baseconfig/powerpc/CONFIG_ADB_PMU_LED_DISK +++ b/baseconfig/powerpc/powerpc64/CONFIG_ADB_PMU_LED_DISK diff --git a/baseconfig/x86/i686/CONFIG_MMC_SDHCI_OF b/baseconfig/x86/i686/CONFIG_MMC_SDHCI_OF deleted file mode 100644 index 2e588649a..000000000 --- a/baseconfig/x86/i686/CONFIG_MMC_SDHCI_OF +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MMC_SDHCI_OF is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_MMC_SDHCI_OF b/baseconfig/x86/i686PAE/CONFIG_MMC_SDHCI_OF deleted file mode 100644 index 2e588649a..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_MMC_SDHCI_OF +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MMC_SDHCI_OF is not set diff --git a/bcm2837-move-dt.patch b/bcm2837-move-dt.patch new file mode 100644 index 000000000..018cf81d7 --- /dev/null +++ b/bcm2837-move-dt.patch @@ -0,0 +1,516 @@ +From 3bfe25fa9f8a56c5c877c7fd854d89238787c6d8 Mon Sep 17 00:00:00 2001 +From: Eric Anholt <eric@anholt.net> +Date: Wed, 26 Jul 2017 13:01:56 -0700 +Subject: ARM: dts: bcm283x: Move the BCM2837 DT contents from arm64 to arm. + +BCM2837 is somewhat unusual in that we build its DT on both arm32 and +arm64. Most devices are being run in arm32 mode. + +Having the body of the DT for 2837 separate from 2835/6 has been a +source of pain, as we often need to make changes that span both +directories simultaneously (for example, the thermal changes for 4.13, +or anything that changes the name of a node referenced by '&' from +board files). Other changes are made more complicated than they need +to be, such as the SDHOST enabling, because we have to split a single +logical change into a 283[56] half and a 2837 half. + +To fix this, make the stub board include file live in arm64 instead of +arm32, and keep all of BCM283x's contents in arm32. From here on, our +changes to DT contents can be submitted through a single tree. + +Signed-off-by: Eric Anholt <eric@anholt.net> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 42 ++++++++++- + arch/arm/boot/dts/bcm2837.dtsi | 86 ++++++++++++++++++++++ + arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi | 1 - + arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 42 +---------- + arch/arm64/boot/dts/broadcom/bcm2837.dtsi | 86 ---------------------- + .../boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi | 1 - + .../boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi | 1 - + arch/arm64/boot/dts/broadcom/bcm283x.dtsi | 1 - + 8 files changed, 128 insertions(+), 132 deletions(-) + create mode 100644 arch/arm/boot/dts/bcm2837.dtsi + delete mode 120000 arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi + delete mode 100644 arch/arm64/boot/dts/broadcom/bcm2837.dtsi + delete mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi + delete mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi + delete mode 120000 arch/arm64/boot/dts/broadcom/bcm283x.dtsi + +diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +index c72a27d..972f14d 100644 +--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +@@ -1 +1,41 @@ +-#include "arm64/broadcom/bcm2837-rpi-3-b.dts" ++/dts-v1/; ++#include "bcm2837.dtsi" ++#include "bcm2835-rpi.dtsi" ++#include "bcm283x-rpi-smsc9514.dtsi" ++#include "bcm283x-rpi-usb-host.dtsi" ++ ++/ { ++ compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; ++ model = "Raspberry Pi 3 Model B"; ++ ++ memory { ++ reg = <0 0x40000000>; ++ }; ++ ++ leds { ++ act { ++ gpios = <&gpio 47 0>; ++ }; ++ }; ++}; ++ ++&uart1 { ++ status = "okay"; ++}; ++ ++/* SDHCI is used to control the SDIO for wireless */ ++&sdhci { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_gpio34>; ++ status = "okay"; ++ bus-width = <4>; ++ non-removable; ++}; ++ ++/* SDHOST is used to drive the SD card */ ++&sdhost { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdhost_gpio48>; ++ status = "okay"; ++ bus-width = <4>; ++}; +diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi +new file mode 100644 +index 0000000..2d5de6f0 +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2837.dtsi +@@ -0,0 +1,86 @@ ++#include "bcm283x.dtsi" ++ ++/ { ++ compatible = "brcm,bcm2837"; ++ ++ soc { ++ ranges = <0x7e000000 0x3f000000 0x1000000>, ++ <0x40000000 0x40000000 0x00001000>; ++ dma-ranges = <0xc0000000 0x00000000 0x3f000000>; ++ ++ local_intc: local_intc { ++ compatible = "brcm,bcm2836-l1-intc"; ++ reg = <0x40000000 0x100>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ interrupt-parent = <&local_intc>; ++ }; ++ }; ++ ++ timer { ++ compatible = "arm,armv7-timer"; ++ interrupt-parent = <&local_intc>; ++ interrupts = <0>, // PHYS_SECURE_PPI ++ <1>, // PHYS_NONSECURE_PPI ++ <3>, // VIRT_PPI ++ <2>; // HYP_PPI ++ always-on; ++ }; ++ ++ cpus: cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu0: cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a53"; ++ reg = <0>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000d8>; ++ }; ++ ++ cpu1: cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a53"; ++ reg = <1>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000e0>; ++ }; ++ ++ cpu2: cpu@2 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a53"; ++ reg = <2>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000e8>; ++ }; ++ ++ cpu3: cpu@3 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a53"; ++ reg = <3>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000f0>; ++ }; ++ }; ++}; ++ ++/* Make the BCM2835-style global interrupt controller be a child of the ++ * CPU-local interrupt controller. ++ */ ++&intc { ++ compatible = "brcm,bcm2836-armctrl-ic"; ++ reg = <0x7e00b200 0x200>; ++ interrupt-parent = <&local_intc>; ++ interrupts = <8>; ++}; ++ ++&cpu_thermal { ++ coefficients = <(-538) 412000>; ++}; ++ ++/* enable thermal sensor with the correct compatible property set */ ++&thermal { ++ compatible = "brcm,bcm2837-thermal"; ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi b/arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi +deleted file mode 120000 +index 3937b77..0000000 +--- a/arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi ++++ /dev/null +@@ -1 +0,0 @@ +-../../../../arm/boot/dts/bcm2835-rpi.dtsi +\ No newline at end of file +diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts +index 972f14d..699d340 100644 +--- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts +@@ -1,41 +1 @@ +-/dts-v1/; +-#include "bcm2837.dtsi" +-#include "bcm2835-rpi.dtsi" +-#include "bcm283x-rpi-smsc9514.dtsi" +-#include "bcm283x-rpi-usb-host.dtsi" +- +-/ { +- compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; +- model = "Raspberry Pi 3 Model B"; +- +- memory { +- reg = <0 0x40000000>; +- }; +- +- leds { +- act { +- gpios = <&gpio 47 0>; +- }; +- }; +-}; +- +-&uart1 { +- status = "okay"; +-}; +- +-/* SDHCI is used to control the SDIO for wireless */ +-&sdhci { +- pinctrl-names = "default"; +- pinctrl-0 = <&emmc_gpio34>; +- status = "okay"; +- bus-width = <4>; +- non-removable; +-}; +- +-/* SDHOST is used to drive the SD card */ +-&sdhost { +- pinctrl-names = "default"; +- pinctrl-0 = <&sdhost_gpio48>; +- status = "okay"; +- bus-width = <4>; +-}; ++#include "arm/bcm2837-rpi-3-b.dts" +diff --git a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi +deleted file mode 100644 +index 2d5de6f0..0000000 +--- a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi ++++ /dev/null +@@ -1,86 +0,0 @@ +-#include "bcm283x.dtsi" +- +-/ { +- compatible = "brcm,bcm2837"; +- +- soc { +- ranges = <0x7e000000 0x3f000000 0x1000000>, +- <0x40000000 0x40000000 0x00001000>; +- dma-ranges = <0xc0000000 0x00000000 0x3f000000>; +- +- local_intc: local_intc { +- compatible = "brcm,bcm2836-l1-intc"; +- reg = <0x40000000 0x100>; +- interrupt-controller; +- #interrupt-cells = <1>; +- interrupt-parent = <&local_intc>; +- }; +- }; +- +- timer { +- compatible = "arm,armv7-timer"; +- interrupt-parent = <&local_intc>; +- interrupts = <0>, // PHYS_SECURE_PPI +- <1>, // PHYS_NONSECURE_PPI +- <3>, // VIRT_PPI +- <2>; // HYP_PPI +- always-on; +- }; +- +- cpus: cpus { +- #address-cells = <1>; +- #size-cells = <0>; +- +- cpu0: cpu@0 { +- device_type = "cpu"; +- compatible = "arm,cortex-a53"; +- reg = <0>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000d8>; +- }; +- +- cpu1: cpu@1 { +- device_type = "cpu"; +- compatible = "arm,cortex-a53"; +- reg = <1>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000e0>; +- }; +- +- cpu2: cpu@2 { +- device_type = "cpu"; +- compatible = "arm,cortex-a53"; +- reg = <2>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000e8>; +- }; +- +- cpu3: cpu@3 { +- device_type = "cpu"; +- compatible = "arm,cortex-a53"; +- reg = <3>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000f0>; +- }; +- }; +-}; +- +-/* Make the BCM2835-style global interrupt controller be a child of the +- * CPU-local interrupt controller. +- */ +-&intc { +- compatible = "brcm,bcm2836-armctrl-ic"; +- reg = <0x7e00b200 0x200>; +- interrupt-parent = <&local_intc>; +- interrupts = <8>; +-}; +- +-&cpu_thermal { +- coefficients = <(-538) 412000>; +-}; +- +-/* enable thermal sensor with the correct compatible property set */ +-&thermal { +- compatible = "brcm,bcm2837-thermal"; +- status = "okay"; +-}; +diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi +deleted file mode 120000 +index dca7c05..0000000 +--- a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi ++++ /dev/null +@@ -1 +0,0 @@ +-../../../../arm/boot/dts/bcm283x-rpi-smsc9514.dtsi +\ No newline at end of file +diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi +deleted file mode 120000 +index cbeebe3..0000000 +--- a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi ++++ /dev/null +@@ -1 +0,0 @@ +-../../../../arm/boot/dts/bcm283x-rpi-usb-host.dtsi +\ No newline at end of file +diff --git a/arch/arm64/boot/dts/broadcom/bcm283x.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x.dtsi +deleted file mode 120000 +index 5f54e4c..0000000 +--- a/arch/arm64/boot/dts/broadcom/bcm283x.dtsi ++++ /dev/null +@@ -1 +0,0 @@ +-../../../../arm/boot/dts/bcm283x.dtsi +\ No newline at end of file +-- +cgit v1.1 + +From 4188ea2aeb6dd8f99ab77662f463e41bc464a704 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren <stefan.wahren@i2se.com> +Date: Sun, 30 Jul 2017 19:10:32 +0200 +Subject: ARM: bcm283x: Define UART pinmuxing on board level + +Until RPI 3 and Zero W the pl011 (uart0) was always on pin 14/15. So in +order to take care of them and other boards in the future, +we need to define UART pinmuxing on board level. + +This work based on Eric Anholt's patch "ARM: bcm2385: Don't force pl011 +onto pins 14/15." and Fabian Vogt's patch "ARM64: dts: bcm2837: assign +uart0 to BT and uart1 to pin headers". + +Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> +Reviewed-by: Eric Anholt <eric@anholt.net> +Signed-off-by: Eric Anholt <eric@anholt.net> +--- + arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi-a.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi-b.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi-zero.dts | 6 ++++++ + arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- + arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 6 ++++++ + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 10 ++++++++++ + 9 files changed, 53 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +index d070454..9f86649 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +@@ -99,3 +99,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts +index 46d078e..4b1af06 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts +@@ -94,3 +94,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +index 432088e..a846f1e 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +@@ -101,3 +101,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +index 4133bc2..e860964 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +@@ -94,3 +94,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts +index 4d56fe3..5d77f3f 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts +@@ -89,3 +89,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts +index 79a20d5..7036240 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts +@@ -103,3 +103,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi +index e55b362..e36c392 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -39,7 +39,7 @@ + }; + + alt0: alt0 { +- brcm,pins = <4 5 7 8 9 10 11 14 15>; ++ brcm,pins = <4 5 7 8 9 10 11>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + }; +diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +index bf19e8c..e8de414 100644 +--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts ++++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +@@ -39,3 +39,9 @@ + &hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio14>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +index 972f14d..20725ca 100644 +--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +@@ -19,7 +19,17 @@ + }; + }; + ++/* uart0 communicates with the BT module */ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; ++ status = "okay"; ++}; ++ ++/* uart1 is mapped to the pin header */ + &uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_gpio14>; + status = "okay"; + }; + +-- +cgit v1.1 + diff --git a/bluetooth-properly-check-l2cap-config-option-output-buffer-length.patch b/bluetooth-properly-check-l2cap-config-option-output-buffer-length.patch new file mode 100644 index 000000000..fe18f57ca --- /dev/null +++ b/bluetooth-properly-check-l2cap-config-option-output-buffer-length.patch @@ -0,0 +1,357 @@ +From e860d2c904d1a9f38a24eb44c9f34b8f915a6ea3 Mon Sep 17 00:00:00 2001 +From: Ben Seri <ben@armis.com> +Date: Sat, 9 Sep 2017 23:15:59 +0200 +Subject: Bluetooth: Properly check L2CAP config option output buffer length + +From: Ben Seri <ben@armis.com> + +commit e860d2c904d1a9f38a24eb44c9f34b8f915a6ea3 upstream. + +Validate the output buffer length for L2CAP config requests and responses +to avoid overflowing the stack buffer used for building the option blocks. + +Signed-off-by: Ben Seri <ben@armis.com> +Signed-off-by: Marcel Holtmann <marcel@holtmann.org> +Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> + +--- + net/bluetooth/l2cap_core.c | 80 ++++++++++++++++++++++++--------------------- + 1 file changed, 43 insertions(+), 37 deletions(-) + +--- a/net/bluetooth/l2cap_core.c ++++ b/net/bluetooth/l2cap_core.c +@@ -58,7 +58,7 @@ static struct sk_buff *l2cap_build_cmd(s + u8 code, u8 ident, u16 dlen, void *data); + static void l2cap_send_cmd(struct l2cap_conn *conn, u8 ident, u8 code, u16 len, + void *data); +-static int l2cap_build_conf_req(struct l2cap_chan *chan, void *data); ++static int l2cap_build_conf_req(struct l2cap_chan *chan, void *data, size_t data_size); + static void l2cap_send_disconn_req(struct l2cap_chan *chan, int err); + + static void l2cap_tx(struct l2cap_chan *chan, struct l2cap_ctrl *control, +@@ -1473,7 +1473,7 @@ static void l2cap_conn_start(struct l2ca + + set_bit(CONF_REQ_SENT, &chan->conf_state); + l2cap_send_cmd(conn, l2cap_get_ident(conn), L2CAP_CONF_REQ, +- l2cap_build_conf_req(chan, buf), buf); ++ l2cap_build_conf_req(chan, buf, sizeof(buf)), buf); + chan->num_conf_req++; + } + +@@ -2987,12 +2987,15 @@ static inline int l2cap_get_conf_opt(voi + return len; + } + +-static void l2cap_add_conf_opt(void **ptr, u8 type, u8 len, unsigned long val) ++static void l2cap_add_conf_opt(void **ptr, u8 type, u8 len, unsigned long val, size_t size) + { + struct l2cap_conf_opt *opt = *ptr; + + BT_DBG("type 0x%2.2x len %u val 0x%lx", type, len, val); + ++ if (size < L2CAP_CONF_OPT_SIZE + len) ++ return; ++ + opt->type = type; + opt->len = len; + +@@ -3017,7 +3020,7 @@ static void l2cap_add_conf_opt(void **pt + *ptr += L2CAP_CONF_OPT_SIZE + len; + } + +-static void l2cap_add_opt_efs(void **ptr, struct l2cap_chan *chan) ++static void l2cap_add_opt_efs(void **ptr, struct l2cap_chan *chan, size_t size) + { + struct l2cap_conf_efs efs; + +@@ -3045,7 +3048,7 @@ static void l2cap_add_opt_efs(void **ptr + } + + l2cap_add_conf_opt(ptr, L2CAP_CONF_EFS, sizeof(efs), +- (unsigned long) &efs); ++ (unsigned long) &efs, size); + } + + static void l2cap_ack_timeout(struct work_struct *work) +@@ -3191,11 +3194,12 @@ static inline void l2cap_txwin_setup(str + chan->ack_win = chan->tx_win; + } + +-static int l2cap_build_conf_req(struct l2cap_chan *chan, void *data) ++static int l2cap_build_conf_req(struct l2cap_chan *chan, void *data, size_t data_size) + { + struct l2cap_conf_req *req = data; + struct l2cap_conf_rfc rfc = { .mode = chan->mode }; + void *ptr = req->data; ++ void *endptr = data + data_size; + u16 size; + + BT_DBG("chan %p", chan); +@@ -3220,7 +3224,7 @@ static int l2cap_build_conf_req(struct l + + done: + if (chan->imtu != L2CAP_DEFAULT_MTU) +- l2cap_add_conf_opt(&ptr, L2CAP_CONF_MTU, 2, chan->imtu); ++ l2cap_add_conf_opt(&ptr, L2CAP_CONF_MTU, 2, chan->imtu, endptr - ptr); + + switch (chan->mode) { + case L2CAP_MODE_BASIC: +@@ -3239,7 +3243,7 @@ done: + rfc.max_pdu_size = 0; + + l2cap_add_conf_opt(&ptr, L2CAP_CONF_RFC, sizeof(rfc), +- (unsigned long) &rfc); ++ (unsigned long) &rfc, endptr - ptr); + break; + + case L2CAP_MODE_ERTM: +@@ -3259,21 +3263,21 @@ done: + L2CAP_DEFAULT_TX_WINDOW); + + l2cap_add_conf_opt(&ptr, L2CAP_CONF_RFC, sizeof(rfc), +- (unsigned long) &rfc); ++ (unsigned long) &rfc, endptr - ptr); + + if (test_bit(FLAG_EFS_ENABLE, &chan->flags)) +- l2cap_add_opt_efs(&ptr, chan); ++ l2cap_add_opt_efs(&ptr, chan, endptr - ptr); + + if (test_bit(FLAG_EXT_CTRL, &chan->flags)) + l2cap_add_conf_opt(&ptr, L2CAP_CONF_EWS, 2, +- chan->tx_win); ++ chan->tx_win, endptr - ptr); + + if (chan->conn->feat_mask & L2CAP_FEAT_FCS) + if (chan->fcs == L2CAP_FCS_NONE || + test_bit(CONF_RECV_NO_FCS, &chan->conf_state)) { + chan->fcs = L2CAP_FCS_NONE; + l2cap_add_conf_opt(&ptr, L2CAP_CONF_FCS, 1, +- chan->fcs); ++ chan->fcs, endptr - ptr); + } + break; + +@@ -3291,17 +3295,17 @@ done: + rfc.max_pdu_size = cpu_to_le16(size); + + l2cap_add_conf_opt(&ptr, L2CAP_CONF_RFC, sizeof(rfc), +- (unsigned long) &rfc); ++ (unsigned long) &rfc, endptr - ptr); + + if (test_bit(FLAG_EFS_ENABLE, &chan->flags)) +- l2cap_add_opt_efs(&ptr, chan); ++ l2cap_add_opt_efs(&ptr, chan, endptr - ptr); + + if (chan->conn->feat_mask & L2CAP_FEAT_FCS) + if (chan->fcs == L2CAP_FCS_NONE || + test_bit(CONF_RECV_NO_FCS, &chan->conf_state)) { + chan->fcs = L2CAP_FCS_NONE; + l2cap_add_conf_opt(&ptr, L2CAP_CONF_FCS, 1, +- chan->fcs); ++ chan->fcs, endptr - ptr); + } + break; + } +@@ -3312,10 +3316,11 @@ done: + return ptr - data; + } + +-static int l2cap_parse_conf_req(struct l2cap_chan *chan, void *data) ++static int l2cap_parse_conf_req(struct l2cap_chan *chan, void *data, size_t data_size) + { + struct l2cap_conf_rsp *rsp = data; + void *ptr = rsp->data; ++ void *endptr = data + data_size; + void *req = chan->conf_req; + int len = chan->conf_len; + int type, hint, olen; +@@ -3417,7 +3422,7 @@ done: + return -ECONNREFUSED; + + l2cap_add_conf_opt(&ptr, L2CAP_CONF_RFC, sizeof(rfc), +- (unsigned long) &rfc); ++ (unsigned long) &rfc, endptr - ptr); + } + + if (result == L2CAP_CONF_SUCCESS) { +@@ -3430,7 +3435,7 @@ done: + chan->omtu = mtu; + set_bit(CONF_MTU_DONE, &chan->conf_state); + } +- l2cap_add_conf_opt(&ptr, L2CAP_CONF_MTU, 2, chan->omtu); ++ l2cap_add_conf_opt(&ptr, L2CAP_CONF_MTU, 2, chan->omtu, endptr - ptr); + + if (remote_efs) { + if (chan->local_stype != L2CAP_SERV_NOTRAFIC && +@@ -3444,7 +3449,7 @@ done: + + l2cap_add_conf_opt(&ptr, L2CAP_CONF_EFS, + sizeof(efs), +- (unsigned long) &efs); ++ (unsigned long) &efs, endptr - ptr); + } else { + /* Send PENDING Conf Rsp */ + result = L2CAP_CONF_PENDING; +@@ -3477,7 +3482,7 @@ done: + set_bit(CONF_MODE_DONE, &chan->conf_state); + + l2cap_add_conf_opt(&ptr, L2CAP_CONF_RFC, +- sizeof(rfc), (unsigned long) &rfc); ++ sizeof(rfc), (unsigned long) &rfc, endptr - ptr); + + if (test_bit(FLAG_EFS_ENABLE, &chan->flags)) { + chan->remote_id = efs.id; +@@ -3491,7 +3496,7 @@ done: + le32_to_cpu(efs.sdu_itime); + l2cap_add_conf_opt(&ptr, L2CAP_CONF_EFS, + sizeof(efs), +- (unsigned long) &efs); ++ (unsigned long) &efs, endptr - ptr); + } + break; + +@@ -3505,7 +3510,7 @@ done: + set_bit(CONF_MODE_DONE, &chan->conf_state); + + l2cap_add_conf_opt(&ptr, L2CAP_CONF_RFC, sizeof(rfc), +- (unsigned long) &rfc); ++ (unsigned long) &rfc, endptr - ptr); + + break; + +@@ -3527,10 +3532,11 @@ done: + } + + static int l2cap_parse_conf_rsp(struct l2cap_chan *chan, void *rsp, int len, +- void *data, u16 *result) ++ void *data, size_t size, u16 *result) + { + struct l2cap_conf_req *req = data; + void *ptr = req->data; ++ void *endptr = data + size; + int type, olen; + unsigned long val; + struct l2cap_conf_rfc rfc = { .mode = L2CAP_MODE_BASIC }; +@@ -3548,13 +3554,13 @@ static int l2cap_parse_conf_rsp(struct l + chan->imtu = L2CAP_DEFAULT_MIN_MTU; + } else + chan->imtu = val; +- l2cap_add_conf_opt(&ptr, L2CAP_CONF_MTU, 2, chan->imtu); ++ l2cap_add_conf_opt(&ptr, L2CAP_CONF_MTU, 2, chan->imtu, endptr - ptr); + break; + + case L2CAP_CONF_FLUSH_TO: + chan->flush_to = val; + l2cap_add_conf_opt(&ptr, L2CAP_CONF_FLUSH_TO, +- 2, chan->flush_to); ++ 2, chan->flush_to, endptr - ptr); + break; + + case L2CAP_CONF_RFC: +@@ -3568,13 +3574,13 @@ static int l2cap_parse_conf_rsp(struct l + chan->fcs = 0; + + l2cap_add_conf_opt(&ptr, L2CAP_CONF_RFC, +- sizeof(rfc), (unsigned long) &rfc); ++ sizeof(rfc), (unsigned long) &rfc, endptr - ptr); + break; + + case L2CAP_CONF_EWS: + chan->ack_win = min_t(u16, val, chan->ack_win); + l2cap_add_conf_opt(&ptr, L2CAP_CONF_EWS, 2, +- chan->tx_win); ++ chan->tx_win, endptr - ptr); + break; + + case L2CAP_CONF_EFS: +@@ -3587,7 +3593,7 @@ static int l2cap_parse_conf_rsp(struct l + return -ECONNREFUSED; + + l2cap_add_conf_opt(&ptr, L2CAP_CONF_EFS, sizeof(efs), +- (unsigned long) &efs); ++ (unsigned long) &efs, endptr - ptr); + break; + + case L2CAP_CONF_FCS: +@@ -3692,7 +3698,7 @@ void __l2cap_connect_rsp_defer(struct l2 + return; + + l2cap_send_cmd(conn, l2cap_get_ident(conn), L2CAP_CONF_REQ, +- l2cap_build_conf_req(chan, buf), buf); ++ l2cap_build_conf_req(chan, buf, sizeof(buf)), buf); + chan->num_conf_req++; + } + +@@ -3900,7 +3906,7 @@ sendresp: + u8 buf[128]; + set_bit(CONF_REQ_SENT, &chan->conf_state); + l2cap_send_cmd(conn, l2cap_get_ident(conn), L2CAP_CONF_REQ, +- l2cap_build_conf_req(chan, buf), buf); ++ l2cap_build_conf_req(chan, buf, sizeof(buf)), buf); + chan->num_conf_req++; + } + +@@ -3978,7 +3984,7 @@ static int l2cap_connect_create_rsp(stru + break; + + l2cap_send_cmd(conn, l2cap_get_ident(conn), L2CAP_CONF_REQ, +- l2cap_build_conf_req(chan, req), req); ++ l2cap_build_conf_req(chan, req, sizeof(req)), req); + chan->num_conf_req++; + break; + +@@ -4090,7 +4096,7 @@ static inline int l2cap_config_req(struc + } + + /* Complete config. */ +- len = l2cap_parse_conf_req(chan, rsp); ++ len = l2cap_parse_conf_req(chan, rsp, sizeof(rsp)); + if (len < 0) { + l2cap_send_disconn_req(chan, ECONNRESET); + goto unlock; +@@ -4124,7 +4130,7 @@ static inline int l2cap_config_req(struc + if (!test_and_set_bit(CONF_REQ_SENT, &chan->conf_state)) { + u8 buf[64]; + l2cap_send_cmd(conn, l2cap_get_ident(conn), L2CAP_CONF_REQ, +- l2cap_build_conf_req(chan, buf), buf); ++ l2cap_build_conf_req(chan, buf, sizeof(buf)), buf); + chan->num_conf_req++; + } + +@@ -4184,7 +4190,7 @@ static inline int l2cap_config_rsp(struc + char buf[64]; + + len = l2cap_parse_conf_rsp(chan, rsp->data, len, +- buf, &result); ++ buf, sizeof(buf), &result); + if (len < 0) { + l2cap_send_disconn_req(chan, ECONNRESET); + goto done; +@@ -4214,7 +4220,7 @@ static inline int l2cap_config_rsp(struc + /* throw out any old stored conf requests */ + result = L2CAP_CONF_SUCCESS; + len = l2cap_parse_conf_rsp(chan, rsp->data, len, +- req, &result); ++ req, sizeof(req), &result); + if (len < 0) { + l2cap_send_disconn_req(chan, ECONNRESET); + goto done; +@@ -4791,7 +4797,7 @@ static void l2cap_do_create(struct l2cap + set_bit(CONF_REQ_SENT, &chan->conf_state); + l2cap_send_cmd(chan->conn, l2cap_get_ident(chan->conn), + L2CAP_CONF_REQ, +- l2cap_build_conf_req(chan, buf), buf); ++ l2cap_build_conf_req(chan, buf, sizeof(buf)), buf); + chan->num_conf_req++; + } + } +@@ -7465,7 +7471,7 @@ static void l2cap_security_cfm(struct hc + set_bit(CONF_REQ_SENT, &chan->conf_state); + l2cap_send_cmd(conn, l2cap_get_ident(conn), + L2CAP_CONF_REQ, +- l2cap_build_conf_req(chan, buf), ++ l2cap_build_conf_req(chan, buf, sizeof(buf)), + buf); + chan->num_conf_req++; + } diff --git a/filter-aarch64.sh b/filter-aarch64.sh index e94f282a2..d3d628915 100644 --- a/filter-aarch64.sh +++ b/filter-aarch64.sh @@ -13,6 +13,6 @@ driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds medi ethdrvs="3com adaptec arc alteon atheros broadcom cadence calxeda chelsio cisco dec dlink emulex icplus marvell micrel myricom neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis smsc stmicro sun tehuti ti via wiznet xircom" -drmdrvs="amd arm bridge ast exynos hisilicon i2c imx mgag200 meson msm nouveau panel radeon rockchip tegra tinydrm vc4" +drmdrvs="amd arm bridge ast exynos hisilicon i2c imx mgag200 meson msm nouveau panel radeon rockchip sun4i tegra tinydrm vc4" singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr" diff --git a/filter-armv7hl.sh b/filter-armv7hl.sh index db80ef62f..89a170e58 100644 --- a/filter-armv7hl.sh +++ b/filter-armv7hl.sh @@ -13,6 +13,6 @@ driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn media mem ethdrvs="3com adaptec alteon altera amd atheros broadcom cadence chelsio cisco dec dlink emulex icplus mellanox micrel myricom natsemi neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis sun tehuti via wiznet xircom" -drmdrvs="amd armada bridge ast exynos etnaviv hisilicon i2c imx meson mgag200 msm omapdrm panel nouveau radeon rockchip sti tegra tilcdc tinydrm via vc4" +drmdrvs="amd armada bridge ast exynos etnaviv hisilicon i2c imx meson mgag200 msm omapdrm panel nouveau radeon rockchip sti sun4i tegra tilcdc tinydrm via vc4" singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr" diff --git a/kernel-aarch64-debug.config b/kernel-aarch64-debug.config index 284b9400c..968aa7b52 100644 --- a/kernel-aarch64-debug.config +++ b/kernel-aarch64-debug.config @@ -1015,6 +1015,7 @@ CONFIG_CRYPTO_FIPS=y CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_GF128MUL=y CONFIG_CRYPTO_GHASH_ARM64_CE=m +CONFIG_CRYPTO_GHASH_ARM_CE=m CONFIG_CRYPTO_GHASH=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HW=y @@ -1320,7 +1321,6 @@ CONFIG_DRM_SIL_SII8620=m # CONFIG_DRM_SIS is not set # CONFIG_DRM_STM is not set CONFIG_DRM_SUN4I_BACKEND=m -CONFIG_DRM_SUN4I_HDMI=m CONFIG_DRM_SUN8I_MIXER=m # CONFIG_DRM_TDFX is not set # CONFIG_DRM_TEGRA_DEBUG is not set @@ -3104,11 +3104,10 @@ CONFIG_MMC_DW=m CONFIG_MMC_DW_PCI=m CONFIG_MMC_DW_PLTFM=m CONFIG_MMC_DW_ROCKCHIP=m -CONFIG_MMC=m CONFIG_MMC_MESON_GX=m # CONFIG_MMC_MTK is not set CONFIG_MMC_MVSDIO=m -# CONFIG_MMC_QCOM_DML is not set +CONFIG_MMC_QCOM_DML=m CONFIG_MMC_REALTEK_PCI=m CONFIG_MMC_REALTEK_USB=m CONFIG_MMC_RICOH_MMC=y @@ -3121,7 +3120,6 @@ CONFIG_MMC_SDHCI_MSM=m CONFIG_MMC_SDHCI_OF_ARASAN=m # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_PXAV3=m @@ -3138,6 +3136,7 @@ CONFIG_MMC_USHC=m CONFIG_MMC_VIA_SDMMC=m CONFIG_MMC_VUB300=m CONFIG_MMC_WBSD=m +CONFIG_MMC=y CONFIG_MMIOTRACE=y CONFIG_MMU=y # CONFIG_MODULE_COMPRESS is not set @@ -4183,9 +4182,9 @@ CONFIG_PWM_SUN4I=m CONFIG_PWM_SYSFS=y CONFIG_PWM_TEGRA=m CONFIG_PWM=y -CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set -CONFIG_PWRSEQ_SIMPLE=m +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SD8787=m +CONFIG_PWRSEQ_SIMPLE=y # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set # CONFIG_QCA7000_UART is not set diff --git a/kernel-aarch64.config b/kernel-aarch64.config index 80494b3b3..4c6f8093f 100644 --- a/kernel-aarch64.config +++ b/kernel-aarch64.config @@ -1014,6 +1014,7 @@ CONFIG_CRYPTO_FIPS=y CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_GF128MUL=y CONFIG_CRYPTO_GHASH_ARM64_CE=m +CONFIG_CRYPTO_GHASH_ARM_CE=m CONFIG_CRYPTO_GHASH=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HW=y @@ -1310,7 +1311,6 @@ CONFIG_DRM_SIL_SII8620=m # CONFIG_DRM_SIS is not set # CONFIG_DRM_STM is not set CONFIG_DRM_SUN4I_BACKEND=m -CONFIG_DRM_SUN4I_HDMI=m CONFIG_DRM_SUN8I_MIXER=m # CONFIG_DRM_TDFX is not set # CONFIG_DRM_TEGRA_DEBUG is not set @@ -3084,11 +3084,10 @@ CONFIG_MMC_DW=m CONFIG_MMC_DW_PCI=m CONFIG_MMC_DW_PLTFM=m CONFIG_MMC_DW_ROCKCHIP=m -CONFIG_MMC=m CONFIG_MMC_MESON_GX=m # CONFIG_MMC_MTK is not set CONFIG_MMC_MVSDIO=m -# CONFIG_MMC_QCOM_DML is not set +CONFIG_MMC_QCOM_DML=m CONFIG_MMC_REALTEK_PCI=m CONFIG_MMC_REALTEK_USB=m CONFIG_MMC_RICOH_MMC=y @@ -3101,7 +3100,6 @@ CONFIG_MMC_SDHCI_MSM=m CONFIG_MMC_SDHCI_OF_ARASAN=m # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_PXAV3=m @@ -3118,6 +3116,7 @@ CONFIG_MMC_USHC=m CONFIG_MMC_VIA_SDMMC=m CONFIG_MMC_VUB300=m CONFIG_MMC_WBSD=m +CONFIG_MMC=y CONFIG_MMU=y # CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -4161,9 +4160,9 @@ CONFIG_PWM_SUN4I=m CONFIG_PWM_SYSFS=y CONFIG_PWM_TEGRA=m CONFIG_PWM=y -CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set -CONFIG_PWRSEQ_SIMPLE=m +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SD8787=m +CONFIG_PWRSEQ_SIMPLE=y # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set # CONFIG_QCA7000_UART is not set diff --git a/kernel-armv7hl-debug.config b/kernel-armv7hl-debug.config index 73faeb752..93b6ae3b6 100644 --- a/kernel-armv7hl-debug.config +++ b/kernel-armv7hl-debug.config @@ -1068,7 +1068,7 @@ CONFIG_CRYPTO_FCRYPT=m CONFIG_CRYPTO_FIPS=y CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_GF128MUL=y -# CONFIG_CRYPTO_GHASH_ARM_CE is not set +CONFIG_CRYPTO_GHASH_ARM_CE=m CONFIG_CRYPTO_GHASH=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HW=y @@ -3305,7 +3305,6 @@ CONFIG_MMC_DW=m CONFIG_MMC_DW_PCI=m CONFIG_MMC_DW_PLTFM=m CONFIG_MMC_DW_ROCKCHIP=m -CONFIG_MMC=m # CONFIG_MMC_MESON_GX is not set # CONFIG_MMC_MTK is not set CONFIG_MMC_MVSDIO=m @@ -3326,8 +3325,7 @@ CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_MSM=m CONFIG_MMC_SDHCI_OF_ARASAN=m # CONFIG_MMC_SDHCI_OF_AT91 is not set -# CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set +CONFIG_MMC_SDHCI_OF_ESDHC=m CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_PXAV2=m @@ -3349,6 +3347,7 @@ CONFIG_MMC_USHC=m CONFIG_MMC_VIA_SDMMC=m CONFIG_MMC_VUB300=m CONFIG_MMC_WBSD=m +CONFIG_MMC=y CONFIG_MMIOTRACE=y CONFIG_MMP_PDMA=y CONFIG_MMP_TDMA=y @@ -4505,9 +4504,9 @@ CONFIG_PWM_TIPWMSS=y CONFIG_PWM_TWL_LED=m CONFIG_PWM_TWL=m CONFIG_PWM=y -CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set -CONFIG_PWRSEQ_SIMPLE=m +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SD8787=m +CONFIG_PWRSEQ_SIMPLE=y CONFIG_PXA_DMA=y # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-armv7hl-lpae-debug.config b/kernel-armv7hl-lpae-debug.config index f1a81981b..4833be710 100644 --- a/kernel-armv7hl-lpae-debug.config +++ b/kernel-armv7hl-lpae-debug.config @@ -1017,7 +1017,7 @@ CONFIG_CRYPTO_FCRYPT=m CONFIG_CRYPTO_FIPS=y CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_GF128MUL=y -# CONFIG_CRYPTO_GHASH_ARM_CE is not set +CONFIG_CRYPTO_GHASH_ARM_CE=m CONFIG_CRYPTO_GHASH=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HW=y @@ -3159,12 +3159,11 @@ CONFIG_MMC_DW=m CONFIG_MMC_DW_PCI=m CONFIG_MMC_DW_PLTFM=m CONFIG_MMC_DW_ROCKCHIP=m -CONFIG_MMC=m # CONFIG_MMC_MESON_GX is not set # CONFIG_MMC_MTK is not set CONFIG_MMC_MVSDIO=m CONFIG_MMC_OMAP_HS=m -# CONFIG_MMC_QCOM_DML is not set +CONFIG_MMC_QCOM_DML=m CONFIG_MMC_REALTEK_PCI=m CONFIG_MMC_REALTEK_USB=m CONFIG_MMC_RICOH_MMC=y @@ -3177,7 +3176,6 @@ CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_OF_ARASAN=m # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_PXAV3=m @@ -3197,6 +3195,7 @@ CONFIG_MMC_USHC=m CONFIG_MMC_VIA_SDMMC=m CONFIG_MMC_VUB300=m CONFIG_MMC_WBSD=m +CONFIG_MMC=y CONFIG_MMIOTRACE=y CONFIG_MMU=y # CONFIG_MODULE_COMPRESS is not set @@ -4257,9 +4256,9 @@ CONFIG_PWM_SUN4I=m CONFIG_PWM_SYSFS=y CONFIG_PWM_TEGRA=m CONFIG_PWM=y -CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set -CONFIG_PWRSEQ_SIMPLE=m +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SD8787=m +CONFIG_PWRSEQ_SIMPLE=y # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set # CONFIG_QCA7000_UART is not set diff --git a/kernel-armv7hl-lpae.config b/kernel-armv7hl-lpae.config index a940c872e..8d84bb0be 100644 --- a/kernel-armv7hl-lpae.config +++ b/kernel-armv7hl-lpae.config @@ -1015,7 +1015,7 @@ CONFIG_CRYPTO_FCRYPT=m CONFIG_CRYPTO_FIPS=y CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_GF128MUL=y -# CONFIG_CRYPTO_GHASH_ARM_CE is not set +CONFIG_CRYPTO_GHASH_ARM_CE=m CONFIG_CRYPTO_GHASH=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HW=y @@ -3139,12 +3139,11 @@ CONFIG_MMC_DW=m CONFIG_MMC_DW_PCI=m CONFIG_MMC_DW_PLTFM=m CONFIG_MMC_DW_ROCKCHIP=m -CONFIG_MMC=m # CONFIG_MMC_MESON_GX is not set # CONFIG_MMC_MTK is not set CONFIG_MMC_MVSDIO=m CONFIG_MMC_OMAP_HS=m -# CONFIG_MMC_QCOM_DML is not set +CONFIG_MMC_QCOM_DML=m CONFIG_MMC_REALTEK_PCI=m CONFIG_MMC_REALTEK_USB=m CONFIG_MMC_RICOH_MMC=y @@ -3157,7 +3156,6 @@ CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_OF_ARASAN=m # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_PXAV3=m @@ -3177,6 +3175,7 @@ CONFIG_MMC_USHC=m CONFIG_MMC_VIA_SDMMC=m CONFIG_MMC_VUB300=m CONFIG_MMC_WBSD=m +CONFIG_MMC=y CONFIG_MMU=y # CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -4235,9 +4234,9 @@ CONFIG_PWM_SUN4I=m CONFIG_PWM_SYSFS=y CONFIG_PWM_TEGRA=m CONFIG_PWM=y -CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set -CONFIG_PWRSEQ_SIMPLE=m +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SD8787=m +CONFIG_PWRSEQ_SIMPLE=y # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set # CONFIG_QCA7000_UART is not set diff --git a/kernel-armv7hl.config b/kernel-armv7hl.config index e5f7f1f40..e1925a121 100644 --- a/kernel-armv7hl.config +++ b/kernel-armv7hl.config @@ -1066,7 +1066,7 @@ CONFIG_CRYPTO_FCRYPT=m CONFIG_CRYPTO_FIPS=y CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_GF128MUL=y -# CONFIG_CRYPTO_GHASH_ARM_CE is not set +CONFIG_CRYPTO_GHASH_ARM_CE=m CONFIG_CRYPTO_GHASH=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HW=y @@ -3285,7 +3285,6 @@ CONFIG_MMC_DW=m CONFIG_MMC_DW_PCI=m CONFIG_MMC_DW_PLTFM=m CONFIG_MMC_DW_ROCKCHIP=m -CONFIG_MMC=m # CONFIG_MMC_MESON_GX is not set # CONFIG_MMC_MTK is not set CONFIG_MMC_MVSDIO=m @@ -3306,8 +3305,7 @@ CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_MSM=m CONFIG_MMC_SDHCI_OF_ARASAN=m # CONFIG_MMC_SDHCI_OF_AT91 is not set -# CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set +CONFIG_MMC_SDHCI_OF_ESDHC=m CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_PXAV2=m @@ -3329,6 +3327,7 @@ CONFIG_MMC_USHC=m CONFIG_MMC_VIA_SDMMC=m CONFIG_MMC_VUB300=m CONFIG_MMC_WBSD=m +CONFIG_MMC=y CONFIG_MMP_PDMA=y CONFIG_MMP_TDMA=y CONFIG_MMU=y @@ -4483,9 +4482,9 @@ CONFIG_PWM_TIPWMSS=y CONFIG_PWM_TWL_LED=m CONFIG_PWM_TWL=m CONFIG_PWM=y -CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set -CONFIG_PWRSEQ_SIMPLE=m +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SD8787=m +CONFIG_PWRSEQ_SIMPLE=y CONFIG_PXA_DMA=y # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-i686-PAE.config b/kernel-i686-PAE.config index 280fd2f4a..3d927d3fc 100644 --- a/kernel-i686-PAE.config +++ b/kernel-i686-PAE.config @@ -1604,7 +1604,7 @@ CONFIG_GPIO_EXAR=m # CONFIG_GPIO_GRGPIO is not set CONFIG_GPIO_ICH=m # CONFIG_GPIO_INTEL_MID is not set -# CONFIG_GPIO_IT87 is not set +CONFIG_GPIO_IT87=m CONFIG_GPIOLIB=y # CONFIG_GPIO_LYNXPOINT is not set # CONFIG_GPIO_MAX7300 is not set @@ -3001,7 +3001,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_ARASAN is not set # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -4003,7 +4002,7 @@ CONFIG_PWM_LPSS_PLATFORM=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-i686-PAEdebug.config b/kernel-i686-PAEdebug.config index 6cbd9abb3..9c38f64d8 100644 --- a/kernel-i686-PAEdebug.config +++ b/kernel-i686-PAEdebug.config @@ -1622,7 +1622,7 @@ CONFIG_GPIO_EXAR=m # CONFIG_GPIO_GRGPIO is not set CONFIG_GPIO_ICH=m # CONFIG_GPIO_INTEL_MID is not set -# CONFIG_GPIO_IT87 is not set +CONFIG_GPIO_IT87=m CONFIG_GPIOLIB=y # CONFIG_GPIO_LYNXPOINT is not set # CONFIG_GPIO_MAX7300 is not set @@ -3021,7 +3021,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_ARASAN is not set # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -4024,7 +4023,7 @@ CONFIG_PWM_LPSS_PLATFORM=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-i686-debug.config b/kernel-i686-debug.config index 70f3329cd..b47aa8e3b 100644 --- a/kernel-i686-debug.config +++ b/kernel-i686-debug.config @@ -1622,7 +1622,7 @@ CONFIG_GPIO_EXAR=m # CONFIG_GPIO_GRGPIO is not set CONFIG_GPIO_ICH=m # CONFIG_GPIO_INTEL_MID is not set -# CONFIG_GPIO_IT87 is not set +CONFIG_GPIO_IT87=m CONFIG_GPIOLIB=y # CONFIG_GPIO_LYNXPOINT is not set # CONFIG_GPIO_MAX7300 is not set @@ -3021,7 +3021,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_ARASAN is not set # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -4024,7 +4023,7 @@ CONFIG_PWM_LPSS_PLATFORM=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-i686.config b/kernel-i686.config index 1e6bc05a3..4bb76144a 100644 --- a/kernel-i686.config +++ b/kernel-i686.config @@ -1604,7 +1604,7 @@ CONFIG_GPIO_EXAR=m # CONFIG_GPIO_GRGPIO is not set CONFIG_GPIO_ICH=m # CONFIG_GPIO_INTEL_MID is not set -# CONFIG_GPIO_IT87 is not set +CONFIG_GPIO_IT87=m CONFIG_GPIOLIB=y # CONFIG_GPIO_LYNXPOINT is not set # CONFIG_GPIO_MAX7300 is not set @@ -3001,7 +3001,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_ARASAN is not set # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -4003,7 +4002,7 @@ CONFIG_PWM_LPSS_PLATFORM=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-ppc64-debug.config b/kernel-ppc64-debug.config index 2437c614d..b8d718400 100644 --- a/kernel-ppc64-debug.config +++ b/kernel-ppc64-debug.config @@ -2865,7 +2865,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set # CONFIG_MMC_SDHCI_OF_HLWD is not set -CONFIG_MMC_SDHCI_OF=m CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -3847,7 +3846,7 @@ CONFIG_PWM_HIBVT=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-ppc64.config b/kernel-ppc64.config index 315dfc3aa..426474708 100644 --- a/kernel-ppc64.config +++ b/kernel-ppc64.config @@ -2844,7 +2844,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set # CONFIG_MMC_SDHCI_OF_HLWD is not set -CONFIG_MMC_SDHCI_OF=m CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -3824,7 +3823,7 @@ CONFIG_PWM_HIBVT=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-ppc64le-debug.config b/kernel-ppc64le-debug.config index 3688efda5..14bd4ea17 100644 --- a/kernel-ppc64le-debug.config +++ b/kernel-ppc64le-debug.config @@ -92,7 +92,6 @@ CONFIG_AD7766=m # CONFIG_AD9832 is not set # CONFIG_AD9834 is not set CONFIG_ADAPTEC_STARFIRE=m -CONFIG_ADB_PMU_LED_DISK=y # CONFIG_ADE7753 is not set # CONFIG_ADE7754 is not set # CONFIG_ADE7758 is not set @@ -2811,7 +2810,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set # CONFIG_MMC_SDHCI_OF_HLWD is not set -CONFIG_MMC_SDHCI_OF=m CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -3787,7 +3785,7 @@ CONFIG_PWM_HIBVT=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-ppc64le.config b/kernel-ppc64le.config index 09e3713ef..6ffd60269 100644 --- a/kernel-ppc64le.config +++ b/kernel-ppc64le.config @@ -92,7 +92,6 @@ CONFIG_AD7766=m # CONFIG_AD9832 is not set # CONFIG_AD9834 is not set CONFIG_ADAPTEC_STARFIRE=m -CONFIG_ADB_PMU_LED_DISK=y # CONFIG_ADE7753 is not set # CONFIG_ADE7754 is not set # CONFIG_ADE7758 is not set @@ -2790,7 +2789,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set # CONFIG_MMC_SDHCI_OF_HLWD is not set -CONFIG_MMC_SDHCI_OF=m CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -3764,7 +3762,7 @@ CONFIG_PWM_HIBVT=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-ppc64p7-debug.config b/kernel-ppc64p7-debug.config index f6e931ab1..becaa6e45 100644 --- a/kernel-ppc64p7-debug.config +++ b/kernel-ppc64p7-debug.config @@ -92,7 +92,6 @@ CONFIG_AD7766=m # CONFIG_AD9832 is not set # CONFIG_AD9834 is not set CONFIG_ADAPTEC_STARFIRE=m -CONFIG_ADB_PMU_LED_DISK=y # CONFIG_ADE7753 is not set # CONFIG_ADE7754 is not set # CONFIG_ADE7758 is not set @@ -2810,7 +2809,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set # CONFIG_MMC_SDHCI_OF_HLWD is not set -CONFIG_MMC_SDHCI_OF=m CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -3786,7 +3784,7 @@ CONFIG_PWM_HIBVT=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-ppc64p7.config b/kernel-ppc64p7.config index bb2db9e71..bae0c717e 100644 --- a/kernel-ppc64p7.config +++ b/kernel-ppc64p7.config @@ -92,7 +92,6 @@ CONFIG_AD7766=m # CONFIG_AD9832 is not set # CONFIG_AD9834 is not set CONFIG_ADAPTEC_STARFIRE=m -CONFIG_ADB_PMU_LED_DISK=y # CONFIG_ADE7753 is not set # CONFIG_ADE7754 is not set # CONFIG_ADE7758 is not set @@ -2789,7 +2788,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set # CONFIG_MMC_SDHCI_OF_HLWD is not set -CONFIG_MMC_SDHCI_OF=m CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -3763,7 +3761,7 @@ CONFIG_PWM_HIBVT=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-s390x-debug.config b/kernel-s390x-debug.config index 1da52be71..8a9fd31cf 100644 --- a/kernel-s390x-debug.config +++ b/kernel-s390x-debug.config @@ -2747,7 +2747,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_ARASAN is not set # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -3675,7 +3674,7 @@ CONFIG_PWM_HIBVT=m # CONFIG_PWM is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-s390x.config b/kernel-s390x.config index c1c98195e..382b67636 100644 --- a/kernel-s390x.config +++ b/kernel-s390x.config @@ -2726,7 +2726,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_ARASAN is not set # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -3652,7 +3651,7 @@ CONFIG_PWM_HIBVT=m # CONFIG_PWM is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-x86_64-debug.config b/kernel-x86_64-debug.config index e5e99888c..1198afc2c 100644 --- a/kernel-x86_64-debug.config +++ b/kernel-x86_64-debug.config @@ -1660,7 +1660,7 @@ CONFIG_GPIO_EXAR=m # CONFIG_GPIO_GRGPIO is not set CONFIG_GPIO_ICH=m # CONFIG_GPIO_INTEL_MID is not set -# CONFIG_GPIO_IT87 is not set +CONFIG_GPIO_IT87=m CONFIG_GPIOLIB=y # CONFIG_GPIO_LYNXPOINT is not set # CONFIG_GPIO_MAX7300 is not set @@ -3067,7 +3067,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_ARASAN is not set # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -4059,7 +4058,7 @@ CONFIG_PWM_LPSS_PLATFORM=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel-x86_64.config b/kernel-x86_64.config index 62e9fe47b..1a0451074 100644 --- a/kernel-x86_64.config +++ b/kernel-x86_64.config @@ -1642,7 +1642,7 @@ CONFIG_GPIO_EXAR=m # CONFIG_GPIO_GRGPIO is not set CONFIG_GPIO_ICH=m # CONFIG_GPIO_INTEL_MID is not set -# CONFIG_GPIO_IT87 is not set +CONFIG_GPIO_IT87=m CONFIG_GPIOLIB=y # CONFIG_GPIO_LYNXPOINT is not set # CONFIG_GPIO_MAX7300 is not set @@ -3047,7 +3047,6 @@ CONFIG_MMC_SDHCI=m # CONFIG_MMC_SDHCI_OF_ARASAN is not set # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF is not set CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_XENON=m @@ -4038,7 +4037,7 @@ CONFIG_PWM_LPSS_PLATFORM=m # CONFIG_PWM_PCA9685 is not set CONFIG_PWM=y CONFIG_PWRSEQ_EMMC=m -# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SD8787=m CONFIG_PWRSEQ_SIMPLE=m # CONFIG_QCA7000 is not set # CONFIG_QCA7000_SPI is not set diff --git a/kernel.spec b/kernel.spec index 598226d11..ac032662c 100644 --- a/kernel.spec +++ b/kernel.spec @@ -127,7 +127,7 @@ Summary: The Linux kernel # Set debugbuildsenabled to 1 for production (build separate debug kernels) # and 0 for rawhide (all kernels are debug kernels). # See also 'make debug' and 'make release'. -%define debugbuildsenabled 1 +%define debugbuildsenabled 0 # Want to build a vanilla kernel build without any non-upstream patches? %define with_vanilla %{?_without_vanilla: 0} %{?!_without_vanilla: 1} @@ -617,9 +617,11 @@ Patch320: bcm283x-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO # Fix USB on the RPi https://patchwork.kernel.org/patch/9879371/ Patch321: bcm283x-dma-mapping-skip-USB-devices-when-configuring-DMA-during-probe.patch -# This breaks RPi booting with a LPAE kernel, we don't support the DSI ports currently -# Revert it while I engage upstream to work out what's going on -Patch322: Revert-ARM-dts-bcm2835-Add-the-DSI-module-nodes-and-.patch +# Updat3 move of bcm2837, landed in 4.14 +Patch322: bcm2837-move-dt.patch + +# https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20170912&id=723288836628bc1c0855f3bb7b64b1803e4b9e4a +Patch324: arm-of-restrict-dma-configuration.patch # 400 - IBM (ppc/s390x) patches @@ -646,6 +648,15 @@ Patch617: Fix-for-module-sig-verification.patch # rhbz 1485086 Patch619: pci-mark-amd-stoney-gpu-ats-as-broken.patch +# CVE-2017-12154 rhbz 1491224 1491231 +Patch620: kvm-nVMX-Don-t-allow-L2-to-access-the-hardware-CR8.patch + +# CVE-2017-12153 rhbz 1491046 1491057 +Patch621: nl80211-check-for-the-required-netlink-attributes-presence.patch + +# CVE-2017-1000251 rhbz 1489716 1490906 +Patch622: bluetooth-properly-check-l2cap-config-option-output-buffer-length.patch + # END OF PATCH DEFINITIONS %endif @@ -2219,6 +2230,11 @@ fi # # %changelog +* Wed Sep 13 2017 Justin M. Forbes <jforbes@fedoraproject.org> +- Fix CVE-2017-12154 (rhbz 1491224 1491231) +- Fix CVE-2017-12153 (rhbz 1491046 1491057) +- Fix CVE-2017-1000251 (rhbz 1489716 1490906) + * Sun Sep 10 2017 Laura Abbott <labbott@fedoraproject.org> - 4.13.1-200 - Linux v4.13.1 diff --git a/kvm-nVMX-Don-t-allow-L2-to-access-the-hardware-CR8.patch b/kvm-nVMX-Don-t-allow-L2-to-access-the-hardware-CR8.patch new file mode 100644 index 000000000..978401257 --- /dev/null +++ b/kvm-nVMX-Don-t-allow-L2-to-access-the-hardware-CR8.patch @@ -0,0 +1,41 @@ +From patchwork Tue Sep 12 20:02:54 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: kvm: nVMX: Don't allow L2 to access the hardware CR8 +From: Jim Mattson <jmattson@google.com> +X-Patchwork-Id: 9950035 +Message-Id: <20170912200254.111560-1-jmattson@google.com> +To: kvm@vger.kernel.org, P J P <ppandit@redhat.com>, + Paolo Bonzini <pbonzini@redhat.com> +Cc: Jim Mattson <jmattson@google.com> +Date: Tue, 12 Sep 2017 13:02:54 -0700 + +If L1 does not specify the "use TPR shadow" VM-execution control in +vmcs12, then L0 must specify the "CR8-load exiting" and "CR8-store +exiting" VM-execution controls in vmcs02. Failure to do so will give +the L2 VM unrestricted read/write access to the hardware CR8. + +This fixes CVE-2017-12154. + +Signed-off-by: Jim Mattson <jmattson@google.com> +--- + arch/x86/kvm/vmx.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c +index c6efc1f88b25..885b7eed4320 100644 +--- a/arch/x86/kvm/vmx.c ++++ b/arch/x86/kvm/vmx.c +@@ -10525,6 +10525,11 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12, + if (exec_control & CPU_BASED_TPR_SHADOW) { + vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, -1ull); + vmcs_write32(TPR_THRESHOLD, vmcs12->tpr_threshold); ++ } else { ++#ifdef CONFIG_X86_64 ++ exec_control |= CPU_BASED_CR8_LOAD_EXITING | ++ CPU_BASED_CR8_STORE_EXITING; ++#endif + } + + /* diff --git a/nl80211-check-for-the-required-netlink-attributes-presence.patch b/nl80211-check-for-the-required-netlink-attributes-presence.patch new file mode 100644 index 000000000..3b52fae87 --- /dev/null +++ b/nl80211-check-for-the-required-netlink-attributes-presence.patch @@ -0,0 +1,46 @@ +From patchwork Tue Sep 12 22:21:21 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: nl80211: check for the required netlink attributes presence +From: Vladis Dronov <vdronov@redhat.com> +X-Patchwork-Id: 9950281 +Message-Id: <20170912222121.5032-1-vdronov@redhat.com> +To: Johannes Berg <johannes.berg@intel.com>, + Johannes Berg <johannes@sipsolutions.net>, + linux-wireless@vger.kernel.org, linux-kernel@vger.kernel.org +Cc: Vladis Dronov <vdronov@redhat.com>, "# v3 . 1-rc1" <stable@vger.kernel.org> +Date: Wed, 13 Sep 2017 00:21:21 +0200 + +nl80211_set_rekey_data() does not check if the required attributes +NL80211_REKEY_DATA_{REPLAY_CTR,KEK,KCK} are present when processing +NL80211_CMD_SET_REKEY_OFFLOAD request. This request can be issued by +users with CAP_NET_ADMIN privilege and may result in NULL dereference +and a system crash. Add a check for the required attributes presence. +This patch is based on the patch by bo Zhang. + +This fixes CVE-2017-12153. + +References: https://bugzilla.redhat.com/show_bug.cgi?id=1491046 +Fixes: e5497d766ad ("cfg80211/nl80211: support GTK rekey offload") +Cc: <stable@vger.kernel.org> # v3.1-rc1 +Reported-by: bo Zhang <zhangbo5891001@gmail.com> +Signed-off-by: Vladis Dronov <vdronov@redhat.com> +--- + net/wireless/nl80211.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c +index 0df8023..fbd5593 100644 +--- a/net/wireless/nl80211.c ++++ b/net/wireless/nl80211.c +@@ -10903,6 +10903,9 @@ static int nl80211_set_rekey_data(struct sk_buff *skb, struct genl_info *info) + if (err) + return err; + ++ if (!tb[NL80211_REKEY_DATA_REPLAY_CTR] || !tb[NL80211_REKEY_DATA_KEK] || ++ !tb[NL80211_REKEY_DATA_KCK]) ++ return -EINVAL; + if (nla_len(tb[NL80211_REKEY_DATA_REPLAY_CTR]) != NL80211_REPLAY_CTR_LEN) + return -ERANGE; + if (nla_len(tb[NL80211_REKEY_DATA_KEK]) != NL80211_KEK_LEN) |