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-rw-r--r--0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch84
1 files changed, 84 insertions, 0 deletions
diff --git a/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch b/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch
new file mode 100644
index 000000000..9131a60da
--- /dev/null
+++ b/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch
@@ -0,0 +1,84 @@
+From 7207eecfcb3095442bce30227b551003edc7b908 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:02 -0700
+Subject: [PATCH 08/17] drm/i915: Add distrust_bios_wm flag to dev_priv (v2)
+
+SKL-style platforms can't fully trust the watermark/DDB settings
+programmed by the BIOS and need to do extra sanitization on their first
+atomic update. Add a flag to dev_priv that is set during hardware
+readout and cleared at the end of the first commit.
+
+Note that for the somewhat common case where everything is turned off
+when the driver starts up, we don't need to bother with a recompute...we
+know exactly what the DDB should be (all zero's) so just setup the DDB
+directly in that case.
+
+v2:
+ - Move clearing of distrust_bios_wm up below the swap_state call since
+ it's a more natural / self-explanatory location. (Maarten)
+ - Use dev_priv->active_crtcs to test whether any CRTC's are turned on
+ during HW WM readout rather than trying to count the active CRTC's
+ again ourselves. (Maarten)
+
+Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-9-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/i915_drv.h | 7 +++++++
+ drivers/gpu/drm/i915/intel_display.c | 1 +
+ drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
+ 3 files changed, 16 insertions(+)
+
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
+index 611c128..e21960d 100644
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -1981,6 +1981,13 @@ struct drm_i915_private {
+ * cstate->wm.need_postvbl_update.
+ */
+ struct mutex wm_mutex;
++
++ /*
++ * Set during HW readout of watermarks/DDB. Some platforms
++ * need to know when we're still using BIOS-provided values
++ * (which we don't fully trust).
++ */
++ bool distrust_bios_wm;
+ } wm;
+
+ struct i915_runtime_pm pm;
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index f26d1c5..a9d2e30 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -13621,6 +13621,7 @@ static int intel_atomic_commit(struct drm_device *dev,
+
+ drm_atomic_helper_swap_state(dev, state);
+ dev_priv->wm.config = intel_state->wm_config;
++ dev_priv->wm.distrust_bios_wm = false;
+ intel_shared_dpll_commit(state);
+
+ if (intel_state->modeset) {
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index f009d43..a49faa7 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -4026,6 +4026,14 @@ void skl_wm_get_hw_state(struct drm_device *dev)
+ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
+ skl_pipe_wm_get_hw_state(crtc);
+
++ if (dev_priv->active_crtcs) {
++ /* Fully recompute DDB on first atomic commit */
++ dev_priv->wm.distrust_bios_wm = true;
++ } else {
++ /* Easy/common case; just sanitize DDB now if everything off */
++ memset(ddb, 0, sizeof(*ddb));
++ }
++
+ /* Calculate plane data rates */
+ for_each_intel_crtc(dev, intel_crtc) {
+ struct intel_crtc_state *cstate = intel_crtc->config;
+--
+2.7.4
+