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authorPeter Robinson <pbrobinson@gmail.com>2017-02-15 23:06:52 +0000
committerPeter Robinson <pbrobinson@gmail.com>2017-02-15 23:06:52 +0000
commit6ec30f5393eb3ef0bfa0f3a8f25fac895b941265 (patch)
tree84109264105c13da141256dc08c8406064465158 /usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch
parentfa0d6b9036282da7c53453af871deb24f2ad059e (diff)
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Enable PWRSEQ_SIMPLE module (fixes rhbz 1377816)
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