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authorJosh Boyer <jwboyer@redhat.com>2013-06-17 10:11:18 -0400
committerJosh Boyer <jwboyer@redhat.com>2013-06-17 10:14:41 -0400
commit6f1d3b1ba68513a6d4377dd5723f3942f1b056e3 (patch)
tree72bedf037a1b86471617169c19e71d464b66a7d5 /drm-radeon-Disable-writeback-by-default-on-ppc.patch
parent542e360438cf855ace303dd5d8112ee1e0651dd7 (diff)
downloadkernel-6f1d3b1ba68513a6d4377dd5723f3942f1b056e3.tar.gz
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Add patch to fix radeon issues on powerpc
Diffstat (limited to 'drm-radeon-Disable-writeback-by-default-on-ppc.patch')
-rw-r--r--drm-radeon-Disable-writeback-by-default-on-ppc.patch85
1 files changed, 85 insertions, 0 deletions
diff --git a/drm-radeon-Disable-writeback-by-default-on-ppc.patch b/drm-radeon-Disable-writeback-by-default-on-ppc.patch
new file mode 100644
index 000000000..0defb1340
--- /dev/null
+++ b/drm-radeon-Disable-writeback-by-default-on-ppc.patch
@@ -0,0 +1,85 @@
+From b67e0a6a7409f9c1a12e573fb7d8d80ee455b103 Mon Sep 17 00:00:00 2001
+From: Adam Jackson <ajax@redhat.com>
+Date: Mon, 17 Jun 2013 09:59:34 -0400
+Subject: [PATCH] drm/radeon: Disable writeback by default on ppc
+
+At least on an IBM Power 720, this check passes, but several piglit
+tests will reliably trigger GPU resets due to the ring buffer pointers
+not being updated. There's probably a better way to limit this to just
+affected machines though.
+
+Signed-off-by: Adam Jackson <ajax@redhat.com>
+---
+ drivers/gpu/drm/radeon/r600_cp.c | 7 +++++++
+ drivers/gpu/drm/radeon/radeon_cp.c | 7 +++++++
+ drivers/gpu/drm/radeon/radeon_device.c | 4 ++--
+ drivers/gpu/drm/radeon/radeon_drv.c | 2 +-
+ 4 files changed, 17 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
+index 1c51c08..ef28532 100644
+--- a/drivers/gpu/drm/radeon/r600_cp.c
++++ b/drivers/gpu/drm/radeon/r600_cp.c
+@@ -552,6 +552,13 @@ static void r600_test_writeback(drm_radeon_private_t *dev_priv)
+ dev_priv->writeback_works = 0;
+ DRM_INFO("writeback test failed\n");
+ }
++#if defined(__ppc__) || defined(__ppc64__)
++ /* the test might succeed on ppc, but it's usually not reliable */
++ if (radeon_no_wb == -1) {
++ radeon_no_wb = 1;
++ DRM_INFO("not trusting writeback test due to arch quirk\n");
++ }
++#endif
+ if (radeon_no_wb == 1) {
+ dev_priv->writeback_works = 0;
+ DRM_INFO("writeback forced off\n");
+diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
+index efc4f64..a967b33 100644
+--- a/drivers/gpu/drm/radeon/radeon_cp.c
++++ b/drivers/gpu/drm/radeon/radeon_cp.c
+@@ -892,6 +892,13 @@ static void radeon_test_writeback(drm_radeon_private_t * dev_priv)
+ dev_priv->writeback_works = 0;
+ DRM_INFO("writeback test failed\n");
+ }
++#if defined(__ppc__) || defined(__ppc64__)
++ /* the test might succeed on ppc, but it's usually not reliable */
++ if (radeon_no_wb == -1) {
++ radeon_no_wb = 1;
++ DRM_INFO("not trusting writeback test due to arch quirk\n");
++ }
++#endif
+ if (radeon_no_wb == 1) {
+ dev_priv->writeback_works = 0;
+ DRM_INFO("writeback forced off\n");
+diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
+index 1899738..524046e 100644
+--- a/drivers/gpu/drm/radeon/radeon_device.c
++++ b/drivers/gpu/drm/radeon/radeon_device.c
+@@ -322,8 +322,8 @@ int radeon_wb_init(struct radeon_device *rdev)
+ /* disable event_write fences */
+ rdev->wb.use_event = false;
+ /* disabled via module param */
+- if (radeon_no_wb == 1) {
+- rdev->wb.enabled = false;
++ if (radeon_no_wb != -1) {
++ rdev->wb.enabled = !!radeon_no_wb;
+ } else {
+ if (rdev->flags & RADEON_IS_AGP) {
+ /* often unreliable on AGP */
+diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
+index 094e7e5..04809d4 100644
+--- a/drivers/gpu/drm/radeon/radeon_drv.c
++++ b/drivers/gpu/drm/radeon/radeon_drv.c
+@@ -146,7 +146,7 @@ static inline void radeon_register_atpx_handler(void) {}
+ static inline void radeon_unregister_atpx_handler(void) {}
+ #endif
+
+-int radeon_no_wb;
++int radeon_no_wb = -1;
+ int radeon_modeset = -1;
+ int radeon_dynclks = -1;
+ int radeon_r4xx_atom = 0;
+--
+1.8.2.1
+