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authorJustin M. Forbes <jforbes@fedoraproject.org>2021-01-12 08:14:24 -0600
committerJustin M. Forbes <jforbes@fedoraproject.org>2021-01-12 08:14:24 -0600
commita5f2843a8da0ecb717f6f8a17df685fe69ea18c5 (patch)
treea084e50acc05d95599e2d2d3539ae003ac993487 /configs/fedora/generic/arm/aarch64/CONFIG_ARM64_ERRATUM_1508412
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Linux v5.10.6 rebase
Signed-off-by: Justin M. Forbes <jforbes@fedoraproject.org>
Diffstat (limited to 'configs/fedora/generic/arm/aarch64/CONFIG_ARM64_ERRATUM_1508412')
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+# CONFIG_ARM64_ERRATUM_1508412:
+#
+# This option adds a workaround for Arm Cortex-A77 erratum 1508412.
+#
+# Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence
+# of a store-exclusive or read of PAR_EL1 and a load with device or
+# non-cacheable memory attributes. The workaround depends on a firmware
+# counterpart.
+#
+# KVM guests must also have the workaround implemented or they can
+# deadlock the system.
+#
+# Work around the issue by inserting DMB SY barriers around PAR_EL1
+# register reads and warning KVM users. The DMB barrier is sufficient
+# to prevent a speculative PAR_EL1 read.
+#
+# If unsure, say Y.
+#
+# Symbol: ARM64_ERRATUM_1508412 [=y]
+# Type : bool
+# Defined at arch/arm64/Kconfig:639
+# Prompt: Cortex-A77: 1508412: workaround deadlock on sequence of NC/Device load and store exclusive or PAR read
+# Location:
+# -> Kernel Features
+# -> ARM errata workarounds via the alternatives framework
+#
+#
+#
+CONFIG_ARM64_ERRATUM_1508412=y