Bring in ARM patches from stabilization branch

1 files changed, 171 insertions, 0 deletions

diff --git a/bcm283x-Define-UART-pinmuxing-on-board-level.patch b/bcm283x-Define-UART-pinmuxing-on-board-level.patch
new file mode 100644
index 000000000..26efe9007
--- /dev/null
+++ b/bcm283x-Define-UART-pinmuxing-on-board-level.patch
@@ -0,0 +1,171 @@
+From patchwork Thu Jul 20 19:37:07 2017
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [1/3] ARM: bcm283x: Define UART pinmuxing on board level
+From: Stefan Wahren <stefan.wahren@i2se.com>
+X-Patchwork-Id: 9855625
+Message-Id: <1500579429-9101-2-git-send-email-stefan.wahren@i2se.com>
+To: Eric Anholt <eric@anholt.net>, Rob Herring <robh+dt@kernel.org>,
+ Mark Rutland <mark.rutland@arm.com>
+Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
+ Florian Fainelli <f.fainelli@gmail.com>,
+ Scott Branden <sbranden@broadcom.com>, 
+ linux-rpi-kernel@lists.infradead.org,
+ linux-arm-kernel@lists.infradead.org, Gerd Hoffmann <kraxel@redhat.com>
+Date: Thu, 20 Jul 2017 21:37:07 +0200
+
+Until RPI 3 and Zero W the pl011 (uart0) was always on pin 14/15. So in
+order to take care of them and other boards in the future,
+we need to define UART pinmuxing on board level.
+
+This work based on Eric Anholt's patch "ARM: bcm2385: Don't force pl011
+onto pins 14/15." and Fabian Vogt's patch "ARM64: dts: bcm2837: assign
+uart0 to BT and uart1 to pin headers".
+
+Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
+---
+ arch/arm/boot/dts/bcm2835-rpi-a-plus.dts |  6 ++++++
+ arch/arm/boot/dts/bcm2835-rpi-a.dts      |  6 ++++++
+ arch/arm/boot/dts/bcm2835-rpi-b-plus.dts |  6 ++++++
+ arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts |  6 ++++++
+ arch/arm/boot/dts/bcm2835-rpi-b.dts      |  6 ++++++
+ arch/arm/boot/dts/bcm2835-rpi-zero.dts   |  6 ++++++
+ arch/arm/boot/dts/bcm2835-rpi.dtsi       |  2 +-
+ arch/arm/boot/dts/bcm2836-rpi-2-b.dts    |  6 ++++++
+ arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts    | 10 ++++++++++
+ 9 files changed, 53 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+index d070454..9f86649 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+@@ -99,3 +99,9 @@
+ &hdmi {
+ 	hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ };
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_gpio14>;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
+index 46d078e..4b1af06 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
+@@ -94,3 +94,9 @@
+ &hdmi {
+ 	hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+ };
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_gpio14>;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+index 432088e..a846f1e 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+@@ -101,3 +101,9 @@
+ &hdmi {
+ 	hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ };
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_gpio14>;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+index 4133bc2..e860964 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+@@ -94,3 +94,9 @@
+ &hdmi {
+ 	hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ };
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_gpio14>;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
+index 4d56fe3..5d77f3f 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
+@@ -89,3 +89,9 @@
+ &hdmi {
+ 	hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+ };
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_gpio14>;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
+index 79a20d5..7036240 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
+@@ -103,3 +103,9 @@
+ &hdmi {
+ 	hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ };
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_gpio14>;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+index e55b362..e36c392 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -39,7 +39,7 @@
+ 	};
+ 
+ 	alt0: alt0 {
+-		brcm,pins = <4 5 7 8 9 10 11 14 15>;
++		brcm,pins = <4 5 7 8 9 10 11>;
+ 		brcm,function = <BCM2835_FSEL_ALT0>;
+ 	};
+ };
+diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+index bf19e8c..e8de414 100644
+--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
++++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+@@ -39,3 +39,9 @@
+ &hdmi {
+ 	hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ };
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_gpio14>;
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts
+index 972f14d..20725ca 100644
+--- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts
++++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts
+@@ -19,7 +19,17 @@
+ 	};
+ };
+ 
++/* uart0 communicates with the BT module */
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_ctsrts_gpio30 &gpclk2_gpio43>;
++	status = "okay";
++};
++
++/* uart1 is mapped to the pin header */
+ &uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart1_gpio14>;
+ 	status = "okay";
+ };
+