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authorPeter Robinson <pbrobinson@gmail.com>2019-06-30 20:15:50 +0100
committerPeter Robinson <pbrobinson@gmail.com>2019-06-30 20:15:50 +0100
commitd2e0e69e62355cc8ca139ab2a0258f74e9d1c1e5 (patch)
tree521d7b243d81ca56c610a01da7bd1cd8a93275b6 /arm64-dts-rockchip-Update-DWC3-modules-on-RK3399-SoCs.patch
parentbf2174540c02192eadd87b711a4bedc0bdfa4d31 (diff)
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minor arm cleanups, update rpi cam patch, add fix for dwc3 on rockchips
Diffstat (limited to 'arm64-dts-rockchip-Update-DWC3-modules-on-RK3399-SoCs.patch')
-rw-r--r--arm64-dts-rockchip-Update-DWC3-modules-on-RK3399-SoCs.patch145
1 files changed, 145 insertions, 0 deletions
diff --git a/arm64-dts-rockchip-Update-DWC3-modules-on-RK3399-SoCs.patch b/arm64-dts-rockchip-Update-DWC3-modules-on-RK3399-SoCs.patch
new file mode 100644
index 000000000..c5ce675d4
--- /dev/null
+++ b/arm64-dts-rockchip-Update-DWC3-modules-on-RK3399-SoCs.patch
@@ -0,0 +1,145 @@
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+From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
+To: devicetree@vger.kernel.org
+Subject: [PATCH] arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCs
+Date: Thu, 13 Jun 2019 18:27:45 +0200
+Message-Id: <20190613162745.12195-1-enric.balletbo@collabora.com>
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+Cc: Mark Rutland <mark.rutland@arm.com>, Heiko Stuebner <heiko@sntech.de>,
+ Felipe Balbi <felipe.balbi@linux.intel.com>,
+ linux-rockchip@lists.infradead.org, Tony Xie <tony.xie@rock-chips.com>,
+ Viresh Kumar <viresh.kumar@linaro.org>, Randy Li <ayaka@soulik.info>,
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+ Klaus Goger <klaus.goger@theobroma-systems.com>,
+ Matthias Brugger <matthias.bgg@gmail.com>,
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+ linux-arm-kernel@lists.infradead.org,
+ Christoph Muellner <christoph.muellner@theobroma-systems.com>
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+As per binding documentation [1], the DWC3 core should have the "ref",
+"bus_early" and "suspend" clocks. As explained in the binding, those
+clocks are required for new platforms but not for existing platforms
+before commit fe8abf332b8f ("usb: dwc3: support clocks and resets for
+DWC3 core").
+
+However, as those clocks are really treated as required, this ends with
+having some annoying messages when the "rockchip,rk3399-dwc3" is used:
+
+[ 1.724107] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2
+[ 1.731893] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2
+[ 2.495937] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2
+[ 2.647239] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2
+
+In order to remove those annoying messages, update the DWC3 hardware
+module node and add all the required clocks. With this change, both, the
+glue node and the DWC3 core node, have the clocks defined, but that's
+not really a problem and there isn't a side effect on do this. So, we
+can get rid of the annoying get clk error messages.
+
+[1] Documentation/devicetree/bindings/usb/dwc3.txt
+
+Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
+---
+
+ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+index 196ac9b78076..a15348d185ce 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+@@ -414,6 +414,9 @@
+ compatible = "snps,dwc3";
+ reg = <0x0 0xfe800000 0x0 0x100000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
++ clocks = <&cru SCLK_USB3OTG0_REF>, <&cru ACLK_USB3OTG0>,
++ <&cru SCLK_USB3OTG0_SUSPEND>;
++ clock-names = "ref", "bus_early", "suspend";
+ dr_mode = "otg";
+ phys = <&u2phy0_otg>, <&tcphy0_usb3>;
+ phy-names = "usb2-phy", "usb3-phy";
+@@ -447,6 +450,9 @@
+ compatible = "snps,dwc3";
+ reg = <0x0 0xfe900000 0x0 0x100000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
++ clocks = <&cru SCLK_USB3OTG1_REF>, <&cru ACLK_USB3OTG1>,
++ <&cru SCLK_USB3OTG1_SUSPEND>;
++ clock-names = "ref", "bus_early", "suspend";
+ dr_mode = "otg";
+ phys = <&u2phy1_otg>, <&tcphy1_usb3>;
+ phy-names = "usb2-phy", "usb3-phy";