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authorLaura Abbott <labbott@redhat.com>2018-07-12 08:39:51 -0700
committerLaura Abbott <labbott@redhat.com>2018-07-12 08:39:51 -0700
commitf6d694114c8ce0a9f6c56f1a75e5b2db94029674 (patch)
tree4f59a23e531bfb95c203a58fb86e00ad1cf466e3 /arm-sdhci-esdhc-imx-fixes.patch
parent866b8d94b51729383a0ba53a6e2cac0fa91b0034 (diff)
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Linux v4.18-rc4-69-gc25c74b7476e
Diffstat (limited to 'arm-sdhci-esdhc-imx-fixes.patch')
-rw-r--r--arm-sdhci-esdhc-imx-fixes.patch66
1 files changed, 0 insertions, 66 deletions
diff --git a/arm-sdhci-esdhc-imx-fixes.patch b/arm-sdhci-esdhc-imx-fixes.patch
index ecb8d096c..c42f9e195 100644
--- a/arm-sdhci-esdhc-imx-fixes.patch
+++ b/arm-sdhci-esdhc-imx-fixes.patch
@@ -170,69 +170,3 @@ index 23966f887da6..cb2433d6d61f 100644
int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */
-From patchwork Thu Jun 28 08:13:31 2018
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [3/3] mmc: sdhci-esdhc-imx: prevent stack from using higher speed
- modes
-From: Stefan Agner <stefan@agner.ch>
-X-Patchwork-Id: 10493271
-Message-Id: <20180628081331.13051-4-stefan@agner.ch>
-To: adrian.hunter@intel.com, ulf.hansson@linaro.org
-Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com,
- michael@amarulasolutions.com, rmk+kernel@armlinux.org.uk,
- linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
- Stefan Agner <stefan@agner.ch>
-Date: Thu, 28 Jun 2018 10:13:31 +0200
-
-If pinctrl configurations for higher speed modes are missing, the
-stack currently uses the no 1.8V quirk. This comes close to what
-we need but not exactly: E.g. if a eMMC chip uses 1.8V signaling
-(by specifying a 1.8V only vqmmc-supply) while not providing any
-100MHz/200MHz pinctrl configurations then the SDHCI_QUIRK2_NO_1_8_V
-leads the stack to print signaling voltage switch failed errors
-continuously:
- mmc1: Switching to 3.3V signalling voltage failed
-
-Presumably because the stack tries to use 3.3V signaling:
-
- # cat /sys/kernel/debug/mmc1/ios
- ...
- timing spec: 8 (mmc DDR52)
- signal voltage: 0 (3.30 V)
- ...
-
-With using SDHCI_QUIRK2_NO_UHS_HS200_HS400 we prevent the stack
-from choosing any modes require speeds higher than 52MHz while
-still allowing to select modes using 1.8V at lower speeds (e.g.
-DDR52):
-
- # cat /sys/kernel/debug/mmc1/ios
- ...
- timing spec: 8 (mmc DDR52)
- signal voltage: 1 (1.80 V)
- ...
-
-Signed-off-by: Stefan Agner <stefan@agner.ch>
----
- drivers/mmc/host/sdhci-esdhc-imx.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
-index 20a420b765b3..4a1c33018072 100644
---- a/drivers/mmc/host/sdhci-esdhc-imx.c
-+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
-@@ -1165,10 +1165,10 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
- * fall back to not supporting uhs by specifying no
- * 1.8v quirk
- */
-- host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
-+ host->quirks2 |= SDHCI_QUIRK2_NO_UHS_HS200_HS400;
- }
- } else {
-- host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
-+ host->quirks2 |= SDHCI_QUIRK2_NO_UHS_HS200_HS400;
- }
-
- /* call to generic mmc_of_parse to support additional capabilities */