Update Utilite patch

1 files changed, 317 insertions, 25 deletions

diff --git a/arm-i.MX6-Utilite-device-dtb.patch b/arm-i.MX6-Utilite-device-dtb.patch
index 86f9e763d..efffd77bd 100644
--- a/arm-i.MX6-Utilite-device-dtb.patch
+++ b/arm-i.MX6-Utilite-device-dtb.patch
@@ -1,62 +1,354 @@
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Fri, 11 Jul 2014 00:10:56 +0100
-Subject: [PATCH] arm: i.MX6 Utilite device dtb
+From: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
 
+The CompuLab Utilite Pro is a miniature fanless desktop pc based on
+the i.MX6 Quad powered cm-fx6 module. It features two serial ports,
+USB OTG, 4x USB, analog audio and S/PDIF, 2x Gb Ethernet, HDMI and
+DVI ports, an on-board 32GB SSD, a mmc slot, and on-board wifi/bt.
+
+Add initial support for it including USB, Ethernet (both ports), sata
+and HDMI support.
+
+Signed-off-by: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
+---
+ arch/arm/boot/dts/Makefile              |   1 +
+ arch/arm/boot/dts/imx6q-utilite-pro.dts | 128 ++++++++++++++++++++++++++++++++
+ 2 files changed, 129 insertions(+)
+ create mode 100644 arch/arm/boot/dts/imx6q-utilite-pro.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 515a428..287044c 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -369,6 +369,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
+ 	imx6q-tx6q-1110.dtb \
+ 	imx6q-tx6q-11x0-mb7.dtb \
+ 	imx6q-udoo.dtb \
++	imx6q-utilite-pro.dtb \
+ 	imx6q-wandboard.dtb \
+ 	imx6q-wandboard-revb1.dtb \
+ 	imx6qp-nitrogen6_max.dtb \
+diff --git a/arch/arm/boot/dts/imx6q-utilite-pro.dts b/arch/arm/boot/dts/imx6q-utilite-pro.dts
+new file mode 100644
+index 0000000..bcd8e0d
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-utilite-pro.dts
+@@ -0,0 +1,128 @@
++/*
++ * Copyright 2016 Christopher Spinrath
++ * Copyright 2013 CompuLab Ltd.
++ *
++ * Based on the GPLv2 licensed devicetree distributed with the vendor
++ * kernel for the Utilite Pro:
++ *	Copyright 2013 CompuLab Ltd.
++ *	Author: Valentin Raevsky <valentin@xxxxxxxxxxxxxx>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6q-cm-fx6.dts"
++
++/ {
++	model = "CompuLab Utilite Pro";
++	compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q";
++
++	aliases {
++		ethernet1 = &eth1;
++		rtc0 = &em3027;
++		rtc1 = &snvs_rtc;
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++		power {
++			label = "Power Button";
++			gpios = <&gpio1 29 1>;
++			linux,code = <116>; /* KEY_POWER */
++			gpio-key,wakeup;
++		};
++	};
++};
++
++&hdmi {
++	ddc-i2c-bus = <&i2c2>;
++	status = "okay";
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c1>;
++	status = "okay";
++
++	eeprom@50 {
++		compatible = "at24,24c02";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++
++	em3027: rtc@56 {
++		compatible = "emmicro,em3027";
++		reg = <0x56>;
++	};
++};
++
++&i2c2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c2>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	hog {
++		pinctrl_hog: hoggrp {
++			fsl,pins = <
++				/* power button */
++				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
++			>;
++		};
++	};
++
++	imx6q-utilite-pro {
++		pinctrl_i2c1: i2c1grp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
++				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
++			>;
++		};
++
++		pinctrl_i2c2: i2c2grp {
++			fsl,pins = <
++				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
++				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
++			>;
++		};
++
++		pinctrl_uart2: uart2grp {
++			fsl,pins = <
++				MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
++				MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
++				MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
++				MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
++			>;
++		};
++	};
++};
++
++&pcie {
++	pcie@0,0 {
++		reg = <0x000000 0 0 0 0>;
++		#address-cells = <3>;
++		#size-cells = <2>;
++
++		/* non-removable i211 ethernet card */
++		eth1: intel,i211@pcie0,0 {
++			reg = <0x010000 0 0 0 0>;
++		};
++	};
++};
++
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart2>;
++	fsl,uart-has-rtscts;
++	dma-names = "rx", "tx";
++	dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
++	status = "okay";
++};
+-- 
+2.8.2
+From: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
+
+The cm-fx6 module has an on-board spi-flash chip for its firmware, an
+eeprom (containing e.g. the mac address of the on-board Ethernet),
+a sata port, a pcie controller, an USB hub, and an USB otg port.
+Enable support for them. In addition, enable syscon poweroff support.
+
+Signed-off-by: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
 ---
- arch/arm/boot/dts/imx6q-cm-fx6.dts | 38 ++++++++++++++++++++++++++++++++++++++
- 1 file changed, 38 insertions(+)
+ arch/arm/boot/dts/imx6q-cm-fx6.dts | 136 +++++++++++++++++++++++++++++++++++++
+ 1 file changed, 136 insertions(+)
 
 diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
-index 99b46f8030ad..8b6ddd16dcc5 100644
+index 99b46f8..f4fc22e 100644
 --- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
 +++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
-@@ -97,11 +97,49 @@
+@@ -31,6 +31,61 @@
+ 			linux,default-trigger = "heartbeat";
+ 		};
+ 	};
++
++	regulators {
++		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		reg_usb_otg_vbus: usb_otg_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_otg_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio3 22 0>;
++			enable-active-high;
++		};
++
++		reg_usb_h1_vbus: usb_h1_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_h1_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio7 8 0>;
++			enable-active-high;
++		};
++	};
++};
++
++&ecspi1 {
++	fsl,spi-num-chipselects = <2>;
++	cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_ecspi1>;
++	status = "okay";
++
++	flash: m25p80@0 {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		compatible = "st,m25p", "jedec,spi-nor";
++		spi-max-frequency = <20000000>;
++		reg = <0>;
++
++		partition@0 {
++			label = "uboot";
++			reg = <0x0 0xc0000>;
++		};
++
++		partition@c0000 {
++			label = "uboot environment";
++			reg = <0xc0000 0x40000>;
++		};
++
++		partition@100000 {
++			label = "reserved";
++			reg = <0x100000 0x100000>;
++		};
++	};
+ };
+ 
+ &fec {
+@@ -46,8 +101,31 @@
+ 	status = "okay";
+ };
+ 
++&i2c3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3>;
++	status = "okay";
++	clock-frequency = <100000>;
++
++	eeprom@50 {
++		compatible = "at24,24c02";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++};
++
+ &iomuxc {
+ 	imx6q-cm-fx6 {
++		pinctrl_ecspi1: ecspi1grp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		 0x100b1
++				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		 0x100b1
++				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		 0x100b1
++				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x100b1
++				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x100b1
++			>;
++		};
++
+ 		pinctrl_enet: enetgrp {
+ 			fsl,pins = <
+ 				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
+@@ -91,17 +169,75 @@
+ 			>;
+ 		};
+ 
++		pinctrl_i2c3: i2c3grp {
++			fsl,pins = <
++				MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
++				MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
++			>;
++		};
++
++		pinctrl_pcie: pciegrp {
++			fsl,pins = <
++				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000
++				MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
++			>;
++		};
++
+ 		pinctrl_uart4: uart4grp {
+ 			fsl,pins = <
+ 				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
  				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
  			>;
  		};
 +
-+		pinctrl_usdhc1: usdhc1grp {
++		pinctrl_usbh1: usbh1grp {
 +			fsl,pins = <
-+				MX6QDL_PAD_SD1_CMD__SD1_CMD             0x17059
-+				MX6QDL_PAD_SD1_CLK__SD1_CLK             0x10059
-+				MX6QDL_PAD_SD1_DAT0__SD1_DATA0          0x17059
-+				MX6QDL_PAD_SD1_DAT1__SD1_DATA1          0x17059
-+				MX6QDL_PAD_SD1_DAT2__SD1_DATA2          0x17059
-+				MX6QDL_PAD_SD1_DAT3__SD1_DATA3          0x17059
++				MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
 +			>;
 +		};
 +
-+		pinctrl_usdhc3: usdhc3grp {
++		pinctrl_usbotg: usbotggrp {
 +			fsl,pins = <
-+				MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
-+				MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
-+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
-+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
-+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
-+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
++				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
++				MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
 +			>;
 +		};
  	};
  };
  
++&pcie {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pcie>;
++	reset-gpio = <&gpio1 26 0>;
++	power-on-gpio = <&gpio2 24 0>;
++	status = "okay";
++};
++
 +&sata {
 +	status = "okay";
 +};
 +
++&snvs_poweroff {
++	status = "okay";
++};
++
  &uart4 {
  	pinctrl-names = "default";
  	pinctrl-0 = <&pinctrl_uart4>;
  	status = "okay";
  };
 +
-+&usdhc1 {
++&usbotg {
++	vbus-supply = <&reg_usb_otg_vbus>;
 +	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_usdhc1>;
++	pinctrl-0 = <&pinctrl_usbotg>;
++	dr_mode = "otg";
 +	status = "okay";
 +};
 +
-+&usdhc3 {
++&usbh1 {
++	vbus-supply = <&reg_usb_h1_vbus>;
 +	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_usdhc3>;
++	pinctrl-0 = <&pinctrl_usbh1>;
 +	status = "okay";
 +};
+-- 
+2.8.2
+