Rebase Utilute and BeagleBone patches, Minaor ARM updates

1 files changed, 460 insertions, 0 deletions

diff --git a/arm-beagle.patch b/arm-beagle.patch
new file mode 100644
index 000000000..5e2d8abdc
--- /dev/null
+++ b/arm-beagle.patch
@@ -0,0 +1,460 @@
+Bugzilla: 1012025
+Upstream-status: In beagle github repository https://github.com/beagleboard/kernel
+
+From b5a2528c89fc8049b2a6a750634c14983e33d00f Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Fri, 27 Dec 2013 13:05:09 -0600
+Subject: [PATCH] arm: dts: am335x-boneblack: lcdc add panel-info
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/am335x-boneblack.dts | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
+index 6b71ad9..09ffbd8 100644
+--- a/arch/arm/boot/dts/am335x-boneblack.dts
++++ b/arch/arm/boot/dts/am335x-boneblack.dts
+@@ -74,5 +74,18 @@
+ 		pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
+ 		pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
+ 		status = "okay";
++
++		panel-info {
++			bpp = <16>;
++			ac-bias = <255>;
++			ac-bias-intrpt = <0>;
++			dma-burst-sz = <16>;
++			fdd = <16>;
++			sync-edge = <1>;
++			sync-ctrl = <1>;
++			raster-order = <0>;
++			fifo-th = <0>;
++			invert-pxl-clk;
++		};
+ 	};
+ };
+-- 
+1.8.5.1
+
+From 1da083a002581520dd358b8b8e097078000d12b9 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Fri, 27 Dec 2013 13:14:19 -0600
+Subject: [PATCH 2/2] arm: dts: am335x-boneblack: add cpu0 opp points
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/am335x-boneblack.dts | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
+index 09ffbd8..f213ccd 100644
+--- a/arch/arm/boot/dts/am335x-boneblack.dts
++++ b/arch/arm/boot/dts/am335x-boneblack.dts
+@@ -67,6 +67,24 @@
+ };
+ 
+ / {
++	cpus {
++		cpu@0 {
++			cpu0-supply = <&dcdc2_reg>;
++			/*
++			 * To consider voltage drop between PMIC and SoC,
++			 * tolerance value is reduced to 2% from 4% and
++			 * voltage value is increased as a precaution.
++			 */
++			operating-points = <
++				/* kHz    uV */
++				1000000	1325000
++				800000	1300000
++				600000  1112000
++				300000   969000
++			>;
++		};
++	};
++
+ 	hdmi {
+ 		compatible = "ti,tilcdc,slave";
+ 		i2c = <&i2c0>;
+-- 
+1.8.5.1
+
+From 8551d8aa7d3e002da2097e7e902fb96fceb8694e Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Tue, 31 Dec 2013 11:17:45 -0600
+Subject: [PATCH 3/3] arm: dts: am335x-bone-common: enable and use i2c2
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/am335x-bone-common.dtsi | 39 +++++++++++++++++++++++++++++++
+ 1 file changed, 39 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
+index e3f27ec..54366b6 100644
+--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
+@@ -84,6 +84,13 @@
+ 		>;
+ 	};
+ 
++	i2c2_pins: pinmux_i2c2_pins {
++		pinctrl-single,pins = <
++			0x178 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_ctsn.i2c2_sda */
++			0x17c 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_rtsn.i2c2_scl */
++		>;
++	};
++
+ 	uart0_pins: pinmux_uart0_pins {
+ 		pinctrl-single,pins = <
+ 			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
+@@ -220,6 +227,38 @@
+ 		reg = <0x24>;
+ 	};
+ 
++	baseboard_eeprom: baseboard_eeprom@50 {
++		compatible = "at,24c256";
++		reg = <0x50>;
++	};
++};
++
++&i2c2 {
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c2_pins>;
++
++	clock-frequency = <100000>;
++
++	cape_eeprom0: cape_eeprom0@54 {
++		compatible = "at,24c256";
++		reg = <0x54>;
++	};
++
++	cape_eeprom1: cape_eeprom1@55 {
++		compatible = "at,24c256";
++		reg = <0x55>;
++	};
++
++	cape_eeprom2: cape_eeprom2@56 {
++		compatible = "at,24c256";
++		reg = <0x56>;
++	};
++
++	cape_eeprom3: cape_eeprom3@57 {
++		compatible = "at,24c256";
++		reg = <0x57>;
++	};
+ };
+ 
+ /include/ "tps65217.dtsi"
+-- 
+1.8.5.2
+
+From a3099dc53a47d1694a5b575580ec3406dc429bf8 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Tue, 31 Dec 2013 14:18:00 -0600
+Subject: [PATCH 4/4] arm: dts: am335x-bone-common: setup default pinmux
+ http://elinux.org/Basic_Proto_Cape
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/am335x-bone-common.dtsi | 130 ++++++++++++++++++++++++++++++
+ 1 file changed, 130 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
+index e4571af..f85cabc 100644
+--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
+@@ -98,6 +98,13 @@
+ 		>;
+ 	};
+ 
++	uart1_pins: pinmux_uart1_pins {
++		pinctrl-single,pins = <
++			0x180 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
++			0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */
++		>;
++	};
++
+ 	clkout2_pin: pinmux_clkout2_pin {
+ 		pinctrl-single,pins = <
+ 			0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
+@@ -178,6 +185,33 @@
+ 			0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
+ 		>;
+ 	};
++
++	spi0_pins: pinmux_spi0_pins {
++		pinctrl-single,pins = <
++			0x150 (PIN_INPUT_PULLUP | MUX_MODE0)	/* spi0_sclk.spi0_sclk */
++			0x154 (PIN_INPUT_PULLUP | MUX_MODE0)	/* spi0_d0.spi0_d0 */
++			0x158 (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* spi0_d1.spi0_d1 */
++			0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* spi0_cs0.spi0_cs0 */
++		>;
++	};
++
++	ehrpwm1_pin_p9_14: pinmux_ehrpwm1_pin_p9_14 {
++		pinctrl-single,pins = <
++			0x048 0x6	/* P9_14 (ZCZ ball U14) | MODE 6 */
++		>;
++	};
++
++	ehrpwm1_pin_p9_16: pinmux_ehrpwm1_pin_p9_16 {
++		pinctrl-single,pins = <
++			0x04c 0x6	/* P9_16 (ZCZ ball T14) | MODE 6 */
++		>;
++	};
++
++	ecap0_pin_p9_42: pinmux_ecap0_pin_p9_42 {
++		pinctrl-single,pins = <
++			0x164 0x0	/* P9_42 (ZCZ ball C18) | MODE 0 */
++		>;
++	};
+ };
+ 
+ &uart0 {
+@@ -187,6 +221,13 @@
+ 	status = "okay";
+ };
+ 
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart1_pins>;
++
++	status = "okay";
++};
++
+ &usb {
+ 	status = "okay";
+ 
+@@ -261,6 +302,56 @@
+ 	};
+ };
+ 
++&epwmss0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&ecap0_pin_p9_42>;
++	status = "okay";
++
++	ecap@48300100 {
++		status = "okay";
++	};
++};
++
++&epwmss1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <
++		&ehrpwm1_pin_p9_14
++		&ehrpwm1_pin_p9_16
++	>;
++
++	status = "okay";
++
++	ehrpwm@48302200 {
++		status = "okay";
++	};
++};
++
++&spi0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi0_pins>;
++	status = "okay";
++
++	spidev0: spi@0 {
++		compatible = "spidev";
++		reg = <0>;
++		spi-max-frequency = <16000000>;
++		spi-cpha;
++	};
++
++	spidev1: spi@1 {
++		compatible = "spidev";
++		reg = <1>;
++		spi-max-frequency = <16000000>;
++	};
++};
++
++&tscadc {
++	status = "okay";
++	adc {
++		ti,adc-channels = <4 5 6>;
++	};
++};
++
+ /include/ "tps65217.dtsi"
+ 
+ &tps {
+@@ -336,3 +427,42 @@
+ 	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+ 	cd-inverted;
+ };
++
++/ {
++	ocp {
++		//FIXME: these pwm's still need work, this guild isn't working..
++		//http://elinux.org/EBC_Exercise_13_Pulse_Width_Modulation
++		pwm_test_P9_14@0 {
++			compatible = "pwm_test";
++			pwms = <&ehrpwm1 0 500000 1>;
++			pwm-names = "PWM_P9_14";
++			pinctrl-names = "default";
++			pinctrl-0 = <&ehrpwm1_pin_p9_14>;
++			enabled = <1>;
++			duty = <0>;
++			status = "okay";
++		};
++
++		pwm_test_P9_16@0 {
++			compatible = "pwm_test";
++			pwms = <&ehrpwm1 0 500000 1>;
++			pwm-names = "PWM_P9_16";
++			pinctrl-names = "default";
++			pinctrl-0 = <&ehrpwm1_pin_p9_16>;
++			enabled = <1>;
++			duty = <0>;
++			status = "okay";
++		};
++
++		pwm_test_P9_42 {
++			compatible = "pwm_test";
++			pwms = <&ecap0 0 500000 1>;
++			pwm-names = "PWM_P9_42";
++			pinctrl-names = "default";
++			pinctrl-0 = <&ecap0_pin_p9_42>;
++			enabled = <1>;
++			duty = <0>;
++			status = "okay";
++		};
++	};
++};
+-- 
+1.8.5.2
+
+From b6e2c817edfc6d73874cf833daffe1be6c7ed8bb Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Thu, 13 Mar 2014 14:18:52 -0500
+Subject: [PATCH] arm: dts: am335x-bone-common: add
+ uart2_pins/uart4_pins/uart5_pins
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/am335x-bone-common.dtsi | 21 +++++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
+index f85cabc..5270d18 100644
+--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
+@@ -105,6 +105,27 @@
+ 		>;
+ 	};
+ 
++	uart2_pins: pinmux_uart2_pins {
++		pinctrl-single,pins = <
++			0x150 0x21	/* spi0_sclk.uart2_rxd | MODE1 */
++			0x154 0x01	/* spi0_d0.uart2_txd | MODE1 */
++		>;
++	};
++
++	uart4_pins: pinmux_uart4_pins {
++		pinctrl-single,pins = <
++			0x070 0x26	/* gpmc_wait0.uart4_rxd | MODE6 */
++			0x074 0x06	/* gpmc_wpn.uart4_txd | MODE6 */
++		>;
++	};
++
++	uart5_pins: pinmux_uart5_pins {
++		pinctrl-single,pins = <
++			0x0C4 0x24	/* lcd_data9.uart5_rxd | MODE4 */
++			0x0C0 0x04	/* lcd_data8.uart5_txd | MODE4 */
++		>;
++	};
++
+ 	clkout2_pin: pinmux_clkout2_pin {
+ 		pinctrl-single,pins = <
+ 			0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
+-- 
+1.9.0
+
+From 72567452d5d6007010597158f6afd00e2bf07579 Mon Sep 17 00:00:00 2001
+From: Pantelis Antoniou <panto@antoniou-consulting.com>
+Date: Sat, 15 Sep 2012 12:00:41 +0300
+Subject: [PATCH] pinctrl: pinctrl-single must be initialized early.
+
+When using pinctrl-single to handle i2c initialization, it has
+to be done early. Whether this is the best way to do so, is an
+exercise left to the reader.
+---
+ drivers/pinctrl/pinctrl-single.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
+index 829b98c..5107dcf 100644
+--- a/drivers/pinctrl/pinctrl-single.c
++++ b/drivers/pinctrl/pinctrl-single.c
+@@ -2039,7 +2039,17 @@ static struct platform_driver pcs_driver = {
+ #endif
+ };
+ 
+-module_platform_driver(pcs_driver);
++static int __init pcs_init(void)
++{
++	return platform_driver_register(&pcs_driver);
++}
++postcore_initcall(pcs_init);
++
++static void __exit pcs_exit(void)
++{
++	platform_driver_unregister(&pcs_driver);
++}
++module_exit(pcs_exit);
+ 
+ MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
+ MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver");
+-- 
+1.8.5.2
+
+From b6e2c817edfc6d73874cf833daffe1be6c7ed8bb Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Thu, 13 Mar 2014 14:18:52 -0500
+Subject: [PATCH] arm: dts: am335x-bone-common: add
+ uart2_pins/uart4_pins/uart5_pins
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/am335x-bone-common.dtsi | 21 +++++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
+index f85cabc..5270d18 100644
+--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
+@@ -105,6 +105,27 @@
+ 		>;
+ 	};
+ 
++	uart2_pins: pinmux_uart2_pins {
++		pinctrl-single,pins = <
++			0x150 0x21	/* spi0_sclk.uart2_rxd | MODE1 */
++			0x154 0x01	/* spi0_d0.uart2_txd | MODE1 */
++		>;
++	};
++
++	uart4_pins: pinmux_uart4_pins {
++		pinctrl-single,pins = <
++			0x070 0x26	/* gpmc_wait0.uart4_rxd | MODE6 */
++			0x074 0x06	/* gpmc_wpn.uart4_txd | MODE6 */
++		>;
++	};
++
++	uart5_pins: pinmux_uart5_pins {
++		pinctrl-single,pins = <
++			0x0C4 0x24	/* lcd_data9.uart5_rxd | MODE4 */
++			0x0C0 0x04	/* lcd_data8.uart5_txd | MODE4 */
++		>;
++	};
++
+ 	clkout2_pin: pinmux_clkout2_pin {
+ 		pinctrl-single,pins = <
+ 			0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
+-- 
+1.9.0