Some minor arm and Raspberry Pi fixes

1 files changed, 124 insertions, 0 deletions

diff --git a/ARM-dts-bcm2711-Add-pcie0-alias.patch b/ARM-dts-bcm2711-Add-pcie0-alias.patch
new file mode 100644
index 000000000..1735bac64
--- /dev/null
+++ b/ARM-dts-bcm2711-Add-pcie0-alias.patch
@@ -0,0 +1,124 @@
+From patchwork Wed Feb 26 16:46:00 2020
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+From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+To: Rob Herring <robh+dt@kernel.org>,
+ Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
+ Florian Fainelli <f.fainelli@gmail.com>
+Subject: [PATCH] ARM: dts: bcm2711: Add pcie0 alias
+Date: Wed, 26 Feb 2020 17:46:00 +0100
+Message-Id: <20200226164601.20150-1-nsaenzjulienne@suse.de>
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+
+Some bcm2711 revisions have different DMA constraints on the their PCIE
+bus. The lower common denominator, being able to access the lower 3GB of
+memory, is the default setting for now. Newer SoC revisions are able to
+access the whole memory space.
+
+Raspberry Pi 4's firmware is aware of this limitation and will correct
+the PCIE's dma-ranges property if a pcie0 alias is available. So add
+it.
+
+Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller")
+Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+Reviewed-by: Phil Elwell <phil@raspberrypi.com>
+---
+ arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
+index cb3385262705..479f6828d73f 100644
+--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
+@@ -21,6 +21,7 @@ memory@0 {
+ 
+ 	aliases {
+ 		ethernet0 = &genet;
++		pcie0 = &pcie0;
+ 	};
+ 
+ 	leds {