diff options
author | Thorsten Leemhuis <fedora@leemhuis.info> | 2020-02-28 17:53:37 +0100 |
---|---|---|
committer | Thorsten Leemhuis <fedora@leemhuis.info> | 2020-02-28 17:53:37 +0100 |
commit | 078a8d265cbf1f2f189b66f99a31f1ebff98de18 (patch) | |
tree | a5413440fa187f11234be500f2f7c5d44a1d9bfc | |
parent | 301a936afa8ea5aa5a8346099b00d08a5e21f3bc (diff) | |
parent | 84e9ccb666453d8db3b8d159ed9b433e8bc4ca9a (diff) | |
download | kernel-078a8d265cbf1f2f189b66f99a31f1ebff98de18.tar.gz kernel-078a8d265cbf1f2f189b66f99a31f1ebff98de18.tar.xz kernel-078a8d265cbf1f2f189b66f99a31f1ebff98de18.zip |
Merge remote-tracking branch 'origin/master' into rawhide-user-thl-vanilla-fedora
-rw-r--r-- | ARM64-Tegra-fixes.patch | 477 | ||||
-rw-r--r-- | Add-LCD-support-for-Pine64-Pinebook-1080p.patch | 1218 | ||||
-rw-r--r-- | Add-support-for-the-pine64-Pinebook-Pro.patch | 1448 | ||||
-rw-r--r-- | arm64-a64-mbus.patch | 69 | ||||
-rw-r--r-- | arm64-pine64-pinephone.patch | 568 | ||||
-rw-r--r-- | arm64-pine64-pinetab.patch | 583 | ||||
-rw-r--r-- | arm64-pinebook-fixes.patch | 429 | ||||
-rw-r--r-- | backlight-lp855x-Ensure-regulators-are-disabled-on-probe-failure.patch | 186 | ||||
-rw-r--r-- | configs/fedora/generic/x86/CONFIG_THUNDERBOLT_NET | 1 | ||||
-rw-r--r-- | configs/fedora/generic/x86/x86_64/CONFIG_EFI_RCI2_TABLE (renamed from configs/fedora/generic/x86/CONFIG_EFI_RCI2_TABLE) | 0 | ||||
-rw-r--r-- | kernel-i686-debug-fedora.config | 3 | ||||
-rw-r--r-- | kernel-i686-fedora.config | 3 | ||||
-rw-r--r-- | kernel-x86_64-debug-fedora.config | 1 | ||||
-rw-r--r-- | kernel-x86_64-fedora.config | 1 | ||||
-rw-r--r-- | kernel.spec | 25 | ||||
-rw-r--r-- | regulator-pwm-Don-t-warn-on-probe-deferral.patch | 99 |
16 files changed, 5103 insertions, 8 deletions
diff --git a/ARM64-Tegra-fixes.patch b/ARM64-Tegra-fixes.patch new file mode 100644 index 000000000..6ddfc2322 --- /dev/null +++ b/ARM64-Tegra-fixes.patch @@ -0,0 +1,477 @@ +From patchwork Mon Feb 24 14:34:33 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter <jonathanh@nvidia.com> +X-Patchwork-Id: 1243145 +Return-Path: <linux-tegra-owner@vger.kernel.org> +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=none (no SPF record) + smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; + helo=vger.kernel.org; + envelope-from=linux-tegra-owner@vger.kernel.org; + receiver=<UNKNOWN>) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none dis=none) header.from=nvidia.com +Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; + unprotected) header.d=nvidia.com header.i=@nvidia.com + header.a=rsa-sha256 header.s=n1 header.b=duOxTEf6; + dkim-atps=neutral +Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) + by ozlabs.org (Postfix) with ESMTP id 48R4Mz3K4gz9sRR + for <incoming@patchwork.ozlabs.org>; + Tue, 25 Feb 2020 01:34:55 +1100 (AEDT) +Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand + id S1727815AbgBXOew (ORCPT <rfc822;incoming@patchwork.ozlabs.org>); + Mon, 24 Feb 2020 09:34:52 -0500 +Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:6094 "EHLO + hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org + with ESMTP id S1727498AbgBXOew (ORCPT + <rfc822;linux-tegra@vger.kernel.org>); + Mon, 24 Feb 2020 09:34:52 -0500 +Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id <B5e53debf0001>; Mon, 24 Feb 2020 06:33:35 -0800 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate101.nvidia.com (PGP Universal service); + Mon, 24 Feb 2020 06:34:51 -0800 +X-PGP-Universal: processed; + by hqpgpgate101.nvidia.com on Mon, 24 Feb 2020 06:34:51 -0800 +Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL101.nvidia.com + (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Mon, 24 Feb 2020 14:34:50 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL105.nvidia.com + (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Mon, 24 Feb 2020 14:34:50 +0000 +Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id <B5e53df090001>; Mon, 24 Feb 2020 06:34:50 -0800 +From: Jon Hunter <jonathanh@nvidia.com> +To: Thierry Reding <thierry.reding@gmail.com> +CC: <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, + Jon Hunter <jonathanh@nvidia.com>, <stable@vger.kernel.org> +Subject: [PATCH 1/4] ARM64: Tegra: Enable I2C controller for EEPROM +Date: Mon, 24 Feb 2020 14:34:33 +0000 +Message-ID: <20200224143436.5438-1-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1582554815; bh=SKhUz0YkoB6pD4YoE/4KFxZbYw2qmSp519cZdmcBM3o=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + X-NVConfidentiality:MIME-Version:Content-Type; + b=duOxTEf6wTpBnmdA4GzgtJ0CYXr5t34ZZNN48pc9hExmRqaCcppGHAY2wcXqnjNmL + YwvDy0gfFikGS9gPJKICW2X6f4iOcgfnVhYOWdgnzSFD1bhtOoN+bEcXPC+LRDY89m + uAwuuKQR4MMohz9C8MW8xyatlc13ZEU0jeW1+S3PYfX2GhwRUooeFCGnmLUso5s2DZ + 65p26CoCGdQNBARsw2TNevBzLshNSXvHBdlFiKSs4S0hB7yJJrCwZx2JsjOm+aRtb3 + dgVHvAZAd8GLLKC8NvPCAhbIRhDt0vkyWmqHnB5suduti7g4QA1Eb8HLAXB5ptvzeK + jor+qP+NC8CVQ== +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: <linux-tegra.vger.kernel.org> +X-Mailing-List: linux-tegra@vger.kernel.org + +Commit a5b6b67364cb ("arm64: tegra: Add ID EEPROM for Jetson TX1 +module") populated the EEPROM on the Jetson TX1 module, but did not +enable the corresponding I2C controller. Enable the I2C controller so +that this EEPROM can be accessed. + +Fixes: a5b6b67364cb ("arm64: tegra: Add ID EEPROM for Jetson TX1 module") + +Cc: <stable@vger.kernel.org> +Signed-off-by: Jon Hunter <jonathanh@nvidia.com> +--- + arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +index cb58f79deb48..95b1a6e76e6e 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +@@ -265,6 +265,8 @@ + }; + + i2c@7000c500 { ++ status = "okay"; ++ + /* module ID EEPROM */ + eeprom@50 { + compatible = "atmel,24c02"; + +From patchwork Mon Feb 24 14:34:34 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter <jonathanh@nvidia.com> +X-Patchwork-Id: 1243146 +Return-Path: <linux-tegra-owner@vger.kernel.org> +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=none (no SPF record) + smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; + helo=vger.kernel.org; + envelope-from=linux-tegra-owner@vger.kernel.org; + receiver=<UNKNOWN>) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none dis=none) header.from=nvidia.com +Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; + unprotected) header.d=nvidia.com header.i=@nvidia.com + header.a=rsa-sha256 header.s=n1 header.b=YrupJt5o; + dkim-atps=neutral +Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) + by ozlabs.org (Postfix) with ESMTP id 48R4N1059Pz9sRR + for <incoming@patchwork.ozlabs.org>; + Tue, 25 Feb 2020 01:34:57 +1100 (AEDT) +Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand + id S1727498AbgBXOe4 (ORCPT <rfc822;incoming@patchwork.ozlabs.org>); + Mon, 24 Feb 2020 09:34:56 -0500 +Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:8365 "EHLO + hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org + with ESMTP id S1727803AbgBXOe4 (ORCPT + <rfc822;linux-tegra@vger.kernel.org>); + Mon, 24 Feb 2020 09:34:56 -0500 +Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id <B5e53deec0000>; Mon, 24 Feb 2020 06:34:20 -0800 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate101.nvidia.com (PGP Universal service); + Mon, 24 Feb 2020 06:34:55 -0800 +X-PGP-Universal: processed; + by hqpgpgate101.nvidia.com on Mon, 24 Feb 2020 06:34:55 -0800 +Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Mon, 24 Feb 2020 14:34:55 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com + (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Mon, 24 Feb 2020 14:34:55 +0000 +Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id <B5e53df0d0000>; Mon, 24 Feb 2020 06:34:54 -0800 +From: Jon Hunter <jonathanh@nvidia.com> +To: Thierry Reding <thierry.reding@gmail.com> +CC: <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, + Jon Hunter <jonathanh@nvidia.com> +Subject: [PATCH 2/4] ARM64: tegra: Add EEPROM supplies +Date: Mon, 24 Feb 2020 14:34:34 +0000 +Message-ID: <20200224143436.5438-2-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200224143436.5438-1-jonathanh@nvidia.com> +References: <20200224143436.5438-1-jonathanh@nvidia.com> +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1582554860; bh=XQRed+hM+dOmUn7lEyFBRTITiHe/kmVf6bYnTKyb4yU=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + In-Reply-To:References:X-NVConfidentiality:MIME-Version: + Content-Type; + b=YrupJt5osNrArZbD3/6N+E76P788S2kgwb7HnwldZ99/x70lrAIXTKHOx35uqz7o0 + bsYj1jAiz+BrmkHt678TBaesev2pBBcp8G+zkGDX+M6MWEvTixhn0bBERoHpnmuhQl + 1fWBcDKGg9r4KT46RFxrjCcRek8FB1gb1nM00FneNHFyguKuZEzRuMvoPfZEPr0Pm3 + HaB3AybSYgm2KABS5aZo/a2/9sIP0Bx2St673Bx+9vz89pPr8lWjHZO9QjIUdJn2Qw + 5rEeeEdOKkbx0RMyKaPAPIdhmrnVzrcyrnZYmf0KnxXJCWitqt2cyAu6uDjPI8kiL+ + JhWqRAza5osKg== +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: <linux-tegra.vger.kernel.org> +X-Mailing-List: linux-tegra@vger.kernel.org + +The following warning is observed on Jetson TX1, Jetson Nano and Jetson +TX2 platforms because the supply regulators are not specified for the +EEPROMs. + + WARNING KERN at24 0-0050: 0-0050 supply vcc not found, using dummy regulator + WARNING KERN at24 0-0057: 0-0057 supply vcc not found, using dummy regulator + +For both of these platforms the EEPROM is powered by the main 1.8V +supply rail and so populate the supply for these devices to fix these +warnings. + +Signed-off-by: Jon Hunter <jonathanh@nvidia.com> +--- + arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 1 + + arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 1 + + arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 1 + + arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 1 + + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 ++ + 5 files changed, 6 insertions(+) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +index d7628f5afb85..961b1be0c56b 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +@@ -226,6 +226,7 @@ + compatible = "atmel,24c02"; + reg = <0x57>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; +diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +index 947744d0f04c..da96de04d003 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +@@ -171,6 +171,7 @@ + compatible = "atmel,24c02"; + reg = <0x50>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +index 95b1a6e76e6e..f87d2437d11c 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +@@ -272,6 +272,7 @@ + compatible = "atmel,24c02"; + reg = <0x50>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +index a3cafe39ba4c..c70a610f8e3a 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +@@ -85,6 +85,7 @@ + compatible = "atmel,24c02"; + reg = <0x57>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +index 848afd855da6..21ed1756b889 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -114,6 +114,7 @@ + compatible = "atmel,24c02"; + reg = <0x50>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; +@@ -124,6 +125,7 @@ + compatible = "atmel,24c02"; + reg = <0x57>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; + +From patchwork Mon Feb 24 14:34:35 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter <jonathanh@nvidia.com> +X-Patchwork-Id: 1243147 +Return-Path: <linux-tegra-owner@vger.kernel.org> +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1582554864; bh=lUBb2WrI059cKuJQ/lQ6zAeA/dUVGu1GIMzWYnFLzuA=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + In-Reply-To:References:X-NVConfidentiality:MIME-Version: + Content-Type; + b=cDDn02CYOMd1x5bK/t7LoZ9fYn59xu8HcaGTMnsTAUfJYYkF5vUqcWjve/5PtksEv + +bYF/ELx+KLrbyXQ4LtKHW1V8F2iDHhNR1Rrs+/MUuPuxuOXwTsaYJgLd2A/FWO54O + men6fW7E5dJS7lmfJ050sgzZs+TABrFO/dyzOfrekczCVpqlnJEsPvdpFlBbzg125A + ZW3sMSe1pW+54pvkCWL7YF/RFnb9zefc0feJmu0Ky+kMH2QOFPSvufzsFBxOr1bUaJ + wqzLNTYwY6tWNy7axusq4KLKuCViERaAqSs/UlzzsrOQHJeecBOlH2GkFi8z7JASz2 + ucv0C5PUNzlTg== +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: <linux-tegra.vger.kernel.org> +X-Mailing-List: linux-tegra@vger.kernel.org + +The following warning is observed on the Jetson TX2 platform ... + + WARNING KERN tegra-sor 15540000.sor: 15540000.sor supply \ + vdd-hdmi-dp-pll not found, using dummy regulator + +The problem is caused because the regulator for the SOR device is +missing the '-supply' suffix in Device-Tree. Therefore, add the +'-supply' suffix to fix this warning. + +Fixes: 3fdfaf8718fa arm64: tegra: Enable DP support on Jetson TX2 + +Cc: <stable@vger.kernel.org> +Signed-off-by: Jon Hunter <jonathanh@nvidia.com> +--- + arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +index 961b1be0c56b..1af7f9ffb7b6 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +@@ -278,7 +278,7 @@ + status = "okay"; + + avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>; +- vdd-hdmi-dp-pll = <&vdd_1v8_ap>; ++ vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>; + + nvidia,dpaux = <&dpaux>; + }; + +From patchwork Mon Feb 24 14:34:36 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter <jonathanh@nvidia.com> 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<rfc822;incoming@patchwork.ozlabs.org>); + Mon, 24 Feb 2020 09:35:02 -0500 +Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:6117 "EHLO + hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org + with ESMTP id S1727803AbgBXOfC (ORCPT + <rfc822;linux-tegra@vger.kernel.org>); + Mon, 24 Feb 2020 09:35:02 -0500 +Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id <B5e53deca0000>; Mon, 24 Feb 2020 06:33:46 -0800 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate102.nvidia.com (PGP Universal service); + Mon, 24 Feb 2020 06:35:01 -0800 +X-PGP-Universal: processed; + by hqpgpgate102.nvidia.com on Mon, 24 Feb 2020 06:35:01 -0800 +Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL111.nvidia.com + (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Mon, 24 Feb 2020 14:35:01 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL111.nvidia.com + (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Mon, 24 Feb 2020 14:35:01 +0000 +Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id <B5e53df140006>; Mon, 24 Feb 2020 06:35:01 -0800 +From: Jon Hunter <jonathanh@nvidia.com> +To: Thierry Reding <thierry.reding@gmail.com> +CC: <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, + Jon Hunter <jonathanh@nvidia.com> +Subject: [PATCH 4/4] ARM64: tegra: Populate LP8557 backlight regulator +Date: Mon, 24 Feb 2020 14:34:36 +0000 +Message-ID: <20200224143436.5438-4-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200224143436.5438-1-jonathanh@nvidia.com> +References: <20200224143436.5438-1-jonathanh@nvidia.com> +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1582554826; bh=8MBs7jrK7WrFNE7o6bG0zu41Sicfxu97bK94j6RYNJs=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + In-Reply-To:References:X-NVConfidentiality:MIME-Version: + Content-Type; + b=K9z8jYfdaYDh/XGz5S/vyzBWYN4ZPYT6jkue5E5YiUVIyQgLCoZqfSIh3h9luB+/C + DhYTYMkUQRLasUE0VX9dr4Bn0Hxeaw8DjYS7BUq4LqfNwWjsCSsNEhk26FGBEUvhRH + i2nMUMk5Ivw78ouR6qNZhI6freANsproJ+yQkA0cC9WXj5mQw4xcKRmL48dccxrX47 + aQi0BDk3SCzZBAa+4G3yynAGiRNiFuLVWkg/vFMcq1JDp6a2mVs/CS3Qj0/heE9gPn + Qr2Wy0Oa6tg3jhxR9hk7qyy5FlkfDAtJOlUt6sPloPS4bhqqDJtbnXZL7lzHDP+sw+ + RZcjavnvJtCIQ== +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: <linux-tegra.vger.kernel.org> +X-Mailing-List: linux-tegra@vger.kernel.org + +The following warning is observed on Jetson TX1 platform because the +supply regulator is not specified for the backlight. + + WARNING KERN lp855x 0-002c: 0-002c supply power not found, using dummy regulator + +The backlight supply is provided by the 3.3V SYS rail and so add this +as the supply for the backlight. + +Signed-off-by: Jon Hunter <jonathanh@nvidia.com> +--- + arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +index c70a610f8e3a..ea0e1efa6973 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +@@ -56,6 +56,7 @@ + backlight: backlight@2c { + compatible = "ti,lp8557"; + reg = <0x2c>; ++ power-supply = <&vdd_3v3_sys>; + + dev-ctrl = /bits/ 8 <0x80>; + init-brt = /bits/ 8 <0xff>; diff --git a/Add-LCD-support-for-Pine64-Pinebook-1080p.patch b/Add-LCD-support-for-Pine64-Pinebook-1080p.patch new file mode 100644 index 000000000..2247358cf --- /dev/null +++ b/Add-LCD-support-for-Pine64-Pinebook-1080p.patch @@ -0,0 +1,1218 @@ +From patchwork Wed Feb 26 08:10:06 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 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<daniel@ffwll.ch>, + Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, + Maxime Ripard <maxime@cerno.tech>, Chen-Yu Tsai <wens@csie.org>, + Andrzej Hajda <a.hajda@samsung.com>, + Neil Armstrong <narmstrong@baylibre.com>, + Laurent Pinchart <Laurent.pinchart@ideasonboard.com>, + Jonas Karlman <jonas@kwiboo.se>, Jernej Skrabec <jernej.skrabec@siol.net>, + Torsten Duwe <duwe@suse.de>, Icenowy Zheng <icenowy@aosc.io>, + Heiko Stuebner <heiko.stuebner@theobroma-systems.com>, + Stephan Gerhold <stephan@gerhold.net>, Mark Brown <broonie@kernel.org>, + Stephen Rothwell <sfr@canb.auug.org.au>, + Samuel Holland <samuel@sholland.org>, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Subject: [PATCH v2 1/6] drm/bridge: anx6345: Fix getting anx6345 regulators +Date: Wed, 26 Feb 2020 00:10:06 -0800 +Message-Id: <20200226081011.1347245-2-anarsoul@gmail.com> +X-Mailer: git-send-email 2.25.0 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0.1 DKIM_SIGNED Message has a DKIM or DK signature, + not necessarily + valid + -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from + author's domain + -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: <linux-arm-kernel.lists.infradead.org> +List-Unsubscribe: + <http://lists.infradead.org/mailman/options/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> +List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> +List-Post: <mailto:linux-arm-kernel@lists.infradead.org> +List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> +List-Subscribe: + <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> +Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> +Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +From: Samuel Holland <samuel@sholland.org> + +We don't need to pass '-supply' suffix to devm_regulator_get() + +Fixes: 6aa192698089 ("drm/bridge: Add Analogix anx6345 support") +Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> +Signed-off-by: Samuel Holland <samuel@sholland.org> +Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> +--- + drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c +index 56f55c53abfd..0d8d083b0207 100644 +--- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c ++++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c +@@ -712,14 +712,14 @@ static int anx6345_i2c_probe(struct i2c_client *client, + DRM_DEBUG("No panel found\n"); + + /* 1.2V digital core power regulator */ +- anx6345->dvdd12 = devm_regulator_get(dev, "dvdd12-supply"); ++ anx6345->dvdd12 = devm_regulator_get(dev, "dvdd12"); + if (IS_ERR(anx6345->dvdd12)) { + DRM_ERROR("dvdd12-supply not found\n"); + return PTR_ERR(anx6345->dvdd12); + } + + /* 2.5V digital core power regulator */ +- anx6345->dvdd25 = devm_regulator_get(dev, "dvdd25-supply"); ++ anx6345->dvdd25 = devm_regulator_get(dev, "dvdd25"); + if (IS_ERR(anx6345->dvdd25)) { + DRM_ERROR("dvdd25-supply not found\n"); + return PTR_ERR(anx6345->dvdd25); + +From patchwork Wed Feb 26 08:10:07 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vasily Khoruzhick <anarsoul@gmail.com> +X-Patchwork-Id: 11405511 +Return-Path: + <SRS0=yLUK=4O=lists.infradead.org=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@kernel.org> +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + 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<jernej.skrabec@siol.net>, + Torsten Duwe <duwe@suse.de>, Icenowy Zheng <icenowy@aosc.io>, + Heiko Stuebner <heiko.stuebner@theobroma-systems.com>, + Stephan Gerhold <stephan@gerhold.net>, Mark Brown <broonie@kernel.org>, + Stephen Rothwell <sfr@canb.auug.org.au>, + Samuel Holland <samuel@sholland.org>, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Subject: [PATCH v2 2/6] drm/bridge: anx6345: don't print error message if + regulator is not ready +Date: Wed, 26 Feb 2020 00:10:07 -0800 +Message-Id: <20200226081011.1347245-3-anarsoul@gmail.com> +X-Mailer: git-send-email 2.25.0 +In-Reply-To: <20200226081011.1347245-1-anarsoul@gmail.com> +References: <20200226081011.1347245-1-anarsoul@gmail.com> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200226_001045_305939_7F59723B +X-CRM114-Status: GOOD ( 13.16 ) +X-Spam-Score: -0.2 (/) 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list +List-Id: <linux-arm-kernel.lists.infradead.org> +List-Unsubscribe: + <http://lists.infradead.org/mailman/options/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> +List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> +List-Post: <mailto:linux-arm-kernel@lists.infradead.org> +List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> +List-Subscribe: + <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> +Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> +Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +We don't want to print scary message if devm_regulator_get() returns +-EPROBE_DEFER + +Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> +Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> +--- + drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c +index 0d8d083b0207..0bf81b9b5faa 100644 +--- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c ++++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c +@@ -714,14 +714,18 @@ static int anx6345_i2c_probe(struct i2c_client *client, + /* 1.2V digital core power regulator */ + anx6345->dvdd12 = devm_regulator_get(dev, "dvdd12"); + if (IS_ERR(anx6345->dvdd12)) { +- DRM_ERROR("dvdd12-supply not found\n"); ++ if (PTR_ERR(anx6345->dvdd12) != -EPROBE_DEFER) ++ DRM_ERROR("Failed to get dvdd12 supply (%ld)\n", ++ PTR_ERR(anx6345->dvdd12)); + return PTR_ERR(anx6345->dvdd12); + } + + /* 2.5V digital core power regulator */ + anx6345->dvdd25 = devm_regulator_get(dev, "dvdd25"); + if (IS_ERR(anx6345->dvdd25)) { +- DRM_ERROR("dvdd25-supply not found\n"); ++ if (PTR_ERR(anx6345->dvdd25) != -EPROBE_DEFER) ++ DRM_ERROR("Failed to get dvdd25 supply (%ld)\n", ++ PTR_ERR(anx6345->dvdd25)); + return PTR_ERR(anx6345->dvdd25); + } + + +From patchwork Wed Feb 26 08:10:08 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vasily Khoruzhick <anarsoul@gmail.com> +X-Patchwork-Id: 11405525 +Return-Path: + <SRS0=yLUK=4O=lists.infradead.org=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@kernel.org> +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BA056930 + for <patchwork-linux-arm@patchwork.kernel.org>; + Wed, 26 Feb 2020 08:11:35 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client 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dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Subject: [PATCH v2 3/6] dt-bindings: Add Guangdong Neweast Optoelectronics CO. + LTD vendor prefix +Date: Wed, 26 Feb 2020 00:10:08 -0800 +Message-Id: <20200226081011.1347245-4-anarsoul@gmail.com> +X-Mailer: git-send-email 2.25.0 +In-Reply-To: <20200226081011.1347245-1-anarsoul@gmail.com> +References: <20200226081011.1347245-1-anarsoul@gmail.com> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200226_001046_126436_F508C228 +X-CRM114-Status: GOOD ( 10.72 ) +X-Spam-Score: -0.2 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-0.2 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 FREEMAIL_FROM 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<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> +Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +Add vendor prefix for Guangdong Neweast Optoelectronics CO. LTD + +Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> +Acked-by: Rob Herring <robh@kernel.org> +--- + Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml +index 6456a6dfd83d..5dfbad67aa81 100644 +--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml ++++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml +@@ -661,6 +661,8 @@ patternProperties: + description: Netron DY + "^netxeon,.*": + description: Shenzhen Netxeon Technology CO., LTD ++ "^neweast,.*": ++ description: Guangdong Neweast Optoelectronics CO., LTD + "^nexbox,.*": + description: Nexbox + "^nextthing,.*": + +From patchwork Wed Feb 26 08:10:09 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vasily Khoruzhick <anarsoul@gmail.com> +X-Patchwork-Id: 11405527 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<mark.rutland@arm.com>, + Maxime Ripard <maxime@cerno.tech>, Chen-Yu Tsai <wens@csie.org>, + Andrzej Hajda <a.hajda@samsung.com>, + Neil Armstrong <narmstrong@baylibre.com>, + Laurent Pinchart <Laurent.pinchart@ideasonboard.com>, + Jonas Karlman <jonas@kwiboo.se>, Jernej Skrabec <jernej.skrabec@siol.net>, + Torsten Duwe <duwe@suse.de>, Icenowy Zheng <icenowy@aosc.io>, + Heiko Stuebner <heiko.stuebner@theobroma-systems.com>, + Stephan Gerhold <stephan@gerhold.net>, Mark Brown <broonie@kernel.org>, + Stephen Rothwell <sfr@canb.auug.org.au>, + Samuel Holland <samuel@sholland.org>, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Subject: [PATCH v2 4/6] dt-bindings: display: simple: Add NewEast + Optoelectronics WJFH116008A compatible +Date: Wed, 26 Feb 2020 00:10:09 -0800 +Message-Id: <20200226081011.1347245-5-anarsoul@gmail.com> +X-Mailer: git-send-email 2.25.0 +In-Reply-To: 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<linux-arm-kernel-bounces@lists.infradead.org> +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +This commit adds compatible for NewEast Optoelectronics WJFH116008A panel +to panel-simple binding + +Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> +Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> +--- + .../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +index 8fe60ee2531c..0e5d01ac32e1 100644 +--- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml ++++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +@@ -39,6 +39,8 @@ properties: + - boe,nv140fhmn49 + # GiantPlus GPM940B0 3.0" QVGA TFT LCD panel + - giantplus,gpm940b0 ++ # NewEast Optoelectronics CO., LTD WJFH116008A eDP TFT LCD panel ++ - neweast,wjfh116008a + # Satoz SAT050AT40H12R2 5.0" WVGA TFT LCD panel + - satoz,sat050at40h12r2 + # Sharp LS020B1DD01D 2.0" HQVGA TFT LCD panel + +From patchwork Wed Feb 26 08:10:10 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vasily Khoruzhick <anarsoul@gmail.com> +X-Patchwork-Id: 11405529 +Return-Path: + <SRS0=yLUK=4O=lists.infradead.org=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@kernel.org> +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 98009138D + for <patchwork-linux-arm@patchwork.kernel.org>; + Wed, 26 Feb 2020 08:12:06 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with 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-0800 (PST) +From: Vasily Khoruzhick <anarsoul@gmail.com> +To: Thierry Reding <thierry.reding@gmail.com>, + Sam Ravnborg <sam@ravnborg.org>, + David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>, + Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, + Maxime Ripard <maxime@cerno.tech>, Chen-Yu Tsai <wens@csie.org>, + Andrzej Hajda <a.hajda@samsung.com>, + Neil Armstrong <narmstrong@baylibre.com>, + Laurent Pinchart <Laurent.pinchart@ideasonboard.com>, + Jonas Karlman <jonas@kwiboo.se>, Jernej Skrabec <jernej.skrabec@siol.net>, + Torsten Duwe <duwe@suse.de>, Icenowy Zheng <icenowy@aosc.io>, + Heiko Stuebner <heiko.stuebner@theobroma-systems.com>, + Stephan Gerhold <stephan@gerhold.net>, Mark Brown <broonie@kernel.org>, + Stephen Rothwell <sfr@canb.auug.org.au>, + Samuel Holland <samuel@sholland.org>, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Subject: [PATCH v2 5/6] drm/panel: simple: Add NewEast Optoelectronics CO., + LTD WJFH116008A panel support +Date: Wed, 26 Feb 2020 00:10:10 -0800 +Message-Id: <20200226081011.1347245-6-anarsoul@gmail.com> +X-Mailer: git-send-email 2.25.0 +In-Reply-To: <20200226081011.1347245-1-anarsoul@gmail.com> +References: <20200226081011.1347245-1-anarsoul@gmail.com> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200226_001048_596182_84BBBB6A +X-CRM114-Status: GOOD ( 13.16 ) +X-Spam-Score: -0.2 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-0.2 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [2607:f8b0:4864:20:0:0:0:444 listed in] + [list.dnswl.org] + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail + provider [anarsoul[at]gmail.com] + -0.0 SPF_PASS SPF: sender matches SPF record + -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from + envelope-from domain + 0.1 DKIM_SIGNED Message has a DKIM or DK signature, + not necessarily + valid + -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from + author's domain + -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: <linux-arm-kernel.lists.infradead.org> +List-Unsubscribe: + <http://lists.infradead.org/mailman/options/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> +List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> +List-Post: <mailto:linux-arm-kernel@lists.infradead.org> +List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> +List-Subscribe: + <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> +Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +This commit adds support for the NewEast Optoelectronics CO., LTD +WJFH116008A 11.6" 1920x1080 TFT LCD panel. + +Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> +--- + drivers/gpu/drm/panel/panel-simple.c | 48 ++++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c +index e14c14ac62b5..4292e3e3a461 100644 +--- a/drivers/gpu/drm/panel/panel-simple.c ++++ b/drivers/gpu/drm/panel/panel-simple.c +@@ -2224,6 +2224,51 @@ static const struct panel_desc netron_dy_e231732 = { + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, + }; + ++static const struct drm_display_mode neweast_wjfh116008a_modes[] = { ++ { ++ .clock = 138500, ++ .hdisplay = 1920, ++ .hsync_start = 1920 + 48, ++ .hsync_end = 1920 + 48 + 32, ++ .htotal = 1920 + 48 + 32 + 80, ++ .vdisplay = 1080, ++ .vsync_start = 1080 + 3, ++ .vsync_end = 1080 + 3 + 5, ++ .vtotal = 1080 + 3 + 5 + 23, ++ .vrefresh = 60, ++ .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, ++ }, { ++ .clock = 110920, ++ .hdisplay = 1920, ++ .hsync_start = 1920 + 48, ++ .hsync_end = 1920 + 48 + 32, ++ .htotal = 1920 + 48 + 32 + 80, ++ .vdisplay = 1080, ++ .vsync_start = 1080 + 3, ++ .vsync_end = 1080 + 3 + 5, ++ .vtotal = 1080 + 3 + 5 + 23, ++ .vrefresh = 48, ++ .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, ++ } ++}; ++ ++static const struct panel_desc neweast_wjfh116008a = { ++ .modes = neweast_wjfh116008a_modes, ++ .num_modes = 2, ++ .bpc = 6, ++ .size = { ++ .width = 260, ++ .height = 150, ++ }, ++ .delay = { ++ .prepare = 110, ++ .enable = 20, ++ .unprepare = 500, ++ }, ++ .bus_format = MEDIA_BUS_FMT_RGB666_1X18, ++ .connector_type = DRM_MODE_CONNECTOR_eDP, ++}; ++ + static const struct drm_display_mode newhaven_nhd_43_480272ef_atxl_mode = { + .clock = 9000, + .hdisplay = 480, +@@ -3399,6 +3444,9 @@ static const struct of_device_id platform_of_match[] = { + }, { + .compatible = "netron-dy,e231732", + .data = &netron_dy_e231732, ++ }, { ++ .compatible = "neweast,wjfh116008a", ++ .data = &neweast_wjfh116008a, + }, { + .compatible = "newhaven,nhd-4.3-480272ef-atxl", + .data = &newhaven_nhd_43_480272ef_atxl, + +From patchwork Wed Feb 26 08:10:11 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vasily Khoruzhick <anarsoul@gmail.com> +X-Patchwork-Id: 11405531 +Return-Path: + <SRS0=yLUK=4O=lists.infradead.org=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@kernel.org> +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by 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+X-Received: by 2002:a62:1883:: with SMTP id 125mr3012096pfy.166.1582704649041; + Wed, 26 Feb 2020 00:10:49 -0800 (PST) +Received: from anarsoul-thinkpad.lan (216-71-213-236.dyn.novuscom.net. + [216.71.213.236]) + by smtp.gmail.com with ESMTPSA id v7sm1679230pfn.61.2020.02.26.00.10.48 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Wed, 26 Feb 2020 00:10:48 -0800 (PST) +From: Vasily Khoruzhick <anarsoul@gmail.com> +To: Thierry Reding <thierry.reding@gmail.com>, + Sam Ravnborg <sam@ravnborg.org>, + David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>, + Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, + Maxime Ripard <maxime@cerno.tech>, Chen-Yu Tsai <wens@csie.org>, + Andrzej Hajda <a.hajda@samsung.com>, + Neil Armstrong <narmstrong@baylibre.com>, + Laurent Pinchart <Laurent.pinchart@ideasonboard.com>, + Jonas Karlman <jonas@kwiboo.se>, Jernej Skrabec <jernej.skrabec@siol.net>, + Torsten Duwe <duwe@suse.de>, Icenowy Zheng <icenowy@aosc.io>, + Heiko Stuebner <heiko.stuebner@theobroma-systems.com>, + Stephan Gerhold <stephan@gerhold.net>, Mark Brown <broonie@kernel.org>, + Stephen Rothwell <sfr@canb.auug.org.au>, + Samuel Holland <samuel@sholland.org>, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Subject: [PATCH v2 6/6] arm64: allwinner: a64: enable LCD-related hardware for + Pinebook +Date: Wed, 26 Feb 2020 00:10:11 -0800 +Message-Id: <20200226081011.1347245-7-anarsoul@gmail.com> +X-Mailer: git-send-email 2.25.0 +In-Reply-To: <20200226081011.1347245-1-anarsoul@gmail.com> +References: <20200226081011.1347245-1-anarsoul@gmail.com> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200226_001050_010315_52B91C3C +X-CRM114-Status: GOOD ( 14.29 ) +X-Spam-Score: -0.2 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-0.2 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [2607:f8b0:4864:20:0:0:0:441 listed in] + [list.dnswl.org] + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail + provider [anarsoul[at]gmail.com] + -0.0 SPF_PASS SPF: sender matches SPF record + -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from + envelope-from domain + 0.1 DKIM_SIGNED Message has a DKIM or DK signature, + not necessarily + valid + -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from + author's domain + -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: <linux-arm-kernel.lists.infradead.org> +List-Unsubscribe: + <http://lists.infradead.org/mailman/options/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> +List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> +List-Post: <mailto:linux-arm-kernel@lists.infradead.org> +List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> +List-Subscribe: + <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> +Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> +Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +From: Icenowy Zheng <icenowy@aosc.io> + +Pinebook has an ANX6345 bridge connected to the RGB666 LCD output and +eDP panel input. The bridge is controlled via I2C that's connected to +R_I2C bus. + +Enable all this hardware in device tree. + +Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> +Signed-off-by: Icenowy Zheng <icenowy@aosc.io> +Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> +--- + .../dts/allwinner/sun50i-a64-pinebook.dts | 61 ++++++++++++++++++- + 1 file changed, 60 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index c06c540e6c08..0033f6a43d98 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -48,6 +48,18 @@ lid_switch { + }; + }; + ++ panel_edp: panel-edp { ++ compatible = "neweast,wjfh116008a"; ++ backlight = <&backlight>; ++ power-supply = <®_dc1sw>; ++ ++ port { ++ panel_edp_in: endpoint { ++ remote-endpoint = <&anx6345_out_edp>; ++ }; ++ }; ++ }; ++ + reg_vbklt: vbklt { + compatible = "regulator-fixed"; + regulator-name = "vbklt"; +@@ -109,6 +121,10 @@ &dai { + status = "okay"; + }; + ++&de { ++ status = "okay"; ++}; ++ + &ehci0 { + phys = <&usbphy 0>; + phy-names = "usb"; +@@ -119,6 +135,10 @@ &ehci1 { + status = "okay"; + }; + ++&mixer0 { ++ status = "okay"; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; +@@ -177,12 +197,38 @@ &pwm { + status = "okay"; + }; + +-/* The ANX6345 eDP-bridge is on r_i2c */ + &r_i2c { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&r_i2c_pl89_pins>; + status = "okay"; ++ ++ anx6345: anx6345@38 { ++ compatible = "analogix,anx6345"; ++ reg = <0x38>; ++ reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */ ++ dvdd25-supply = <®_dldo2>; ++ dvdd12-supply = <®_fldo1>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ anx6345_in: port@0 { ++ reg = <0>; ++ anx6345_in_tcon0: endpoint { ++ remote-endpoint = <&tcon0_out_anx6345>; ++ }; ++ }; ++ ++ anx6345_out: port@1 { ++ reg = <1>; ++ anx6345_out_edp: endpoint { ++ remote-endpoint = <&panel_edp_in>; ++ }; ++ }; ++ }; ++ }; + }; + + &r_pio { +@@ -357,6 +403,19 @@ &sound { + "MIC2", "Internal Microphone Right"; + }; + ++&tcon0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lcd_rgb666_pins>; ++ ++ status = "okay"; ++}; ++ ++&tcon0_out { ++ tcon0_out_anx6345: endpoint { ++ remote-endpoint = <&anx6345_in_tcon0>; ++ }; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; diff --git a/Add-support-for-the-pine64-Pinebook-Pro.patch b/Add-support-for-the-pine64-Pinebook-Pro.patch new file mode 100644 index 000000000..2922a5a66 --- /dev/null +++ b/Add-support-for-the-pine64-Pinebook-Pro.patch @@ -0,0 +1,1448 @@ +From patchwork Thu Feb 27 18:06:29 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Tobias Schramm <t.schramm@manjaro.org> +X-Patchwork-Id: 11409455 +Return-Path: + <SRS0=ziGv=4P=lists.infradead.org=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@kernel.org> +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B476514B4 + for <patchwork-linux-arm@patchwork.kernel.org>; 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Thu, 27 Feb 2020 19:07:20 +0100 (CET) +From: Tobias Schramm <t.schramm@manjaro.org> +To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, + Heiko Stuebner <heiko@sntech.de>, Andy Yan <andy.yan@rock-chips.com> +Subject: [PATCH 1/2] dt-bindings: Add doc for pine64 Pinebook Pro +Date: Thu, 27 Feb 2020 19:06:29 +0100 +Message-Id: <20200227180630.166982-2-t.schramm@manjaro.org> +In-Reply-To: <20200227180630.166982-1-t.schramm@manjaro.org> +References: <20200227180630.166982-1-t.schramm@manjaro.org> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200227_102510_737308_00BD468A +X-CRM114-Status: UNSURE ( 7.55 ) +X-CRM114-Notice: Please train this message. +X-Spam-Score: 0.0 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (0.0 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [176.9.38.148 listed in list.dnswl.org] + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + -0.0 SPF_PASS SPF: sender matches SPF record +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: <linux-arm-kernel.lists.infradead.org> +List-Unsubscribe: + <http://lists.infradead.org/mailman/options/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> +List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> +List-Post: <mailto:linux-arm-kernel@lists.infradead.org> +List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> +List-Subscribe: + <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> +Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, + Alexis Ballier <aballier@gentoo.org>, Tobias Schramm <t.schramm@manjaro.org>, + Katsuhiro Suzuki <katsuhiro@katsuster.net>, linux-kernel@vger.kernel.org, + Douglas Anderson <dianders@chromium.org>, + Kever Yang <kever.yang@rock-chips.com>, + Markus Reichl <m.reichl@fivetechno.de>, + linux-rockchip@lists.infradead.org, Matthias Kaehlcke <mka@chromium.org>, + Jagan Teki <jagan@amarulasolutions.com>, Nick Xie <nick@khadas.com>, + Vivek Unune <npcomplete13@gmail.com> +Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +This commit adds a compatible for the Pinebook Pro. + +Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> +--- + Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml +index 874b0eaa2a75..482a0cbfb18a 100644 +--- a/Documentation/devicetree/bindings/arm/rockchip.yaml ++++ b/Documentation/devicetree/bindings/arm/rockchip.yaml +@@ -402,6 +402,11 @@ properties: + - const: phytec,rk3288-phycore-som + - const: rockchip,rk3288 + ++ - description: Pine64 Pinebook Pro ++ items: ++ - const: pine64,pinebook-pro ++ - const: rockchip,rk3399 ++ + - description: Pine64 Rock64 + items: + - const: pine64,rock64 + +From patchwork Thu Feb 27 18:06:30 2020 +Content-Type: text/plain; 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+Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) + by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) + id 1j7Nu8-0005t6-68; Thu, 27 Feb 2020 18:29:00 +0000 +Received: from mail.manjaro.org ([176.9.38.148]) + by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) + id 1j7NqP-0001fI-SF; Thu, 27 Feb 2020 18:25:16 +0000 +Received: from localhost (localhost [127.0.0.1]) + by mail.manjaro.org (Postfix) with ESMTP id D90D638C69C9; + Thu, 27 Feb 2020 19:07:27 +0100 (CET) +X-Virus-Scanned: Debian amavisd-new at manjaro.org +Received: from mail.manjaro.org ([127.0.0.1]) + by localhost (manjaro.org [127.0.0.1]) (amavisd-new, port 10024) + with ESMTP id 7d3lcuj0oTJG; Thu, 27 Feb 2020 19:07:24 +0100 (CET) +From: Tobias Schramm <t.schramm@manjaro.org> +To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, + Heiko Stuebner <heiko@sntech.de>, Andy Yan <andy.yan@rock-chips.com> +Subject: [PATCH 2/2] arm64: dts: rockchip: Add initial support for Pinebook + Pro +Date: Thu, 27 Feb 2020 19:06:30 +0100 +Message-Id: <20200227180630.166982-3-t.schramm@manjaro.org> +In-Reply-To: <20200227180630.166982-1-t.schramm@manjaro.org> +References: <20200227180630.166982-1-t.schramm@manjaro.org> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200227_102510_300198_3DF7A901 +X-CRM114-Status: GOOD ( 13.29 ) +X-Spam-Score: 0.0 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (0.0 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [176.9.38.148 listed in list.dnswl.org] + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + -0.0 SPF_PASS SPF: sender matches SPF record +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: <linux-arm-kernel.lists.infradead.org> +List-Unsubscribe: + <http://lists.infradead.org/mailman/options/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> +List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> +List-Post: <mailto:linux-arm-kernel@lists.infradead.org> +List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> +List-Subscribe: + <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> +Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, + Alexis Ballier <aballier@gentoo.org>, Tobias Schramm <t.schramm@manjaro.org>, + Katsuhiro Suzuki <katsuhiro@katsuster.net>, linux-kernel@vger.kernel.org, + Douglas Anderson <dianders@chromium.org>, + Kever Yang <kever.yang@rock-chips.com>, + Markus Reichl <m.reichl@fivetechno.de>, + linux-rockchip@lists.infradead.org, Matthias Kaehlcke <mka@chromium.org>, + Jagan Teki <jagan@amarulasolutions.com>, Nick Xie <nick@khadas.com>, + Vivek Unune <npcomplete13@gmail.com> +Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +This commit adds initial dt support for the rk3399 based Pinebook Pro. + +Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 1191 +++++++++++++++++ + 2 files changed, 1192 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 60d9437096c7..ae7621309e92 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +new file mode 100644 +index 000000000000..5cbb9e1de4be +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -0,0 +1,1191 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. ++ * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com> ++ * Copyright (c) 2020 Tobias Schramm <t.schramm@manjaro.org> ++ */ ++ ++/dts-v1/; ++#include <dt-bindings/input/gpio-keys.h> ++#include <dt-bindings/input/linux-event-codes.h> ++#include <dt-bindings/pwm/pwm.h> ++#include <dt-bindings/usb/pd.h> ++#include <dt-bindings/leds/common.h> ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++ ++/ { ++ model = "Pine64 Pinebook Pro"; ++ compatible = "pine64,pinebook-pro", "rockchip,rk3399"; ++ ++ chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xff1a0000"; ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrled_gpio &slpled_gpio>; ++ ++ green-led { ++ color = <LED_COLOR_ID_GREEN>; ++ default-state = "off"; ++ function = LED_FUNCTION_POWER; ++ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; ++ label = "green:disk-activity"; ++ linux,default-trigger = "mmc2"; ++ }; ++ ++ red-led { ++ color = <LED_COLOR_ID_RED>; ++ default-state = "off"; ++ function = LED_FUNCTION_STANDBY; ++ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ label = "red:standby"; ++ panic-indicator; ++ retain-state-suspended; ++ }; ++ }; ++ ++ /* Use separate nodes for gpio-keys to allow for selective deactivation ++ * of wakeup sources without disabling the whole key ++ */ ++ gpio-key-power { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrbtn_gpio>; ++ ++ power { ++ debounce-interval = <20>; ++ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; ++ label = "Power"; ++ linux,code = <KEY_POWER>; ++ wakeup-source; ++ }; ++ }; ++ ++ gpio-key-lid { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lidbtn_gpio>; ++ ++ lid { ++ debounce-interval = <20>; ++ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; ++ label = "Lid"; ++ linux,code = <SW_LID>; ++ linux,input-type = <EV_SW>; ++ wakeup-event-action = <EV_ACT_DEASSERTED>; ++ wakeup-source; ++ }; ++ }; ++ ++ /* first 128k(0xff8d0000~0xff8f0000) for ddr and ATF */ ++ sram@ff8d0000 { ++ compatible = "mmio-sram"; ++ reg = <0x0 0xff8d0000 0x0 0x20000>; /* 128k */ ++ }; ++ ++ edp_panel: edp-panel { ++ compatible = "boe,nv140fhmn49", "simple-panel"; ++ backlight = <&backlight>; ++ ++ enable-delay-ms = <20>; ++ enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&panel_en_gpio>; ++ ++ power-supply = <&vcc3v3_panel>; ++ prepare-delay-ms = <20>; ++ status = "okay"; ++ ++ ports { ++ #address-cells = <0x01>; ++ #size-cells = <0x00>; ++ port@0 { ++ panel_in_edp: endpoint@0 { ++ remote-endpoint = <&edp_out_panel>; ++ }; ++ }; ++ }; ++ }; ++ ++ backlight: edp-backlight { ++ compatible = "pwm-backlight"; ++ brightness-levels = < ++ 0 1 2 3 4 5 6 7 ++ 8 9 10 11 12 13 14 15 ++ 16 17 18 19 20 21 22 23 ++ 24 25 26 27 28 29 30 31 ++ 32 33 34 35 36 37 38 39 ++ 40 41 42 43 44 45 46 47 ++ 48 49 50 51 52 53 54 55 ++ 56 57 58 59 60 61 62 63 ++ 64 65 66 67 68 69 70 71 ++ 72 73 74 75 76 77 78 79 ++ 80 81 82 83 84 85 86 87 ++ 88 89 90 91 92 93 94 95 ++ 96 97 98 99 100 101 102 103 ++ 104 105 106 107 108 109 110 111 ++ 112 113 114 115 116 117 118 119 ++ 120 121 122 123 124 125 126 127 ++ 128 129 130 131 132 133 134 135 ++ 136 137 138 139 140 141 142 143 ++ 144 145 146 147 148 149 150 151 ++ 152 153 154 155 156 157 158 159 ++ 160 161 162 163 164 165 166 167 ++ 168 169 170 171 172 173 174 175 ++ 176 177 178 179 180 181 182 183 ++ 184 185 186 187 188 189 190 191 ++ 192 193 194 195 196 197 198 199 ++ 200 201 202 203 204 205 206 207 ++ 208 209 210 211 212 213 214 215 ++ 216 217 218 219 220 221 222 223 ++ 224 225 226 227 228 229 230 231 ++ 232 233 234 235 236 237 238 239 ++ 240 241 242 243 244 245 246 247 ++ 248 249 250 251 252 253 254 255>; ++ default-brightness-level = <200>; ++ power-supply = <&vcc_12v>; ++ pwms = <&pwm0 0 740740 0>; ++ status = "okay"; ++ }; ++ ++ /* Power sequence for SDIO WiFi module */ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h_gpio>; ++ post-power-on-delay-ms = <100>; ++ power-off-delay-us = <500000>; ++ ++ /* WL_REG_ON on module */ ++ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ /* Audio components */ ++ speaker_amp: speaker-amplifier { ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; ++ sound-name-prefix = "Speaker Amplifier"; ++ status = "okay"; ++ VCC-supply = <&pa_5v>; ++ }; ++ ++ es8316-sound { ++ compatible = "simple-audio-card"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det_gpio>; ++ simple-audio-card,name = "rockchip,es8316-codec"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphones", ++ "Speaker", "Speaker"; ++ simple-audio-card,routing = ++ "MIC1", "Mic Jack", ++ "Headphones", "HPOL", ++ "Headphones", "HPOR", ++ "Speaker Amplifier INL", "HPOL", ++ "Speaker Amplifier INR", "HPOR", ++ "Speaker", "Speaker Amplifier OUTL", ++ "Speaker", "Speaker Amplifier OUTR"; ++ ++ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; ++ simple-audio-card,aux-devs = <&speaker_amp>; ++ simple-audio-card,pin-switches = "Speaker"; ++ status = "okay"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1>; ++ }; ++ ++ simple-audio-card,codec { ++ sound-dai = <&es8316>; ++ }; ++ }; ++ ++ /* Power tree */ ++ /* Root power source */ ++ vcc_sysin: vcc-sysin { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_sysin"; ++ }; ++ ++ /* Regulators supplied by vcc_sysin */ ++ /* LCD backlight supply */ ++ vcc_12v: vcc-12v { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ regulator-name = "vcc_12v"; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* Main 3.3 V supply */ ++ vcc3v3_sys: wifi_bat: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_sys"; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ /* 5 V USB power supply */ ++ vcc5v0_usb: pa_5v: vcc5v0-usb-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwr_5v_gpio>; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc5v0_usb"; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* RK3399 logic supply */ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-name = "vdd_log"; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ /* Regulators supplied by vcc3v3_sys */ ++ /* 0.9 V supply, always on */ ++ vcc_0v9: vcc-0v9 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vcc_0v9"; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* S3 1.8 V supply, switched by vcc1v8_s3 */ ++ vcca1v8_s3: vcc1v8-s3 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_s3"; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* micro SD card power */ ++ vcc3v0_sd: vcc3v0-sd { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_pwr_h_gpio>; ++ regulator-always-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcc3v0_sd"; ++ vin-supply = <&vcc3v3_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* LCD panel power, called VCC3V3_S0 in schematic */ ++ vcc3v3_panel: vcc3v3-panel { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lcdvcc_en_gpio>; ++ regulator-always-on; ++ regulator-enable-ramp-delay = <100000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_panel"; ++ vin-supply = <&vcc3v3_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* M.2 adapter power, switched by vcc1v8_s3 */ ++ vcc3v3_ssd: vcc3v3-ssd { ++ compatible = "regulator-fixed"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_ssd"; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* Regulators supplied by vcc5v0_usb */ ++ /* USB 3 port power supply regulator */ ++ vcc5v0_otg: vcc5v0-otg { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en_gpio>; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc5v0_otg"; ++ vin-supply = <&vcc5v0_usb>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* Regualtors supplied by vcc5v0_usb */ ++ /* Type C port power supply regulator */ ++ vbus_5vout: vbus_typec: vbus-5vout { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_typec0_en_gpio>; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vbus_5vout"; ++ vin-supply = <&vcc5v0_usb>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* Regualtors supplied by vcc_1v8 */ ++ /* Primary 0.9 V LDO */ ++ vcca0v9_s3: vcca0v9-s3 { ++ compatible = "regulator-fixed"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc0v9_s3"; ++ vin-supply = <&vcc_1v8>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ mains_charger: dc-charger { ++ compatible = "gpio-charger"; ++ charger-type = "mains"; ++ gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>; ++ ++ /* Also triggered by USB charger */ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&dc_det_gpio>; ++ }; ++}; ++ ++&cluster1_opp { ++ opp08 { ++ opp-hz = /bits/ 64 <2000000000>; ++ opp-microvolt = <1300000>; ++ }; ++}; ++ ++&cdn_dp { ++ status = "okay"; ++ extcon = <&fusb0>; ++}; ++ ++/* CPU */ ++&cpu_alert0 { ++ temperature = <80000>; ++}; ++ ++&cpu_alert1 { ++ temperature = <95000>; ++}; ++ ++&cpu_crit { ++ temperature = <100000>; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&edp { ++ status = "okay"; ++ force-hpd; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&edp_hpd>; ++ ++ ports { ++ edp_out: port@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ edp_out_panel: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&panel_in_edp>; ++ }; ++ }; ++ }; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&hdmi_sound { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ status = "okay"; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ interrupt-parent = <&gpio3>; ++ interrupts = <10 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l_gpio>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vddio-supply = <&vcc_3v0>; ++ vcc1-supply = <&vcc_sysin>; ++ vcc2-supply = <&vcc_sysin>; ++ vcc3-supply = <&vcc_sysin>; ++ vcc4-supply = <&vcc_sysin>; ++ vcc6-supply = <&vcc_sysin>; ++ vcc7-supply = <&vcc_sysin>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc_sysin>; ++ vcc10-supply = <&vcc_sysin>; ++ vcc11-supply = <&vcc_sysin>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vcc13-supply = <&vcc_sysin>; ++ vcc14-supply = <&vcc_sysin>; ++ ++ regulators { ++ /* rk3399 center logic supply */ ++ vdd_center: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-name = "vdd_center"; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-name = "vdd_cpu_l"; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_ddr"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: vcc_wl: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ /* not used */ ++ LDO_REG1 { ++ }; ++ ++ /* not used */ ++ LDO_REG2 { ++ }; ++ ++ vcc1v8_pmupll: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc1v8_pmupll"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sdio: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcc_sdio"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcca3v0_codec: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcca3v0_codec"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-name = "vcc_1v5"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca1v8_codec: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_codec"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcc_3v0"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_s3"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++ ++ vdd_cpu_b: regulator@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel1_gpio>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-compatible = "fan53555-reg"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-name = "vdd_cpu_b"; ++ regulator-ramp-delay = <1000>; ++ vin-supply = <&vcc_1v8>; ++ vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: regulator@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel2_gpio>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-compatible = "fan53555-reg"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-name = "vdd_gpu"; ++ regulator-ramp-delay = <1000>; ++ vin-supply = <&vcc_1v8>; ++ vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ status = "okay"; ++ ++ clock-frequency = <100000>; ++ ++ es8316: es8316@11 { ++ compatible = "everest,es8316"; ++ reg = <0x11>; ++ clocks = <&cru SCLK_I2S_8CH_OUT>; ++ clock-names = "mclk"; ++ #sound-dai-cells = <0>; ++ }; ++}; ++ ++&i2c3 { ++ i2c-scl-rising-time-ns = <450>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ ++&i2c4 { ++ i2c-scl-rising-time-ns = <600>; ++ i2c-scl-falling-time-ns = <20>; ++ status = "okay"; ++ ++ fusb0: fusb30x@22 { ++ compatible = "fcs,fusb302"; ++ reg = <0x22>; ++ fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fusb0_int_gpio>; ++ status = "okay"; ++ vbus-supply = <&vbus_typec>; ++ ++ connector { ++ compatible = "usb-c-connector"; ++ label = "USB-C"; ++ op-sink-microwatt = <1000000>; ++ power-role = "dual"; ++ sink-pdos = ++ <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>; ++ source-pdos = ++ <PDO_FIXED(5000, 1400, PDO_FIXED_USB_COMM)>; ++ try-power-role = "sink"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ usbc_hs: endpoint { ++ remote-endpoint = ++ <&u2phy0_typec_hs>; ++ }; ++ }; ++ ++ port@1 { ++ usbc_ss: endpoint { ++ remote-endpoint = ++ <&tcphy0_typec_ss>; ++ }; ++ }; ++ ++ port@2 { ++ usbc_dp: endpoint { ++ remote-endpoint = ++ <&tcphy0_typec_dp>; ++ }; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s1 { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_8ch_mclk_gpio>, <&i2s1_2ch_bus>; ++ rockchip,playback-channels = <8>; ++ rockchip,capture-channels = <8>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ audio-supply = <&vcc_3v0>; ++ sdmmc-supply = <&vcc_sdio>; ++ gpio1830-supply = <&vcc_3v0>; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ bus-scan-delay-ms = <1000>; ++ ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; ++ max-link-speed = <2>; ++ num-lanes = <4>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn_cpm>; ++ status = "okay"; ++ vpcie0v9-supply = <&vcca0v9_s3>; ++ vpcie1v8-supply = <&vcca1v8_s3>; ++ vpcie3v3-supply = <&vcc3v3_ssd>; ++}; ++ ++&pinctrl { ++ buttons { ++ pwrbtn_gpio: pwrbtn-gpio { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ lidbtn_gpio: lidbtn-gpio { ++ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ dc-charger { ++ dc_det_gpio: dc-det-gpio { ++ rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ es8316 { ++ hp_det_gpio: hp-det-gpio { ++ rockchip,pins = ++ <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ fusb302x { ++ fusb0_int_gpio: fusb0-int-gpio { ++ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ i2s1 { ++ i2s_8ch_mclk_gpio: i2s-8ch-mclk-gpio { ++ rockchip,pins = <4 0 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ }; ++ ++ lcd-panel { ++ lcdvcc_en_gpio: lcdvcc-en-gpio { ++ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ panel_en_gpio: panel-en-gpio { ++ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ lcd_panel_reset_gpio: lcd-panel-reset-gpio { ++ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ leds { ++ pwrled_gpio: pwrled_gpio { ++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ slpled_gpio: slpled_gpio { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l_gpio: pmic-int-l-gpio { ++ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ sdcard { ++ sdmmc0_pwr_h_gpio: sdmmc0-pwr-h-gpio { ++ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h_gpio: wifi-enable-h-gpio { ++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb-typec { ++ vcc5v0_typec0_en_gpio: vcc5v0-typec0-en-gpio { ++ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb2 { ++ pwr_5v_gpio: pwr-5v-gpio { ++ rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ vcc5v0_host_en_gpio: vcc5v0-host-en-gpio { ++ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ bt_wake_gpio: bt-wake-gpio { ++ rockchip,pins = ++ <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ bt_host_wake_gpio: bt-host-wake-gpio { ++ rockchip,pins = ++ <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_reset_gpio: bt-reset-gpio { ++ rockchip,pins = ++ <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pmu_io_domains { ++ pmu1830-supply = <&vcc_3v0>; ++ status = "okay"; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcca1v8_s3>; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ max-frequency = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++&sdio0 { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ disable-wp; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ status = "okay"; ++ supports-sdio; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ mmc-hs200-1_8v; ++ non-removable; ++ status = "okay"; ++}; ++ ++&spi1 { ++ status = "okay"; ++ max-freq = <10000000>; ++ ++ spiflash: spi-flash@0 { ++ #address-cells = <0x1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ m25p,fast-read; ++ reg = <0x0>; ++ spi-max-frequency = <10000000>; ++ status = "okay"; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ loader@8000 { ++ label = "loader"; ++ reg = <0x0 0x3F8000>; ++ }; ++ ++ env@3f8000 { ++ label = "env"; ++ reg = <0x3F8000 0x8000>; ++ }; ++ ++ vendor@7c0000 { ++ label = "vendor"; ++ reg = <0x7C0000 0x40000>; ++ }; ++ }; ++ }; ++}; ++ ++&tcphy0 { ++ extcon = <&fusb0>; ++ status = "okay"; ++}; ++ ++&tcphy0_dp { ++ port { ++ tcphy0_typec_dp: endpoint { ++ remote-endpoint = <&usbc_dp>; ++ }; ++ }; ++}; ++ ++&tcphy0_usb3 { ++ port { ++ tcphy0_typec_ss: endpoint { ++ remote-endpoint = <&usbc_ss>; ++ }; ++ }; ++}; ++ ++&tcphy1 { ++ status = "okay"; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++ ++ u2phy0_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy0_host: host-port { ++ phy-supply = <&vcc5v0_otg>; ++ status = "okay"; ++ }; ++ ++ port { ++ u2phy0_typec_hs: endpoint { ++ remote-endpoint = <&usbc_hs>; ++ }; ++ }; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++ ++ u2phy1_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy1_host: host-port { ++ phy-supply = <&vcc5v0_otg>; ++ status = "okay"; ++ }; ++}; ++ ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; ++ status = "okay"; ++ uart-has-rtscts; ++ ++ bluetooth { ++ compatible = "brcm,bcm4345c5"; ++ clocks = <&rk808 1>; ++ clock-names = "lpo"; ++ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; ++ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; ++ max-speed = <1500000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_host_wake_gpio &bt_wake_gpio &bt_reset_gpio>; ++ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; ++ vbat-supply = <&wifi_bat>; ++ vddio-supply = <&vcc_wl>; ++ }; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_1 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; diff --git a/arm64-a64-mbus.patch b/arm64-a64-mbus.patch new file mode 100644 index 000000000..46efa29cf --- /dev/null +++ b/arm64-a64-mbus.patch @@ -0,0 +1,69 @@ +From daae9f66b29a04a94708b1b5a9b61e3ee14df031 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec <jernej.skrabec@siol.net> +Date: Mon, 10 Feb 2020 18:06:52 +0100 +Subject: [PATCH 1/2] dt-bindings: interconnect: sunxi: Add A64 MBUS compatible + +A64 contains MBUS controller. Add a compatible for it. + +Acked-by: Rob Herring <robh@kernel.org> +Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + .../devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml +index 9370e64992dd..aa0738b4d534 100644 +--- a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml ++++ b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml +@@ -30,6 +30,7 @@ properties: + enum: + - allwinner,sun5i-a13-mbus + - allwinner,sun8i-h3-mbus ++ - allwinner,sun50i-a64-mbus + + reg: + maxItems: 1 +-- +2.24.1 + +From 410bb2be7e1f1d329c238e2d6d06b6c25dcee404 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec <jernej.skrabec@siol.net> +Date: Mon, 10 Feb 2020 18:06:54 +0100 +Subject: [PATCH 2/2] arm64: dts: allwinner: a64: Add MBUS controller node + +A64 contains MBUS, which is the bus used by DMA devices to access +system memory. + +MBUS controller is responsible for arbitration between channels based +on set priority and can do some other things as well, like report +bandwidth used. It also maps RAM region to different address than CPU. + +Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +index 862b47dc9dc9..251c91724de1 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -1061,6 +1061,14 @@ pwm: pwm@1c21400 { + status = "disabled"; + }; + ++ mbus: dram-controller@1c62000 { ++ compatible = "allwinner,sun50i-a64-mbus"; ++ reg = <0x01c62000 0x1000>; ++ clocks = <&ccu 112>; ++ dma-ranges = <0x00000000 0x40000000 0xc0000000>; ++ #interconnect-cells = <1>; ++ }; ++ + csi: csi@1cb0000 { + compatible = "allwinner,sun50i-a64-csi"; + reg = <0x01cb0000 0x1000>; +-- +2.24.1 + diff --git a/arm64-pine64-pinephone.patch b/arm64-pine64-pinephone.patch new file mode 100644 index 000000000..640d53e33 --- /dev/null +++ b/arm64-pine64-pinephone.patch @@ -0,0 +1,568 @@ +From 836821a0addbd8589e949801aaa7be244703c7f8 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Thu, 27 Feb 2020 02:26:48 +0100 +Subject: [PATCH 1/3] arm64: dts: sun50i-a64: Add i2c2 pins + +PinePhone needs I2C2 pins description. Add it, and make it default +for i2c2, since it's the only possiblilty. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +index 862b47dc9dc9..107a48f9c5b3 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -671,6 +671,11 @@ i2c1_pins: i2c1-pins { + function = "i2c1"; + }; + ++ i2c2_pins: i2c2-pins { ++ pins = "PE14", "PE15"; ++ function = "i2c2"; ++ }; ++ + /omit-if-no-ref/ + lcd_rgb666_pins: lcd-rgb666-pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", +@@ -958,12 +963,13 @@ i2c2: i2c@1c2b400 { + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2C2>; + resets = <&ccu RST_BUS_I2C2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + +- + spi0: spi@1c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; +-- +2.24.1 + +From 5c4e2cd9e8b600cc622c10543f69fcd897557eee Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Thu, 27 Feb 2020 02:26:49 +0100 +Subject: [PATCH 2/3] dt-bindings: arm: sunxi: Add PinePhone 1.0 and 1.1 + bindings + +Document board compatible names for Pine64 PinePhone: + +- 1.0 - Developer variant +- 1.1 - Braveheart variant + +Signed-off-by: Ondrej Jirman <megous@megous.com> +Reviewed-by: Rob Herring <robh@kernel.org> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + Documentation/devicetree/bindings/arm/sunxi.yaml | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml +index 159060b65c5d..c632252be48b 100644 +--- a/Documentation/devicetree/bindings/arm/sunxi.yaml ++++ b/Documentation/devicetree/bindings/arm/sunxi.yaml +@@ -636,6 +636,16 @@ properties: + - const: pine64,pinebook + - const: allwinner,sun50i-a64 + ++ - description: Pine64 PinePhone Developer Batch (1.0) ++ items: ++ - const: pine64,pinephone-1.0 ++ - const: allwinner,sun50i-a64 ++ ++ - description: Pine64 PinePhone Braveheart (1.1) ++ items: ++ - const: pine64,pinephone-1.1 ++ - const: allwinner,sun50i-a64 ++ + - description: Pine64 PineTab + items: + - const: pine64,pinetab +-- +2.24.1 + +From 697f60799172569e8d502a44ad98994f2c48778c Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Thu, 27 Feb 2020 02:26:50 +0100 +Subject: [PATCH 3/3] arm64: dts: allwinner: Add initial support for Pine64 + PinePhone + +At the moment PinePhone comes in two slightly incompatible variants: + +- 1.0: Early Developer Batch +- 1.1: Braveheart Batch + +There will be at least one more incompatible variant in the very near +future, so let's start by sharing the dtsi among multiple variants, +right away, even though the HW description doesn't yet include the +different bits. + +The differences between 1.0 and 1.1 are: change in pins that control +the flash LED, differences in modem power status signal routing, and +maybe some other subtler things, that have not been determined yet. + +This is a basic DT that includes only features that are already +supported by mainline drivers. + +Co-developed-by: Samuel Holland <samuel@sholland.org> +Signed-off-by: Samuel Holland <samuel@sholland.org> +Co-developed-by: Martijn Braam <martijn@brixit.nl> +Signed-off-by: Martijn Braam <martijn@brixit.nl> +Co-developed-by: Luca Weiss <luca@z3ntu.xyz> +Signed-off-by: Luca Weiss <luca@z3ntu.xyz> +Signed-off-by: Bhushan Shah <bshah@kde.org> +Signed-off-by: Icenowy Zheng <icenowy@aosc.io> +Signed-off-by: Ondrej Jirman <megous@megous.com> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + arch/arm64/boot/dts/allwinner/Makefile | 2 + + .../allwinner/sun50i-a64-pinephone-1.0.dts | 11 + + .../allwinner/sun50i-a64-pinephone-1.1.dts | 11 + + .../dts/allwinner/sun50i-a64-pinephone.dtsi | 379 ++++++++++++++++++ + 4 files changed, 403 insertions(+) + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi + +diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile +index 6dad63881cd3..e4d3cd0ac5bb 100644 +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -9,6 +9,8 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.0.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.1.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinetab.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts +new file mode 100644 +index 000000000000..0c42272106af +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts +@@ -0,0 +1,11 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2020 Ondrej Jirman <megous@megous.com> ++ ++/dts-v1/; ++ ++#include "sun50i-a64-pinephone.dtsi" ++ ++/ { ++ model = "Pine64 PinePhone Developer Batch (1.0)"; ++ compatible = "pine64,pinephone-1.0", "allwinner,sun50i-a64"; ++}; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts +new file mode 100644 +index 000000000000..06a775c41664 +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts +@@ -0,0 +1,11 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2020 Ondrej Jirman <megous@megous.com> ++ ++/dts-v1/; ++ ++#include "sun50i-a64-pinephone.dtsi" ++ ++/ { ++ model = "Pine64 PinePhone Braveheart (1.1)"; ++ compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64"; ++}; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +new file mode 100644 +index 000000000000..cefda145c3c9 +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +@@ -0,0 +1,379 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.xyz> ++// Copyright (C) 2020 Martijn Braam <martijn@brixit.nl> ++// Copyright (C) 2020 Ondrej Jirman <megous@megous.com> ++ ++#include "sun50i-a64.dtsi" ++#include "sun50i-a64-cpu-opp.dtsi" ++ ++#include <dt-bindings/gpio/gpio.h> ++#include <dt-bindings/input/input.h> ++#include <dt-bindings/leds/common.h> ++#include <dt-bindings/pwm/pwm.h> ++ ++/ { ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ blue { ++ function = LED_FUNCTION_INDICATOR; ++ color = <LED_COLOR_ID_BLUE>; ++ gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ ++ }; ++ ++ green { ++ function = LED_FUNCTION_INDICATOR; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */ ++ }; ++ ++ red { ++ function = LED_FUNCTION_INDICATOR; ++ color = <LED_COLOR_ID_RED>; ++ gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ ++ }; ++ }; ++ ++ speaker_amp: audio-amplifier { ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */ ++ sound-name-prefix = "Speaker Amp"; ++ }; ++ ++ vibrator { ++ compatible = "gpio-vibrator"; ++ enable-gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */ ++ vcc-supply = <®_dcdc1>; ++ }; ++}; ++ ++&codec { ++ status = "okay"; ++}; ++ ++&codec_analog { ++ cpvdd-supply = <®_eldo1>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu1 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu2 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu3 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&dai { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ /* Magnetometer */ ++ lis3mdl@1e { ++ compatible = "st,lis3mdl-magn"; ++ reg = <0x1e>; ++ vdd-supply = <®_dldo1>; ++ vddio-supply = <®_dldo1>; ++ }; ++ ++ /* Accelerometer/gyroscope */ ++ mpu6050@68 { ++ compatible = "invensense,mpu6050"; ++ reg = <0x68>; ++ interrupt-parent = <&pio>; ++ interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */ ++ vdd-supply = <®_dldo1>; ++ vddio-supply = <®_dldo1>; ++ }; ++}; ++ ++/* Connected to pogo pins (external spring based pinheader for user addons) */ ++&i2c2 { ++ status = "okay"; ++}; ++ ++&lradc { ++ vref-supply = <®_aldo3>; ++ status = "okay"; ++ ++ button-200 { ++ label = "Volume Up"; ++ linux,code = <KEY_VOLUMEUP>; ++ channel = <0>; ++ voltage = <200000>; ++ }; ++ ++ button-400 { ++ label = "Volume Down"; ++ linux,code = <KEY_VOLUMEDOWN>; ++ channel = <0>; ++ voltage = <400000>; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins>; ++ vmmc-supply = <®_dcdc1>; ++ vqmmc-supply = <®_dcdc1>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ disable-wp; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_pins>; ++ vmmc-supply = <®_dcdc1>; ++ vqmmc-supply = <®_dcdc1>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&pio { ++ vcc-pb-supply = <®_dcdc1>; ++ vcc-pc-supply = <®_dcdc1>; ++ vcc-pd-supply = <®_dcdc1>; ++ vcc-pe-supply = <®_aldo1>; ++ vcc-pf-supply = <®_dcdc1>; ++ vcc-pg-supply = <®_dldo4>; ++ vcc-ph-supply = <®_dcdc1>; ++}; ++ ++&r_pio { ++ /* ++ * FIXME: We can't add that supply for now since it would ++ * create a circular dependency between pinctrl, the regulator ++ * and the RSB Bus. ++ * ++ * vcc-pl-supply = <®_aldo2>; ++ */ ++}; ++ ++&r_rsb { ++ status = "okay"; ++ ++ axp803: pmic@3a3 { ++ compatible = "x-powers,axp803"; ++ reg = <0x3a3>; ++ interrupt-parent = <&r_intc>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ }; ++}; ++ ++#include "axp803.dtsi" ++ ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++&battery_power_supply { ++ status = "okay"; ++}; ++ ++®_aldo1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dovdd-csi"; ++}; ++ ++®_aldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-pl"; ++}; ++ ++®_aldo3 { ++ regulator-always-on; ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pll-avcc"; ++}; ++ ++®_dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3"; ++}; ++ ++®_dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-name = "vdd-cpux"; ++}; ++ ++/* DCDC3 is polyphased with DCDC2 */ ++ ++®_dcdc5 { ++ regulator-always-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-dram"; ++}; ++ ++®_dcdc6 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-sys"; ++}; ++ ++®_dldo1 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-dsi-sensor"; ++}; ++ ++®_dldo2 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-mipi-io"; ++}; ++ ++®_dldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "avdd-csi"; ++}; ++ ++®_dldo4 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-wifi-io"; ++}; ++ ++®_eldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-lpddr"; ++}; ++ ++®_eldo3 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dvdd-1v8-csi"; ++}; ++ ++®_fldo1 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-1v2-hsic"; ++}; ++ ++®_fldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-cpus"; ++}; ++ ++®_ldo_io0 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-lcd-ctp-stk"; ++ status = "okay"; ++}; ++ ++®_ldo_io1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-1v8-typec"; ++ status = "okay"; ++}; ++ ++®_rtc_ldo { ++ regulator-name = "vcc-rtc"; ++}; ++ ++&sound { ++ status = "okay"; ++ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; ++ simple-audio-card,widgets = "Microphone", "Headset Microphone", ++ "Microphone", "Internal Microphone", ++ "Headphone", "Headphone Jack", ++ "Speaker", "Internal Earpiece", ++ "Speaker", "Internal Speaker"; ++ simple-audio-card,routing = ++ "Headphone Jack", "HP", ++ "Internal Earpiece", "EARPIECE", ++ "Internal Speaker", "Speaker Amp OUTL", ++ "Internal Speaker", "Speaker Amp OUTR", ++ "Speaker Amp INL", "LINEOUT", ++ "Speaker Amp INR", "LINEOUT", ++ "Left DAC", "AIF1 Slot 0 Left", ++ "Right DAC", "AIF1 Slot 0 Right", ++ "AIF1 Slot 0 Left ADC", "Left ADC", ++ "AIF1 Slot 0 Right ADC", "Right ADC", ++ "Internal Microphone", "MBIAS", ++ "MIC1", "Internal Microphone", ++ "Headset Microphone", "HBIAS", ++ "MIC2", "Headset Microphone"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pb_pins>; ++ status = "okay"; ++}; ++ ++/* Connected to the modem (hardware flow control can't be used) */ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usb_power_supply { ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; +-- +2.24.1 + diff --git a/arm64-pine64-pinetab.patch b/arm64-pine64-pinetab.patch new file mode 100644 index 000000000..cafbc71bd --- /dev/null +++ b/arm64-pine64-pinetab.patch @@ -0,0 +1,583 @@ +From e15d9c7cb74033f668c19a65abfd77ed7331f91e Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng <icenowy@aosc.io> +Date: Thu, 16 Jan 2020 11:36:35 +0800 +Subject: [PATCH 1/2] dt-bindings: arm: sunxi: add binding for PineTab tablet + +Add the device tree binding for Pine64's PineTab tablet, which uses +Allwinner A64 SoC. + +Signed-off-by: Icenowy Zheng <icenowy@aosc.io> +Reviewed-by: Rob Herring <robh@kernel.org> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml +index 327ce6730823..159060b65c5d 100644 +--- a/Documentation/devicetree/bindings/arm/sunxi.yaml ++++ b/Documentation/devicetree/bindings/arm/sunxi.yaml +@@ -636,6 +636,11 @@ properties: + - const: pine64,pinebook + - const: allwinner,sun50i-a64 + ++ - description: Pine64 PineTab ++ items: ++ - const: pine64,pinetab ++ - const: allwinner,sun50i-a64 ++ + - description: Pine64 SoPine Baseboard + items: + - const: pine64,sopine-baseboard +-- +2.24.1 + +From d7b56d337bb980f0b996958ec6808253c4f50771 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng <icenowy@aosc.io> +Date: Thu, 16 Jan 2020 11:36:36 +0800 +Subject: [PATCH 2/2] arm64: dts: allwinner: a64: add support for PineTab + +PineTab is a 10.1" tablet by Pine64 with Allwinner A64 inside. + +It includes the following peripherals: + +USB: +- A microUSB Type-B port connected to the OTG-capable USB PHY of +Allwinner A64. The ID pin is connected to a GPIO of the A64 SoC, and the +Vbus is connected to the Vbus of AXP803 PMIC. These enables OTG +functionality on this port. +- A USB Type-A port is connected to the internal hub attached to the +non-OTG USB PHY of Allwinner A64. +- There are reserved pins for an external keyboard connected to the +internal hub. + +Power: +- The microUSB port has its Vbus connected to AXP803, mentioned above. +- A DC jack (of a strange size, 2.5mm outer diameter) is connected to +the ACIN of AXP803. +- A Li-Polymer battery is connected to the battery pins of AXP803. + +Storage: +- An tradition Pine64 eMMC slot is on the board, mounted with an eMMC +module by factory. +- An external microSD slot is hidden under a protect case. + +Display: +- A MIPI-DSI LCD panel (800x1280) is connected to the DSI port of A64 SoC. +- A mini HDMI port. + +Input: +- A touch panel attached to a Goodix GT9271 touch controller. +- Volume keys connected to the LRADC of the A64 SoC. + +Camera: +- An OV5640 CMOS camera is at rear, connected to the CSI bus of A64 SoC. +- A GC2145 CMOS camera is at front, shares the same CSI bus with OV5640. + +Audio: +- A headphone jack is conencted to the SoC's internal codec. +- A speaker connected is to the Line Out port of SoC's internal codec, via +an amplifier. + +Misc: +- Debug UART is muxed with the headphone jack, with the switch next to +the microSD slot. +- A bosch BMA223 accelerometer is connected to the I2C bus of A64 SoC. +- Wi-Fi and Bluetooth are available via a RTL8723CS chip, similar to the +one in Pinebook. + +This commit adds a basically usable device tree for it, implementing +most of the features mentioned above. HDMI is not supported now because +bad LCD-HDMI coexistence situation of mainline A64 display driver, the +front camera currently lacks a driver and a facility to share the bus +with the rear one, and the accelerometer currently lacks a DT binding. + +Signed-off-by: Icenowy Zheng <icenowy@aosc.io> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + arch/arm64/boot/dts/allwinner/Makefile | 1 + + .../boot/dts/allwinner/sun50i-a64-pinetab.dts | 460 ++++++++++++++++++ + 2 files changed, 461 insertions(+) + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts + +diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile +index cf4f78617c3f..6dad63881cd3 100644 +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinetab.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts +new file mode 100644 +index 000000000000..316e8a443913 +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts +@@ -0,0 +1,460 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.xyz> ++ * ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-a64.dtsi" ++#include "sun50i-a64-cpu-opp.dtsi" ++ ++#include <dt-bindings/gpio/gpio.h> ++#include <dt-bindings/input/input.h> ++#include <dt-bindings/pwm/pwm.h> ++ ++/ { ++ model = "PineTab"; ++ compatible = "pine64,pinetab", "allwinner,sun50i-a64"; ++ ++ aliases { ++ serial0 = &uart0; ++ ethernet0 = &rtl8723cs; ++ }; ++ ++ backlight: backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; ++ brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>; ++ default-brightness-level = <15>; ++ enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */ ++ power-supply = <&vdd_bl>; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ i2c-csi { ++ compatible = "i2c-gpio"; ++ sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */ ++ scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */ ++ i2c-gpio,delay-us = <5>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* Rear camera */ ++ ov5640: camera@3c { ++ compatible = "ovti,ov5640"; ++ reg = <0x3c>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&csi_mclk_pin>; ++ clocks = <&ccu CLK_CSI_MCLK>; ++ clock-names = "xclk"; ++ ++ AVDD-supply = <®_dldo3>; ++ DOVDD-supply = <®_aldo1>; ++ DVDD-supply = <®_eldo3>; ++ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */ ++ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */ ++ ++ port { ++ ov5640_ep: endpoint { ++ remote-endpoint = <&csi_ep>; ++ bus-width = <8>; ++ hsync-active = <1>; /* Active high */ ++ vsync-active = <0>; /* Active low */ ++ data-active = <1>; /* Active high */ ++ pclk-sample = <1>; /* Rising */ ++ }; ++ }; ++ }; ++ }; ++ ++ speaker_amp: audio-amplifier { ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ ++ sound-name-prefix = "Speaker Amp"; ++ }; ++ ++ vdd_bl: regulator@0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "bl-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ ++ enable-active-high; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ ++ post-power-on-delay-ms = <200>; ++ }; ++}; ++ ++&codec { ++ status = "okay"; ++}; ++ ++&codec_analog { ++ hpvcc-supply = <®_eldo1>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu1 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu2 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu3 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&csi { ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ csi_ep: endpoint { ++ remote-endpoint = <&ov5640_ep>; ++ bus-width = <8>; ++ hsync-active = <1>; /* Active high */ ++ vsync-active = <0>; /* Active low */ ++ data-active = <1>; /* Active high */ ++ pclk-sample = <1>; /* Rising */ ++ }; ++ }; ++}; ++ ++&dai { ++ status = "okay"; ++}; ++ ++&de { ++ status = "okay"; ++}; ++ ++&dphy { ++ status = "okay"; ++}; ++ ++&dsi { ++ vcc-dsi-supply = <®_dldo1>; ++ status = "okay"; ++ ++ panel@0 { ++ compatible = "feixin,k101-im2ba02"; ++ reg = <0>; ++ avdd-supply = <®_dc1sw>; ++ dvdd-supply = <®_dc1sw>; ++ cvdd-supply = <®_ldo_io1>; ++ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ ++ backlight = <&backlight>; ++ }; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ touchscreen@5d { ++ compatible = "goodix,gt9271"; ++ reg = <0x5d>; ++ interrupt-parent = <&pio>; ++ interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ ++ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ ++ AVDD28-supply = <®_ldo_io1>; ++ }; ++}; ++ ++&i2c0_pins { ++ bias-pull-up; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ /* TODO: add Bochs BMA223 accelerometer here */ ++}; ++ ++&lradc { ++ vref-supply = <®_aldo3>; ++ status = "okay"; ++ ++ button-200 { ++ label = "Volume Up"; ++ linux,code = <KEY_VOLUMEUP>; ++ channel = <0>; ++ voltage = <200000>; ++ }; ++ ++ button-400 { ++ label = "Volume Down"; ++ linux,code = <KEY_VOLUMEDOWN>; ++ channel = <0>; ++ voltage = <400000>; ++ }; ++}; ++ ++&mixer1 { ++ status = "okay"; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins>; ++ vmmc-supply = <®_dcdc1>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ vmmc-supply = <®_dldo4>; ++ vqmmc-supply = <®_eldo1>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ rtl8723cs: wifi@1 { ++ reg = <1>; ++ }; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_pins>; ++ vmmc-supply = <®_dcdc1>; ++ vqmmc-supply = <®_dcdc1>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&pwm { ++ status = "okay"; ++}; ++ ++&r_rsb { ++ status = "okay"; ++ ++ axp803: pmic@3a3 { ++ compatible = "x-powers,axp803"; ++ reg = <0x3a3>; ++ interrupt-parent = <&r_intc>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ x-powers,drive-vbus-en; ++ }; ++}; ++ ++#include "axp803.dtsi" ++ ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++&battery_power_supply { ++ status = "okay"; ++}; ++ ++®_aldo1 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "dovdd-csi"; ++}; ++ ++®_aldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pl"; ++}; ++ ++®_aldo3 { ++ regulator-always-on; ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pll-avcc"; ++}; ++ ++®_dc1sw { ++ regulator-name = "vcc-lcd"; ++}; ++ ++®_dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3"; ++}; ++ ++®_dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-name = "vdd-cpux"; ++}; ++ ++/* DCDC3 is polyphased with DCDC2 */ ++ ++®_dcdc5 { ++ regulator-always-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-dram"; ++}; ++ ++®_dcdc6 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-sys"; ++}; ++ ++®_dldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-hdmi-dsi-sensor"; ++}; ++ ++®_dldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "avdd-csi"; ++}; ++ ++®_dldo4 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-wifi"; ++}; ++ ++®_drivevbus { ++ regulator-name = "usb0-vbus"; ++ status = "okay"; ++}; ++ ++®_eldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "cpvdd"; ++}; ++ ++®_eldo2 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca-1v8"; ++}; ++ ++®_eldo3 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dvdd-1v8-csi"; ++}; ++ ++®_fldo1 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-1v2-hsic"; ++}; ++ ++®_fldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-cpus"; ++}; ++ ++®_ldo_io0 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-usb"; ++ status = "okay"; ++}; ++ ++®_ldo_io1 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-enable-ramp-delay = <3500000>; ++ regulator-name = "vcc-touchscreen"; ++ status = "okay"; ++}; ++ ++®_rtc_ldo { ++ regulator-name = "vcc-rtc"; ++}; ++ ++&sound { ++ status = "okay"; ++ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; ++ simple-audio-card,widgets = "Microphone", "Internal Microphone Left", ++ "Microphone", "Internal Microphone Right", ++ "Headphone", "Headphone Jack", ++ "Speaker", "Internal Speaker"; ++ simple-audio-card,routing = ++ "Left DAC", "AIF1 Slot 0 Left", ++ "Right DAC", "AIF1 Slot 0 Right", ++ "Speaker Amp INL", "LINEOUT", ++ "Speaker Amp INR", "LINEOUT", ++ "Internal Speaker", "Speaker Amp OUTL", ++ "Internal Speaker", "Speaker Amp OUTR", ++ "Headphone Jack", "HP", ++ "AIF1 Slot 0 Left ADC", "Left ADC", ++ "AIF1 Slot 0 Right ADC", "Right ADC", ++ "Internal Microphone Left", "MBIAS", ++ "MIC1", "Internal Microphone Left", ++ "Internal Microphone Right", "HBIAS", ++ "MIC2", "Internal Microphone Right"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pb_pins>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usb_power_supply { ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ ++ usb0_vbus_power-supply = <&usb_power_supply>; ++ usb0_vbus-supply = <®_drivevbus>; ++ usb1_vbus-supply = <®_ldo_io0>; ++ status = "okay"; ++}; +-- +2.24.1 + diff --git a/arm64-pinebook-fixes.patch b/arm64-pinebook-fixes.patch new file mode 100644 index 000000000..410487293 --- /dev/null +++ b/arm64-pinebook-fixes.patch @@ -0,0 +1,429 @@ +From e7a6e6b0c6506a9f070dbfb2ca948770c47a1d78 Mon Sep 17 00:00:00 2001 +From: Samuel Holland <samuel@sholland.org> +Date: Sun, 19 Jan 2020 10:30:57 -0600 +Subject: [PATCH 1/8] arm64: dts: allwinner: pinebook: Remove unused vcc3v3 + regulator + +This fixed regulator has no consumers, GPIOs, or other connections. +Remove it. + +Signed-off-by: Samuel Holland <samuel@sholland.org> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 7 ------- + 1 file changed, 7 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index 3d894b208901..ff32ca1a495e 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -63,13 +63,6 @@ lid_switch { + }; + }; + +- reg_vcc3v3: vcc3v3 { +- compatible = "regulator-fixed"; +- regulator-name = "vcc3v3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- }; +- + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ +-- +2.24.1 + +From 5eea216437eeff908d6d2942bf893fb77ebfc111 Mon Sep 17 00:00:00 2001 +From: Samuel Holland <samuel@sholland.org> +Date: Sun, 19 Jan 2020 10:30:59 -0600 +Subject: [PATCH 2/8] arm64: dts: allwinner: pinebook: Sort device tree nodes + +The r_i2c node should come before r_rsb, and in any case should not +separate the axp803 node from its subnodes. + +Signed-off-by: Samuel Holland <samuel@sholland.org> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + .../boot/dts/allwinner/sun50i-a64-pinebook.dts | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index ff32ca1a495e..77784f7b1da7 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -172,6 +172,14 @@ &pwm { + status = "okay"; + }; + ++/* The ANX6345 eDP-bridge is on r_i2c */ ++&r_i2c { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&r_i2c_pl89_pins>; ++ status = "okay"; ++}; ++ + &r_rsb { + status = "okay"; + +@@ -183,14 +191,6 @@ axp803: pmic@3a3 { + }; + }; + +-/* The ANX6345 eDP-bridge is on r_i2c */ +-&r_i2c { +- clock-frequency = <100000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&r_i2c_pl89_pins>; +- status = "okay"; +-}; +- + #include "axp803.dtsi" + + &ac_power_supply { +-- +2.24.1 + +From 4bdf53ffc64e5c6738c942dcdc422d5ca8a2070a Mon Sep 17 00:00:00 2001 +From: Samuel Holland <samuel@sholland.org> +Date: Sun, 19 Jan 2020 10:31:00 -0600 +Subject: [PATCH 3/8] arm64: dts: allwinner: pinebook: Make simplefb more + consistent + +Boards generally reference the simplefb nodes from the SoC dtsi by +label, not by full path. simplefb_hdmi is already like this in the +Pinebook DTS. Update simplefb_lcd to match. + +Signed-off-by: Samuel Holland <samuel@sholland.org> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + .../arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index 77784f7b1da7..224bed65d008 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -41,12 +41,6 @@ backlight: backlight { + + chosen { + stdout-path = "serial0:115200n8"; +- +- framebuffer-lcd { +- panel-supply = <®_dc1sw>; +- dvdd25-supply = <®_dldo2>; +- dvdd12-supply = <®_fldo1>; +- }; + }; + + gpio_keys { +@@ -316,6 +310,12 @@ ®_rtc_ldo { + regulator-name = "vcc-rtc"; + }; + ++&simplefb_lcd { ++ panel-supply = <®_dc1sw>; ++ dvdd25-supply = <®_dldo2>; ++ dvdd12-supply = <®_fldo1>; ++}; ++ + &simplefb_hdmi { + vcc-hdmi-supply = <®_dldo1>; + }; +-- +2.24.1 + +From c0f416de7141bbc713f080ad123b256f6320ec92 Mon Sep 17 00:00:00 2001 +From: Samuel Holland <samuel@sholland.org> +Date: Sun, 19 Jan 2020 10:31:01 -0600 +Subject: [PATCH 4/8] arm64: dts: allwinner: pinebook: Document MMC0 CD pin + name + +Normally GPIO pin references are followed by a comment giving the pin +name for searchability. Add the comment here where it was missing. + +Signed-off-by: Samuel Holland <samuel@sholland.org> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index 224bed65d008..a1e15777d524 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -119,7 +119,7 @@ &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_dcdc1>; +- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + disable-wp; + bus-width = <4>; + status = "okay"; +-- +2.24.1 + +From 8818d55ec31fa6e0dc14fb7a4924b3e8d3ecef7d Mon Sep 17 00:00:00 2001 +From: Samuel Holland <samuel@sholland.org> +Date: Sun, 19 Jan 2020 10:31:02 -0600 +Subject: [PATCH 5/8] arm64: dts: allwinner: pinebook: Add GPIO port regulators + +Allwinner A64 SoC has separate supplies for PC, PD, PE, PG and PL. + +VCC-PC and VCC-PG are supplied by ELDO1 at 1.8v. +VCC-PD is supplied by DCDC1 (VCC-IO) at 3.3v. +VCC-PE is supplied by ALDO1, and is unused. + +VCC-PL creates a circular dependency, so it is omitted for now. + +Signed-off-by: Samuel Holland <samuel@sholland.org> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + .../boot/dts/allwinner/sun50i-a64-pinebook.dts | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index a1e15777d524..1ec39120323f 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -162,6 +162,13 @@ &ohci1 { + status = "okay"; + }; + ++&pio { ++ vcc-pc-supply = <®_eldo1>; ++ vcc-pd-supply = <®_dcdc1>; ++ vcc-pe-supply = <®_aldo1>; ++ vcc-pg-supply = <®_eldo1>; ++}; ++ + &pwm { + status = "okay"; + }; +@@ -174,6 +181,16 @@ &r_i2c { + status = "okay"; + }; + ++&r_pio { ++ /* ++ * FIXME: We can't add that supply for now since it would ++ * create a circular dependency between pinctrl, the regulator ++ * and the RSB Bus. ++ * ++ * vcc-pl-supply = <®_aldo2>; ++ */ ++}; ++ + &r_rsb { + status = "okay"; + +-- +2.24.1 + +From bd863f25d41173e140850772f9a02ffb3b3e0d6b Mon Sep 17 00:00:00 2001 +From: Samuel Holland <samuel@sholland.org> +Date: Sun, 19 Jan 2020 10:31:03 -0600 +Subject: [PATCH 6/8] arm64: dts: allwinner: pinebook: Fix backlight regulator + +The output from the backlight regulator is labeled as "VBKLT" in the +schematic. Using the equation and resistor values from the schematic, +the output is approximately 18V, not 3.3V. Since the regulator in use +(SS6640STR) is a boost regulator powered by PS (battery or AC input), +which are both >3.3V, the output could not be 3.3V anyway. + +Signed-off-by: Samuel Holland <samuel@sholland.org> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + .../dts/allwinner/sun50i-a64-pinebook.dts | 20 +++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index 1ec39120323f..313f4e6edc19 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -21,22 +21,13 @@ aliases { + ethernet0 = &rtl8723cs; + }; + +- vdd_bl: regulator@0 { +- compatible = "regulator-fixed"; +- regulator-name = "bl-3v3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ +- enable-active-high; +- }; +- + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 0>; + brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>; + default-brightness-level = <2>; + enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */ +- power-supply = <&vdd_bl>; ++ power-supply = <®_vbklt>; + }; + + chosen { +@@ -57,6 +48,15 @@ lid_switch { + }; + }; + ++ reg_vbklt: vbklt { ++ compatible = "regulator-fixed"; ++ regulator-name = "vbklt"; ++ regulator-min-microvolt = <18000000>; ++ regulator-max-microvolt = <18000000>; ++ gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ ++ enable-active-high; ++ }; ++ + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ +-- +2.24.1 + +From 425472eb612873c9c64b41df70020de58448bef3 Mon Sep 17 00:00:00 2001 +From: Samuel Holland <samuel@sholland.org> +Date: Sun, 19 Jan 2020 10:31:04 -0600 +Subject: [PATCH 7/8] arm64: dts: allwinner: pinebook: Fix 5v0 boost regulator + +Now that AXP803 GPIO support is available, we can properly model +the hardware. Replace the use of GPIO0-LDO with a fixed regulator +controlled by GPIO0. This boost regulator is used to power the +(internal and external) USB ports, as well as the speakers. + +Signed-off-by: Samuel Holland <samuel@sholland.org> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + .../dts/allwinner/sun50i-a64-pinebook.dts | 27 +++++++++---------- + 1 file changed, 12 insertions(+), 15 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index 313f4e6edc19..c06c540e6c08 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -57,6 +57,15 @@ reg_vbklt: vbklt { + enable-active-high; + }; + ++ reg_vcc5v0: vcc5v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&axp_gpio 0 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ +@@ -64,12 +73,7 @@ wifi_pwrseq: wifi_pwrseq { + + speaker_amp: audio-amplifier { + compatible = "simple-audio-amplifier"; +- /* +- * TODO This is actually a fixed regulator controlled by +- * the GPIO line on the PMIC. This should be corrected +- * once GPIO support is added for this PMIC. +- */ +- VCC-supply = <®_ldo_io0>; ++ VCC-supply = <®_vcc5v0>; + enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ + sound-name-prefix = "Speaker Amp"; + }; +@@ -316,13 +320,6 @@ ®_fldo2 { + regulator-name = "vdd-cpus"; + }; + +-®_ldo_io0 { +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-name = "vcc-usb"; +- status = "okay"; +-}; +- + ®_rtc_ldo { + regulator-name = "vcc-rtc"; + }; +@@ -371,7 +368,7 @@ &usb_otg { + }; + + &usbphy { +- usb0_vbus-supply = <®_ldo_io0>; +- usb1_vbus-supply = <®_ldo_io0>; ++ usb0_vbus-supply = <®_vcc5v0>; ++ usb1_vbus-supply = <®_vcc5v0>; + status = "okay"; + }; +-- +2.24.1 + +From c3aea4ea2117f5dc28da3d4175fc93296653ecd5 Mon Sep 17 00:00:00 2001 +From: Samuel Holland <samuel@sholland.org> +Date: Sun, 19 Jan 2020 10:30:58 -0600 +Subject: [PATCH 8/8] arm64: dts: allwinner: pinebook: Remove unused AXP803 + regulators + +The Pinebook does not use the CSI bus on the A64. In fact it does not +use GPIO port E for anything at all. Thus the following regulators are +not used and do not need voltages set: + + - ALDO1: Connected to VCC-PE only + - DLDO3: Not connected + - ELDO3: Not connected + +Signed-off-by: Samuel Holland <samuel@sholland.org> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + .../boot/dts/allwinner/sun50i-a64-pinebook.dts | 16 +--------------- + 1 file changed, 1 insertion(+), 15 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index c06c540e6c08..12e513ba8f50 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -217,9 +217,7 @@ &battery_power_supply { + }; + + ®_aldo1 { +- regulator-min-microvolt = <2800000>; +- regulator-max-microvolt = <2800000>; +- regulator-name = "vcc-csi"; ++ regulator-name = "vcc-pe"; + }; + + ®_aldo2 { +@@ -282,12 +280,6 @@ ®_dldo2 { + regulator-name = "vcc-edp"; + }; + +-®_dldo3 { +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-name = "avdd-csi"; +-}; +- + ®_dldo4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +@@ -301,12 +293,6 @@ ®_eldo1 { + regulator-name = "cpvdd"; + }; + +-®_eldo3 { +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-name = "vdd-1v8-csi"; +-}; +- + ®_fldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; +-- +2.24.1 + diff --git a/backlight-lp855x-Ensure-regulators-are-disabled-on-probe-failure.patch b/backlight-lp855x-Ensure-regulators-are-disabled-on-probe-failure.patch new file mode 100644 index 000000000..08c519629 --- /dev/null +++ b/backlight-lp855x-Ensure-regulators-are-disabled-on-probe-failure.patch @@ -0,0 +1,186 @@ +From patchwork Mon Feb 24 14:07:48 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter 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HQMAIL105.nvidia.com + (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Mon, 24 Feb 2020 14:08:15 +0000 +Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id <B5e53d8cd0006>; Mon, 24 Feb 2020 06:08:15 -0800 +From: Jon Hunter <jonathanh@nvidia.com> +To: Milo Kim <milo.kim@ti.com>, Lee Jones <lee.jones@linaro.org>, + Daniel Thompson <daniel.thompson@linaro.org>, + Jingoo Han <jingoohan1@gmail.com> +CC: <dri-devel@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>, + <linux-tegra@vger.kernel.org>, Jon Hunter <jonathanh@nvidia.com> +Subject: [PATCH] backlight: lp855x: Ensure regulators are disabled on probe + failure +Date: Mon, 24 Feb 2020 14:07:48 +0000 +Message-ID: <20200224140748.2182-1-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1582553220; bh=B1HKOxHeQwu3ZxgJLvSfafO1owYsd38lFNvB2Oh8gBc=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + X-NVConfidentiality:MIME-Version:Content-Type; + b=bnwYpe6isaqG2Bp36VGI0VAYjd8jtznqNulwkVw85vf5zOMSfv809Oou4taz+1W9g + /eTLeJozbJBXhllQfybYW8hX4fyWIjWNON8aQugt/0HrnKAjg5r9wLT5lTgmy+8n2B + YrCJM3gob7XIi7l0cbONUTfyGssXmyEi+0SUamN4DDOnXIFxHBentnbyQdvOQ9+11P + Dr5X+zeRff1B/SMt2pdNwrja2cVOPDRGAM+U4epkb2bICZZUiGv1fQLKa+KgJ7xMMS + AwmdVrZ/6l2MAKwM+FuIqdF/x7mpCYg64MWX7TFFRwOSCFwNeq1fcK5TWItV01qcCa + mFLwbcDwN/IQA== +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: <linux-tegra.vger.kernel.org> +X-Mailing-List: linux-tegra@vger.kernel.org + +If probing the LP885x backlight fails after the regulators have been +enabled, then the following warning is seen when releasing the +regulators ... + + WARNING: CPU: 1 PID: 289 at drivers/regulator/core.c:2051 _regulator_put.part.28+0x158/0x160 + Modules linked in: tegra_xudc lp855x_bl(+) host1x pwm_tegra ip_tables x_tables ipv6 nf_defrag_ipv6 + CPU: 1 PID: 289 Comm: systemd-udevd Not tainted 5.6.0-rc2-next-20200224 #1 + Hardware name: NVIDIA Jetson TX1 Developer Kit (DT) + + ... + + Call trace: + _regulator_put.part.28+0x158/0x160 + regulator_put+0x34/0x50 + devm_regulator_release+0x10/0x18 + release_nodes+0x12c/0x230 + devres_release_all+0x34/0x50 + really_probe+0x1c0/0x370 + driver_probe_device+0x58/0x100 + device_driver_attach+0x6c/0x78 + __driver_attach+0xb0/0xf0 + bus_for_each_dev+0x68/0xc8 + driver_attach+0x20/0x28 + bus_add_driver+0x160/0x1f0 + driver_register+0x60/0x110 + i2c_register_driver+0x40/0x80 + lp855x_driver_init+0x20/0x1000 [lp855x_bl] + do_one_initcall+0x58/0x1a0 + do_init_module+0x54/0x1d0 + load_module+0x1d80/0x21c8 + __do_sys_finit_module+0xe8/0x100 + __arm64_sys_finit_module+0x18/0x20 + el0_svc_common.constprop.3+0xb0/0x168 + do_el0_svc+0x20/0x98 + el0_sync_handler+0xf4/0x1b0 + el0_sync+0x140/0x180 + +Fix this by ensuring that the regulators are disabled, if enabled, on +probe failure. + +Finally, ensure that the vddio regulator is disabled in the driver +remove handler. + +Signed-off-by: Jon Hunter <jonathanh@nvidia.com> +Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org> +--- + drivers/video/backlight/lp855x_bl.c | 20 ++++++++++++++++---- + 1 file changed, 16 insertions(+), 4 deletions(-) + +diff --git a/drivers/video/backlight/lp855x_bl.c b/drivers/video/backlight/lp855x_bl.c +index f68920131a4a..e94932c69f54 100644 +--- a/drivers/video/backlight/lp855x_bl.c ++++ b/drivers/video/backlight/lp855x_bl.c +@@ -456,7 +456,7 @@ static int lp855x_probe(struct i2c_client *cl, const struct i2c_device_id *id) + ret = regulator_enable(lp->enable); + if (ret < 0) { + dev_err(lp->dev, "failed to enable vddio: %d\n", ret); +- return ret; ++ goto disable_supply; + } + + /* +@@ -471,24 +471,34 @@ static int lp855x_probe(struct i2c_client *cl, const struct i2c_device_id *id) + ret = lp855x_configure(lp); + if (ret) { + dev_err(lp->dev, "device config err: %d", ret); +- return ret; ++ goto disable_vddio; + } + + ret = lp855x_backlight_register(lp); + if (ret) { + dev_err(lp->dev, + "failed to register backlight. err: %d\n", ret); +- return ret; ++ goto disable_vddio; + } + + ret = sysfs_create_group(&lp->dev->kobj, &lp855x_attr_group); + if (ret) { + dev_err(lp->dev, "failed to register sysfs. err: %d\n", ret); +- return ret; ++ goto disable_vddio; + } + + backlight_update_status(lp->bl); ++ + return 0; ++ ++disable_vddio: ++ if (lp->enable) ++ regulator_disable(lp->enable); ++disable_supply: ++ if (lp->supply) ++ regulator_disable(lp->supply); ++ ++ return ret; + } + + static int lp855x_remove(struct i2c_client *cl) +@@ -497,6 +507,8 @@ static int lp855x_remove(struct i2c_client *cl) + + lp->bl->props.brightness = 0; + backlight_update_status(lp->bl); ++ if (lp->enable) ++ regulator_disable(lp->enable); + if (lp->supply) + regulator_disable(lp->supply); + sysfs_remove_group(&lp->dev->kobj, &lp855x_attr_group); diff --git a/configs/fedora/generic/x86/CONFIG_THUNDERBOLT_NET b/configs/fedora/generic/x86/CONFIG_THUNDERBOLT_NET deleted file mode 100644 index 1cfc06a79..000000000 --- a/configs/fedora/generic/x86/CONFIG_THUNDERBOLT_NET +++ /dev/null @@ -1 +0,0 @@ -CONFIG_THUNDERBOLT_NET=m diff --git a/configs/fedora/generic/x86/CONFIG_EFI_RCI2_TABLE b/configs/fedora/generic/x86/x86_64/CONFIG_EFI_RCI2_TABLE index 083461929..083461929 100644 --- a/configs/fedora/generic/x86/CONFIG_EFI_RCI2_TABLE +++ b/configs/fedora/generic/x86/x86_64/CONFIG_EFI_RCI2_TABLE diff --git a/kernel-i686-debug-fedora.config b/kernel-i686-debug-fedora.config index 147db7233..d5a138b67 100644 --- a/kernel-i686-debug-fedora.config +++ b/kernel-i686-debug-fedora.config @@ -1511,7 +1511,7 @@ CONFIG_EEPROM_MAX6875=m # CONFIG_EFI_FAKE_MEMMAP is not set CONFIG_EFI_PARTITION=y CONFIG_EFI_PGT_DUMP=y -CONFIG_EFI_RCI2_TABLE=y +# CONFIG_EFI_RCI2_TABLE is not set CONFIG_EFI_RUNTIME_MAP=y CONFIG_EFI_SOFT_RESERVE=y CONFIG_EFI_STUB=y @@ -5926,7 +5926,6 @@ CONFIG_THINKPAD_ACPI=m # CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set CONFIG_THINKPAD_ACPI_VIDEO=y CONFIG_THRUSTMASTER_FF=y -CONFIG_THUNDERBOLT_NET=m # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set diff --git a/kernel-i686-fedora.config b/kernel-i686-fedora.config index ef96ead21..151ca94e1 100644 --- a/kernel-i686-fedora.config +++ b/kernel-i686-fedora.config @@ -1502,7 +1502,7 @@ CONFIG_EEPROM_MAX6875=m # CONFIG_EFI_FAKE_MEMMAP is not set CONFIG_EFI_PARTITION=y # CONFIG_EFI_PGT_DUMP is not set -CONFIG_EFI_RCI2_TABLE=y +# CONFIG_EFI_RCI2_TABLE is not set CONFIG_EFI_RUNTIME_MAP=y CONFIG_EFI_SOFT_RESERVE=y CONFIG_EFI_STUB=y @@ -5905,7 +5905,6 @@ CONFIG_THINKPAD_ACPI=m # CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set CONFIG_THINKPAD_ACPI_VIDEO=y CONFIG_THRUSTMASTER_FF=y -CONFIG_THUNDERBOLT_NET=m # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set diff --git a/kernel-x86_64-debug-fedora.config b/kernel-x86_64-debug-fedora.config index 5b723a745..250d0e3de 100644 --- a/kernel-x86_64-debug-fedora.config +++ b/kernel-x86_64-debug-fedora.config @@ -5981,7 +5981,6 @@ CONFIG_THINKPAD_ACPI=m # CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set CONFIG_THINKPAD_ACPI_VIDEO=y CONFIG_THRUSTMASTER_FF=y -CONFIG_THUNDERBOLT_NET=m # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set diff --git a/kernel-x86_64-fedora.config b/kernel-x86_64-fedora.config index ae53caeb7..791116f75 100644 --- a/kernel-x86_64-fedora.config +++ b/kernel-x86_64-fedora.config @@ -5960,7 +5960,6 @@ CONFIG_THINKPAD_ACPI=m # CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set CONFIG_THINKPAD_ACPI_VIDEO=y CONFIG_THRUSTMASTER_FF=y -CONFIG_THUNDERBOLT_NET=m # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set diff --git a/kernel.spec b/kernel.spec index 1a89c5896..38afcf160 100644 --- a/kernel.spec +++ b/kernel.spec @@ -849,15 +849,33 @@ Patch313: ARM-dts-bcm283x-Add-missing-properties-to-the-PWR-LED.patch Patch314: ARM-dts-bcm2711-Add-pcie0-alias.patch # Tegra bits -Patch320: arm64-tegra-jetson-tx1-fixes.patch +# https://www.spinics.net/lists/linux-tegra/msg48152.html +Patch320: ARM64-Tegra-fixes.patch # http://patchwork.ozlabs.org/patch/1230891/ Patch321: arm64-serial-8250_tegra-Create-Tegra-specific-8250-driver.patch # https://lkml.org/lkml/2020/2/14/401 Patch323: arm64-tegra-fix-pcie.patch +# http://patchwork.ozlabs.org/patch/1243162/ +Patch324: regulator-pwm-Don-t-warn-on-probe-deferral.patch +# http://patchwork.ozlabs.org/patch/1243112/ +Patch325: backlight-lp855x-Ensure-regulators-are-disabled-on-probe-failure.patch # Coral Patch330: arm64-dts-imx8mq-phanbell-Add-support-for-ethernet.patch +# Pine64 bits +# 340-344 queued for 5.7 +Patch340: arm64-pinebook-fixes.patch +Patch341: arm64-a64-mbus.patch +# https://patchwork.kernel.org/cover/11405517/ +Patch342: Add-LCD-support-for-Pine64-Pinebook-1080p.patch +# https://lkml.org/lkml/2020/1/15/1320 +Patch343: arm64-pine64-pinetab.patch +# https://www.spinics.net/lists/arm-kernel/msg789135.html +Patch344: arm64-pine64-pinephone.patch +# https://patchwork.kernel.org/cover/11409453/ +Patch345: Add-support-for-the-pine64-Pinebook-Pro.patch + # 400 - IBM (ppc/s390x) patches # 500 - Temp fixes/CVEs etc @@ -2974,6 +2992,11 @@ fi # # %changelog +* Thu Feb 27 2020 Peter Robinson <pbrobinson@fedoraproject.org> +- Fixes and enhancements to some AllWinner Pine64 devices +- Some fixes for Tegra devices +- Initial support for the Pinebook Pro + * Thu Feb 27 2020 Jeremy Cline <jcline@redhat.com> - 5.6.0-0.rc3.git2.1 - Linux v5.6-rc3-71-gbfdc6d91a25f diff --git a/regulator-pwm-Don-t-warn-on-probe-deferral.patch b/regulator-pwm-Don-t-warn-on-probe-deferral.patch new file mode 100644 index 000000000..a662dd1fb --- /dev/null +++ b/regulator-pwm-Don-t-warn-on-probe-deferral.patch @@ -0,0 +1,99 @@ +From patchwork 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HQMAIL111.nvidia.com + (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Mon, 24 Feb 2020 14:40:52 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL101.nvidia.com + (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Mon, 24 Feb 2020 14:40:52 +0000 +Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id <B5e53e0720007>; Mon, 24 Feb 2020 06:40:51 -0800 +From: Jon Hunter <jonathanh@nvidia.com> +To: Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>, + Thierry Reding <thierry.reding@gmail.com> +CC: <linux-kernel@vger.kernel.org>, <linux-pwm@vger.kernel.org>, + <linux-tegra@vger.kernel.org>, Jon Hunter <jonathanh@nvidia.com> +Subject: [PATCH] regulator: pwm: Don't warn on probe deferral +Date: Mon, 24 Feb 2020 14:40:48 +0000 +Message-ID: <20200224144048.6587-1-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1582555239; bh=xX7Mgn1VlNejVzsSKFLhZRbMP4+2YtN6WM4DdeoOEHs=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + X-NVConfidentiality:MIME-Version:Content-Type; + b=GMucuiiqAspPQsWQ1ebM1v5mPEShSHma2lu4iNERqE/uilIy4CUp4eHq6df8Lcsvu + 11bCdd116mWyRJ5/F69vtHcgJHTbeaaRcf+A1/A3DLTuc6Z/PRb5jcySSX/aRCaPfA + +au3XaR3dyBeV+xizDks3Ibot8dmHuQWswqibwwVp5Qanoow2Dj75j/Q++AU7PwM6A + ChvWMkFCBBz6FO8SGi5jCQrCgLTrHtX90cRQZsaaQFrbBYLhLrAsdFkFM2mVLd+xqz + rc7bwTn707Mpf71vRGfmJgoiBm/Pm1qLnRoyLBakyb0xfmEJkCP99y3nO62z9DIpDm + DdSZ9ONzuo7vA== +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: <linux-tegra.vger.kernel.org> +X-Mailing-List: linux-tegra@vger.kernel.org + +Deferred probe is an expected return value for devm_pwm_get(). Given +that the driver deals with it properly, there's no need to output a +warning that may potentially confuse users. + +Signed-off-by: Jon Hunter <jonathanh@nvidia.com> +Reviewed-by: Thierry Reding <treding@nvidia.com> +--- + drivers/regulator/pwm-regulator.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/regulator/pwm-regulator.c b/drivers/regulator/pwm-regulator.c +index e74e11101fc1..fb25777a7d47 100644 +--- a/drivers/regulator/pwm-regulator.c ++++ b/drivers/regulator/pwm-regulator.c +@@ -354,7 +354,8 @@ static int pwm_regulator_probe(struct platform_device *pdev) + drvdata->pwm = devm_pwm_get(&pdev->dev, NULL); + if (IS_ERR(drvdata->pwm)) { + ret = PTR_ERR(drvdata->pwm); +- dev_err(&pdev->dev, "Failed to get PWM: %d\n", ret); ++ if (ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, "Failed to get PWM: %d\n", ret); + return ret; + } + |