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author | Justin M. Forbes <jforbes@fedoraproject.org> | 2020-06-29 09:53:54 -0500 |
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committer | Justin M. Forbes <jforbes@fedoraproject.org> | 2020-06-29 09:53:54 -0500 |
commit | 0a70f564a052c491b12770d1218a2d8dd8b71924 (patch) | |
tree | e2ff71fd7452c0c28c5450acc46b291678305011 | |
parent | 16c99f32c690abd22b734aa20cee4bcce1157b30 (diff) | |
download | kernel-0a70f564a052c491b12770d1218a2d8dd8b71924.tar.gz kernel-0a70f564a052c491b12770d1218a2d8dd8b71924.tar.xz kernel-0a70f564a052c491b12770d1218a2d8dd8b71924.zip |
Add patches from stabilization
Signed-off-by: Justin M. Forbes <jforbes@fedoraproject.org>
15 files changed, 1694 insertions, 0 deletions
diff --git a/0001-PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch b/0001-PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch new file mode 100644 index 000000000..6fc81f845 --- /dev/null +++ b/0001-PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch @@ -0,0 +1,209 @@ +From 92c547f35f4852908f40c2861d9b9d10e0c5099b Mon Sep 17 00:00:00 2001 +From: Peter Robinson <pbrobinson@gmail.com> +Date: Sun, 28 Jun 2020 16:48:50 +0100 +Subject: [PATCH] PCI: Add MCFG quirks for Tegra194 host controllers + +The PCIe controller in Tegra194 SoC is not completely ECAM-compliant. +With the current hardware design limitations in place, ECAM can be enabled +only for one controller (C5 controller to be precise) with bus numbers +starting from 160 instead of 0. A different approach is taken to avoid this +abnormal way of enabling ECAM for just one controller but to enable +configuration space access for all the other controllers. In this approach, +ops are added through MCFG quirk mechanism which access the configuration +spaces by dynamically programming iATU (internal AddressTranslation Unit) +to generate respective configuration accesses just like the way it is +done in DesignWare core sub-system. + +Signed-off-by: Vidya Sagar <vidyas@nvidia.com> +Reported-by: kbuild test robot <lkp@intel.com> +Signed-off-by: Peter Robinson <pbrobinson@gmail.com> +--- +V3: +* Removed MCFG address hardcoding in pci_mcfg.c file +* Started using 'dbi_base' for accessing root port's own config space +* and using 'config_base' for accessing config space of downstream hierarchy + +V2: +* Fixed build issues reported by kbuild test bot +--- + drivers/acpi/pci_mcfg.c | 7 ++ + drivers/pci/controller/dwc/Makefile | 2 +- + drivers/pci/controller/dwc/pcie-tegra194.c | 102 +++++++++++++++++++++ + include/linux/pci-ecam.h | 1 + + 4 files changed, 111 insertions(+), 1 deletion(-) + +diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c +index 6b347d9920cc2..7071814081736 100644 +--- a/drivers/acpi/pci_mcfg.c ++++ b/drivers/acpi/pci_mcfg.c +@@ -116,6 +116,13 @@ static struct mcfg_fixup mcfg_quirks[] = { + THUNDER_ECAM_QUIRK(2, 12), + THUNDER_ECAM_QUIRK(2, 13), + ++ { "NVIDIA", "TEGRA194", 1, 0, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 1, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 2, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 3, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 4, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 5, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ + #define XGENE_V1_ECAM_MCFG(rev, seg) \ + {"APM ", "XGENE ", rev, seg, MCFG_BUS_ANY, \ + &xgene_v1_pcie_ecam_ops } +diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile +index 8a637cfcf6e99..76a6c52b8500e 100644 +--- a/drivers/pci/controller/dwc/Makefile ++++ b/drivers/pci/controller/dwc/Makefile +@@ -17,7 +17,6 @@ obj-$(CONFIG_PCIE_INTEL_GW) += pcie-intel-gw.o + obj-$(CONFIG_PCIE_KIRIN) += pcie-kirin.o + obj-$(CONFIG_PCIE_HISI_STB) += pcie-histb.o + obj-$(CONFIG_PCI_MESON) += pci-meson.o +-obj-$(CONFIG_PCIE_TEGRA194) += pcie-tegra194.o + obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o + + # The following drivers are for devices that use the generic ACPI +@@ -33,4 +32,5 @@ obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o + ifdef CONFIG_PCI + obj-$(CONFIG_ARM64) += pcie-al.o + obj-$(CONFIG_ARM64) += pcie-hisi.o ++obj-$(CONFIG_ARM64) += pcie-tegra194.o + endif +diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c +index ae30a2fd3716a..571b39c5cac63 100644 +--- a/drivers/pci/controller/dwc/pcie-tegra194.c ++++ b/drivers/pci/controller/dwc/pcie-tegra194.c +@@ -22,6 +22,8 @@ + #include <linux/of_irq.h> + #include <linux/of_pci.h> + #include <linux/pci.h> ++#include <linux/pci-acpi.h> ++#include <linux/pci-ecam.h> + #include <linux/phy/phy.h> + #include <linux/pinctrl/consumer.h> + #include <linux/platform_device.h> +@@ -324,6 +326,103 @@ struct tegra_pcie_dw_of_data { + enum dw_pcie_device_mode mode; + }; + ++#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) ++struct tegra194_pcie_acpi { ++ void __iomem *config_base; ++ void __iomem *iatu_base; ++ void __iomem *dbi_base; ++}; ++ ++static int tegra194_acpi_init(struct pci_config_window *cfg) ++{ ++ struct device *dev = cfg->parent; ++ struct tegra194_pcie_acpi *pcie; ++ ++ pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); ++ if (!pcie) ++ return -ENOMEM; ++ ++ pcie->config_base = cfg->win; ++ pcie->iatu_base = cfg->win + SZ_256K; ++ pcie->dbi_base = cfg->win + SZ_512K; ++ cfg->priv = pcie; ++ ++ return 0; ++} ++ ++static inline void atu_reg_write(struct tegra194_pcie_acpi *pcie, int index, ++ u32 val, u32 reg) ++{ ++ u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index); ++ ++ writel(val, pcie->iatu_base + offset + reg); ++} ++ ++static void program_outbound_atu(struct tegra194_pcie_acpi *pcie, int index, ++ int type, u64 cpu_addr, u64 pci_addr, u64 size) ++{ ++ atu_reg_write(pcie, index, lower_32_bits(cpu_addr), ++ PCIE_ATU_LOWER_BASE); ++ atu_reg_write(pcie, index, upper_32_bits(cpu_addr), ++ PCIE_ATU_UPPER_BASE); ++ atu_reg_write(pcie, index, lower_32_bits(pci_addr), ++ PCIE_ATU_LOWER_TARGET); ++ atu_reg_write(pcie, index, lower_32_bits(cpu_addr + size - 1), ++ PCIE_ATU_LIMIT); ++ atu_reg_write(pcie, index, upper_32_bits(pci_addr), ++ PCIE_ATU_UPPER_TARGET); ++ atu_reg_write(pcie, index, type, PCIE_ATU_CR1); ++ atu_reg_write(pcie, index, PCIE_ATU_ENABLE, PCIE_ATU_CR2); ++} ++ ++static void __iomem *tegra194_map_bus(struct pci_bus *bus, ++ unsigned int devfn, int where) ++{ ++ struct pci_config_window *cfg = bus->sysdata; ++ struct tegra194_pcie_acpi *pcie = cfg->priv; ++ u32 busdev; ++ int type; ++ ++ if (bus->number < cfg->busr.start || bus->number > cfg->busr.end) ++ return NULL; ++ ++ if (bus->number == cfg->busr.start) { ++ if (PCI_SLOT(devfn) == 0) ++ return pcie->dbi_base + where; ++ else ++ return NULL; ++ } ++ ++ busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | ++ PCIE_ATU_FUNC(PCI_FUNC(devfn)); ++ ++ if (bus->parent->number == cfg->busr.start) { ++ if (PCI_SLOT(devfn) == 0) ++ type = PCIE_ATU_TYPE_CFG0; ++ else ++ return NULL; ++ } else { ++ type = PCIE_ATU_TYPE_CFG1; ++ } ++ ++ program_outbound_atu(pcie, PCIE_ATU_REGION_INDEX0, type, ++ cfg->res.start, busdev, SZ_256K); ++ return (void __iomem *)(pcie->config_base + where); ++} ++ ++struct pci_ecam_ops tegra194_pcie_ops = { ++ .bus_shift = 20, ++ .init = tegra194_acpi_init, ++ .pci_ops = { ++ .map_bus = tegra194_map_bus, ++ .read = pci_generic_config_read, ++ .write = pci_generic_config_write, ++ } ++}; ++#endif /* defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) */ ++ ++#ifdef CONFIG_PCIE_TEGRA194 ++ + static inline struct tegra_pcie_dw *to_tegra_pcie(struct dw_pcie *pci) + { + return container_of(pci, struct tegra_pcie_dw, pci); +@@ -2406,3 +2505,6 @@ MODULE_DEVICE_TABLE(of, tegra_pcie_dw_of_match); + MODULE_AUTHOR("Vidya Sagar <vidyas@nvidia.com>"); + MODULE_DESCRIPTION("NVIDIA PCIe host controller driver"); + MODULE_LICENSE("GPL v2"); ++ ++#endif /* CONFIG_PCIE_TEGRA194 */ ++ +diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h +index a73164c85e78b..6156140dcbb65 100644 +--- a/include/linux/pci-ecam.h ++++ b/include/linux/pci-ecam.h +@@ -57,6 +57,7 @@ extern struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */ + extern struct pci_ecam_ops xgene_v1_pcie_ecam_ops; /* APM X-Gene PCIe v1 */ + extern struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x */ + extern struct pci_ecam_ops al_pcie_ops; /* Amazon Annapurna Labs PCIe */ ++extern struct pci_ecam_ops tegra194_pcie_ops; /* Tegra194 PCIe */ + #endif + + #ifdef CONFIG_PCI_HOST_COMMON +-- +2.26.2 + diff --git a/0001-dt-bindings-vendor-prefixes-Add-Xingbangda.patch b/0001-dt-bindings-vendor-prefixes-Add-Xingbangda.patch new file mode 100644 index 000000000..eef72a211 --- /dev/null +++ b/0001-dt-bindings-vendor-prefixes-Add-Xingbangda.patch @@ -0,0 +1,33 @@ +From 025eb2eb927d2c3020882ea0ed3af28d65321763 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng <icenowy@aosc.io> +Date: Fri, 26 Jun 2020 02:55:49 +0200 +Subject: [PATCH 01/13] dt-bindings: vendor-prefixes: Add Xingbangda + +Shenzhen Xingbangda Display Technology Co., Ltd is a company which +produces LCD modules. It supplies the LCD panels for the PinePhone. + +Add the vendor prefix of it. + +Signed-off-by: Icenowy Zheng <icenowy@aosc.io> +Signed-off-by: Ondrej Jirman <megous@megous.com> +Acked-by: Rob Herring <robh@kernel.org> +--- + Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml +index d3891386d6710..a558ef87ee5b0 100644 +--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml ++++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml +@@ -1121,6 +1121,8 @@ patternProperties: + description: Xiaomi Technology Co., Ltd. + "^xillybus,.*": + description: Xillybus Ltd. ++ "^xingbangda,.*": ++ description: Shenzhen Xingbangda Display Technology Co., Ltd + "^xinpeng,.*": + description: Shenzhen Xinpeng Technology Co., Ltd + "^xlnx,.*": +-- +2.26.2 + diff --git a/0001-usb-fusb302-Convert-to-use-GPIO-descriptors.patch b/0001-usb-fusb302-Convert-to-use-GPIO-descriptors.patch new file mode 100644 index 000000000..40732340c --- /dev/null +++ b/0001-usb-fusb302-Convert-to-use-GPIO-descriptors.patch @@ -0,0 +1,162 @@ +From 2c36867719d93db8d7f365310587578ab980762c Mon Sep 17 00:00:00 2001 +From: Linus Walleij <linus.walleij@linaro.org> +Date: Wed, 15 Apr 2020 21:24:48 +0200 +Subject: [PATCH] usb: fusb302: Convert to use GPIO descriptors + +This converts the FUSB302 driver to use GPIO descriptors. +The conversion to descriptors per se is pretty straight-forward. + +In the process I discovered that: + +1. The driver uses a completely undocumented device tree binding + for the interrupt GPIO line, "fcs,int_n". Ooops. + +2. The undocumented binding, presumably since it has not seen + review, is just "fcs,int_n", lacking the compulsory "-gpios" + suffix and also something that is not a good name because + the "_n" implies the line is inverted which is something we + handle with flags in the device tree. Ooops. + +3. Possibly the driver should not be requesting the line as a + GPIO and request the corresponding interrupt line by open + coding, the GPIO chip is very likely doubleing as an IRQ + controller and can probably provide an interrupt directly + for this line with interrupts-extended = <&gpio0 ...>; + +4. Possibly the IRQ should just be tagged on the I2C client node + in the device tree like apparently ACPI does, as it overrides + this IRQ with client->irq if that exists. + +But now it is too late to do much about that and as I can see +this is used like this in the Pinebook which is a shipping product +so let'a just contain the mess and move on. + +The property currently appears in: +arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts + +Create a quirk in the GPIO OF library to allow this property +specifically to be specified without the "-gpios" suffix, we have +other such bindings already. + +Cc: Tobias Schramm <t.schramm@manjaro.org> +Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com> +Cc: Yueyao Zhu <yueyao@google.com> +Cc: Guenter Roeck <linux@roeck-us.net> +Cc: devicetree@vger.kernel.org +Signed-off-by: Linus Walleij <linus.walleij@linaro.org> +Link: https://lore.kernel.org/r/20200415192448.305257-1-linus.walleij@linaro.org +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + drivers/gpio/gpiolib-of.c | 21 +++++++++++++++++++++ + drivers/usb/typec/tcpm/fusb302.c | 32 +++++++++----------------------- + 2 files changed, 30 insertions(+), 23 deletions(-) + +diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c +index ccc449df3792a..20c2c428168e4 100644 +--- a/drivers/gpio/gpiolib-of.c ++++ b/drivers/gpio/gpiolib-of.c +@@ -460,6 +460,24 @@ static struct gpio_desc *of_find_arizona_gpio(struct device *dev, + return of_get_named_gpiod_flags(dev->of_node, con_id, 0, of_flags); + } + ++static struct gpio_desc *of_find_usb_gpio(struct device *dev, ++ const char *con_id, ++ enum of_gpio_flags *of_flags) ++{ ++ /* ++ * Currently this USB quirk is only for the Fairchild FUSB302 host which is using ++ * an undocumented DT GPIO line named "fcs,int_n" without the compulsory "-gpios" ++ * suffix. ++ */ ++ if (!IS_ENABLED(CONFIG_TYPEC_FUSB302)) ++ return ERR_PTR(-ENOENT); ++ ++ if (!con_id || strcmp(con_id, "fcs,int_n")) ++ return ERR_PTR(-ENOENT); ++ ++ return of_get_named_gpiod_flags(dev->of_node, con_id, 0, of_flags); ++} ++ + struct gpio_desc *of_find_gpio(struct device *dev, const char *con_id, + unsigned int idx, unsigned long *flags) + { +@@ -504,6 +522,9 @@ struct gpio_desc *of_find_gpio(struct device *dev, const char *con_id, + if (PTR_ERR(desc) == -ENOENT) + desc = of_find_arizona_gpio(dev, con_id, &of_flags); + ++ if (PTR_ERR(desc) == -ENOENT) ++ desc = of_find_usb_gpio(dev, con_id, &of_flags); ++ + if (IS_ERR(desc)) + return desc; + +diff --git a/drivers/usb/typec/tcpm/fusb302.c b/drivers/usb/typec/tcpm/fusb302.c +index b498960ff72b5..b28facece43c4 100644 +--- a/drivers/usb/typec/tcpm/fusb302.c ++++ b/drivers/usb/typec/tcpm/fusb302.c +@@ -9,14 +9,13 @@ + #include <linux/delay.h> + #include <linux/errno.h> + #include <linux/extcon.h> +-#include <linux/gpio.h> ++#include <linux/gpio/consumer.h> + #include <linux/i2c.h> + #include <linux/interrupt.h> + #include <linux/kernel.h> + #include <linux/module.h> + #include <linux/mutex.h> + #include <linux/of_device.h> +-#include <linux/of_gpio.h> + #include <linux/pinctrl/consumer.h> + #include <linux/proc_fs.h> + #include <linux/regulator/consumer.h> +@@ -83,7 +82,7 @@ struct fusb302_chip { + struct work_struct irq_work; + bool irq_suspended; + bool irq_while_suspended; +- int gpio_int_n; ++ struct gpio_desc *gpio_int_n; + int gpio_int_n_irq; + struct extcon_dev *extcon; + +@@ -1618,30 +1617,17 @@ static void fusb302_irq_work(struct work_struct *work) + + static int init_gpio(struct fusb302_chip *chip) + { +- struct device_node *node; ++ struct device *dev = chip->dev; + int ret = 0; + +- node = chip->dev->of_node; +- chip->gpio_int_n = of_get_named_gpio(node, "fcs,int_n", 0); +- if (!gpio_is_valid(chip->gpio_int_n)) { +- ret = chip->gpio_int_n; +- dev_err(chip->dev, "cannot get named GPIO Int_N, ret=%d", ret); +- return ret; +- } +- ret = devm_gpio_request(chip->dev, chip->gpio_int_n, "fcs,int_n"); +- if (ret < 0) { +- dev_err(chip->dev, "cannot request GPIO Int_N, ret=%d", ret); +- return ret; +- } +- ret = gpio_direction_input(chip->gpio_int_n); +- if (ret < 0) { +- dev_err(chip->dev, +- "cannot set GPIO Int_N to input, ret=%d", ret); +- return ret; ++ chip->gpio_int_n = devm_gpiod_get(dev, "fcs,int_n", GPIOD_IN); ++ if (IS_ERR(chip->gpio_int_n)) { ++ dev_err(dev, "failed to request gpio_int_n\n"); ++ return PTR_ERR(chip->gpio_int_n); + } +- ret = gpio_to_irq(chip->gpio_int_n); ++ ret = gpiod_to_irq(chip->gpio_int_n); + if (ret < 0) { +- dev_err(chip->dev, ++ dev_err(dev, + "cannot request IRQ for GPIO Int_N, ret=%d", ret); + return ret; + } +-- +2.26.2 + diff --git a/0002-dt-bindings-panel-Convert-rocktech-jh057n00900-to-ya.patch b/0002-dt-bindings-panel-Convert-rocktech-jh057n00900-to-ya.patch new file mode 100644 index 000000000..0d05e02e0 --- /dev/null +++ b/0002-dt-bindings-panel-Convert-rocktech-jh057n00900-to-ya.patch @@ -0,0 +1,120 @@ +From 789d3f52a1cf675ba68c3578fe2b259bc44caba2 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:55:50 +0200 +Subject: [PATCH 02/13] dt-bindings: panel: Convert rocktech, jh057n00900 to + yaml + +Convert Rocktech MIPI DSI panel driver from txt to yaml bindings. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + .../display/panel/rocktech,jh057n00900.txt | 23 ------- + .../display/panel/rocktech,jh057n00900.yaml | 66 +++++++++++++++++++ + 2 files changed, 66 insertions(+), 23 deletions(-) + delete mode 100644 Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt + create mode 100644 Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml + +diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt +deleted file mode 100644 +index a372c5d846956..0000000000000 +--- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt ++++ /dev/null +@@ -1,23 +0,0 @@ +-Rocktech jh057n00900 5.5" 720x1440 TFT LCD panel +- +-Required properties: +-- compatible: should be "rocktech,jh057n00900" +-- reg: DSI virtual channel of the peripheral +-- reset-gpios: panel reset gpio +-- backlight: phandle of the backlight device attached to the panel +-- vcc-supply: phandle of the regulator that provides the vcc supply voltage. +-- iovcc-supply: phandle of the regulator that provides the iovcc supply +- voltage. +- +-Example: +- +- &mipi_dsi { +- panel@0 { +- compatible = "rocktech,jh057n00900"; +- reg = <0>; +- backlight = <&backlight>; +- reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; +- vcc-supply = <®_2v8_p>; +- iovcc-supply = <®_1v8_p>; +- }; +- }; +diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml +new file mode 100644 +index 0000000000000..f97c48550741c +--- /dev/null ++++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml +@@ -0,0 +1,66 @@ ++# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/display/panel/rocktech,jh057n00900.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel ++ ++maintainers: ++ - Ondrej Jirman <megi@xff.cz> ++ ++description: | ++ Rocktech JH057N00900 is a 720x1440 TFT LCD panel ++ connected using a MIPI-DSI video interface. ++ ++allOf: ++ - $ref: panel-common.yaml# ++ ++properties: ++ compatible: ++ const: rocktech,jh057n00900 ++ ++ reg: ++ maxItems: 1 ++ description: DSI virtual channel ++ ++ vcc-supply: ++ description: Panel power supply ++ ++ vccio-supply: ++ description: I/O voltage supply ++ ++ reset-gpios: ++ description: GPIO used for the reset pin ++ maxItems: 1 ++ ++ backlight: ++ description: Backlight used by the panel ++ $ref: "/schemas/types.yaml#/definitions/phandle" ++ ++required: ++ - compatible ++ - reg ++ - vcc-supply ++ - vccio-supply ++ - reset-gpios ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include <dt-bindings/gpio/gpio.h> ++ ++ dsi { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ panel@0 { ++ compatible = "rocktech,jh057n00900"; ++ reg = <0>; ++ vcc-supply = <®_2v8_p>; ++ iovcc-supply = <®_1v8_p>; ++ reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; ++ backlight = <&backlight>; ++ }; ++ }; ++... +-- +2.26.2 + diff --git a/0003-dt-bindings-panel-Add-compatible-for-Xingbangda-XBD5.patch b/0003-dt-bindings-panel-Add-compatible-for-Xingbangda-XBD5.patch new file mode 100644 index 000000000..a7099de05 --- /dev/null +++ b/0003-dt-bindings-panel-Add-compatible-for-Xingbangda-XBD5.patch @@ -0,0 +1,37 @@ +From 12146093602e0dedb7ee431224fc4a58d40697f8 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:55:51 +0200 +Subject: [PATCH 03/13] dt-bindings: panel: Add compatible for Xingbangda + XBD599 panel + +Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel. It is based on +Sitronix ST7703 LCD controller just like rocktech,jh057n00900. It is +used in PinePhone. + +Add a compatible for it. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + .../bindings/display/panel/rocktech,jh057n00900.yaml | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml +index f97c48550741c..4d43a1b36d7c7 100644 +--- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml ++++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml +@@ -18,7 +18,11 @@ allOf: + + properties: + compatible: +- const: rocktech,jh057n00900 ++ enum: ++ # Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel ++ - rocktech,jh057n00900 ++ # Xingbangda XBD599 5.99" 720x1440 TFT LCD panel ++ - xingbangda,xbd599 + + reg: + maxItems: 1 +-- +2.26.2 + diff --git a/0004-drm-panel-rocktech-jh057n00900-Rename-the-driver-to-.patch b/0004-drm-panel-rocktech-jh057n00900-Rename-the-driver-to-.patch new file mode 100644 index 000000000..c4c947641 --- /dev/null +++ b/0004-drm-panel-rocktech-jh057n00900-Rename-the-driver-to-.patch @@ -0,0 +1,91 @@ +From e82044df3332199c63904d86b4b1ad0963a6f8e0 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:55:52 +0200 +Subject: [PATCH 04/13] drm/panel: rocktech-jh057n00900: Rename the driver to + st7703 + +This rename is done so that the driver matches the name of the +display controller and in preparation for adding support for more +panels to the driver. + +This is just a basic file rename, with no code changes. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + drivers/gpu/drm/panel/Kconfig | 26 +++++++++---------- + drivers/gpu/drm/panel/Makefile | 2 +- + ...-jh057n00900.c => panel-sitronix-st7703.c} | 0 + 3 files changed, 14 insertions(+), 14 deletions(-) + rename drivers/gpu/drm/panel/{panel-rocktech-jh057n00900.c => panel-sitronix-st7703.c} (100%) + +diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig +index a1723c1b5fbf8..7cf1f160fdd51 100644 +--- a/drivers/gpu/drm/panel/Kconfig ++++ b/drivers/gpu/drm/panel/Kconfig +@@ -262,19 +262,6 @@ config DRM_PANEL_RAYDIUM_RM68200 + Say Y here if you want to enable support for Raydium RM68200 + 720x1280 DSI video mode panel. + +-config DRM_PANEL_ROCKTECH_JH057N00900 +- tristate "Rocktech JH057N00900 MIPI touchscreen panel" +- depends on OF +- depends on DRM_MIPI_DSI +- depends on BACKLIGHT_CLASS_DEVICE +- help +- Say Y here if you want to enable support for Rocktech JH057N00900 +- MIPI DSI panel as e.g. used in the Librem 5 devkit. It has a +- resolution of 720x1440 pixels, a built in backlight and touch +- controller. +- Touch input support is provided by the goodix driver and needs to be +- selected separately. +- + config DRM_PANEL_RONBO_RB070D30 + tristate "Ronbo Electronics RB070D30 panel" + depends on OF +@@ -374,6 +361,19 @@ config DRM_PANEL_SITRONIX_ST7701 + ST7701 controller for 480X864 LCD panels with MIPI/RGB/SPI + system interfaces. + ++config DRM_PANEL_SITRONIX_ST7703 ++ tristate "Sitronix ST7703 based MIPI touchscreen panels" ++ depends on OF ++ depends on DRM_MIPI_DSI ++ depends on BACKLIGHT_CLASS_DEVICE ++ help ++ Say Y here if you want to enable support for Sitronix ST7703 based ++ panels, souch as Rocktech JH057N00900 MIPI DSI panel as e.g. used in ++ the Librem 5 devkit. It has a resolution of 720x1440 pixels, a built ++ in backlight and touch controller. ++ Touch input support is provided by the goodix driver and needs to be ++ selected separately. ++ + config DRM_PANEL_SITRONIX_ST7789V + tristate "Sitronix ST7789V panel" + depends on OF && SPI +diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile +index 96a883cd66305..0519fdf0710d5 100644 +--- a/drivers/gpu/drm/panel/Makefile ++++ b/drivers/gpu/drm/panel/Makefile +@@ -25,7 +25,6 @@ obj-$(CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00) += panel-panasonic-vvx10f034n00.o + obj-$(CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN) += panel-raspberrypi-touchscreen.o + obj-$(CONFIG_DRM_PANEL_RAYDIUM_RM67191) += panel-raydium-rm67191.o + obj-$(CONFIG_DRM_PANEL_RAYDIUM_RM68200) += panel-raydium-rm68200.o +-obj-$(CONFIG_DRM_PANEL_ROCKTECH_JH057N00900) += panel-rocktech-jh057n00900.o + obj-$(CONFIG_DRM_PANEL_RONBO_RB070D30) += panel-ronbo-rb070d30.o + obj-$(CONFIG_DRM_PANEL_SAMSUNG_LD9040) += panel-samsung-ld9040.o + obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6D16D0) += panel-samsung-s6d16d0.o +@@ -39,6 +38,7 @@ obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o + obj-$(CONFIG_DRM_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o + obj-$(CONFIG_DRM_PANEL_SHARP_LS043T1LE01) += panel-sharp-ls043t1le01.o + obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7701) += panel-sitronix-st7701.o ++obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o + obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o + obj-$(CONFIG_DRM_PANEL_SONY_ACX424AKP) += panel-sony-acx424akp.o + obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o +diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +similarity index 100% +rename from drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c +rename to drivers/gpu/drm/panel/panel-sitronix-st7703.c +-- +2.26.2 + diff --git a/0005-drm-panel-st7703-Rename-functions-from-jh057n-prefix.patch b/0005-drm-panel-st7703-Rename-functions-from-jh057n-prefix.patch new file mode 100644 index 000000000..5432e1bba --- /dev/null +++ b/0005-drm-panel-st7703-Rename-functions-from-jh057n-prefix.patch @@ -0,0 +1,265 @@ +From 6fad8493b27ade51f37d88acc7ce6fd7dbc9da69 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:55:53 +0200 +Subject: [PATCH 05/13] drm/panel: st7703: Rename functions from jh057n prefix + to st7703 + +This is done so that code that's not specific to a particular +jh057n panel is named after the controller. Functions specific +to the panel are kept named after the panel. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + drivers/gpu/drm/panel/panel-sitronix-st7703.c | 90 ++++++++++--------- + 1 file changed, 46 insertions(+), 44 deletions(-) + +diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +index 38ff742bc1209..511af659f273b 100644 +--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c ++++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +@@ -1,6 +1,8 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Rockteck jh057n00900 5.5" MIPI-DSI panel driver ++ * Driver for panels based on Sitronix ST7703 controller, souch as: ++ * ++ * - Rocktech jh057n00900 5.5" MIPI-DSI panel + * + * Copyright (C) Purism SPC 2019 + */ +@@ -21,7 +23,7 @@ + #include <drm/drm_panel.h> + #include <drm/drm_print.h> + +-#define DRV_NAME "panel-rocktech-jh057n00900" ++#define DRV_NAME "panel-sitronix-st7703" + + /* Manufacturer specific Commands send via DSI */ + #define ST7703_CMD_ALL_PIXEL_OFF 0x22 +@@ -45,7 +47,7 @@ + #define ST7703_CMD_SETGIP1 0xE9 + #define ST7703_CMD_SETGIP2 0xEA + +-struct jh057n { ++struct st7703 { + struct device *dev; + struct drm_panel panel; + struct gpio_desc *reset_gpio; +@@ -56,9 +58,9 @@ struct jh057n { + struct dentry *debugfs; + }; + +-static inline struct jh057n *panel_to_jh057n(struct drm_panel *panel) ++static inline struct st7703 *panel_to_st7703(struct drm_panel *panel) + { +- return container_of(panel, struct jh057n, panel); ++ return container_of(panel, struct st7703, panel); + } + + #define dsi_generic_write_seq(dsi, seq...) do { \ +@@ -69,7 +71,7 @@ static inline struct jh057n *panel_to_jh057n(struct drm_panel *panel) + return ret; \ + } while (0) + +-static int jh057n_init_sequence(struct jh057n *ctx) ++static int jh057n_init_sequence(struct st7703 *ctx) + { + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); + struct device *dev = ctx->dev; +@@ -141,9 +143,9 @@ static int jh057n_init_sequence(struct jh057n *ctx) + return 0; + } + +-static int jh057n_enable(struct drm_panel *panel) ++static int st7703_enable(struct drm_panel *panel) + { +- struct jh057n *ctx = panel_to_jh057n(panel); ++ struct st7703 *ctx = panel_to_st7703(panel); + int ret; + + ret = jh057n_init_sequence(ctx); +@@ -156,17 +158,17 @@ static int jh057n_enable(struct drm_panel *panel) + return 0; + } + +-static int jh057n_disable(struct drm_panel *panel) ++static int st7703_disable(struct drm_panel *panel) + { +- struct jh057n *ctx = panel_to_jh057n(panel); ++ struct st7703 *ctx = panel_to_st7703(panel); + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); + + return mipi_dsi_dcs_set_display_off(dsi); + } + +-static int jh057n_unprepare(struct drm_panel *panel) ++static int st7703_unprepare(struct drm_panel *panel) + { +- struct jh057n *ctx = panel_to_jh057n(panel); ++ struct st7703 *ctx = panel_to_st7703(panel); + + if (!ctx->prepared) + return 0; +@@ -178,9 +180,9 @@ static int jh057n_unprepare(struct drm_panel *panel) + return 0; + } + +-static int jh057n_prepare(struct drm_panel *panel) ++static int st7703_prepare(struct drm_panel *panel) + { +- struct jh057n *ctx = panel_to_jh057n(panel); ++ struct st7703 *ctx = panel_to_st7703(panel); + int ret; + + if (ctx->prepared) +@@ -230,10 +232,10 @@ static const struct drm_display_mode default_mode = { + .height_mm = 130, + }; + +-static int jh057n_get_modes(struct drm_panel *panel, ++static int st7703_get_modes(struct drm_panel *panel, + struct drm_connector *connector) + { +- struct jh057n *ctx = panel_to_jh057n(panel); ++ struct st7703 *ctx = panel_to_st7703(panel); + struct drm_display_mode *mode; + + mode = drm_mode_duplicate(connector->dev, &default_mode); +@@ -254,17 +256,17 @@ static int jh057n_get_modes(struct drm_panel *panel, + return 1; + } + +-static const struct drm_panel_funcs jh057n_drm_funcs = { +- .disable = jh057n_disable, +- .unprepare = jh057n_unprepare, +- .prepare = jh057n_prepare, +- .enable = jh057n_enable, +- .get_modes = jh057n_get_modes, ++static const struct drm_panel_funcs st7703_drm_funcs = { ++ .disable = st7703_disable, ++ .unprepare = st7703_unprepare, ++ .prepare = st7703_prepare, ++ .enable = st7703_enable, ++ .get_modes = st7703_get_modes, + }; + + static int allpixelson_set(void *data, u64 val) + { +- struct jh057n *ctx = data; ++ struct st7703 *ctx = data; + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); + + DRM_DEV_DEBUG_DRIVER(ctx->dev, "Setting all pixels on\n"); +@@ -282,7 +284,7 @@ static int allpixelson_set(void *data, u64 val) + DEFINE_SIMPLE_ATTRIBUTE(allpixelson_fops, NULL, + allpixelson_set, "%llu\n"); + +-static void jh057n_debugfs_init(struct jh057n *ctx) ++static void st7703_debugfs_init(struct st7703 *ctx) + { + ctx->debugfs = debugfs_create_dir(DRV_NAME, NULL); + +@@ -290,16 +292,16 @@ static void jh057n_debugfs_init(struct jh057n *ctx) + &allpixelson_fops); + } + +-static void jh057n_debugfs_remove(struct jh057n *ctx) ++static void st7703_debugfs_remove(struct st7703 *ctx) + { + debugfs_remove_recursive(ctx->debugfs); + ctx->debugfs = NULL; + } + +-static int jh057n_probe(struct mipi_dsi_device *dsi) ++static int st7703_probe(struct mipi_dsi_device *dsi) + { + struct device *dev = &dsi->dev; +- struct jh057n *ctx; ++ struct st7703 *ctx; + int ret; + + ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); +@@ -340,7 +342,7 @@ static int jh057n_probe(struct mipi_dsi_device *dsi) + return ret; + } + +- drm_panel_init(&ctx->panel, dev, &jh057n_drm_funcs, ++ drm_panel_init(&ctx->panel, dev, &st7703_drm_funcs, + DRM_MODE_CONNECTOR_DSI); + + ret = drm_panel_of_backlight(&ctx->panel); +@@ -363,13 +365,13 @@ static int jh057n_probe(struct mipi_dsi_device *dsi) + default_mode.vrefresh, + mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes); + +- jh057n_debugfs_init(ctx); ++ st7703_debugfs_init(ctx); + return 0; + } + +-static void jh057n_shutdown(struct mipi_dsi_device *dsi) ++static void st7703_shutdown(struct mipi_dsi_device *dsi) + { +- struct jh057n *ctx = mipi_dsi_get_drvdata(dsi); ++ struct st7703 *ctx = mipi_dsi_get_drvdata(dsi); + int ret; + + ret = drm_panel_unprepare(&ctx->panel); +@@ -383,12 +385,12 @@ static void jh057n_shutdown(struct mipi_dsi_device *dsi) + ret); + } + +-static int jh057n_remove(struct mipi_dsi_device *dsi) ++static int st7703_remove(struct mipi_dsi_device *dsi) + { +- struct jh057n *ctx = mipi_dsi_get_drvdata(dsi); ++ struct st7703 *ctx = mipi_dsi_get_drvdata(dsi); + int ret; + +- jh057n_shutdown(dsi); ++ st7703_shutdown(dsi); + + ret = mipi_dsi_detach(dsi); + if (ret < 0) +@@ -397,28 +399,28 @@ static int jh057n_remove(struct mipi_dsi_device *dsi) + + drm_panel_remove(&ctx->panel); + +- jh057n_debugfs_remove(ctx); ++ st7703_debugfs_remove(ctx); + + return 0; + } + +-static const struct of_device_id jh057n_of_match[] = { ++static const struct of_device_id st7703_of_match[] = { + { .compatible = "rocktech,jh057n00900" }, + { /* sentinel */ } + }; +-MODULE_DEVICE_TABLE(of, jh057n_of_match); ++MODULE_DEVICE_TABLE(of, st7703_of_match); + +-static struct mipi_dsi_driver jh057n_driver = { +- .probe = jh057n_probe, +- .remove = jh057n_remove, +- .shutdown = jh057n_shutdown, ++static struct mipi_dsi_driver st7703_driver = { ++ .probe = st7703_probe, ++ .remove = st7703_remove, ++ .shutdown = st7703_shutdown, + .driver = { + .name = DRV_NAME, +- .of_match_table = jh057n_of_match, ++ .of_match_table = st7703_of_match, + }, + }; +-module_mipi_dsi_driver(jh057n_driver); ++module_mipi_dsi_driver(st7703_driver); + + MODULE_AUTHOR("Guido Günther <agx@sigxcpu.org>"); +-MODULE_DESCRIPTION("DRM driver for Rocktech JH057N00900 MIPI DSI panel"); ++MODULE_DESCRIPTION("DRM driver for Sitronix ST7703 based MIPI DSI panels"); + MODULE_LICENSE("GPL v2"); +-- +2.26.2 + diff --git a/0006-drm-panel-st7703-Prepare-for-supporting-multiple-pan.patch b/0006-drm-panel-st7703-Prepare-for-supporting-multiple-pan.patch new file mode 100644 index 000000000..8436ea3cb --- /dev/null +++ b/0006-drm-panel-st7703-Prepare-for-supporting-multiple-pan.patch @@ -0,0 +1,129 @@ +From 19802e031428f7cf967259fdf8794a971164a44a Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:55:54 +0200 +Subject: [PATCH 06/13] drm/panel: st7703: Prepare for supporting multiple + panels + +Parametrize the driver so that it can support more panels based +on st7703 controller. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + drivers/gpu/drm/panel/panel-sitronix-st7703.c | 43 +++++++++++++------ + 1 file changed, 31 insertions(+), 12 deletions(-) + +diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +index 511af659f273b..08cbc316266c1 100644 +--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c ++++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +@@ -13,6 +13,7 @@ + #include <linux/media-bus-format.h> + #include <linux/mod_devicetable.h> + #include <linux/module.h> ++#include <linux/of_device.h> + #include <linux/regulator/consumer.h> + + #include <video/display_timing.h> +@@ -56,6 +57,15 @@ struct st7703 { + bool prepared; + + struct dentry *debugfs; ++ const struct st7703_panel_desc *desc; ++}; ++ ++struct st7703_panel_desc { ++ const struct drm_display_mode *mode; ++ unsigned int lanes; ++ unsigned long mode_flags; ++ enum mipi_dsi_pixel_format format; ++ int (*init_sequence)(struct st7703 *ctx); + }; + + static inline struct st7703 *panel_to_st7703(struct drm_panel *panel) +@@ -148,7 +158,7 @@ static int st7703_enable(struct drm_panel *panel) + struct st7703 *ctx = panel_to_st7703(panel); + int ret; + +- ret = jh057n_init_sequence(ctx); ++ ret = ctx->desc->init_sequence(ctx); + if (ret < 0) { + DRM_DEV_ERROR(ctx->dev, "Panel init sequence failed: %d\n", + ret); +@@ -216,7 +226,7 @@ static int st7703_prepare(struct drm_panel *panel) + return ret; + } + +-static const struct drm_display_mode default_mode = { ++static const struct drm_display_mode jh057n00900_mode = { + .hdisplay = 720, + .hsync_start = 720 + 90, + .hsync_end = 720 + 90 + 20, +@@ -232,17 +242,26 @@ static const struct drm_display_mode default_mode = { + .height_mm = 130, + }; + ++struct st7703_panel_desc jh057n00900_panel_desc = { ++ .mode = &jh057n00900_mode, ++ .lanes = 4, ++ .mode_flags = MIPI_DSI_MODE_VIDEO | ++ MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE, ++ .format = MIPI_DSI_FMT_RGB888, ++ .init_sequence = jh057n_init_sequence, ++}; ++ + static int st7703_get_modes(struct drm_panel *panel, + struct drm_connector *connector) + { + struct st7703 *ctx = panel_to_st7703(panel); + struct drm_display_mode *mode; + +- mode = drm_mode_duplicate(connector->dev, &default_mode); ++ mode = drm_mode_duplicate(connector->dev, ctx->desc->mode); + if (!mode) { + DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", +- default_mode.hdisplay, default_mode.vdisplay, +- default_mode.vrefresh); ++ ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay, ++ ctx->desc->mode->vrefresh); + return -ENOMEM; + } + +@@ -317,11 +336,11 @@ static int st7703_probe(struct mipi_dsi_device *dsi) + mipi_dsi_set_drvdata(dsi, ctx); + + ctx->dev = dev; ++ ctx->desc = of_device_get_match_data(dev); + +- dsi->lanes = 4; +- dsi->format = MIPI_DSI_FMT_RGB888; +- dsi->mode_flags = MIPI_DSI_MODE_VIDEO | +- MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE; ++ dsi->mode_flags = ctx->desc->mode_flags; ++ dsi->format = ctx->desc->format; ++ dsi->lanes = ctx->desc->lanes; + + ctx->vcc = devm_regulator_get(dev, "vcc"); + if (IS_ERR(ctx->vcc)) { +@@ -361,8 +380,8 @@ static int st7703_probe(struct mipi_dsi_device *dsi) + } + + DRM_DEV_INFO(dev, "%ux%u@%u %ubpp dsi %udl - ready\n", +- default_mode.hdisplay, default_mode.vdisplay, +- default_mode.vrefresh, ++ ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay, ++ ctx->desc->mode->vrefresh, + mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes); + + st7703_debugfs_init(ctx); +@@ -405,7 +424,7 @@ static int st7703_remove(struct mipi_dsi_device *dsi) + } + + static const struct of_device_id st7703_of_match[] = { +- { .compatible = "rocktech,jh057n00900" }, ++ { .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc }, + { /* sentinel */ } + }; + MODULE_DEVICE_TABLE(of, st7703_of_match); +-- +2.26.2 + diff --git a/0007-drm-panel-st7703-Move-code-specific-to-jh057n-closer.patch b/0007-drm-panel-st7703-Move-code-specific-to-jh057n-closer.patch new file mode 100644 index 000000000..fcdf0482d --- /dev/null +++ b/0007-drm-panel-st7703-Move-code-specific-to-jh057n-closer.patch @@ -0,0 +1,84 @@ +From b93e129534a0556a03a343f95e622ae9c3893854 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:55:55 +0200 +Subject: [PATCH 07/13] drm/panel: st7703: Move code specific to jh057n closer + together + +It's better than having it spread around the driver. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + drivers/gpu/drm/panel/panel-sitronix-st7703.c | 50 +++++++++---------- + 1 file changed, 25 insertions(+), 25 deletions(-) + +diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +index 08cbc316266c1..d03aab10cfef1 100644 +--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c ++++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +@@ -153,6 +153,31 @@ static int jh057n_init_sequence(struct st7703 *ctx) + return 0; + } + ++static const struct drm_display_mode jh057n00900_mode = { ++ .hdisplay = 720, ++ .hsync_start = 720 + 90, ++ .hsync_end = 720 + 90 + 20, ++ .htotal = 720 + 90 + 20 + 20, ++ .vdisplay = 1440, ++ .vsync_start = 1440 + 20, ++ .vsync_end = 1440 + 20 + 4, ++ .vtotal = 1440 + 20 + 4 + 12, ++ .vrefresh = 60, ++ .clock = 75276, ++ .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, ++ .width_mm = 65, ++ .height_mm = 130, ++}; ++ ++struct st7703_panel_desc jh057n00900_panel_desc = { ++ .mode = &jh057n00900_mode, ++ .lanes = 4, ++ .mode_flags = MIPI_DSI_MODE_VIDEO | ++ MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE, ++ .format = MIPI_DSI_FMT_RGB888, ++ .init_sequence = jh057n_init_sequence, ++}; ++ + static int st7703_enable(struct drm_panel *panel) + { + struct st7703 *ctx = panel_to_st7703(panel); +@@ -226,31 +251,6 @@ static int st7703_prepare(struct drm_panel *panel) + return ret; + } + +-static const struct drm_display_mode jh057n00900_mode = { +- .hdisplay = 720, +- .hsync_start = 720 + 90, +- .hsync_end = 720 + 90 + 20, +- .htotal = 720 + 90 + 20 + 20, +- .vdisplay = 1440, +- .vsync_start = 1440 + 20, +- .vsync_end = 1440 + 20 + 4, +- .vtotal = 1440 + 20 + 4 + 12, +- .vrefresh = 60, +- .clock = 75276, +- .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, +- .width_mm = 65, +- .height_mm = 130, +-}; +- +-struct st7703_panel_desc jh057n00900_panel_desc = { +- .mode = &jh057n00900_mode, +- .lanes = 4, +- .mode_flags = MIPI_DSI_MODE_VIDEO | +- MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE, +- .format = MIPI_DSI_FMT_RGB888, +- .init_sequence = jh057n_init_sequence, +-}; +- + static int st7703_get_modes(struct drm_panel *panel, + struct drm_connector *connector) + { +-- +2.26.2 + diff --git a/0008-drm-panel-st7703-Move-generic-part-of-init-sequence-.patch b/0008-drm-panel-st7703-Move-generic-part-of-init-sequence-.patch new file mode 100644 index 000000000..bae442451 --- /dev/null +++ b/0008-drm-panel-st7703-Move-generic-part-of-init-sequence-.patch @@ -0,0 +1,84 @@ +From 5e9a6f49f8056963a4b8d2408f0c0f211cdab799 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:55:56 +0200 +Subject: [PATCH 08/13] drm/panel: st7703: Move generic part of init sequence + to enable callback + +Calling sleep out and display on is a controller specific part +of the initialization process. Move it out of the panel specific +initialization function to the enable callback. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + drivers/gpu/drm/panel/panel-sitronix-st7703.c | 33 ++++++++++--------- + 1 file changed, 18 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +index d03aab10cfef1..cdbf7dfb4dd48 100644 +--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c ++++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +@@ -84,8 +84,6 @@ static inline struct st7703 *panel_to_st7703(struct drm_panel *panel) + static int jh057n_init_sequence(struct st7703 *ctx) + { + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); +- struct device *dev = ctx->dev; +- int ret; + + /* + * Init sequence was supplied by the panel vendor. Most of the commands +@@ -136,20 +134,7 @@ static int jh057n_init_sequence(struct st7703 *ctx) + 0x18, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, + 0x37, 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, + 0x11, 0x18); +- msleep(20); +- +- ret = mipi_dsi_dcs_exit_sleep_mode(dsi); +- if (ret < 0) { +- DRM_DEV_ERROR(dev, "Failed to exit sleep mode: %d\n", ret); +- return ret; +- } +- /* Panel is operational 120 msec after reset */ +- msleep(60); +- ret = mipi_dsi_dcs_set_display_on(dsi); +- if (ret) +- return ret; + +- DRM_DEV_DEBUG_DRIVER(dev, "Panel init sequence done\n"); + return 0; + } + +@@ -181,6 +166,7 @@ struct st7703_panel_desc jh057n00900_panel_desc = { + static int st7703_enable(struct drm_panel *panel) + { + struct st7703 *ctx = panel_to_st7703(panel); ++ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); + int ret; + + ret = ctx->desc->init_sequence(ctx); +@@ -190,6 +176,23 @@ static int st7703_enable(struct drm_panel *panel) + return ret; + } + ++ msleep(20); ++ ++ ret = mipi_dsi_dcs_exit_sleep_mode(dsi); ++ if (ret < 0) { ++ DRM_DEV_ERROR(ctx->dev, "Failed to exit sleep mode: %d\n", ret); ++ return ret; ++ } ++ ++ /* Panel is operational 120 msec after reset */ ++ msleep(60); ++ ++ ret = mipi_dsi_dcs_set_display_on(dsi); ++ if (ret) ++ return ret; ++ ++ DRM_DEV_DEBUG_DRIVER(ctx->dev, "Panel init sequence done\n"); ++ + return 0; + } + +-- +2.26.2 + diff --git a/0009-drm-panel-st7703-Add-support-for-Xingbangda-XBD599.patch b/0009-drm-panel-st7703-Add-support-for-Xingbangda-XBD599.patch new file mode 100644 index 000000000..5ac4e6ee8 --- /dev/null +++ b/0009-drm-panel-st7703-Add-support-for-Xingbangda-XBD599.patch @@ -0,0 +1,251 @@ +From d2fb5b980f071d542ca912dac5a0e27c49de7e2d Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:55:57 +0200 +Subject: [PATCH 09/13] drm/panel: st7703: Add support for Xingbangda XBD599 + +Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel used in +PinePhone. Add support for it. + +Signed-off-by: Icenowy Zheng <icenowy@aosc.io> +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + drivers/gpu/drm/panel/panel-sitronix-st7703.c | 199 +++++++++++++++++- + 1 file changed, 197 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +index cdbf7dfb4dd48..33611419059a9 100644 +--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c ++++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +@@ -39,10 +39,11 @@ + #define ST7703_CMD_SETEXTC 0xB9 + #define ST7703_CMD_SETMIPI 0xBA + #define ST7703_CMD_SETVDC 0xBC +-#define ST7703_CMD_UNKNOWN0 0xBF ++#define ST7703_CMD_UNKNOWN_BF 0xBF + #define ST7703_CMD_SETSCR 0xC0 + #define ST7703_CMD_SETPOWER 0xC1 + #define ST7703_CMD_SETPANEL 0xCC ++#define ST7703_CMD_UNKNOWN_C6 0xC6 + #define ST7703_CMD_SETGAMMA 0xE0 + #define ST7703_CMD_SETEQ 0xE3 + #define ST7703_CMD_SETGIP1 0xE9 +@@ -109,7 +110,7 @@ static int jh057n_init_sequence(struct st7703 *ctx) + msleep(20); + + dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F); +- dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN0, 0x02, 0x11, 0x00); ++ dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00); + dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1, + 0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12, + 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38, +@@ -163,6 +164,199 @@ struct st7703_panel_desc jh057n00900_panel_desc = { + .init_sequence = jh057n_init_sequence, + }; + ++#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \ ++ static const u8 d[] = { seq }; \ ++ int ret; \ ++ ret = mipi_dsi_dcs_write(dsi, cmd, d, ARRAY_SIZE(d)); \ ++ if (ret < 0) \ ++ return ret; \ ++ } while (0) ++ ++ ++static int xbd599_init_sequence(struct st7703 *ctx) ++{ ++ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); ++ ++ /* ++ * Init sequence was supplied by the panel vendor. ++ */ ++ ++ /* Magic sequence to unlock user commands below. */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83); ++ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, ++ 0x33, /* VC_main = 0, Lane_Number = 3 (4 lanes) */ ++ 0x81, /* DSI_LDO_SEL = 1.7V, RTERM = 90 Ohm */ ++ 0x05, /* IHSRX = x6 (Low High Speed driving ability) */ ++ 0xF9, /* TX_CLK_SEL = fDSICLK/16 */ ++ 0x0E, /* HFP_OSC (min. HFP number in DSI mode) */ ++ 0x0E, /* HBP_OSC (min. HBP number in DSI mode) */ ++ /* The rest is undocumented in ST7703 datasheet */ ++ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, ++ 0x4F, 0x11, 0x00, 0x00, 0x37); ++ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, ++ 0x25, /* PCCS = 2, ECP_DC_DIV = 1/4 HSYNC */ ++ 0x22, /* DT = 15ms XDK_ECP = x2 */ ++ 0x20, /* PFM_DC_DIV = /1 */ ++ 0x03 /* ECP_SYNC_EN = 1, VGX_SYNC_EN = 1 */); ++ ++ /* RGB I/F porch timing */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, ++ 0x10, /* VBP_RGB_GEN */ ++ 0x10, /* VFP_RGB_GEN */ ++ 0x05, /* DE_BP_RGB_GEN */ ++ 0x05, /* DE_FP_RGB_GEN */ ++ /* The rest is undocumented in ST7703 datasheet */ ++ 0x03, 0xFF, ++ 0x00, 0x00, ++ 0x00, 0x00); ++ ++ /* Source driving settings. */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, ++ 0x73, /* N_POPON */ ++ 0x73, /* N_NOPON */ ++ 0x50, /* I_POPON */ ++ 0x50, /* I_NOPON */ ++ 0x00, /* SCR[31,24] */ ++ 0xC0, /* SCR[23,16] */ ++ 0x08, /* SCR[15,8] */ ++ 0x70, /* SCR[7,0] */ ++ 0x00 /* Undocumented */); ++ ++ /* NVDDD_SEL = -1.8V, VDDD_SEL = out of range (possibly 1.9V?) */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E); ++ ++ /* ++ * SS_PANEL = 1 (reverse scan), GS_PANEL = 0 (normal scan) ++ * REV_PANEL = 1 (normally black panel), BGR_PANEL = 1 (BGR) ++ */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B); ++ ++ /* Zig-Zag Type C column inversion. */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); ++ ++ /* Set display resolution. */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, ++ 0xF0, /* NL = 240 */ ++ 0x12, /* RES_V_LSB = 0, BLK_CON = VSSD, ++ * RESO_SEL = 720RGB ++ */ ++ 0xF0 /* WHITE_GND_EN = 1 (GND), ++ * WHITE_FRAME_SEL = 7 frames, ++ * ISC = 0 frames ++ */); ++ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, ++ 0x00, /* PNOEQ */ ++ 0x00, /* NNOEQ */ ++ 0x0B, /* PEQGND */ ++ 0x0B, /* NEQGND */ ++ 0x10, /* PEQVCI */ ++ 0x10, /* NEQVCI */ ++ 0x00, /* PEQVCI1 */ ++ 0x00, /* NEQVCI1 */ ++ 0x00, /* reserved */ ++ 0x00, /* reserved */ ++ 0xFF, /* reserved */ ++ 0x00, /* reserved */ ++ 0xC0, /* ESD_DET_DATA_WHITE = 1, ESD_WHITE_EN = 1 */ ++ 0x10 /* SLPIN_OPTION = 1 (no need vsync after sleep-in) ++ * VEDIO_NO_CHECK_EN = 0 ++ * ESD_WHITE_GND_EN = 0 ++ * ESD_DET_TIME_SEL = 0 frames ++ */); ++ ++ /* Undocumented command. */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00); ++ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, ++ 0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */ ++ 0x00, /* FBOFF_VGH = 0, FBOFF_VGL = 0 */ ++ 0x32, /* VRP */ ++ 0x32, /* VRN */ ++ 0x77, /* reserved */ ++ 0xF1, /* APS = 1 (small), ++ * VGL_DET_EN = 1, VGH_DET_EN = 1, ++ * VGL_TURBO = 1, VGH_TURBO = 1 ++ */ ++ 0xFF, /* VGH1_L_DIV, VGL1_L_DIV (1.5MHz) */ ++ 0xFF, /* VGH1_R_DIV, VGL1_R_DIV (1.5MHz) */ ++ 0xCC, /* VGH2_L_DIV, VGL2_L_DIV (2.6MHz) */ ++ 0xCC, /* VGH2_R_DIV, VGL2_R_DIV (2.6MHz) */ ++ 0x77, /* VGH3_L_DIV, VGL3_L_DIV (4.5MHz) */ ++ 0x77 /* VGH3_R_DIV, VGL3_R_DIV (4.5MHz) */); ++ ++ /* Reference voltage. */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, ++ 0x07, /* VREF_SEL = 4.2V */ ++ 0x07 /* NVREF_SEL = 4.2V */); ++ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, ++ 0x2C, /* VCOMDC_F = -0.67V */ ++ 0x2C /* VCOMDC_B = -0.67V */); ++ ++ /* Undocumented command. */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00); ++ ++ /* This command is to set forward GIP timing. */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, ++ 0x82, 0x10, 0x06, 0x05, 0xA2, 0x0A, 0xA5, 0x12, ++ 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38, ++ 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00, ++ 0x03, 0x00, 0x00, 0x00, 0x75, 0x75, 0x31, 0x88, ++ 0x88, 0x88, 0x88, 0x88, 0x88, 0x13, 0x88, 0x64, ++ 0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, ++ 0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); ++ ++ /* This command is to set backward GIP timing. */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, ++ 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88, ++ 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13, ++ 0x57, 0x13, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, ++ 0x75, 0x88, 0x23, 0x14, 0x00, 0x00, 0x02, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x0A, ++ 0xA5, 0x00, 0x00, 0x00, 0x00); ++ ++ /* Adjust the gamma characteristics of the panel. */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, ++ 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, 0x35, ++ 0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, 0x12, ++ 0x18, 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, ++ 0x35, 0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, ++ 0x12, 0x18); ++ ++ return 0; ++} ++ ++static const struct drm_display_mode xbd599_mode = { ++ .hdisplay = 720, ++ .hsync_start = 720 + 40, ++ .hsync_end = 720 + 40 + 40, ++ .htotal = 720 + 40 + 40 + 40, ++ .vdisplay = 1440, ++ .vsync_start = 1440 + 18, ++ .vsync_end = 1440 + 18 + 10, ++ .vtotal = 1440 + 18 + 10 + 17, ++ .vrefresh = 60, ++ .clock = 69000, ++ .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, ++ .width_mm = 68, ++ .height_mm = 136, ++}; ++ ++static const struct st7703_panel_desc xbd599_desc = { ++ .mode = &xbd599_mode, ++ .lanes = 4, ++ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE, ++ .format = MIPI_DSI_FMT_RGB888, ++ .init_sequence = xbd599_init_sequence, ++}; ++ + static int st7703_enable(struct drm_panel *panel) + { + struct st7703 *ctx = panel_to_st7703(panel); +@@ -428,6 +622,7 @@ static int st7703_remove(struct mipi_dsi_device *dsi) + + static const struct of_device_id st7703_of_match[] = { + { .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc }, ++ { .compatible = "xingbangda,xbd599", .data = &xbd599_desc }, + { /* sentinel */ } + }; + MODULE_DEVICE_TABLE(of, st7703_of_match); +-- +2.26.2 + diff --git a/0010-drm-panel-st7703-Enter-sleep-after-display-off.patch b/0010-drm-panel-st7703-Enter-sleep-after-display-off.patch new file mode 100644 index 000000000..867962865 --- /dev/null +++ b/0010-drm-panel-st7703-Enter-sleep-after-display-off.patch @@ -0,0 +1,41 @@ +From 7c9c58114d277e570f667ac670ef28725e51814e Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:55:58 +0200 +Subject: [PATCH 10/13] drm/panel: st7703: Enter sleep after display off + +The datasheet suggests to issue sleep in after display off +as a part of the panel's shutdown sequence. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + drivers/gpu/drm/panel/panel-sitronix-st7703.c | 13 ++++++++++++- + 1 file changed, 12 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +index 33611419059a9..e771281eb5472 100644 +--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c ++++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +@@ -394,8 +394,19 @@ static int st7703_disable(struct drm_panel *panel) + { + struct st7703 *ctx = panel_to_st7703(panel); + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); ++ int ret; ++ ++ ret = mipi_dsi_dcs_set_display_off(dsi); ++ if (ret < 0) ++ DRM_DEV_ERROR(ctx->dev, ++ "Failed to turn off the display: %d\n", ret); + +- return mipi_dsi_dcs_set_display_off(dsi); ++ ret = mipi_dsi_dcs_enter_sleep_mode(dsi); ++ if (ret < 0) ++ DRM_DEV_ERROR(ctx->dev, ++ "Failed to enter sleep mode: %d\n", ret); ++ ++ return 0; + } + + static int st7703_unprepare(struct drm_panel *panel) +-- +2.26.2 + diff --git a/0011-drm-panel-st7703-Assert-reset-prior-to-powering-down.patch b/0011-drm-panel-st7703-Assert-reset-prior-to-powering-down.patch new file mode 100644 index 000000000..f5871906c --- /dev/null +++ b/0011-drm-panel-st7703-Assert-reset-prior-to-powering-down.patch @@ -0,0 +1,29 @@ +From f290f11b42df0d9d42679b93bb6a488f9e12e00d Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:55:59 +0200 +Subject: [PATCH 11/13] drm/panel: st7703: Assert reset prior to powering down + the regulators + +The reset pin is inverted, so if we don't assert reset, the actual gpio +will be high and may keep driving the IO port of the panel. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + drivers/gpu/drm/panel/panel-sitronix-st7703.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +index e771281eb5472..92930e1275592 100644 +--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c ++++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c +@@ -416,6 +416,7 @@ static int st7703_unprepare(struct drm_panel *panel) + if (!ctx->prepared) + return 0; + ++ gpiod_set_value_cansleep(ctx->reset_gpio, 1); + regulator_disable(ctx->iovcc); + regulator_disable(ctx->vcc); + ctx->prepared = false; +-- +2.26.2 + diff --git a/0012-arm64-dts-sun50i-a64-pinephone-Enable-LCD-support-on.patch b/0012-arm64-dts-sun50i-a64-pinephone-Enable-LCD-support-on.patch new file mode 100644 index 000000000..0c8ca994e --- /dev/null +++ b/0012-arm64-dts-sun50i-a64-pinephone-Enable-LCD-support-on.patch @@ -0,0 +1,112 @@ +From 3ac5eb0c8bc2da9e81e04fc6106a79b476ec9219 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng <icenowy@aosc.io> +Date: Fri, 26 Jun 2020 02:56:00 +0200 +Subject: [PATCH 12/13] arm64: dts: sun50i-a64-pinephone: Enable LCD support on + PinePhone + +PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for +display. + +Backlight levels curve was optimized by Martijn Braam using a +lux meter. + +Add its device nodes. + +Signed-off-by: Icenowy Zheng <icenowy@aosc.io> +Signed-off-by: Martijn Braam <martijn@brixit.nl> +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + .../allwinner/sun50i-a64-pinephone-1.1.dts | 19 ++++++++++ + .../dts/allwinner/sun50i-a64-pinephone.dtsi | 35 +++++++++++++++++++ + 2 files changed, 54 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts +index 06a775c41664b..3e99a87e9ce52 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts +@@ -9,3 +9,22 @@ / { + model = "Pine64 PinePhone Braveheart (1.1)"; + compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64"; + }; ++ ++&backlight { ++ power-supply = <®_ldo_io0>; ++ /* ++ * PWM backlight circuit on this PinePhone revision was changed since ++ * 1.0, and the lowest PWM duty cycle that doesn't lead to backlight ++ * being off is around 20%. Duty cycle for the lowest brightness level ++ * also varries quite a bit between individual boards, so the lowest ++ * value here was chosen as a safe default. ++ */ ++ brightness-levels = < ++ 774 793 814 842 ++ 882 935 1003 1088 ++ 1192 1316 1462 1633 ++ 1830 2054 2309 2596 ++ 2916 3271 3664 4096>; ++ num-interpolated-steps = <50>; ++ default-brightness-level = <400>; ++}; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +index cefda145c3c9d..85a7aa5efd326 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +@@ -16,6 +16,13 @@ aliases { + serial0 = &uart0; + }; + ++ backlight: backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>; ++ enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ ++ /* Backlight configuration differs per PinePhone revision. */ ++ }; ++ + chosen { + stdout-path = "serial0:115200n8"; + }; +@@ -84,6 +91,30 @@ &dai { + status = "okay"; + }; + ++&de { ++ status = "okay"; ++}; ++ ++&dphy { ++ status = "okay"; ++}; ++ ++&dsi { ++ vcc-dsi-supply = <®_dldo1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ panel@0 { ++ compatible = "xingbangda,xbd599"; ++ reg = <0>; ++ reset-gpios = <&pio 3 23 GPIO_ACTIVE_LOW>; /* PD23 */ ++ iovcc-supply = <®_dldo2>; ++ vcc-supply = <®_ldo_io0>; ++ backlight = <&backlight>; ++ }; ++}; ++ + &ehci0 { + status = "okay"; + }; +@@ -188,6 +219,10 @@ &r_pio { + */ + }; + ++&r_pwm { ++ status = "okay"; ++}; ++ + &r_rsb { + status = "okay"; + +-- +2.26.2 + diff --git a/0013-arm64-dts-sun50i-a64-pinephone-Add-touchscreen-suppo.patch b/0013-arm64-dts-sun50i-a64-pinephone-Add-touchscreen-suppo.patch new file mode 100644 index 000000000..211eb2797 --- /dev/null +++ b/0013-arm64-dts-sun50i-a64-pinephone-Add-touchscreen-suppo.patch @@ -0,0 +1,47 @@ +From 786358ed986e4788b992d98e1d3b198a4e01a9d5 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman <megous@megous.com> +Date: Fri, 26 Jun 2020 02:56:01 +0200 +Subject: [PATCH 13/13] arm64: dts: sun50i-a64-pinephone: Add touchscreen + support + +Pinephone has a Goodix GT917S capacitive touchscreen controller on +I2C0 bus. Add support for it. + +Signed-off-by: Ondrej Jirman <megous@megous.com> +--- + .../dts/allwinner/sun50i-a64-pinephone.dtsi | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +index 85a7aa5efd326..2d5694446d176 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +@@ -123,6 +123,25 @@ &ehci1 { + status = "okay"; + }; + ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ status = "okay"; ++ ++ touchscreen@5d { ++ compatible = "goodix,gt917s", "goodix,gt911"; ++ reg = <0x5d>; ++ interrupt-parent = <&pio>; ++ interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ ++ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ ++ AVDD28-supply = <®_ldo_io0>; ++ VDDIO-supply = <®_ldo_io0>; ++ touchscreen-size-x = <720>; ++ touchscreen-size-y = <1440>; ++ }; ++}; ++ + &i2c1 { + status = "okay"; + +-- +2.26.2 + |