Merge remote-tracking branch 'origin/master' into rawhide-user-thl-vanilla-fedorakernel-5.6.0-0.rc7.git1.1.vanilla.knurd.1.fc31

5 files changed, 471 insertions, 138 deletions

diff --git a/USB-pci-quirks-Add-Raspberry-Pi-4-quirk.patch b/USB-pci-quirks-Add-Raspberry-Pi-4-quirk.patch
index 894a56a14..fb7c1afaf 100644
--- a/USB-pci-quirks-Add-Raspberry-Pi-4-quirk.patch
+++ b/USB-pci-quirks-Add-Raspberry-Pi-4-quirk.patch
@@ -1,27 +1,27 @@
-From patchwork Tue Mar 10 12:52:39 2020
+From patchwork Tue Mar 24 18:28:09 2020
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 MIME-Version: 1.0
 Content-Transfer-Encoding: 7bit
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+X-Patchwork-Id: 11456187
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 From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
 To: linux-kernel@vger.kernel.org, Florian Fainelli <f.fainelli@gmail.com>,
  Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>,
  bcm-kernel-feedback-list@broadcom.com,
  Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Subject: [PATCH v5 1/4] soc: bcm2835: Sync xHCI reset firmware property with
+Subject: [PATCH v6 1/4] soc: bcm2835: Sync xHCI reset firmware property with
  downstream
-Date: Tue, 10 Mar 2020 13:52:39 +0100
-Message-Id: <20200310125243.25805-2-nsaenzjulienne@suse.de>
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+In-Reply-To: <20200324182812.20420-1-nsaenzjulienne@suse.de>
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-X-CRM114-Status: GOOD (  13.79  )
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  pts rule name              description
  ---- ----------------------
  --------------------------------------------------
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- medium trust [195.135.220.15 listed in list.dnswl.org]
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  [195.135.220.15 listed in wl.mailspike.net]
- 0.0 SPF_HELO_NONE          SPF: HELO does not publish an SPF Record
+ -2.3 RCVD_IN_DNSWL_MED      RBL: Sender listed at https://www.dnswl.org/,
+ medium trust [195.135.220.15 listed in list.dnswl.org]
  -0.0 SPF_PASS               SPF: sender matches SPF record
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@@ -123,30 +123,30 @@ index 7800e12ee042..cc9cdbc66403 100644
  	/* Dispmanx TAGS */
  	RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE =                   0x00040001,
 
-From patchwork Tue Mar 10 12:52:40 2020
+From patchwork Tue Mar 24 18:28:10 2020
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 From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-To: linux-kernel@vger.kernel.org, Florian Fainelli <f.fainelli@gmail.com>,
- Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>,
- bcm-kernel-feedback-list@broadcom.com,
- Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Subject: [PATCH v5 2/4] firmware: raspberrypi: Introduce vl805 init routine
-Date: Tue, 10 Mar 2020 13:52:40 +0100
-Message-Id: <20200310125243.25805-3-nsaenzjulienne@suse.de>
+To: linux-kernel@vger.kernel.org,
+ Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
+ Florian Fainelli <f.fainelli@gmail.com>, Ray Jui <rjui@broadcom.com>,
+ Scott Branden <sbranden@broadcom.com>,
+ bcm-kernel-feedback-list@broadcom.com
+Subject: [PATCH v6 2/4] firmware: raspberrypi: Introduce vl805 init routine
+Date: Tue, 24 Mar 2020 19:28:10 +0100
+Message-Id: <20200324182812.20420-3-nsaenzjulienne@suse.de>
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  pts rule name              description
  ---- ----------------------
  --------------------------------------------------
- -2.3 RCVD_IN_DNSWL_MED      RBL: Sender listed at https://www.dnswl.org/,
- medium trust [195.135.220.15 listed in list.dnswl.org]
  0.0 RCVD_IN_MSPIKE_H3      RBL: Good reputation (+3)
  [195.135.220.15 listed in wl.mailspike.net]
- 0.0 SPF_HELO_NONE          SPF: HELO does not publish an SPF Record
+ -2.3 RCVD_IN_DNSWL_MED      RBL: Sender listed at https://www.dnswl.org/,
+ medium trust [195.135.220.15 listed in list.dnswl.org]
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@@ -233,7 +234,6 @@ Based on Tim Gover's downstream implementation.
 Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
 ---
-
 Changes since v4:
  - Inline function definition when RASPBERRYPI_FIRMWARE is not defined
 
@@ -333,30 +333,30 @@ index cc9cdbc66403..3025aca3c358 100644
  
  #endif /* __SOC_RASPBERRY_FIRMWARE_H__ */
 
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 From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-To: linux-kernel@vger.kernel.org, Florian Fainelli <f.fainelli@gmail.com>,
- bcm-kernel-feedback-list@broadcom.com,
+To: linux-kernel@vger.kernel.org,
  Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
+ Florian Fainelli <f.fainelli@gmail.com>,
+ bcm-kernel-feedback-list@broadcom.com,
  Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
  Andrew Murray <amurray@thegoodpenguin.co.uk>
-Subject: [PATCH v5 3/4] PCI: brcmstb: Wait for Raspberry Pi's firmware when
+Subject: [PATCH v6 3/4] PCI: brcmstb: Wait for Raspberry Pi's firmware when
  present
-Date: Tue, 10 Mar 2020 13:52:41 +0100
-Message-Id: <20200310125243.25805-4-nsaenzjulienne@suse.de>
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@@ -444,10 +445,6 @@ starting.
 Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
 ---
-
-Changes since v4:
- - Fixed typo in commit description
-
  drivers/pci/controller/pcie-brcmstb.c | 15 +++++++++++++++
  1 file changed, 15 insertions(+)
 
@@ -490,30 +487,30 @@ index 3a10e678c7f4..a3d3070a5832 100644
  	if (!bridge)
  		return -ENOMEM;
 
-From patchwork Tue Mar 10 12:52:42 2020
+From patchwork Tue Mar 24 18:28:12 2020
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-X-Patchwork-Id: 11429259
+X-Patchwork-Id: 11456185
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 From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
 To: linux-kernel@vger.kernel.org,
 	Mathias Nyman <mathias.nyman@intel.com>
-Subject: [PATCH v5 4/4] USB: pci-quirks: Add Raspberry Pi 4 quirk
-Date: Tue, 10 Mar 2020 13:52:42 +0100
-Message-Id: <20200310125243.25805-5-nsaenzjulienne@suse.de>
+Subject: [PATCH v6 4/4] USB: pci-quirks: Add Raspberry Pi 4 quirk
+Date: Tue, 24 Mar 2020 19:28:12 +0100
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-X-CRM114-Status: GOOD (  14.95  )
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- medium trust [195.135.220.15 listed in list.dnswl.org]
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@@ -594,12 +591,16 @@ On the Raspberry Pi 4, after a PCI reset, VL805's firmware may either be
 loaded directly from an EEPROM or, if not present, by the SoC's
 VideCore. Inform VideCore that VL805 was just reset.
 
-Also, as this creates a dependency between XHCI_PCI and VideoCore's
-firmware interface, reflect that on the firmware interface Kconfg.
+Also, as this creates a dependency between USB_PCI and VideoCore's
+firmware interface. Since USB_PCI can't be set as a module neither this
+should.
 
 Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
 ---
 
+Changes since v5:
+ - Fix Kconfig issue with allmodconfig
+
 Changes since v4:
  - Do not split up error message
 
@@ -610,19 +611,22 @@ Changes since v1:
  - Make RASPBERRYPI_FIRMWARE dependent on this quirk to make sure it
    gets compiled when needed.
 
- drivers/firmware/Kconfig      |  1 +
+ drivers/firmware/Kconfig      |  3 ++-
  drivers/usb/host/pci-quirks.c | 16 ++++++++++++++++
- 2 files changed, 17 insertions(+)
+ 2 files changed, 18 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
-index ea869addc89b..40a468d712a5 100644
+index ea869addc89b..78ab2ad6d3f0 100644
 --- a/drivers/firmware/Kconfig
 +++ b/drivers/firmware/Kconfig
-@@ -180,6 +180,7 @@ config ISCSI_IBFT
+@@ -178,8 +178,9 @@ config ISCSI_IBFT
+ 	  Otherwise, say N.
+ 
  config RASPBERRYPI_FIRMWARE
- 	tristate "Raspberry Pi Firmware Driver"
+-	tristate "Raspberry Pi Firmware Driver"
++	bool "Raspberry Pi Firmware Driver"
  	depends on BCM2835_MBOX
-+	default XHCI_PCI
++	default USB_PCI
  	help
  	  This option enables support for communicating with the firmware on the
  	  Raspberry Pi.
diff --git a/arm64-drm-tegra-Fix-SMMU-support-on-Tegra124-and-Tegra210.patch b/arm64-drm-tegra-Fix-SMMU-support-on-Tegra124-and-Tegra210.patch
new file mode 100644
index 000000000..3d43cd710
--- /dev/null
+++ b/arm64-drm-tegra-Fix-SMMU-support-on-Tegra124-and-Tegra210.patch
@@ -0,0 +1,320 @@
+From patchwork Wed Mar 25 20:16:03 2020
+Content-Type: text/plain; charset="utf-8"
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+X-Patchwork-Id: 1261638
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+From: Thierry Reding <thierry.reding@gmail.com>
+To: Thierry Reding <thierry.reding@gmail.com>
+Cc: dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org
+Subject: [PATCH 1/2] drm/tegra: Fix SMMU support on Tegra124 and Tegra210
+Date: Wed, 25 Mar 2020 21:16:03 +0100
+Message-Id: <20200325201604.833898-1-thierry.reding@gmail.com>
+X-Mailer: git-send-email 2.24.1
+MIME-Version: 1.0
+Sender: linux-tegra-owner@vger.kernel.org
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+List-ID: <linux-tegra.vger.kernel.org>
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+
+From: Thierry Reding <treding@nvidia.com>
+
+When testing whether or not to enable the use of the SMMU, consult the
+supported DMA mask rather than the actually configured DMA mask, since
+the latter might already have been restricted.
+
+Fixes: 2d9384ff9177 ("drm/tegra: Relax IOMMU usage criteria on old Tegra")
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+Tested-by: Jon Hunter <jonathanh@nvidia.com>
+---
+ drivers/gpu/drm/tegra/drm.c |  3 ++-
+ drivers/gpu/host1x/dev.c    | 13 +++++++++++++
+ include/linux/host1x.h      |  3 +++
+ 3 files changed, 18 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
+index bd268028fb3d..583cd6e0ae27 100644
+--- a/drivers/gpu/drm/tegra/drm.c
++++ b/drivers/gpu/drm/tegra/drm.c
+@@ -1039,6 +1039,7 @@ void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
+ 
+ static bool host1x_drm_wants_iommu(struct host1x_device *dev)
+ {
++	struct host1x *host1x = dev_get_drvdata(dev->dev.parent);
+ 	struct iommu_domain *domain;
+ 
+ 	/*
+@@ -1076,7 +1077,7 @@ static bool host1x_drm_wants_iommu(struct host1x_device *dev)
+ 	 * sufficient and whether or not the host1x is attached to an IOMMU
+ 	 * doesn't matter.
+ 	 */
+-	if (!domain && dma_get_mask(dev->dev.parent) <= DMA_BIT_MASK(32))
++	if (!domain && host1x_get_dma_mask(host1x) <= DMA_BIT_MASK(32))
+ 		return true;
+ 
+ 	return domain != NULL;
+diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
+index 388bcc2889aa..40a4b9f8b861 100644
+--- a/drivers/gpu/host1x/dev.c
++++ b/drivers/gpu/host1x/dev.c
+@@ -502,6 +502,19 @@ static void __exit tegra_host1x_exit(void)
+ }
+ module_exit(tegra_host1x_exit);
+ 
++/**
++ * host1x_get_dma_mask() - query the supported DMA mask for host1x
++ * @host1x: host1x instance
++ *
++ * Note that this returns the supported DMA mask for host1x, which can be
++ * different from the applicable DMA mask under certain circumstances.
++ */
++u64 host1x_get_dma_mask(struct host1x *host1x)
++{
++	return host1x->info->dma_mask;
++}
++EXPORT_SYMBOL(host1x_get_dma_mask);
++
+ MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
+ MODULE_AUTHOR("Terje Bergstrom <tbergstrom@nvidia.com>");
+ MODULE_DESCRIPTION("Host1x driver for Tegra products");
+diff --git a/include/linux/host1x.h b/include/linux/host1x.h
+index 62d216ff1097..c230b4e70d75 100644
+--- a/include/linux/host1x.h
++++ b/include/linux/host1x.h
+@@ -17,9 +17,12 @@ enum host1x_class {
+ 	HOST1X_CLASS_GR3D = 0x60,
+ };
+ 
++struct host1x;
+ struct host1x_client;
+ struct iommu_group;
+ 
++u64 host1x_get_dma_mask(struct host1x *host1x);
++
+ /**
+  * struct host1x_client_ops - host1x client operations
+  * @init: host1x client initialization code
+
+From patchwork Wed Mar 25 20:16:04 2020
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+From: Thierry Reding <thierry.reding@gmail.com>
+To: Thierry Reding <thierry.reding@gmail.com>
+Cc: dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org
+Subject: [PATCH 2/2] gpu: host1x: Use SMMU on Tegra124 and Tegra210
+Date: Wed, 25 Mar 2020 21:16:04 +0100
+Message-Id: <20200325201604.833898-2-thierry.reding@gmail.com>
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+
+From: Thierry Reding <treding@nvidia.com>
+
+Tegra124 and Tegra210 support addressing more than 32 bits of physical
+memory. However, since their host1x does not support the wide GATHER
+opcode, they should use the SMMU if at all possible to ensure that all
+the system memory can be used for command buffers, irrespective of
+whether or not the host1x firewall is enabled.
+
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+Tested-by: Jon Hunter <jonathanh@nvidia.com>
+---
+ drivers/gpu/host1x/dev.c | 46 ++++++++++++++++++++++++++++++++++++----
+ 1 file changed, 42 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
+index 40a4b9f8b861..d24344e91922 100644
+--- a/drivers/gpu/host1x/dev.c
++++ b/drivers/gpu/host1x/dev.c
+@@ -192,17 +192,55 @@ static void host1x_setup_sid_table(struct host1x *host)
+ 	}
+ }
+ 
++static bool host1x_wants_iommu(struct host1x *host1x)
++{
++	/*
++	 * If we support addressing a maximum of 32 bits of physical memory
++	 * and if the host1x firewall is enabled, there's no need to enable
++	 * IOMMU support. This can happen for example on Tegra20, Tegra30
++	 * and Tegra114.
++	 *
++	 * Tegra124 and later can address up to 34 bits of physical memory and
++	 * many platforms come equipped with more than 2 GiB of system memory,
++	 * which requires crossing the 4 GiB boundary. But there's a catch: on
++	 * SoCs before Tegra186 (i.e. Tegra124 and Tegra210), the host1x can
++	 * only address up to 32 bits of memory in GATHER opcodes, which means
++	 * that command buffers need to either be in the first 2 GiB of system
++	 * memory (which could quickly lead to memory exhaustion), or command
++	 * buffers need to be treated differently from other buffers (which is
++	 * not possible with the current ABI).
++	 *
++	 * A third option is to use the IOMMU in these cases to make sure all
++	 * buffers will be mapped into a 32-bit IOVA space that host1x can
++	 * address. This allows all of the system memory to be used and works
++	 * within the limitations of the host1x on these SoCs.
++	 *
++	 * In summary, default to enable IOMMU on Tegra124 and later. For any
++	 * of the earlier SoCs, only use the IOMMU for additional safety when
++	 * the host1x firewall is disabled.
++	 */
++	if (host1x->info->dma_mask <= DMA_BIT_MASK(32)) {
++		if (IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL))
++			return false;
++	}
++
++	return true;
++}
++
+ static struct iommu_domain *host1x_iommu_attach(struct host1x *host)
+ {
+ 	struct iommu_domain *domain = iommu_get_domain_for_dev(host->dev);
+ 	int err;
+ 
+ 	/*
+-	 * If the host1x firewall is enabled, there's no need to enable IOMMU
+-	 * support. Similarly, if host1x is already attached to an IOMMU (via
+-	 * the DMA API), don't try to attach again.
++	 * We may not always want to enable IOMMU support (for example if the
++	 * host1x firewall is already enabled and we don't support addressing
++	 * more than 32 bits of physical memory), so check for that first.
++	 *
++	 * Similarly, if host1x is already attached to an IOMMU (via the DMA
++	 * API), don't try to attach again.
+ 	 */
+-	if (IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL) || domain)
++	if (!host1x_wants_iommu(host) || domain)
+ 		return domain;
+ 
+ 	host->group = iommu_group_get(host->dev);
diff --git a/gitrev b/gitrev
index 22fff2bf7..e8d8c100c 100644
--- a/gitrev
+++ b/gitrev
@@ -1 +1 @@
-5ad0ec0b86525d0c5d3d250d3cfad7f183b00cfa
+f3e69428b5e26b0851d7ef4c15859cffebf2b9de
diff --git a/kernel.spec b/kernel.spec
index b245d744d..56449d628 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -115,7 +115,7 @@ Summary: The Linux kernel
 # The rc snapshot level
 %global rcrev 7
 # The git snapshot level
-%define gitrev 0
+%define gitrev 1
 # Set rpm version accordingly
 %define rpmversion 5.%{upstream_sublevel}.0
 %endif
@@ -208,7 +208,7 @@ Summary: The Linux kernel
 # Set debugbuildsenabled to 1 for production (build separate debug kernels)
 #  and 0 for rawhide (all kernels are debug kernels).
 # See also 'make debug' and 'make release'.
-%define debugbuildsenabled 1
+%define debugbuildsenabled 0
 
 %if 0%{?fedora}
 # Kernel headers are being split out into a separate package
@@ -857,6 +857,8 @@ Patch323: arm64-tegra-fix-pcie.patch
 Patch324: regulator-pwm-Don-t-warn-on-probe-deferral.patch
 # http://patchwork.ozlabs.org/patch/1243112/
 Patch325: backlight-lp855x-Ensure-regulators-are-disabled-on-probe-failure.patch
+# https://patchwork.ozlabs.org/patch/1261638/
+Patch326: arm64-drm-tegra-Fix-SMMU-support-on-Tegra124-and-Tegra210.patch
 
 # Coral
 Patch330: arm64-dts-imx8mq-phanbell-Add-support-for-ethernet.patch
@@ -3002,6 +3004,12 @@ fi
 #
 #
 %changelog
+* Fri Mar 27 2020 Jeremy Cline <jcline@redhat.com> - 5.6.0-0.rc7.git1.1
+- Linux v5.6-rc7-227-gf3e69428b5e2
+
+* Fri Mar 27 2020 Jeremy Cline <jcline@redhat.com>
+- Reenable debugging options.
+
 * Mon Mar 23 2020 Peter Robinson <pbrobinson@gmail.com> - 5.6.0-0.rc7.git0.1
 - Linux v5.6-rc7
 
diff --git a/sources b/sources
index 23c2b2153..04099fbe3 100644
--- a/sources
+++ b/sources
@@ -1,2 +1,3 @@
 SHA512 (linux-5.5.tar.xz) = fa74fdabb5e63384a39e54da05b86a9ae9ea16179524b041fbbdffc7177e80b53600ae98d76be127ba216148f9dc55fe07ab20637e22c6d6030cb4aa09eb2f86
 SHA512 (patch-5.6-rc7.xz) = 02ddf28d22d732bbf9dce161790b9aafcec120c22f3a1a158b4031a44388043ef38c0618fd5cc7ebb73d626293ad517c6e7c587f549f1aa2d626fca418af4a51
+SHA512 (patch-5.6-rc7-git1.xz) = 794ee17cb0930875a0d33de8f70fda3065ed94ea0ae7d361f05768345cedc7a6c8ca6329e8a39e43594d200f2c16d9f193a201ccdf9fb31c31e6bc34c118c2b7