Merge remote-tracking branch 'origin/master' into rawhide-user-thl-vanilla-fedora

1 files changed, 84 insertions, 96 deletions

diff --git a/Add-support-for-the-pine64-Pinebook-Pro.patch b/Add-support-for-the-pine64-Pinebook-Pro.patch
index ed5b91f66..0b11d8bc1 100644
--- a/Add-support-for-the-pine64-Pinebook-Pro.patch
+++ b/Add-support-for-the-pine64-Pinebook-Pro.patch
@@ -1,27 +1,27 @@
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 To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
- Heiko Stuebner <heiko@sntech.de>, Andy Yan <andy.yan@rock-chips.com>
-Subject: [PATCH v2 1/2] dt-bindings: Add doc for pine64 Pinebook Pro
-Date: Fri, 28 Feb 2020 21:38:05 +0100
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+ Heiko Stuebner <heiko@sntech.de>, Andy Yan <andy.yan@rock-chips.com>,
+ Johan Jonker <jbx6244@gmail.com>
+Subject: [PATCH v3 1/2] dt-bindings: Add doc for pine64 Pinebook Pro
+Date: Sat, 29 Feb 2020 15:48:16 +0100
+Message-Id: <20200229144817.355678-2-t.schramm@manjaro.org>
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@@ -125,30 +126,30 @@ index 874b0eaa2a75..482a0cbfb18a 100644
          items:
            - const: pine64,rock64
 
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- Heiko Stuebner <heiko@sntech.de>, Andy Yan <andy.yan@rock-chips.com>
-Subject: [PATCH v2 2/2] arm64: dts: rockchip: Add initial support for Pinebook
+ Heiko Stuebner <heiko@sntech.de>, Andy Yan <andy.yan@rock-chips.com>,
+ Johan Jonker <jbx6244@gmail.com>
+Subject: [PATCH v3 2/2] arm64: dts: rockchip: Add initial support for Pinebook
  Pro
-Date: Fri, 28 Feb 2020 21:38:06 +0100
-Message-Id: <20200228203806.346299-3-t.schramm@manjaro.org>
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+Date: Sat, 29 Feb 2020 15:48:17 +0100
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@@ -233,8 +235,8 @@ This commit adds initial dt support for the rk3399 based Pinebook Pro.
 Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
 ---
  arch/arm64/boot/dts/rockchip/Makefile         |    1 +
- .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 1119 +++++++++++++++++
- 2 files changed, 1120 insertions(+)
+ .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 1105 +++++++++++++++++
+ 2 files changed, 1106 insertions(+)
  create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
 
 diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
@@ -251,10 +253,10 @@ index 60d9437096c7..ae7621309e92 100644
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
 diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
 new file mode 100644
-index 000000000000..3873f6c63dfc
+index 000000000000..dfade7e00051
 --- /dev/null
 +++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
-@@ -0,0 +1,1119 @@
+@@ -0,0 +1,1105 @@
 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 +/*
 + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
@@ -286,20 +288,16 @@ index 000000000000..3873f6c63dfc
 +	};
 +
 +	edp_panel: edp-panel {
-+		compatible = "boe,nv140fhmn49", "simple-panel";
++		compatible = "boe,nv140fhmn49";
 +		backlight = <&backlight>;
-+
-+		enable-delay-ms = <20>;
 +		enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
 +		pinctrl-names = "default";
 +		pinctrl-0 = <&panel_en_gpio>;
-+
 +		power-supply = <&vcc3v3_panel>;
-+		prepare-delay-ms = <20>;
 +
 +		ports {
-+			#address-cells = <0x01>;
-+			#size-cells = <0x00>;
++			#address-cells = <1>;
++			#size-cells = <0>;
 +			port@0 {
 +				panel_in_edp: endpoint@0 {
 +					remote-endpoint = <&edp_out_panel>;
@@ -585,7 +583,7 @@ index 000000000000..3873f6c63dfc
 +		};
 +	};
 +
-+	/* Regualtors supplied by vcc5v0_usb */
++	/* Regulators supplied by vcc5v0_usb */
 +	/* Type C port power supply regulator */
 +	vbus_5vout: vbus_typec: vbus-5vout {
 +		compatible = "regulator-fixed";
@@ -603,7 +601,7 @@ index 000000000000..3873f6c63dfc
 +		};
 +	};
 +
-+	/* Regualtors supplied by vcc_1v8 */
++	/* Regulators supplied by vcc_1v8 */
 +	/* Primary 0.9 V LDO */
 +	vcca0v9_s3: vcca0v9-s3 {
 +		compatible = "regulator-fixed";
@@ -657,10 +655,10 @@ index 000000000000..3873f6c63dfc
 +};
 +
 +&edp {
-+	status = "okay";
 +	force-hpd;
 +	pinctrl-names = "default";
 +	pinctrl-0 = <&edp_hpd>;
++	status = "okay";
 +
 +	ports {
 +		edp_out: port@1 {
@@ -920,12 +918,11 @@ index 000000000000..3873f6c63dfc
 +};
 +
 +&i2c1 {
-+	i2c-scl-rising-time-ns = <168>;
++	clock-frequency = <100000>;
 +	i2c-scl-falling-time-ns = <4>;
++	i2c-scl-rising-time-ns = <168>;
 +	status = "okay";
 +
-+	clock-frequency = <100000>;
-+
 +	es8316: es8316@11 {
 +		compatible = "everest,es8316";
 +		reg = <0x11>;
@@ -936,14 +933,14 @@ index 000000000000..3873f6c63dfc
 +};
 +
 +&i2c3 {
-+	i2c-scl-rising-time-ns = <450>;
 +	i2c-scl-falling-time-ns = <15>;
++	i2c-scl-rising-time-ns = <450>;
 +	status = "okay";
 +};
 +
 +&i2c4 {
-+	i2c-scl-rising-time-ns = <600>;
 +	i2c-scl-falling-time-ns = <20>;
++	i2c-scl-rising-time-ns = <600>;
 +	status = "okay";
 +
 +	fusb0: fusb30x@22 {
@@ -1005,11 +1002,10 @@ index 000000000000..3873f6c63dfc
 +};
 +
 +&io_domains {
-+	status = "okay";
-+
 +	audio-supply = <&vcc_3v0>;
-+	sdmmc-supply = <&vcc_sdio>;
 +	gpio1830-supply = <&vcc_3v0>;
++	sdmmc-supply = <&vcc_sdio>;
++	status = "okay";
 +};
 +
 +&pcie_phy {
@@ -1023,10 +1019,10 @@ index 000000000000..3873f6c63dfc
 +	num-lanes = <4>;
 +	pinctrl-names = "default";
 +	pinctrl-0 = <&pcie_clkreqn_cpm>;
-+	status = "okay";
 +	vpcie0v9-supply = <&vcca0v9_s3>;
 +	vpcie1v8-supply = <&vcca1v8_s3>;
 +	vpcie3v3-supply = <&vcc3v3_ssd>;
++	status = "okay";
 +};
 +
 +&pinctrl {
@@ -1047,8 +1043,7 @@ index 000000000000..3873f6c63dfc
 +
 +	es8316 {
 +		hp_det_gpio: hp-det-gpio {
-+			rockchip,pins =
-+				<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
++			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
 +		};
 +	};
 +
@@ -1060,7 +1055,7 @@ index 000000000000..3873f6c63dfc
 +
 +	i2s1 {
 +		i2s_8ch_mclk_gpio: i2s-8ch-mclk-gpio {
-+			rockchip,pins = <4 0 RK_FUNC_1 &pcfg_pull_none>;
++			rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>;
 +		};
 +	};
 +
@@ -1133,17 +1128,14 @@ index 000000000000..3873f6c63dfc
 +
 +	wireless-bluetooth {
 +		bt_wake_gpio: bt-wake-gpio {
-+			rockchip,pins =
-+				<2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
++			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
 +		};
 +		bt_host_wake_gpio: bt-host-wake-gpio {
-+			rockchip,pins =
-+				<0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
++			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
 +		};
 +
 +		bt_reset_gpio: bt-reset-gpio {
-+			rockchip,pins =
-+				<0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
++			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
 +		};
 +	};
 +};
@@ -1172,7 +1164,6 @@ index 000000000000..3873f6c63dfc
 +	cap-sd-highspeed;
 +	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
 +	disable-wp;
-+	max-frequency = <150000000>;
 +	pinctrl-names = "default";
 +	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
 +	sd-uhs-sdr104;
@@ -1183,7 +1174,6 @@ index 000000000000..3873f6c63dfc
 +	bus-width = <4>;
 +	cap-sd-highspeed;
 +	cap-sdio-irq;
-+	disable-wp;
 +	keep-power-in-suspend;
 +	mmc-pwrseq = <&sdio_pwrseq>;
 +	non-removable;
@@ -1201,15 +1191,13 @@ index 000000000000..3873f6c63dfc
 +};
 +
 +&spi1 {
-+	status = "okay";
 +	max-freq = <10000000>;
++	status = "okay";
 +
-+	spiflash: spi-flash@0 {
-+		#address-cells = <0x1>;
-+		#size-cells = <1>;
++	spiflash: flash@0 {
 +		compatible = "jedec,spi-nor";
 +		m25p,fast-read;
-+		reg = <0x0>;
++		reg = <0>;
 +		spi-max-frequency = <10000000>;
 +		status = "okay";
 +
@@ -1303,8 +1291,8 @@ index 000000000000..3873f6c63dfc
 +&uart0 {
 +	pinctrl-names = "default";
 +	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
-+	status = "okay";
 +	uart-has-rtscts;
++	status = "okay";
 +
 +	bluetooth {
 +		compatible = "brcm,bcm4345c5";