Add fixes for known AMD bootup issue

4 files changed, 134 insertions, 0 deletions

diff --git a/0001-x86-PCI-fix-infinity-loop-in-search-for-64bit-BAR-pl.patch b/0001-x86-PCI-fix-infinity-loop-in-search-for-64bit-BAR-pl.patch
new file mode 100644
index 000000000..e846f204a
--- /dev/null
+++ b/0001-x86-PCI-fix-infinity-loop-in-search-for-64bit-BAR-pl.patch
@@ -0,0 +1,38 @@
+From 91990a4f966e1862f9747072c4f46946169e2d8b Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Tue, 21 Nov 2017 11:20:00 +0100
+Subject: [PATCH 1/3] x86/PCI: fix infinity loop in search for 64bit BAR
+ placement
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Break the loop if we can't find some address space for a 64bit BAR.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+---
+ arch/x86/pci/fixup.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
+index e59378bf37d9..e857b3ac5755 100644
+--- a/arch/x86/pci/fixup.c
++++ b/arch/x86/pci/fixup.c
+@@ -695,8 +695,13 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
+ 	res->end = 0xfd00000000ull - 1;
+ 
+ 	/* Just grab the free area behind system memory for this */
+-	while ((conflict = request_resource_conflict(&iomem_resource, res)))
++	while ((conflict = request_resource_conflict(&iomem_resource, res))) {
++		if (conflict->end >= res->end) {
++			kfree(res);
++			return;
++		}
+ 		res->start = conflict->end + 1;
++	}
+ 
+ 	dev_info(&dev->dev, "adding root bus resource %pR\n", res);
+ 
+-- 
+2.11.0
+
diff --git a/0002-x86-PCI-only-enable-a-64bit-BAR-on-single-socket-AMD.patch b/0002-x86-PCI-only-enable-a-64bit-BAR-on-single-socket-AMD.patch
new file mode 100644
index 000000000..11b48aa9c
--- /dev/null
+++ b/0002-x86-PCI-only-enable-a-64bit-BAR-on-single-socket-AMD.patch
@@ -0,0 +1,58 @@
+From 21ae889eaa7330b57f17cc86b6d0239300eb3f95 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Tue, 21 Nov 2017 11:08:33 +0100
+Subject: [PATCH 2/3] x86/PCI: only enable a 64bit BAR on single socket AMD
+ Family 15h systems
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+When we have a multi socket system each CPU core needs the same setup. Since
+this is tricky to do in the fixup code disable enabling a 64bit BAR on multi
+socket systems for now.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+---
+ arch/x86/pci/fixup.c | 20 +++++++++++++++-----
+ 1 file changed, 15 insertions(+), 5 deletions(-)
+
+diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
+index e857b3ac5755..c817ab85dc82 100644
+--- a/arch/x86/pci/fixup.c
++++ b/arch/x86/pci/fixup.c
+@@ -664,6 +664,16 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
+ 	unsigned i;
+ 	u32 base, limit, high;
+ 	struct resource *res, *conflict;
++	struct pci_dev *other;
++
++	/* Check that we are the only device of that type */
++	other = pci_get_device(dev->vendor, dev->device, NULL);
++	if (other != dev ||
++	    (other = pci_get_device(dev->vendor, dev->device, other))) {
++		/* This is a multi socket system, don't touch it for now */
++		pci_dev_put(other);
++		return;
++	}
+ 
+ 	for (i = 0; i < 8; i++) {
+ 		pci_read_config_dword(dev, AMD_141b_MMIO_BASE(i), &base);
+@@ -718,10 +728,10 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
+ 
+ 	pci_bus_add_resource(dev->bus, res, 0);
+ }
+-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1401, pci_amd_enable_64bit_bar);
+-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x141b, pci_amd_enable_64bit_bar);
+-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1571, pci_amd_enable_64bit_bar);
+-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x15b1, pci_amd_enable_64bit_bar);
+-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1601, pci_amd_enable_64bit_bar);
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1401, pci_amd_enable_64bit_bar);
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x141b, pci_amd_enable_64bit_bar);
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1571, pci_amd_enable_64bit_bar);
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15b1, pci_amd_enable_64bit_bar);
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1601, pci_amd_enable_64bit_bar);
+ 
+ #endif
+-- 
+2.11.0
+
diff --git a/0003-x86-PCI-limit-the-size-of-the-64bit-BAR-to-256GB.patch b/0003-x86-PCI-limit-the-size-of-the-64bit-BAR-to-256GB.patch
new file mode 100644
index 000000000..22b0c6e3e
--- /dev/null
+++ b/0003-x86-PCI-limit-the-size-of-the-64bit-BAR-to-256GB.patch
@@ -0,0 +1,33 @@
+From e5d5c9682aa02a6b9c0c6bd446d433b924441679 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Tue, 28 Nov 2017 10:02:35 +0100
+Subject: [PATCH 3/3] x86/PCI: limit the size of the 64bit BAR to 256GB
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This avoids problems with Xen which hides some memory resources from the
+OS and potentially also allows memory hotplug while this fixup is
+enabled.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+---
+ arch/x86/pci/fixup.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
+index c817ab85dc82..149adbc7f2a3 100644
+--- a/arch/x86/pci/fixup.c
++++ b/arch/x86/pci/fixup.c
+@@ -701,7 +701,7 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
+ 	res->name = "PCI Bus 0000:00";
+ 	res->flags = IORESOURCE_PREFETCH | IORESOURCE_MEM |
+ 		IORESOURCE_MEM_64 | IORESOURCE_WINDOW;
+-	res->start = 0x100000000ull;
++	res->start = 0xbd00000000ull;
+ 	res->end = 0xfd00000000ull - 1;
+ 
+ 	/* Just grab the free area behind system memory for this */
+-- 
+2.11.0
+
diff --git a/kernel.spec b/kernel.spec
index 7f96e44fe..a49bf3cf5 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -636,6 +636,11 @@ Patch630: 0001-HID-multitouch-Properly-deal-with-Win8-PTP-reports-w.patch
 Patch631: 0002-HID-multitouch-Only-look-at-non-touch-fields-in-firs.patch
 Patch632: 0003-HID-multitouch-Combine-all-left-button-events-in-a-f.patch
 
+# Reported upstream
+Patch633: 0001-x86-PCI-fix-infinity-loop-in-search-for-64bit-BAR-pl.patch
+Patch634: 0002-x86-PCI-only-enable-a-64bit-BAR-on-single-socket-AMD.patch
+Patch635: 0003-x86-PCI-limit-the-size-of-the-64bit-BAR-to-256GB.patch
+
 # END OF PATCH DEFINITIONS
 
 %endif