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author | Thorsten Leemhuis <fedora@leemhuis.info> | 2020-08-11 16:04:13 +0200 |
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committer | Thorsten Leemhuis <fedora@leemhuis.info> | 2020-08-11 16:04:13 +0200 |
commit | ddbf13e4c47fb53eb17706238fe66b8eaf9a3cd4 (patch) | |
tree | 134995e85e9dd747ef1a98e1f5ca18804afaad84 | |
parent | d8b1d4104de663bacffe18cf79ebf37fed8aac78 (diff) | |
parent | dd550c9cc80efee1ab4e4bbf4eafa9936711fa66 (diff) | |
download | kernel-ddbf13e4c47fb53eb17706238fe66b8eaf9a3cd4.tar.gz kernel-ddbf13e4c47fb53eb17706238fe66b8eaf9a3cd4.tar.xz kernel-ddbf13e4c47fb53eb17706238fe66b8eaf9a3cd4.zip |
Merge remote-tracking branch 'origin/stabilization' into stabilization-user-thl-vanilla-fedora
32 files changed, 582 insertions, 49 deletions
diff --git a/0001-PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch b/0001-PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch new file mode 100644 index 000000000..bf1e48016 --- /dev/null +++ b/0001-PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch @@ -0,0 +1,240 @@ +From 9134295c0515492b1ab7733c0290b2afde336d6b Mon Sep 17 00:00:00 2001 +From: Vidya Sagar <vidyas@nvidia.com> +Date: Sat, 11 Jan 2020 00:45:00 +0530 +Subject: [PATCH] PCI: Add MCFG quirks for Tegra194 host controllers + +The PCIe controller in Tegra194 SoC is not completely ECAM-compliant. +With the current hardware design limitations in place, ECAM can be enabled +only for one controller (C5 controller to be precise) with bus numbers +starting from 160 instead of 0. A different approach is taken to avoid this +abnormal way of enabling ECAM for just one controller but to enable +configuration space access for all the other controllers. In this approach, +ops are added through MCFG quirk mechanism which access the configuration +spaces by dynamically programming iATU (internal AddressTranslation Unit) +to generate respective configuration accesses just like the way it is +done in DesignWare core sub-system. + +Signed-off-by: Vidya Sagar <vidyas@nvidia.com> +Acked-by: Thierry Reding <treding@nvidia.com> +[ Updated by jonathanh@nvidia.com only permit building the Tegra194 + PCIe driver into the kernel and not as a module ] +Signed-off-by: Jon Hunter <jonathanh@nvidia.com> +--- + drivers/acpi/pci_mcfg.c | 7 ++ + drivers/pci/controller/dwc/Kconfig | 10 +- + drivers/pci/controller/dwc/Makefile | 2 +- + drivers/pci/controller/dwc/pcie-tegra194.c | 102 +++++++++++++++++++++ + include/linux/pci-ecam.h | 1 + + 5 files changed, 117 insertions(+), 5 deletions(-) + +diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c +index 54b36b7ad47d9..6573d495d9c1f 100644 +--- a/drivers/acpi/pci_mcfg.c ++++ b/drivers/acpi/pci_mcfg.c +@@ -116,6 +116,13 @@ static struct mcfg_fixup mcfg_quirks[] = { + THUNDER_ECAM_QUIRK(2, 12), + THUNDER_ECAM_QUIRK(2, 13), + ++ { "NVIDIA", "TEGRA194", 1, 0, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 1, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 2, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 3, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 4, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 5, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ + #define XGENE_V1_ECAM_MCFG(rev, seg) \ + {"APM ", "XGENE ", rev, seg, MCFG_BUS_ANY, \ + &xgene_v1_pcie_ecam_ops } +diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig +index 044a3761c44f2..e4ee4bf9ac64a 100644 +--- a/drivers/pci/controller/dwc/Kconfig ++++ b/drivers/pci/controller/dwc/Kconfig +@@ -247,25 +247,27 @@ config PCI_MESON + implement the driver. + + config PCIE_TEGRA194 +- tristate ++ bool + + config PCIE_TEGRA194_HOST +- tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode" ++ bool "NVIDIA Tegra194 (and later) PCIe controller - Host Mode" + depends on ARCH_TEGRA_194_SOC || COMPILE_TEST + depends on PCI_MSI_IRQ_DOMAIN + select PCIE_DW_HOST + select PHY_TEGRA194_P2U + select PCIE_TEGRA194 ++ default y if ARCH_TEGRA_194_SOC + help + Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to + work in host mode. There are two instances of PCIe controllers in + Tegra194. This controller can work either as EP or RC. In order to + enable host-specific features PCIE_TEGRA194_HOST must be selected and + in order to enable device-specific features PCIE_TEGRA194_EP must be +- selected. This uses the DesignWare core. ++ selected. This uses the DesignWare core. ACPI platforms with Tegra194 ++ don't need to enable this. + + config PCIE_TEGRA194_EP +- tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode" ++ bool "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode" + depends on ARCH_TEGRA_194_SOC || COMPILE_TEST + depends on PCI_ENDPOINT + select PCIE_DW_EP +diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile +index a751553fa0dbd..dbb9818765566 100644 +--- a/drivers/pci/controller/dwc/Makefile ++++ b/drivers/pci/controller/dwc/Makefile +@@ -17,7 +17,6 @@ obj-$(CONFIG_PCIE_INTEL_GW) += pcie-intel-gw.o + obj-$(CONFIG_PCIE_KIRIN) += pcie-kirin.o + obj-$(CONFIG_PCIE_HISI_STB) += pcie-histb.o + obj-$(CONFIG_PCI_MESON) += pci-meson.o +-obj-$(CONFIG_PCIE_TEGRA194) += pcie-tegra194.o + obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o + obj-$(CONFIG_PCIE_UNIPHIER_EP) += pcie-uniphier-ep.o + +@@ -34,4 +33,5 @@ obj-$(CONFIG_PCIE_UNIPHIER_EP) += pcie-uniphier-ep.o + ifdef CONFIG_PCI + obj-$(CONFIG_ARM64) += pcie-al.o + obj-$(CONFIG_ARM64) += pcie-hisi.o ++obj-$(CONFIG_ARM64) += pcie-tegra194.o + endif +diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c +index 92b77f7d83546..7b3d581795197 100644 +--- a/drivers/pci/controller/dwc/pcie-tegra194.c ++++ b/drivers/pci/controller/dwc/pcie-tegra194.c +@@ -22,6 +22,8 @@ + #include <linux/of_irq.h> + #include <linux/of_pci.h> + #include <linux/pci.h> ++#include <linux/pci-acpi.h> ++#include <linux/pci-ecam.h> + #include <linux/phy/phy.h> + #include <linux/pinctrl/consumer.h> + #include <linux/platform_device.h> +@@ -324,6 +326,103 @@ struct tegra_pcie_dw_of_data { + enum dw_pcie_device_mode mode; + }; + ++#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) ++struct tegra194_pcie_acpi { ++ void __iomem *config_base; ++ void __iomem *iatu_base; ++ void __iomem *dbi_base; ++}; ++ ++static int tegra194_acpi_init(struct pci_config_window *cfg) ++{ ++ struct device *dev = cfg->parent; ++ struct tegra194_pcie_acpi *pcie; ++ ++ pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); ++ if (!pcie) ++ return -ENOMEM; ++ ++ pcie->config_base = cfg->win; ++ pcie->iatu_base = cfg->win + SZ_256K; ++ pcie->dbi_base = cfg->win + SZ_512K; ++ cfg->priv = pcie; ++ ++ return 0; ++} ++ ++static inline void atu_reg_write(struct tegra194_pcie_acpi *pcie, int index, ++ u32 val, u32 reg) ++{ ++ u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index); ++ ++ writel(val, pcie->iatu_base + offset + reg); ++} ++ ++static void program_outbound_atu(struct tegra194_pcie_acpi *pcie, int index, ++ int type, u64 cpu_addr, u64 pci_addr, u64 size) ++{ ++ atu_reg_write(pcie, index, lower_32_bits(cpu_addr), ++ PCIE_ATU_LOWER_BASE); ++ atu_reg_write(pcie, index, upper_32_bits(cpu_addr), ++ PCIE_ATU_UPPER_BASE); ++ atu_reg_write(pcie, index, lower_32_bits(pci_addr), ++ PCIE_ATU_LOWER_TARGET); ++ atu_reg_write(pcie, index, lower_32_bits(cpu_addr + size - 1), ++ PCIE_ATU_LIMIT); ++ atu_reg_write(pcie, index, upper_32_bits(pci_addr), ++ PCIE_ATU_UPPER_TARGET); ++ atu_reg_write(pcie, index, type, PCIE_ATU_CR1); ++ atu_reg_write(pcie, index, PCIE_ATU_ENABLE, PCIE_ATU_CR2); ++} ++ ++static void __iomem *tegra194_map_bus(struct pci_bus *bus, ++ unsigned int devfn, int where) ++{ ++ struct pci_config_window *cfg = bus->sysdata; ++ struct tegra194_pcie_acpi *pcie = cfg->priv; ++ u32 busdev; ++ int type; ++ ++ if (bus->number < cfg->busr.start || bus->number > cfg->busr.end) ++ return NULL; ++ ++ if (bus->number == cfg->busr.start) { ++ if (PCI_SLOT(devfn) == 0) ++ return pcie->dbi_base + where; ++ else ++ return NULL; ++ } ++ ++ busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | ++ PCIE_ATU_FUNC(PCI_FUNC(devfn)); ++ ++ if (bus->parent->number == cfg->busr.start) { ++ if (PCI_SLOT(devfn) == 0) ++ type = PCIE_ATU_TYPE_CFG0; ++ else ++ return NULL; ++ } else { ++ type = PCIE_ATU_TYPE_CFG1; ++ } ++ ++ program_outbound_atu(pcie, PCIE_ATU_REGION_INDEX0, type, ++ cfg->res.start, busdev, SZ_256K); ++ return (void __iomem *)(pcie->config_base + where); ++} ++ ++const struct pci_ecam_ops tegra194_pcie_ops = { ++ .bus_shift = 20, ++ .init = tegra194_acpi_init, ++ .pci_ops = { ++ .map_bus = tegra194_map_bus, ++ .read = pci_generic_config_read, ++ .write = pci_generic_config_write, ++ } ++}; ++#endif /* defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) */ ++ ++#ifdef CONFIG_PCIE_TEGRA194 ++ + static inline struct tegra_pcie_dw *to_tegra_pcie(struct dw_pcie *pci) + { + return container_of(pci, struct tegra_pcie_dw, pci); +@@ -2405,3 +2504,6 @@ MODULE_DEVICE_TABLE(of, tegra_pcie_dw_of_match); + MODULE_AUTHOR("Vidya Sagar <vidyas@nvidia.com>"); + MODULE_DESCRIPTION("NVIDIA PCIe host controller driver"); + MODULE_LICENSE("GPL v2"); ++ ++#endif /* CONFIG_PCIE_TEGRA194 */ ++ +diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h +index 1af5cb02ef7f9..3fb16ada505a0 100644 +--- a/include/linux/pci-ecam.h ++++ b/include/linux/pci-ecam.h +@@ -57,6 +57,7 @@ extern const struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */ + extern const struct pci_ecam_ops xgene_v1_pcie_ecam_ops; /* APM X-Gene PCIe v1 */ + extern const struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x */ + extern const struct pci_ecam_ops al_pcie_ops; /* Amazon Annapurna Labs PCIe */ ++extern const struct pci_ecam_ops tegra194_pcie_ops; /* Tegra194 PCIe */ + #endif + + #if IS_ENABLED(CONFIG_PCI_HOST_COMMON) +-- +2.26.2 + diff --git a/0001-efi-Add-an-EFI_SECURE_BOOT-flag-to-indicate-secure-b.patch b/0001-efi-Add-an-EFI_SECURE_BOOT-flag-to-indicate-secure-b.patch new file mode 100644 index 000000000..ff9bcbd19 --- /dev/null +++ b/0001-efi-Add-an-EFI_SECURE_BOOT-flag-to-indicate-secure-b.patch @@ -0,0 +1,161 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: David Howells <dhowells@redhat.com> +Date: Tue, 27 Feb 2018 10:04:55 +0000 +Subject: [PATCH] efi: Add an EFI_SECURE_BOOT flag to indicate secure boot mode + +UEFI machines can be booted in Secure Boot mode. Add an EFI_SECURE_BOOT +flag that can be passed to efi_enabled() to find out whether secure boot is +enabled. + +Move the switch-statement in x86's setup_arch() that inteprets the +secure_boot boot parameter to generic code and set the bit there. + +Upstream Status: RHEL only +Suggested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +Signed-off-by: David Howells <dhowells@redhat.com> +Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +cc: linux-efi@vger.kernel.org +[Rebased for context; efi_is_table_address was moved to arch/x86] +Signed-off-by: Jeremy Cline <jcline@redhat.com> +--- + arch/x86/kernel/setup.c | 14 +----------- + drivers/firmware/efi/Makefile | 1 + + drivers/firmware/efi/secureboot.c | 38 +++++++++++++++++++++++++++++++ + include/linux/efi.h | 18 ++++++++++----- + 4 files changed, 52 insertions(+), 19 deletions(-) + create mode 100644 drivers/firmware/efi/secureboot.c + +diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c +index a1b8cb9a2579..28d43754aeb6 100644 +--- a/arch/x86/kernel/setup.c ++++ b/arch/x86/kernel/setup.c +@@ -1256,19 +1256,7 @@ void __init setup_arch(char **cmdline_p) + /* Allocate bigger log buffer */ + setup_log_buf(1); + +- if (efi_enabled(EFI_BOOT)) { +- switch (boot_params.secure_boot) { +- case efi_secureboot_mode_disabled: +- pr_info("Secure boot disabled\n"); +- break; +- case efi_secureboot_mode_enabled: +- pr_info("Secure boot enabled\n"); +- break; +- default: +- pr_info("Secure boot could not be determined\n"); +- break; +- } +- } ++ efi_set_secure_boot(boot_params.secure_boot); + + reserve_initrd(); + +diff --git a/drivers/firmware/efi/Makefile b/drivers/firmware/efi/Makefile +index 7a216984552b..f0ef02d733af 100644 +--- a/drivers/firmware/efi/Makefile ++++ b/drivers/firmware/efi/Makefile +@@ -25,6 +25,7 @@ obj-$(CONFIG_EFI_FAKE_MEMMAP) += fake_map.o + obj-$(CONFIG_EFI_BOOTLOADER_CONTROL) += efibc.o + obj-$(CONFIG_EFI_TEST) += test/ + obj-$(CONFIG_EFI_DEV_PATH_PARSER) += dev-path-parser.o ++obj-$(CONFIG_EFI) += secureboot.o + obj-$(CONFIG_APPLE_PROPERTIES) += apple-properties.o + obj-$(CONFIG_EFI_RCI2_TABLE) += rci2-table.o + obj-$(CONFIG_EFI_EMBEDDED_FIRMWARE) += embedded-firmware.o +diff --git a/drivers/firmware/efi/secureboot.c b/drivers/firmware/efi/secureboot.c +new file mode 100644 +index 000000000000..de0a3714a5d4 +--- /dev/null ++++ b/drivers/firmware/efi/secureboot.c +@@ -0,0 +1,38 @@ ++/* Core kernel secure boot support. ++ * ++ * Copyright (C) 2017 Red Hat, Inc. All Rights Reserved. ++ * Written by David Howells (dhowells@redhat.com) ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public Licence ++ * as published by the Free Software Foundation; either version ++ * 2 of the Licence, or (at your option) any later version. ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include <linux/efi.h> ++#include <linux/kernel.h> ++#include <linux/printk.h> ++ ++/* ++ * Decide what to do when UEFI secure boot mode is enabled. ++ */ ++void __init efi_set_secure_boot(enum efi_secureboot_mode mode) ++{ ++ if (efi_enabled(EFI_BOOT)) { ++ switch (mode) { ++ case efi_secureboot_mode_disabled: ++ pr_info("Secure boot disabled\n"); ++ break; ++ case efi_secureboot_mode_enabled: ++ set_bit(EFI_SECURE_BOOT, &efi.flags); ++ pr_info("Secure boot enabled\n"); ++ break; ++ default: ++ pr_warn("Secure boot could not be determined (mode %u)\n", ++ mode); ++ break; ++ } ++ } ++} +diff --git a/include/linux/efi.h b/include/linux/efi.h +index 2e2f9f608f68..6f5b3b019d3e 100644 +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -781,6 +781,14 @@ extern int __init efi_setup_pcdp_console(char *); + #define EFI_MEM_ATTR 10 /* Did firmware publish an EFI_MEMORY_ATTRIBUTES table? */ + #define EFI_MEM_NO_SOFT_RESERVE 11 /* Is the kernel configured to ignore soft reservations? */ + #define EFI_PRESERVE_BS_REGIONS 12 /* Are EFI boot-services memory segments available? */ ++#define EFI_SECURE_BOOT 13 /* Are we in Secure Boot mode? */ ++ ++enum efi_secureboot_mode { ++ efi_secureboot_mode_unset, ++ efi_secureboot_mode_unknown, ++ efi_secureboot_mode_disabled, ++ efi_secureboot_mode_enabled, ++}; + + #ifdef CONFIG_EFI + /* +@@ -792,6 +800,8 @@ static inline bool efi_enabled(int feature) + } + extern void efi_reboot(enum reboot_mode reboot_mode, const char *__unused); + ++extern void __init efi_set_secure_boot(enum efi_secureboot_mode mode); ++ + bool __pure __efi_soft_reserve_enabled(void); + + static inline bool __pure efi_soft_reserve_enabled(void) +@@ -818,6 +828,8 @@ efi_capsule_pending(int *reset_type) + return false; + } + ++static inline void efi_set_secure_boot(enum efi_secureboot_mode mode) {} ++ + static inline bool efi_soft_reserve_enabled(void) + { + return false; +@@ -1090,12 +1102,6 @@ static inline bool efi_runtime_disabled(void) { return true; } + extern void efi_call_virt_check_flags(unsigned long flags, const char *call); + extern unsigned long efi_call_virt_save_flags(void); + +-enum efi_secureboot_mode { +- efi_secureboot_mode_unset, +- efi_secureboot_mode_unknown, +- efi_secureboot_mode_disabled, +- efi_secureboot_mode_enabled, +-}; + enum efi_secureboot_mode efi_get_secureboot(void); + + #ifdef CONFIG_RESET_ATTACK_MITIGATION +-- +2.26.2 + diff --git a/0002-arm64-tegra-Re-order-PCIe-aperture-mappings-to-suppo.patch b/0002-arm64-tegra-Re-order-PCIe-aperture-mappings-to-suppo.patch new file mode 100644 index 000000000..d184228ea --- /dev/null +++ b/0002-arm64-tegra-Re-order-PCIe-aperture-mappings-to-suppo.patch @@ -0,0 +1,101 @@ +From 6acf1ba7596a051d6ff4092d22bf9c4ce210d9f5 Mon Sep 17 00:00:00 2001 +From: Vidya Sagar <vidyas@nvidia.com> +Date: Sat, 11 Jan 2020 00:44:59 +0530 +Subject: [PATCH 2/2] arm64: tegra: Re-order PCIe aperture mappings to support + ACPI boot + +Re-order Tegra194's PCIe aperture mappings to have IO window moved to +64-bit aperture and have the entire 32-bit aperture used for accessing +the configuration space. This makes it to use the entire 32MB of the 32-bit +aperture for ECAM purpose while booting through ACPI. + +Signed-off-by: Vidya Sagar <vidyas@nvidia.com> +--- + arch/arm64/boot/dts/nvidia/tegra194.dtsi | 36 ++++++++++++------------ + 1 file changed, 18 insertions(+), 18 deletions(-) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi +index 4bc187a4eacdb..2b378fa06d19e 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi +@@ -1404,9 +1404,9 @@ pcie@14100000 { + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x30100000 0x0 0x30100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc3000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000 /* prefetchable memory (768MB) */ +- 0x82000000 0x0 0x40000000 0x12 0x30000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */ ++ ranges = <0xc3000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000 /* prefetchable memory (768MB) */ ++ 0x82000000 0x00 0x40000000 0x12 0x30000000 0x0 0x0fff0000 /* non-prefetchable memory (256MB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x12 0x3fff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie@14120000 { +@@ -1449,9 +1449,9 @@ pcie@14120000 { + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x32100000 0x0 0x32100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc3000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000 /* prefetchable memory (768MB) */ +- 0x82000000 0x0 0x40000000 0x12 0x70000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */ ++ ranges = <0xc3000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000 /* prefetchable memory (768MB) */ ++ 0x82000000 0x00 0x40000000 0x12 0x70000000 0x0 0x0fff0000 /* non-prefetchable memory (256MB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x12 0x7fff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie@14140000 { +@@ -1494,9 +1494,9 @@ pcie@14140000 { + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x34100000 0x0 0x34100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc3000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000 /* prefetchable memory (768MB) */ +- 0x82000000 0x0 0x40000000 0x12 0xb0000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */ ++ ranges = <0xc3000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000 /* prefetchable memory (768MB) */ ++ 0x82000000 0x00 0x40000000 0x12 0xb0000000 0x0 0x0fff0000 /* non-prefetchable memory (256MB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x12 0xbfff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie@14160000 { +@@ -1539,9 +1539,9 @@ pcie@14160000 { + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x36100000 0x0 0x36100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc3000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ +- 0x82000000 0x0 0x40000000 0x17 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */ ++ ranges = <0xc3000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ ++ 0x82000000 0x00 0x40000000 0x17 0x40000000 0x0 0xbfff0000 /* non-prefetchable memory (3GB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x17 0xffff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie@14180000 { +@@ -1584,9 +1584,9 @@ pcie@14180000 { + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x38100000 0x0 0x38100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc3000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ +- 0x82000000 0x0 0x40000000 0x1b 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */ ++ ranges = <0xc3000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ ++ 0x82000000 0x00 0x40000000 0x1b 0x40000000 0x0 0xbfff0000 /* non-prefetchable memory (3GB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x1b 0xffff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie@141a0000 { +@@ -1633,9 +1633,9 @@ pcie@141a0000 { + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x3a100000 0x0 0x3a100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc3000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ +- 0x82000000 0x0 0x40000000 0x1f 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */ ++ ranges = <0xc3000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ ++ 0x82000000 0x00 0x40000000 0x1f 0x40000000 0x0 0xbfff0000 /* non-prefetchable memory (3GB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x1f 0xffff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie_ep@14160000 { +-- +2.26.2 + diff --git a/arm64-tegra-Use-valid-PWM-period-for-VDD_GPU-on-Tegra210.patch b/arm64-tegra-Use-valid-PWM-period-for-VDD_GPU-on-Tegra210.patch new file mode 100644 index 000000000..cd37e70a1 --- /dev/null +++ b/arm64-tegra-Use-valid-PWM-period-for-VDD_GPU-on-Tegra210.patch @@ -0,0 +1,48 @@ +From a58d581e212b3acbc65e56384e6bc60bb109f29a Mon Sep 17 00:00:00 2001 +From: Peter Robinson <pbrobinson@gmail.com> +Date: Fri, 7 Aug 2020 15:51:42 +0100 +Subject: [PATCH] arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210 + +From: Thierry Reding <treding@nvidia.com> + +The PWM on Tegra210 can run at a maximum frequency of 48 MHz and cannot +reach the minimum period is 5334 ns. The currently configured period of +4880 ns is not within the valid range, so set it to 8000 ns. This value +was taken from the downstream DTS files and seems to work fine. + +Signed-off-by: Thierry Reding <treding@nvidia.com> +Signed-off-by: Peter Robinson <pbrobinson@gmail.com> +--- + arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 2 +- + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +index cc6ed45a2b485..e2e984a75f601 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +@@ -346,7 +346,7 @@ regulators { + vdd_gpu: regulator@100 { + compatible = "pwm-regulator"; + reg = <100>; +- pwms = <&pwm 1 4880>; ++ pwms = <&pwm 1 8000>; + regulator-name = "VDD_GPU"; + regulator-min-microvolt = <710000>; + regulator-max-microvolt = <1320000>; +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +index 9bc52fdb393c8..ebaac57853138 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -789,7 +789,7 @@ vdd_cpu: regulator@5 { + vdd_gpu: regulator@6 { + compatible = "pwm-regulator"; + reg = <6>; +- pwms = <&pwm 1 4880>; ++ pwms = <&pwm 1 8000>; + regulator-name = "VDD_GPU"; + regulator-min-microvolt = <710000>; + regulator-max-microvolt = <1320000>; +-- +2.26.2 + diff --git a/configs/fedora/generic/CONFIG_INFINIBAND_RTRS_SERVER b/configs/fedora/generic/CONFIG_INFINIBAND_RTRS_SERVER index 30fe516f4..64ed34d9f 100644 --- a/configs/fedora/generic/CONFIG_INFINIBAND_RTRS_SERVER +++ b/configs/fedora/generic/CONFIG_INFINIBAND_RTRS_SERVER @@ -1,21 +1 @@ -# CONFIG_INFINIBAND_RTRS_SERVER: -# -# RDMA transport server module. -# -# RDMA Transport (RTRS) server module processing connection and IO -# requests received from the RTRS client module, it will pass the -# IO requests to its user eg. RNBD_server. -# -# Symbol: INFINIBAND_RTRS_SERVER [=n] -# Type : tristate -# Defined at drivers/infiniband/ulp/rtrs/Kconfig:18 -# Prompt: RTRS server module -# Depends on: INFINIBAND [=m] && INFINIBAND_ADDR_TRANS [=y] -# Location: -# -> Device Drivers -# -> InfiniBand support (INFINIBAND [=m]) -# Selects: INFINIBAND_RTRS [=n] -# -# -# CONFIG_INFINIBAND_RTRS_SERVER=m diff --git a/configs/fedora/generic/CONFIG_SND_HDA_INTEL b/configs/fedora/generic/CONFIG_SND_HDA_INTEL index 6f057ecfe..dfe74ea98 100644 --- a/configs/fedora/generic/CONFIG_SND_HDA_INTEL +++ b/configs/fedora/generic/CONFIG_SND_HDA_INTEL @@ -1 +1 @@ -# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_INTEL=m diff --git a/configs/fedora/generic/arm/CONFIG_SND_SOC_FSL_MQS b/configs/fedora/generic/arm/CONFIG_SND_SOC_FSL_MQS new file mode 100644 index 000000000..23f9ddfca --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_SND_SOC_FSL_MQS @@ -0,0 +1 @@ +CONFIG_SND_SOC_FSL_MQS=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_PCIE_TEGRA194_HOST b/configs/fedora/generic/arm/aarch64/CONFIG_PCIE_TEGRA194_HOST index d79eeb7a7..005ca5c32 100644 --- a/configs/fedora/generic/arm/aarch64/CONFIG_PCIE_TEGRA194_HOST +++ b/configs/fedora/generic/arm/aarch64/CONFIG_PCIE_TEGRA194_HOST @@ -1 +1 @@ -CONFIG_PCIE_TEGRA194_HOST=m +CONFIG_PCIE_TEGRA194_HOST=y diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_PHY_TEGRA194_P2U b/configs/fedora/generic/arm/aarch64/CONFIG_PHY_TEGRA194_P2U index 23e44783c..96d1b8819 100644 --- a/configs/fedora/generic/arm/aarch64/CONFIG_PHY_TEGRA194_P2U +++ b/configs/fedora/generic/arm/aarch64/CONFIG_PHY_TEGRA194_P2U @@ -1 +1 @@ -CONFIG_PHY_TEGRA194_P2U=m +CONFIG_PHY_TEGRA194_P2U=y diff --git a/configs/fedora/generic/powerpc/CONFIG_SND_HDA_INTEL b/configs/fedora/generic/powerpc/CONFIG_SND_HDA_INTEL deleted file mode 100644 index dfe74ea98..000000000 --- a/configs/fedora/generic/powerpc/CONFIG_SND_HDA_INTEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_HDA_INTEL=m diff --git a/configs/fedora/generic/x86/CONFIG_SND_HDA_INTEL b/configs/fedora/generic/x86/CONFIG_SND_HDA_INTEL deleted file mode 100644 index dfe74ea98..000000000 --- a/configs/fedora/generic/x86/CONFIG_SND_HDA_INTEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_HDA_INTEL=m diff --git a/filter-aarch64.sh b/filter-aarch64.sh index 7c3441b9d..5efa3b6b3 100644 --- a/filter-aarch64.sh +++ b/filter-aarch64.sh @@ -15,4 +15,4 @@ ethdrvs="3com adaptec arc alteon atheros broadcom cadence calxeda chelsio cisco drmdrvs="amd arm bridge ast exynos hisilicon i2c imx mgag200 meson msm nouveau panel pl111 radeon rockchip tegra sun4i sun4i-drm-hdmi tinydrm vc4" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls rnbd-client rnbd-server" diff --git a/filter-aarch64.sh.fedora b/filter-aarch64.sh.fedora index 7c3441b9d..5efa3b6b3 100644 --- a/filter-aarch64.sh.fedora +++ b/filter-aarch64.sh.fedora @@ -15,4 +15,4 @@ ethdrvs="3com adaptec arc alteon atheros broadcom cadence calxeda chelsio cisco drmdrvs="amd arm bridge ast exynos hisilicon i2c imx mgag200 meson msm nouveau panel pl111 radeon rockchip tegra sun4i sun4i-drm-hdmi tinydrm vc4" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls rnbd-client rnbd-server" diff --git a/filter-modules.sh b/filter-modules.sh index 436dcc50a..3f8c89adb 100755 --- a/filter-modules.sh +++ b/filter-modules.sh @@ -39,7 +39,7 @@ drmdrvs="amd ast bridge gma500 i2c i915 mgag200 nouveau panel radeon" iiodrvs="accel adc afe common dac gyro health humidity light magnetometer multiplexer orientation potentiometer potentiostat pressure temperature" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls parport_serial regmap-sdw hid-asus" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls parport_serial regmap-sdw hid-asus iTCO_wdt rnbd-client rnbd-server" # Grab the arch-specific filter list overrides source ./filter-$2.sh diff --git a/filter-modules.sh.fedora b/filter-modules.sh.fedora index 436dcc50a..3f8c89adb 100755 --- a/filter-modules.sh.fedora +++ b/filter-modules.sh.fedora @@ -39,7 +39,7 @@ drmdrvs="amd ast bridge gma500 i2c i915 mgag200 nouveau panel radeon" iiodrvs="accel adc afe common dac gyro health humidity light magnetometer multiplexer orientation potentiometer potentiostat pressure temperature" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls parport_serial regmap-sdw hid-asus" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls parport_serial regmap-sdw hid-asus iTCO_wdt rnbd-client rnbd-server" # Grab the arch-specific filter list overrides source ./filter-$2.sh diff --git a/filter-ppc64le.sh b/filter-ppc64le.sh index 24d3f1346..2c3444bca 100644 --- a/filter-ppc64le.sh +++ b/filter-ppc64le.sh @@ -11,4 +11,4 @@ driverdirs="atm auxdisplay bcma bluetooth firewire fmc fpga infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging tty uio uwb w1" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls rnbd-client rnbd-server" diff --git a/filter-ppc64le.sh.fedora b/filter-ppc64le.sh.fedora index 24d3f1346..2c3444bca 100644 --- a/filter-ppc64le.sh.fedora +++ b/filter-ppc64le.sh.fedora @@ -11,4 +11,4 @@ driverdirs="atm auxdisplay bcma bluetooth firewire fmc fpga infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging tty uio uwb w1" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qedi qla1280 9pnet_rdma rpcrdma nvmet-rdma nvme-rdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i chcr chtls rnbd-client rnbd-server" diff --git a/kernel-aarch64-debug-fedora.config b/kernel-aarch64-debug-fedora.config index 55f3e787e..10f7dce76 100644 --- a/kernel-aarch64-debug-fedora.config +++ b/kernel-aarch64-debug-fedora.config @@ -4709,7 +4709,7 @@ CONFIG_PCIEPORTBUS=y CONFIG_PCIE_PTM=y CONFIG_PCIE_QCOM=y # CONFIG_PCIE_ROCKCHIP_HOST is not set -CONFIG_PCIE_TEGRA194_HOST=m +CONFIG_PCIE_TEGRA194_HOST=y CONFIG_PCIE_XILINX_NWL=y CONFIG_PCIE_XILINX=y # CONFIG_PCI_FTPCI100 is not set @@ -4823,7 +4823,7 @@ CONFIG_PHY_SUN4I_USB=m CONFIG_PHY_SUN50I_USB3=m CONFIG_PHY_SUN6I_MIPI_DPHY=m # CONFIG_PHY_SUN9I_USB is not set -CONFIG_PHY_TEGRA194_P2U=m +CONFIG_PHY_TEGRA194_P2U=y CONFIG_PHY_TEGRA_XUSB=m # CONFIG_PHY_TUSB1210 is not set CONFIG_PHY_XGENE=y @@ -6150,7 +6150,7 @@ CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 CONFIG_SND_HDA_INPUT_BEEP=y -# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1 CONFIG_SND_HDA_PREALLOC_SIZE=4096 @@ -6285,7 +6285,7 @@ CONFIG_SND_SOC_FSL_AUDMIX=m # CONFIG_SND_SOC_FSL_EASRC is not set CONFIG_SND_SOC_FSL_ESAI=m # CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_FSL_MQS is not set +CONFIG_SND_SOC_FSL_MQS=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_FSL_SPDIF=m CONFIG_SND_SOC_FSL_SSI=m diff --git a/kernel-aarch64-fedora.config b/kernel-aarch64-fedora.config index fc3f9f085..70f07649b 100644 --- a/kernel-aarch64-fedora.config +++ b/kernel-aarch64-fedora.config @@ -4690,7 +4690,7 @@ CONFIG_PCIEPORTBUS=y CONFIG_PCIE_PTM=y CONFIG_PCIE_QCOM=y # CONFIG_PCIE_ROCKCHIP_HOST is not set -CONFIG_PCIE_TEGRA194_HOST=m +CONFIG_PCIE_TEGRA194_HOST=y CONFIG_PCIE_XILINX_NWL=y CONFIG_PCIE_XILINX=y # CONFIG_PCI_FTPCI100 is not set @@ -4804,7 +4804,7 @@ CONFIG_PHY_SUN4I_USB=m CONFIG_PHY_SUN50I_USB3=m CONFIG_PHY_SUN6I_MIPI_DPHY=m # CONFIG_PHY_SUN9I_USB is not set -CONFIG_PHY_TEGRA194_P2U=m +CONFIG_PHY_TEGRA194_P2U=y CONFIG_PHY_TEGRA_XUSB=m # CONFIG_PHY_TUSB1210 is not set CONFIG_PHY_XGENE=y @@ -6131,7 +6131,7 @@ CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 CONFIG_SND_HDA_INPUT_BEEP=y -# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1 CONFIG_SND_HDA_PREALLOC_SIZE=4096 @@ -6265,7 +6265,7 @@ CONFIG_SND_SOC_FSL_AUDMIX=m # CONFIG_SND_SOC_FSL_EASRC is not set CONFIG_SND_SOC_FSL_ESAI=m # CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_FSL_MQS is not set +CONFIG_SND_SOC_FSL_MQS=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_FSL_SPDIF=m CONFIG_SND_SOC_FSL_SSI=m diff --git a/kernel-armv7hl-debug-fedora.config b/kernel-armv7hl-debug-fedora.config index b86584c6b..c81b1f257 100644 --- a/kernel-armv7hl-debug-fedora.config +++ b/kernel-armv7hl-debug-fedora.config @@ -6298,7 +6298,7 @@ CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 CONFIG_SND_HDA_INPUT_BEEP=y -# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1 CONFIG_SND_HDA_PREALLOC_SIZE=4096 @@ -6445,7 +6445,7 @@ CONFIG_SND_SOC_FSL_ASRC=m # CONFIG_SND_SOC_FSL_EASRC is not set CONFIG_SND_SOC_FSL_ESAI=m # CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_FSL_MQS is not set +CONFIG_SND_SOC_FSL_MQS=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_FSL_SPDIF=m CONFIG_SND_SOC_FSL_SSI=m diff --git a/kernel-armv7hl-fedora.config b/kernel-armv7hl-fedora.config index 70a53bf8f..fd5073112 100644 --- a/kernel-armv7hl-fedora.config +++ b/kernel-armv7hl-fedora.config @@ -6280,7 +6280,7 @@ CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 CONFIG_SND_HDA_INPUT_BEEP=y -# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1 CONFIG_SND_HDA_PREALLOC_SIZE=4096 @@ -6426,7 +6426,7 @@ CONFIG_SND_SOC_FSL_ASRC=m # CONFIG_SND_SOC_FSL_EASRC is not set CONFIG_SND_SOC_FSL_ESAI=m # CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_FSL_MQS is not set +CONFIG_SND_SOC_FSL_MQS=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_FSL_SPDIF=m CONFIG_SND_SOC_FSL_SSI=m diff --git a/kernel-armv7hl-lpae-debug-fedora.config b/kernel-armv7hl-lpae-debug-fedora.config index 8310fcaaf..4b081af4e 100644 --- a/kernel-armv7hl-lpae-debug-fedora.config +++ b/kernel-armv7hl-lpae-debug-fedora.config @@ -6106,7 +6106,7 @@ CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 CONFIG_SND_HDA_INPUT_BEEP=y -# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1 CONFIG_SND_HDA_PREALLOC_SIZE=4096 @@ -6246,7 +6246,7 @@ CONFIG_SND_SOC_FSL_ASRC=m # CONFIG_SND_SOC_FSL_EASRC is not set CONFIG_SND_SOC_FSL_ESAI=m # CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_FSL_MQS is not set +CONFIG_SND_SOC_FSL_MQS=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_FSL_SPDIF=m CONFIG_SND_SOC_FSL_SSI=m diff --git a/kernel-armv7hl-lpae-fedora.config b/kernel-armv7hl-lpae-fedora.config index 54cd90d4b..4606bfa7f 100644 --- a/kernel-armv7hl-lpae-fedora.config +++ b/kernel-armv7hl-lpae-fedora.config @@ -6088,7 +6088,7 @@ CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 CONFIG_SND_HDA_INPUT_BEEP=y -# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1 CONFIG_SND_HDA_PREALLOC_SIZE=4096 @@ -6227,7 +6227,7 @@ CONFIG_SND_SOC_FSL_ASRC=m # CONFIG_SND_SOC_FSL_EASRC is not set CONFIG_SND_SOC_FSL_ESAI=m # CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_FSL_MQS is not set +CONFIG_SND_SOC_FSL_MQS=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_FSL_SPDIF=m CONFIG_SND_SOC_FSL_SSI=m diff --git a/kernel-s390x-debug-fedora.config b/kernel-s390x-debug-fedora.config index 1730a0e9e..fa2d6f8cd 100644 --- a/kernel-s390x-debug-fedora.config +++ b/kernel-s390x-debug-fedora.config @@ -5174,7 +5174,7 @@ CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 CONFIG_SND_HDA_INPUT_BEEP=y -# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 CONFIG_SND_HDA_PREALLOC_SIZE=4096 diff --git a/kernel-s390x-fedora.config b/kernel-s390x-fedora.config index 1b51ca946..739c1a2ec 100644 --- a/kernel-s390x-fedora.config +++ b/kernel-s390x-fedora.config @@ -5154,7 +5154,7 @@ CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 CONFIG_SND_HDA_INPUT_BEEP=y -# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 CONFIG_SND_HDA_PREALLOC_SIZE=4096 diff --git a/kernel.spec b/kernel.spec index ca3096a13..83a0af8e3 100644 --- a/kernel.spec +++ b/kernel.spec @@ -834,6 +834,7 @@ Patch29: 0001-arm-aarch64-Drop-the-EXPERT-setting-from-ARM64_FORCE.patch Patch31: 0001-Add-efi_status_to_str-and-rework-efi_status_to_err.patch Patch32: 0001-Make-get_cert_list-use-efi_status_to_str-to-print-er.patch Patch33: 0001-security-lockdown-expose-a-hook-to-lock-the-kernel-d.patch +Patch34: 0001-efi-Add-an-EFI_SECURE_BOOT-flag-to-indicate-secure-b.patch Patch35: 0001-efi-Lock-down-the-kernel-if-booted-in-secure-boot-mo.patch Patch36: 0001-s390-Lock-down-the-kernel-when-the-IPL-secure-flag-i.patch Patch37: 0001-Add-option-of-13-for-FORCE_MAX_ZONEORDER.patch @@ -875,6 +876,9 @@ Patch98: 0001-arm64-dts-sun50i-a64-pinephone-Enable-LCD-support-on.patch Patch99: 0001-arm64-dts-sun50i-a64-pinephone-Add-touchscreen-suppo.patch Patch100: 0001-Work-around-for-gcc-bug-https-gcc.gnu.org-bugzilla-s.patch +Patch101: 0001-PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch +Patch102: 0002-arm64-tegra-Re-order-PCIe-aperture-mappings-to-suppo.patch +Patch103: arm64-tegra-Use-valid-PWM-period-for-VDD_GPU-on-Tegra210.patch # END OF PATCH DEFINITIONS %endif diff --git a/redhatsecureboot301.cer b/redhatsecureboot301.cer Binary files differnew file mode 100644 index 000000000..20e660479 --- /dev/null +++ b/redhatsecureboot301.cer diff --git a/redhatsecureboot401.cer b/redhatsecureboot401.cer Binary files differnew file mode 100644 index 000000000..247666cfe --- /dev/null +++ b/redhatsecureboot401.cer diff --git a/redhatsecureboot501.cer b/redhatsecureboot501.cer Binary files differnew file mode 100644 index 000000000..dfa7afb46 --- /dev/null +++ b/redhatsecureboot501.cer diff --git a/redhatsecurebootca1.cer b/redhatsecurebootca1.cer Binary files differnew file mode 100644 index 000000000..b2354007b --- /dev/null +++ b/redhatsecurebootca1.cer diff --git a/redhatsecurebootca4.cer b/redhatsecurebootca4.cer Binary files differnew file mode 100644 index 000000000..8cb32e68c --- /dev/null +++ b/redhatsecurebootca4.cer diff --git a/redhatsecurebootca5.cer b/redhatsecurebootca5.cer Binary files differnew file mode 100644 index 000000000..dfb028495 --- /dev/null +++ b/redhatsecurebootca5.cer |