Revert i915 patch for now

Signed-off-by: Justin M. Forbes <jforbes@fedoraproject.org>

2 files changed, 4 insertions, 311 deletions

diff --git a/Patchlist.changelog b/Patchlist.changelog
index 066669310..35abf21f5 100644
--- a/Patchlist.changelog
+++ b/Patchlist.changelog
@@ -1,3 +1,6 @@
+https://gitlab.com/cki-project/kernel-ark/-/commit/c759148911ab75991555a2dde4682d9a0badba29
+ c759148911ab75991555a2dde4682d9a0badba29 Revert "drm/i915: Flush TLBs before releasing backing store"
+
 https://gitlab.com/cki-project/kernel-ark/-/commit/caf0c7ca6fe0e84e0ca85aa89a5c881ba46b5fb2
  caf0c7ca6fe0e84e0ca85aa89a5c881ba46b5fb2 drm/i915: Flush TLBs before releasing backing store
 
diff --git a/patch-5.16-redhat.patch b/patch-5.16-redhat.patch
index a2d973bf5..ff458242d 100644
--- a/patch-5.16-redhat.patch
+++ b/patch-5.16-redhat.patch
@@ -17,15 +17,6 @@
  drivers/firmware/efi/Makefile                      |   1 +
  drivers/firmware/efi/efi.c                         | 124 +++++++++++++++------
  drivers/firmware/efi/secureboot.c                  |  38 +++++++
- drivers/gpu/drm/i915/gem/i915_gem_object_types.h   |   1 +
- drivers/gpu/drm/i915/gem/i915_gem_pages.c          |  10 ++
- drivers/gpu/drm/i915/gt/intel_gt.c                 | 108 ++++++++++++++++++
- drivers/gpu/drm/i915/gt/intel_gt.h                 |   2 +
- drivers/gpu/drm/i915/gt/intel_gt_types.h           |   2 +
- drivers/gpu/drm/i915/i915_reg.h                    |  11 ++
- drivers/gpu/drm/i915/i915_vma.c                    |   3 +
- drivers/gpu/drm/i915/intel_uncore.c                |  26 ++++-
- drivers/gpu/drm/i915/intel_uncore.h                |   2 +
  drivers/hid/hid-rmi.c                              |  64 -----------
  drivers/hwtracing/coresight/coresight-etm4x-core.c |  19 ++++
  drivers/input/rmi4/rmi_driver.c                    | 124 ++++++++++++---------
@@ -51,7 +42,7 @@
  security/lockdown/lockdown.c                       |   1 +
  security/security.c                                |   6 +
  tools/testing/selftests/netfilter/nft_nat.sh       |   5 +-
- 53 files changed, 907 insertions(+), 195 deletions(-)
+ 44 files changed, 746 insertions(+), 191 deletions(-)
 
 diff --git a/Makefile b/Makefile
 index acb8ffee65dc..d41b475c83d3 100644
@@ -895,307 +886,6 @@ index 000000000000..de0a3714a5d4
 +		}
 +	}
 +}
-diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
-index da85169006d4..a0aa6dbe120e 100644
---- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
-+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
-@@ -305,6 +305,7 @@ struct drm_i915_gem_object {
- #define I915_BO_READONLY          BIT(6)
- #define I915_TILING_QUIRK_BIT     7 /* unknown swizzling; do not release! */
- #define I915_BO_PROTECTED         BIT(8)
-+#define I915_BO_WAS_BOUND_BIT     9
- 	/**
- 	 * @mem_flags - Mutable placement-related flags
- 	 *
-diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
-index 1d3f40abd025..0c85aa244f93 100644
---- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
-+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
-@@ -10,6 +10,8 @@
- #include "i915_gem_lmem.h"
- #include "i915_gem_mman.h"
-
-+#include "gt/intel_gt.h"
-+
- void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
- 				 struct sg_table *pages,
- 				 unsigned int sg_page_sizes)
-@@ -217,6 +219,14 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object *obj)
- 	__i915_gem_object_reset_page_iter(obj);
- 	obj->mm.page_sizes.phys = obj->mm.page_sizes.sg = 0;
-
-+	if (test_and_clear_bit(I915_BO_WAS_BOUND_BIT, &obj->flags)) {
-+		struct drm_i915_private *i915 = to_i915(obj->base.dev);
-+		intel_wakeref_t wakeref;
-+
-+		with_intel_runtime_pm_if_active(&i915->runtime_pm, wakeref)
-+			intel_gt_invalidate_tlbs(to_gt(i915));
-+	}
-+
- 	return pages;
- }
-
-diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
-index 1cb1948ac959..d5c2a6c07b2f 100644
---- a/drivers/gpu/drm/i915/gt/intel_gt.c
-+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
-@@ -30,6 +30,8 @@ void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
-
- 	spin_lock_init(&gt->irq_lock);
-
-+	mutex_init(&gt->tlb_invalidate_lock);
-+
- 	INIT_LIST_HEAD(&gt->closed_vma);
- 	spin_lock_init(&gt->closed_lock);
-
-@@ -907,3 +909,109 @@ void intel_gt_info_print(const struct intel_gt_info *info,
-
- 	intel_sseu_dump(&info->sseu, p);
- }
-+
-+struct reg_and_bit {
-+	i915_reg_t reg;
-+	u32 bit;
-+};
-+
-+static struct reg_and_bit
-+get_reg_and_bit(const struct intel_engine_cs *engine, const bool gen8,
-+		const i915_reg_t *regs, const unsigned int num)
-+{
-+	const unsigned int class = engine->class;
-+	struct reg_and_bit rb = { };
-+
-+	if (drm_WARN_ON_ONCE(&engine->i915->drm,
-+			     class >= num || !regs[class].reg))
-+		return rb;
-+
-+	rb.reg = regs[class];
-+	if (gen8 && class == VIDEO_DECODE_CLASS)
-+		rb.reg.reg += 4 * engine->instance; /* GEN8_M2TCR */
-+	else
-+		rb.bit = engine->instance;
-+
-+	rb.bit = BIT(rb.bit);
-+
-+	return rb;
-+}
-+
-+void intel_gt_invalidate_tlbs(struct intel_gt *gt)
-+{
-+	static const i915_reg_t gen8_regs[] = {
-+		[RENDER_CLASS]			= GEN8_RTCR,
-+		[VIDEO_DECODE_CLASS]		= GEN8_M1TCR, /* , GEN8_M2TCR */
-+		[VIDEO_ENHANCEMENT_CLASS]	= GEN8_VTCR,
-+		[COPY_ENGINE_CLASS]		= GEN8_BTCR,
-+	};
-+	static const i915_reg_t gen12_regs[] = {
-+		[RENDER_CLASS]			= GEN12_GFX_TLB_INV_CR,
-+		[VIDEO_DECODE_CLASS]		= GEN12_VD_TLB_INV_CR,
-+		[VIDEO_ENHANCEMENT_CLASS]	= GEN12_VE_TLB_INV_CR,
-+		[COPY_ENGINE_CLASS]		= GEN12_BLT_TLB_INV_CR,
-+	};
-+	struct drm_i915_private *i915 = gt->i915;
-+	struct intel_uncore *uncore = gt->uncore;
-+	struct intel_engine_cs *engine;
-+	enum intel_engine_id id;
-+	const i915_reg_t *regs;
-+	unsigned int num = 0;
-+
-+	if (I915_SELFTEST_ONLY(gt->awake == -ENODEV))
-+		return;
-+
-+	if (GRAPHICS_VER(i915) == 12) {
-+		regs = gen12_regs;
-+		num = ARRAY_SIZE(gen12_regs);
-+	} else if (GRAPHICS_VER(i915) >= 8 && GRAPHICS_VER(i915) <= 11) {
-+		regs = gen8_regs;
-+		num = ARRAY_SIZE(gen8_regs);
-+	} else if (GRAPHICS_VER(i915) < 8) {
-+		return;
-+	}
-+
-+	if (drm_WARN_ONCE(&i915->drm, !num,
-+			  "Platform does not implement TLB invalidation!"))
-+		return;
-+
-+	GEM_TRACE("\n");
-+
-+	assert_rpm_wakelock_held(&i915->runtime_pm);
-+
-+	mutex_lock(&gt->tlb_invalidate_lock);
-+	intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
-+
-+	for_each_engine(engine, gt, id) {
-+		/*
-+		 * HW architecture suggest typical invalidation time at 40us,
-+		 * with pessimistic cases up to 100us and a recommendation to
-+		 * cap at 1ms. We go a bit higher just in case.
-+		 */
-+		const unsigned int timeout_us = 100;
-+		const unsigned int timeout_ms = 4;
-+		struct reg_and_bit rb;
-+
-+		rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num);
-+		if (!i915_mmio_reg_offset(rb.reg))
-+			continue;
-+
-+		intel_uncore_write_fw(uncore, rb.reg, rb.bit);
-+		if (__intel_wait_for_register_fw(uncore,
-+						 rb.reg, rb.bit, 0,
-+						 timeout_us, timeout_ms,
-+						 NULL))
-+			drm_err_ratelimited(&gt->i915->drm,
-+					    "%s TLB invalidation did not complete in %ums!\n",
-+					    engine->name, timeout_ms);
-+	}
-+
-+	/*
-+	 * Use delayed put since a) we mostly expect a flurry of TLB
-+	 * invalidations so it is good to avoid paying the forcewake cost and
-+	 * b) it works around a bug in Icelake which cannot cope with too rapid
-+	 * transitions.
-+	 */
-+	intel_uncore_forcewake_put_delayed(uncore, FORCEWAKE_ALL);
-+	mutex_unlock(&gt->tlb_invalidate_lock);
-+}
-diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
-index 74e771871a9b..c0169d6017c2 100644
---- a/drivers/gpu/drm/i915/gt/intel_gt.h
-+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
-@@ -90,4 +90,6 @@ void intel_gt_info_print(const struct intel_gt_info *info,
-
- void intel_gt_watchdog_work(struct work_struct *work);
-
-+void intel_gt_invalidate_tlbs(struct intel_gt *gt);
-+
- #endif /* __INTEL_GT_H__ */
-diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
-index 14216cc471b1..f20687796490 100644
---- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
-+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
-@@ -73,6 +73,8 @@ struct intel_gt {
-
- 	struct intel_uc uc;
-
-+	struct mutex tlb_invalidate_lock;
-+
- 	struct i915_wa_list wa_list;
-
- 	struct intel_gt_timelines {
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index bcee121bec5a..14ce8809efdd 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -2697,6 +2697,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
- #define   GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING	(1 << 28)
- #define   GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT	(1 << 24)
-
-+#define GEN8_RTCR	_MMIO(0x4260)
-+#define GEN8_M1TCR	_MMIO(0x4264)
-+#define GEN8_M2TCR	_MMIO(0x4268)
-+#define GEN8_BTCR	_MMIO(0x426c)
-+#define GEN8_VTCR	_MMIO(0x4270)
-+
- #if 0
- #define PRB0_TAIL	_MMIO(0x2030)
- #define PRB0_HEAD	_MMIO(0x2034)
-@@ -2792,6 +2798,11 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
- #define   FAULT_VA_HIGH_BITS		(0xf << 0)
- #define   FAULT_GTT_SEL			(1 << 4)
-
-+#define GEN12_GFX_TLB_INV_CR	_MMIO(0xced8)
-+#define GEN12_VD_TLB_INV_CR	_MMIO(0xcedc)
-+#define GEN12_VE_TLB_INV_CR	_MMIO(0xcee0)
-+#define GEN12_BLT_TLB_INV_CR	_MMIO(0xcee4)
-+
- #define GEN12_AUX_ERR_DBG		_MMIO(0x43f4)
-
- #define FPGA_DBG		_MMIO(0x42300)
-diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
-index bef795e265a6..cb288e6bdc02 100644
---- a/drivers/gpu/drm/i915/i915_vma.c
-+++ b/drivers/gpu/drm/i915/i915_vma.c
-@@ -431,6 +431,9 @@ int i915_vma_bind(struct i915_vma *vma,
- 		vma->ops->bind_vma(vma->vm, NULL, vma, cache_level, bind_flags);
- 	}
-
-+	if (vma->obj)
-+		set_bit(I915_BO_WAS_BOUND_BIT, &vma->obj->flags);
-+
- 	atomic_or(bind_flags, &vma->flags);
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index e072054adac5..e21c779cb487 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -724,7 +724,8 @@ void intel_uncore_forcewake_get__locked(struct intel_uncore *uncore,
- }
-
- static void __intel_uncore_forcewake_put(struct intel_uncore *uncore,
--					 enum forcewake_domains fw_domains)
-+					 enum forcewake_domains fw_domains,
-+					 bool delayed)
- {
- 	struct intel_uncore_forcewake_domain *domain;
- 	unsigned int tmp;
-@@ -739,7 +740,11 @@ static void __intel_uncore_forcewake_put(struct intel_uncore *uncore,
- 			continue;
- 		}
-
--		fw_domains_put(uncore, domain->mask);
-+		if (delayed &&
-+		    !(domain->uncore->fw_domains_timer & domain->mask))
-+			fw_domain_arm_timer(domain);
-+		else
-+			fw_domains_put(uncore, domain->mask);
- 	}
- }
-
-@@ -760,7 +765,20 @@ void intel_uncore_forcewake_put(struct intel_uncore *uncore,
- 		return;
-
- 	spin_lock_irqsave(&uncore->lock, irqflags);
--	__intel_uncore_forcewake_put(uncore, fw_domains);
-+	__intel_uncore_forcewake_put(uncore, fw_domains, false);
-+	spin_unlock_irqrestore(&uncore->lock, irqflags);
-+}
-+
-+void intel_uncore_forcewake_put_delayed(struct intel_uncore *uncore,
-+					enum forcewake_domains fw_domains)
-+{
-+	unsigned long irqflags;
-+
-+	if (!uncore->fw_get_funcs)
-+		return;
-+
-+	spin_lock_irqsave(&uncore->lock, irqflags);
-+	__intel_uncore_forcewake_put(uncore, fw_domains, true);
- 	spin_unlock_irqrestore(&uncore->lock, irqflags);
- }
-
-@@ -802,7 +820,7 @@ void intel_uncore_forcewake_put__locked(struct intel_uncore *uncore,
- 	if (!uncore->fw_get_funcs)
- 		return;
-
--	__intel_uncore_forcewake_put(uncore, fw_domains);
-+	__intel_uncore_forcewake_put(uncore, fw_domains, false);
- }
-
- void assert_forcewakes_inactive(struct intel_uncore *uncore)
-diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
-index 3248e4e2c540..d08088fa4c7e 100644
---- a/drivers/gpu/drm/i915/intel_uncore.h
-+++ b/drivers/gpu/drm/i915/intel_uncore.h
-@@ -243,6 +243,8 @@ void intel_uncore_forcewake_get(struct intel_uncore *uncore,
- 				enum forcewake_domains domains);
- void intel_uncore_forcewake_put(struct intel_uncore *uncore,
- 				enum forcewake_domains domains);
-+void intel_uncore_forcewake_put_delayed(struct intel_uncore *uncore,
-+					enum forcewake_domains domains);
- void intel_uncore_forcewake_flush(struct intel_uncore *uncore,
- 				  enum forcewake_domains fw_domains);
-
 diff --git a/drivers/hid/hid-rmi.c b/drivers/hid/hid-rmi.c
 index 311eee599ce9..2460c6bd46f8 100644
 --- a/drivers/hid/hid-rmi.c