Add DRM fix

2 files changed, 138 insertions, 3 deletions

diff --git a/0001-drm-i915-dp-revert-back-to-max-link-rate-and-lane-co.patch b/0001-drm-i915-dp-revert-back-to-max-link-rate-and-lane-co.patch
new file mode 100644
index 000000000..ab16d1aa0
--- /dev/null
+++ b/0001-drm-i915-dp-revert-back-to-max-link-rate-and-lane-co.patch
@@ -0,0 +1,132 @@
+From 1b58e7d454035355aaa0f29d31366669c13643e7 Mon Sep 17 00:00:00 2001
+From: Jani Nikula <jani.nikula@intel.com>
+Date: Fri, 5 Apr 2019 10:19:31 +0300
+Subject: [PATCH] drm/i915/dp: revert back to max link rate and lane count on
+ eDP
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
+Cc: Jani Nikula <jani.nikula@intel.com>
+
+Commit 7769db588384 ("drm/i915/dp: optimize eDP 1.4+ link config fast
+and narrow") started to optize the eDP 1.4+ link config, both per spec
+and as preparation for display stream compression support.
+
+Sadly, we again face panels that flat out fail with parameters they
+claim to support. Revert, and go back to the drawing board.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109959
+Fixes: 7769db588384 ("drm/i915/dp: optimize eDP 1.4+ link config fast and narrow")
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Cc: Manasi Navare <manasi.d.navare@intel.com>
+Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Cc: Matt Atwood <matthew.s.atwood@intel.com>
+Cc: "Lee, Shawn C" <shawn.c.lee@intel.com>
+Cc: Dave Airlie <airlied@gmail.com>
+Cc: intel-gfx@lists.freedesktop.org
+Cc: <stable@vger.kernel.org> # v5.0+
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+---
+ drivers/gpu/drm/i915/intel_dp.c | 69 +++++----------------------------
+ 1 file changed, 10 insertions(+), 59 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
+index 22a746..dcd1df 100644
+--- a/drivers/gpu/drm/i915/intel_dp.c
++++ b/drivers/gpu/drm/i915/intel_dp.c
+@@ -1845,42 +1845,6 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
+ 	return false;
+ }
+ 
+-/* Optimize link config in order: max bpp, min lanes, min clock */
+-static bool
+-intel_dp_compute_link_config_fast(struct intel_dp *intel_dp,
+-				  struct intel_crtc_state *pipe_config,
+-				  const struct link_config_limits *limits)
+-{
+-	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
+-	int bpp, clock, lane_count;
+-	int mode_rate, link_clock, link_avail;
+-
+-	for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
+-		mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
+-						   bpp);
+-
+-		for (lane_count = limits->min_lane_count;
+-		     lane_count <= limits->max_lane_count;
+-		     lane_count <<= 1) {
+-			for (clock = limits->min_clock; clock <= limits->max_clock; clock++) {
+-				link_clock = intel_dp->common_rates[clock];
+-				link_avail = intel_dp_max_data_rate(link_clock,
+-								    lane_count);
+-
+-				if (mode_rate <= link_avail) {
+-					pipe_config->lane_count = lane_count;
+-					pipe_config->pipe_bpp = bpp;
+-					pipe_config->port_clock = link_clock;
+-
+-					return true;
+-				}
+-			}
+-		}
+-	}
+-
+-	return false;
+-}
+-
+ static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc)
+ {
+ 	int i, num_bpc;
+@@ -2013,15 +1977,13 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
+ 	limits.min_bpp = 6 * 3;
+ 	limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config);
+ 
+-	if (intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0] < DP_EDP_14) {
++	if (intel_dp_is_edp(intel_dp)) {
+ 		/*
+ 		 * Use the maximum clock and number of lanes the eDP panel
+-		 * advertizes being capable of. The eDP 1.3 and earlier panels
+-		 * are generally designed to support only a single clock and
+-		 * lane configuration, and typically these values correspond to
+-		 * the native resolution of the panel. With eDP 1.4 rate select
+-		 * and DSC, this is decreasingly the case, and we need to be
+-		 * able to select less than maximum link config.
++		 * advertizes being capable of. The panels are generally
++		 * designed to support only a single clock and lane
++		 * configuration, and typically these values correspond to the
++		 * native resolution of the panel.
+ 		 */
+ 		limits.min_lane_count = limits.max_lane_count;
+ 		limits.min_clock = limits.max_clock;
+@@ -2035,22 +1997,11 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
+ 		      intel_dp->common_rates[limits.max_clock],
+ 		      limits.max_bpp, adjusted_mode->crtc_clock);
+ 
+-	if (intel_dp_is_edp(intel_dp))
+-		/*
+-		 * Optimize for fast and narrow. eDP 1.3 section 3.3 and eDP 1.4
+-		 * section A.1: "It is recommended that the minimum number of
+-		 * lanes be used, using the minimum link rate allowed for that
+-		 * lane configuration."
+-		 *
+-		 * Note that we use the max clock and lane count for eDP 1.3 and
+-		 * earlier, and fast vs. wide is irrelevant.
+-		 */
+-		ret = intel_dp_compute_link_config_fast(intel_dp, pipe_config,
+-							&limits);
+-	else
+-		/* Optimize for slow and wide. */
+-		ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config,
+-							&limits);
++	/*
++	 * Optimize for slow and wide. This is the place to add alternative
++	 * optimization policy.
++	 */
++	ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits);
+ 
+ 	/* enable compression if the mode doesn't fit available BW */
+ 	if (!ret) {
+-- 
+2.20.1
+
diff --git a/kernel.spec b/kernel.spec
index fedb26aa9..321fdba31 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -621,6 +621,9 @@ Patch517: vfio-type1-limit-dma-mappings-per-container.patch
 Patch518: 0001-KVM-x86-nVMX-close-leak-of-L0-s-x2APIC-MSRs-CVE-2019.patch
 Patch519: 0001-KVM-x86-nVMX-fix-x2APIC-VTPR-read-intercept.patch
 
+# drm fix
+Patch520: 0001-drm-i915-dp-revert-back-to-max-link-rate-and-lane-co.patch
+
 # END OF PATCH DEFINITIONS
 
 %endif
@@ -1894,12 +1897,12 @@ fi
 #
 #
 %changelog
-* Mon Apr 08 2019 Justin M. Forbes <jforbes@fedoraproject.org>
-- Fix CVE-2019 (rhbz 1695044 1697187)
-
 * Mon Apr 08 2019 Laura Abbott <labbott@redhat.com> - 5.0.7-200
 - Linux v5.0.7
 
+* Mon Apr 08 2019 Justin M. Forbes <jforbes@fedoraproject.org>
+- Fix CVE-2019 (rhbz 1695044 1697187)
+
 * Wed Apr 03 2019 Laura Abbott <labbott@redhat.com> - 5.0.6-200
 - Linux v5.0.6