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authorPeter Robinson <pbrobinson@gmail.com>2016-08-28 23:43:13 +0100
committerPeter Robinson <pbrobinson@gmail.com>2016-08-28 23:43:13 +0100
commit506f0e7f2be9816922a502015710510ed790285d (patch)
tree1080ecb7e446e7b258371c809e15681a57a4e1f2
parent9ff3c92f08fa8d453a7589537ecb487472dfaf0f (diff)
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Minor ARM updates
-rw-r--r--Initial-AllWinner-A64-and-PINE64-support.patch1200
-rw-r--r--bcm283x-upstream-fixes.patch28
-rw-r--r--config-armv7-generic3
-rw-r--r--kernel.spec7
4 files changed, 4 insertions, 1234 deletions
diff --git a/Initial-AllWinner-A64-and-PINE64-support.patch b/Initial-AllWinner-A64-and-PINE64-support.patch
deleted file mode 100644
index 966275a8f..000000000
--- a/Initial-AllWinner-A64-and-PINE64-support.patch
+++ /dev/null
@@ -1,1200 +0,0 @@
-From 97f002d28e975991226ab70599731bd2ccc8c060 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Sun, 6 Mar 2016 12:06:41 +0000
-Subject: [PATCH] Initial AllWinner A64 and PINE64 support
-
----
- Documentation/devicetree/bindings/arm/sunxi.txt | 1 +
- Documentation/devicetree/bindings/clock/sunxi.txt | 7 +
- .../devicetree/bindings/vendor-prefixes.txt | 1 +
- arch/arm/boot/dts/sun8i-h3.dtsi | 18 +-
- arch/arm/mach-sunxi/Kconfig | 7 +
- arch/arm64/Kconfig.platforms | 6 +
- arch/arm64/boot/dts/Makefile | 1 +
- arch/arm64/boot/dts/allwinner/Makefile | 5 +
- .../dts/allwinner/sun50i-a64-pine64-common.dtsi | 80 +++
- .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 59 ++
- .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 58 ++
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 624 +++++++++++++++++++++
- drivers/clk/sunxi/Makefile | 1 +
- drivers/clk/sunxi/clk-factors.c | 3 +-
- drivers/clk/sunxi/clk-factors.h | 1 +
- drivers/clk/sunxi/clk-multi-gates.c | 105 ++++
- drivers/clk/sunxi/clk-sunxi.c | 4 +-
- drivers/crypto/Kconfig | 2 +-
- 23 files changed, 1582 insertions(+), 16 deletions(-)
- create mode 100644 arch/arm64/boot/dts/allwinner/Makefile
- create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi
- create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
- create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
- create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
- create mode 100644 drivers/clk/sunxi/clk-multi-gates.c
- create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
-
-diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt
-index bb9b0faa..8b39d2b 100644
---- a/Documentation/devicetree/bindings/arm/sunxi.txt
-+++ b/Documentation/devicetree/bindings/arm/sunxi.txt
-@@ -13,3 +13,4 @@ using one of the following compatible strings:
- allwinner,sun8i-a83t
- allwinner,sun8i-h3
- allwinner,sun9i-a80
-+ allwinner,sun50i-a64
-diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
-index e59f57b..8af12b5 100644
---- a/Documentation/devicetree/bindings/clock/sunxi.txt
-+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
-@@ -77,6 +77,8 @@ Required properties:
- "allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
- "allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
- "allwinner,sun4i-a10-ve-clk" - for the Video Engine clock
-+ "allwinner,sunxi-multi-bus-gates-clk" - for the multi-parent bus gates
-+ "allwinner,sun50i-a64-bus-gates-clk" - for the bus gates on A64
-
- Required properties for all clocks:
- - reg : shall be the control register address for the clock.
-@@ -117,6 +119,11 @@ For "allwinner,sun6i-a31-pll6-clk", there are 2 outputs. The first output
- is the normal PLL6 output, or "pll6". The second output is rate doubled
- PLL6, or "pll6x2".
-
-+The "allwinner,sunxi-multi-bus-gates-clk" holds the actual clocks in
-+child nodes, where each one specifies the parent clock that the particular
-+gates are depending from. The child nodes each follow the common clock
-+binding as described in this document.
-+
- The "allwinner,*-mmc-clk" clocks have three different outputs: the
- main clock, with the ID 0, and the output and sample clocks, with the
- IDs 1 and 2, respectively.
-diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
-index 72e2c5a..0c22fa9 100644
---- a/Documentation/devicetree/bindings/vendor-prefixes.txt
-+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
-@@ -175,6 +175,7 @@ parade Parade Technologies Inc.
- pericom Pericom Technology Inc.
- phytec PHYTEC Messtechnik GmbH
- picochip Picochip Ltd
-+pine64 Pine64
- plathome Plat'Home Co., Ltd.
- plda PLDA
- pixcir PIXCIR MICROELECTRONICS Co., Ltd
-diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
-index 1524130e..7c50fa0 100644
---- a/arch/arm/boot/dts/sun8i-h3.dtsi
-+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
-@@ -137,12 +137,12 @@
- clock-output-names = "pll6d2";
- };
-
-- /* dummy clock until pll6 can be reused */
-- pll8: pll8_clk {
-- #clock-cells = <0>;
-- compatible = "fixed-clock";
-- clock-frequency = <1>;
-- clock-output-names = "pll8";
-+ pll8: clk@c01c20044 {
-+ #clock-cells = <1>;
-+ compatible = "allwinner,sun6i-a31-pll6-clk";
-+ reg = <0x01c20044 0x4>;
-+ clocks = <&osc24M>;
-+ clock-output-names = "pll8", "pll8x2";
- };
-
- cpu: cpu_clk@01c20050 {
-@@ -243,7 +243,7 @@
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20088 0x4>;
-- clocks = <&osc24M>, <&pll6 0>, <&pll8>;
-+ clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
- clock-output-names = "mmc0",
- "mmc0_output",
- "mmc0_sample";
-@@ -253,7 +253,7 @@
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c2008c 0x4>;
-- clocks = <&osc24M>, <&pll6 0>, <&pll8>;
-+ clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
- clock-output-names = "mmc1",
- "mmc1_output",
- "mmc1_sample";
-@@ -263,7 +263,7 @@
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20090 0x4>;
-- clocks = <&osc24M>, <&pll6 0>, <&pll8>;
-+ clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
- clock-output-names = "mmc2",
- "mmc2_output",
- "mmc2_sample";
-diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
-index c124d65..b305f5b 100644
---- a/arch/arm/mach-sunxi/Kconfig
-+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -46,4 +46,11 @@ config MACH_SUN9I
- default ARCH_SUNXI
- select ARM_GIC
-
-+config MACH_SUN50I
-+ bool "Allwinner A64 (sun50i) SoCs support"
-+ default ARCH_SUNXI
-+ select ARM_GIC
-+ select HAVE_ARM_ARCH_TIMER
-+ select PINCTRL_SUN50I_A64
-+
- endif
-diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
-index 21074f6..63a690d 100644
---- a/arch/arm64/Kconfig.platforms
-+++ b/arch/arm64/Kconfig.platforms
-@@ -72,6 +72,12 @@ config ARCH_SEATTLE
- config ARCH_SHMOBILE
- bool
-
-+config ARCH_SUNXI
-+ bool "Allwinner sunxi 64-bit SoC Family"
-+ select PINCTRL_SUN50I_A64
-+ help
-+ This enables support for Allwinner sunxi based SoCs like the A64.
-+
- config ARCH_RENESAS
- bool "Renesas SoC Platforms"
- select ARCH_SHMOBILE
-diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
-index f832b8a..3b7428a 100644
---- a/arch/arm64/boot/dts/Makefile
-+++ b/arch/arm64/boot/dts/Makefile
-@@ -2,3 +2,4 @@
- dts-dirs += al
-+dts-dirs += allwinner
- dts-dirs += altera
- dts-dirs += amd
-diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
-new file mode 100644
-index 0000000..1e29a5a
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/Makefile
-@@ -0,0 +1,5 @@
-+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
-+
-+always := $(dtb-y)
-+subdir-y := $(dts-dirs)
-+clean-files := *.dtb
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi
-new file mode 100644
-index 0000000..d5a7249
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi
-@@ -0,0 +1,80 @@
-+/*
-+ * Copyright (c) 2016 ARM Ltd.
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This library is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This library is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+#include "sun50i-a64.dtsi"
-+
-+/ {
-+
-+ aliases {
-+ serial0 = &uart0;
-+ };
-+
-+ soc {
-+ reg_vcc3v3: vcc3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "vcc3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+ };
-+};
-+
-+&mmc0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>;
-+ vmmc-supply = <&reg_vcc3v3>;
-+ cd-gpios = <&pio 5 6 0>;
-+ cd-inverted;
-+ status = "okay";
-+};
-+
-+&uart0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart0_pins_a>;
-+ status = "okay";
-+};
-+
-+&i2c1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c1_pins>;
-+ status = "okay";
-+};
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
-new file mode 100644
-index 0000000..549dc15
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
-@@ -0,0 +1,59 @@
-+/*
-+ * Copyright (c) 2016 ARM Ltd.
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This library is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This library is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/dts-v1/;
-+
-+#include "sun50i-a64-pine64-common.dtsi"
-+
-+/ {
-+ model = "Pine64+";
-+ compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
-+
-+ chosen {
-+ stdout-path = "serial0:115200n8";
-+ };
-+
-+ /* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */
-+ memory {
-+ reg = <0x40000000 0x40000000>;
-+ };
-+};
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-new file mode 100644
-index 0000000..ebe029e
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-@@ -0,0 +1,58 @@
-+/*
-+ * Copyright (c) 2016 ARM Ltd.
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This library is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This library is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/dts-v1/;
-+
-+#include "sun50i-a64-pine64-common.dtsi"
-+
-+/ {
-+ model = "Pine64";
-+ compatible = "pine64,pine64", "allwinner,sun50i-a64";
-+
-+ chosen {
-+ stdout-path = "serial0:115200n8";
-+ };
-+
-+ memory {
-+ reg = <0x40000000 0x20000000>;
-+ };
-+};
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-new file mode 100644
-index 0000000..1bd436f
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -0,0 +1,624 @@
-+/*
-+ * Copyright (C) 2016 ARM Ltd.
-+ * based on the Allwinner H3 dtsi:
-+ * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This file is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+#include <dt-bindings/pinctrl/sun4i-a10.h>
-+
-+/ {
-+ interrupt-parent = <&gic>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+
-+ cpus {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ cpu@0 {
-+ compatible = "arm,cortex-a53", "arm,armv8";
-+ device_type = "cpu";
-+ reg = <0>;
-+ enable-method = "psci";
-+ };
-+
-+ cpu@1 {
-+ compatible = "arm,cortex-a53", "arm,armv8";
-+ device_type = "cpu";
-+ reg = <1>;
-+ enable-method = "psci";
-+ };
-+
-+ cpu@2 {
-+ compatible = "arm,cortex-a53", "arm,armv8";
-+ device_type = "cpu";
-+ reg = <2>;
-+ enable-method = "psci";
-+ };
-+
-+ cpu@3 {
-+ compatible = "arm,cortex-a53", "arm,armv8";
-+ device_type = "cpu";
-+ reg = <3>;
-+ enable-method = "psci";
-+ };
-+ };
-+
-+ psci {
-+ compatible = "arm,psci-0.2";
-+ method = "smc";
-+ };
-+
-+ memory {
-+ device_type = "memory";
-+ reg = <0x40000000 0>;
-+ };
-+
-+ gic: interrupt-controller@1c81000 {
-+ compatible = "arm,gic-400";
-+ interrupt-controller;
-+ #interrupt-cells = <3>;
-+ #address-cells = <0>;
-+
-+ reg = <0x01c81000 0x1000>,
-+ <0x01c82000 0x2000>,
-+ <0x01c84000 0x2000>,
-+ <0x01c86000 0x2000>;
-+ interrupts = <GIC_PPI 9
-+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-+ };
-+
-+ timer {
-+ compatible = "arm,armv8-timer";
-+ interrupts = <GIC_PPI 13
-+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
-+ <GIC_PPI 14
-+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
-+ <GIC_PPI 11
-+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
-+ <GIC_PPI 10
-+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-+ };
-+
-+ clocks {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges;
-+
-+ osc24M: osc24M_clk {
-+ #clock-cells = <0>;
-+ compatible = "fixed-clock";
-+ clock-frequency = <24000000>;
-+ clock-output-names = "osc24M";
-+ };
-+
-+ osc32k: osc32k_clk {
-+ #clock-cells = <0>;
-+ compatible = "fixed-clock";
-+ clock-frequency = <32768>;
-+ clock-output-names = "osc32k";
-+ };
-+
-+ pll1: pll1_clk@1c20000 {
-+ #clock-cells = <0>;
-+ compatible = "allwinner,sun8i-a23-pll1-clk";
-+ reg = <0x01c20000 0x4>;
-+ clocks = <&osc24M>;
-+ clock-output-names = "pll1";
-+ };
-+
-+ pll6: pll6_clk@1c20028 {
-+ #clock-cells = <1>;
-+ compatible = "allwinner,sun6i-a31-pll6-clk";
-+ reg = <0x01c20028 0x4>;
-+ clocks = <&osc24M>;
-+ clock-output-names = "pll6", "pll6x2";
-+ };
-+
-+ pll6d2: pll6d2_clk {
-+ #clock-cells = <0>;
-+ compatible = "fixed-factor-clock";
-+ clock-div = <2>;
-+ clock-mult = <1>;
-+ clocks = <&pll6 0>;
-+ clock-output-names = "pll6d2";
-+ };
-+
-+ pll7: pll7_clk@1c2002c {
-+ #clock-cells = <1>;
-+ compatible = "allwinner,sun6i-a31-pll6-clk";
-+ reg = <0x01c2002c 0x4>;
-+ clocks = <&osc24M>;
-+ clock-output-names = "pll7", "pll7x2";
-+ };
-+
-+ cpu: cpu_clk@1c20050 {
-+ #clock-cells = <0>;
-+ compatible = "allwinner,sun4i-a10-cpu-clk";
-+ reg = <0x01c20050 0x4>;
-+ clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>;
-+ clock-output-names = "cpu";
-+ critical-clocks = <0>;
-+ };
-+
-+ axi: axi_clk@1c20050 {
-+ #clock-cells = <0>;
-+ compatible = "allwinner,sun4i-a10-axi-clk";
-+ reg = <0x01c20050 0x4>;
-+ clocks = <&cpu>;
-+ clock-output-names = "axi";
-+ };
-+
-+ ahb1: ahb1_clk@1c20054 {
-+ #clock-cells = <0>;
-+ compatible = "allwinner,sun6i-a31-ahb1-clk";
-+ reg = <0x01c20054 0x4>;
-+ clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
-+ clock-output-names = "ahb1";
-+ };
-+
-+ ahb2: ahb2_clk@1c2005c {
-+ #clock-cells = <0>;
-+ compatible = "allwinner,sun8i-h3-ahb2-clk";
-+ reg = <0x01c2005c 0x4>;
-+ clocks = <&ahb1>, <&pll6d2>;
-+ clock-output-names = "ahb2";
-+ };
-+
-+ apb1: apb1_clk@1c20054 {
-+ #clock-cells = <0>;
-+ compatible = "allwinner,sun4i-a10-apb0-clk";
-+ reg = <0x01c20054 0x4>;
-+ clocks = <&ahb1>;
-+ clock-output-names = "apb1";
-+ };
-+
-+ apb2: apb2_clk@1c20058 {
-+ #clock-cells = <0>;
-+ compatible = "allwinner,sun4i-a10-apb1-clk";
-+ reg = <0x01c20058 0x4>;
-+ clocks = <&osc32k>, <&osc24M>, <&pll6 1>, <&pll6 1>;
-+ clock-output-names = "apb2";
-+ };
-+
-+ bus_gates: bus_gates_clk@1c20060 {
-+ #clock-cells = <1>;
-+ compatible = "allwinner,sun50i-a64-bus-gates-clk",
-+ "allwinner,sunxi-multi-bus-gates-clk";
-+ reg = <0x01c20060 0x14>;
-+ ahb1_parent {
-+ clocks = <&ahb1>;
-+ clock-indices = <1>, <5>,
-+ <6>, <8>,
-+ <9>, <10>,
-+ <13>, <14>,
-+ <18>, <19>,
-+ <20>, <21>,
-+ <23>, <24>,
-+ <25>, <28>,
-+ <32>, <35>,
-+ <36>, <37>,
-+ <40>, <43>,
-+ <44>, <52>,
-+ <53>, <54>,
-+ <135>;
-+ clock-output-names = "bus_mipidsi", "bus_ce",
-+ "bus_dma", "bus_mmc0",
-+ "bus_mmc1", "bus_mmc2",
-+ "bus_nand", "bus_sdram",
-+ "bus_ts", "bus_hstimer",
-+ "bus_spi0", "bus_spi1",
-+ "bus_otg", "bus_otg_ehci0",
-+ "bus_ehci0", "bus_otg_ohci0",
-+ "bus_ve", "bus_lcd0",
-+ "bus_lcd1", "bus_deint",
-+ "bus_csi", "bus_hdmi",
-+ "bus_de", "bus_gpu",
-+ "bus_msgbox", "bus_spinlock",
-+ "bus_dbg";
-+ };
-+ ahb2_parent {
-+ clocks = <&ahb2>;
-+ clock-indices = <17>, <29>;
-+ clock-output-names = "bus_gmac", "bus_ohci0";
-+ };
-+ apb1_parent {
-+ clocks = <&apb1>;
-+ clock-indices = <64>, <65>,
-+ <69>, <72>,
-+ <76>, <77>,
-+ <78>;
-+ clock-output-names = "bus_codec", "bus_spdif",
-+ "bus_pio", "bus_ths",
-+ "bus_i2s0", "bus_i2s1",
-+ "bus_i2s2";
-+ };
-+ abp2_parent {
-+ clocks = <&apb2>;
-+ clock-indices = <96>, <97>,
-+ <98>, <101>,
-+ <112>, <113>,
-+ <114>, <115>,
-+ <116>;
-+ clock-output-names = "bus_i2c0", "bus_i2c1",
-+ "bus_i2c2", "bus_scr",
-+ "bus_uart0", "bus_uart1",
-+ "bus_uart2", "bus_uart3",
-+ "bus_uart4";
-+ };
-+ };
-+
-+ mmc0_clk: mmc0_clk@1c20088 {
-+ #clock-cells = <0>;
-+ compatible = "allwinner,sun4i-a10-mod0-clk";
-+ reg = <0x01c20088 0x4>;
-+ clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
-+ clock-output-names = "mmc0";
-+ };
-+
-+ mmc1_clk: mmc1_clk@1c2008c {
-+ #clock-cells = <0>;
-+ compatible = "allwinner,sun4i-a10-mod0-clk";
-+ reg = <0x01c2008c 0x4>;
-+ clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
-+ clock-output-names = "mmc1";
-+ };
-+
-+ mmc2_clk: mmc2_clk@1c20090 {
-+ #clock-cells = <0>;
-+ compatible = "allwinner,sun4i-a10-mod0-clk";
-+ reg = <0x01c20090 0x4>;
-+ clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
-+ clock-output-names = "mmc2";
-+ };
-+ };
-+
-+ soc {
-+ compatible = "simple-bus";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges;
-+
-+ mmc0: mmc@1c0f000 {
-+ compatible = "allwinner,sun50i-a64-mmc",
-+ "allwinner,sun5i-a13-mmc";
-+ reg = <0x01c0f000 0x1000>;
-+ clocks = <&bus_gates 8>, <&mmc0_clk>,
-+ <&mmc0_clk>, <&mmc0_clk>;
-+ clock-names = "ahb", "mmc",
-+ "output", "sample";
-+ resets = <&ahb_rst 8>;
-+ reset-names = "ahb";
-+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
-+ status = "disabled";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+
-+ mmc1: mmc@1c10000 {
-+ compatible = "allwinner,sun50i-a64-mmc",
-+ "allwinner,sun5i-a13-mmc";
-+ reg = <0x01c10000 0x1000>;
-+ clocks = <&bus_gates 9>, <&mmc1_clk>,
-+ <&mmc1_clk>, <&mmc1_clk>;
-+ clock-names = "ahb", "mmc",
-+ "output", "sample";
-+ resets = <&ahb_rst 9>;
-+ reset-names = "ahb";
-+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
-+ status = "disabled";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+
-+ mmc2: mmc@1c11000 {
-+ compatible = "allwinner,sun50i-a64-mmc",
-+ "allwinner,sun5i-a13-mmc";
-+ reg = <0x01c11000 0x1000>;
-+ clocks = <&bus_gates 10>, <&mmc2_clk>,
-+ <&mmc2_clk>, <&mmc2_clk>;
-+ clock-names = "ahb", "mmc",
-+ "output", "sample";
-+ resets = <&ahb_rst 10>;
-+ reset-names = "ahb";
-+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-+ status = "disabled";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+
-+ pio: pinctrl@1c20800 {
-+ compatible = "allwinner,sun50i-a64-pinctrl";
-+ reg = <0x01c20800 0x400>;
-+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
-+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
-+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&bus_gates 69>;
-+ gpio-controller;
-+ #gpio-cells = <3>;
-+ interrupt-controller;
-+ #interrupt-cells = <2>;
-+
-+ uart0_pins_a: uart0@0 {
-+ allwinner,pins = "PB8", "PB9";
-+ allwinner,function = "uart0";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ uart0_pins_b: uart0@1 {
-+ allwinner,pins = "PF2", "PF3";
-+ allwinner,function = "uart0";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ uart1_2pins: uart1_2@0 {
-+ allwinner,pins = "PG6", "PG7";
-+ allwinner,function = "uart1";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ uart1_4pins: uart1_4@0 {
-+ allwinner,pins = "PG6", "PG7", "PG8", "PG9";
-+ allwinner,function = "uart1";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ uart2_2pins: uart2_2@0 {
-+ allwinner,pins = "PB0", "PB1";
-+ allwinner,function = "uart2";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ uart2_4pins: uart2_4@0 {
-+ allwinner,pins = "PB0", "PB1", "PB2", "PB3";
-+ allwinner,function = "uart2";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ uart3_pins_a: uart3@0 {
-+ allwinner,pins = "PD0", "PD1";
-+ allwinner,function = "uart3";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ uart3_2pins_b: uart3_2@1 {
-+ allwinner,pins = "PH4", "PH5";
-+ allwinner,function = "uart3";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ uart3_4pins_b: uart3_4@1 {
-+ allwinner,pins = "PH4", "PH5", "PH6", "PH7";
-+ allwinner,function = "uart3";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ uart4_2pins: uart4_2@0 {
-+ allwinner,pins = "PD2", "PD3";
-+ allwinner,function = "uart4";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ uart4_4pins: uart4_4@0 {
-+ allwinner,pins = "PD2", "PD3", "PD4", "PD5";
-+ allwinner,function = "uart4";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ mmc0_pins: mmc0@0 {
-+ allwinner,pins = "PF0", "PF1", "PF2", "PF3",
-+ "PF4", "PF5";
-+ allwinner,function = "mmc0";
-+ allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ mmc0_default_cd_pin: mmc0_cd_pin@0 {
-+ allwinner,pins = "PF6";
-+ allwinner,function = "gpio_in";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
-+ };
-+
-+ mmc1_pins: mmc1@0 {
-+ allwinner,pins = "PG0", "PG1", "PG2", "PG3",
-+ "PG4", "PG5";
-+ allwinner,function = "mmc1";
-+ allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ mmc2_pins: mmc2@0 {
-+ allwinner,pins = "PC1", "PC5", "PC6", "PC8",
-+ "PC9", "PC10";
-+ allwinner,function = "mmc2";
-+ allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ i2c0_pins: i2c0_pins {
-+ allwinner,pins = "PH0", "PH1";
-+ allwinner,function = "i2c0";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ i2c1_pins: i2c1_pins {
-+ allwinner,pins = "PH2", "PH3";
-+ allwinner,function = "i2c1";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ i2c2_pins: i2c2_pins {
-+ allwinner,pins = "PE14", "PE15";
-+ allwinner,function = "i2c2";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+ };
-+
-+ ahb_rst: reset@1c202c0 {
-+ #reset-cells = <1>;
-+ compatible = "allwinner,sun6i-a31-clock-reset";
-+ reg = <0x01c202c0 0xc>;
-+ };
-+
-+ apb1_rst: reset@1c202d0 {
-+ #reset-cells = <1>;
-+ compatible = "allwinner,sun6i-a31-clock-reset";
-+ reg = <0x01c202d0 0x4>;
-+ };
-+
-+ apb2_rst: reset@1c202d8 {
-+ #reset-cells = <1>;
-+ compatible = "allwinner,sun6i-a31-clock-reset";
-+ reg = <0x01c202d8 0x4>;
-+ };
-+
-+ uart0: serial@1c28000 {
-+ compatible = "snps,dw-apb-uart";
-+ reg = <0x01c28000 0x400>;
-+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
-+ reg-shift = <2>;
-+ reg-io-width = <4>;
-+ clocks = <&bus_gates 112>;
-+ resets = <&apb2_rst 16>;
-+ status = "disabled";
-+ };
-+
-+ uart1: serial@1c28400 {
-+ compatible = "snps,dw-apb-uart";
-+ reg = <0x01c28400 0x400>;
-+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-+ reg-shift = <2>;
-+ reg-io-width = <4>;
-+ clocks = <&bus_gates 113>;
-+ resets = <&apb2_rst 17>;
-+ status = "disabled";
-+ };
-+
-+ uart2: serial@1c28800 {
-+ compatible = "snps,dw-apb-uart";
-+ reg = <0x01c28800 0x400>;
-+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
-+ reg-shift = <2>;
-+ reg-io-width = <4>;
-+ clocks = <&bus_gates 114>;
-+ resets = <&apb2_rst 18>;
-+ status = "disabled";
-+ };
-+
-+ uart3: serial@1c28c00 {
-+ compatible = "snps,dw-apb-uart";
-+ reg = <0x01c28c00 0x400>;
-+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-+ reg-shift = <2>;
-+ reg-io-width = <4>;
-+ clocks = <&bus_gates 115>;
-+ resets = <&apb2_rst 19>;
-+ status = "disabled";
-+ };
-+
-+ uart4: serial@1c29000 {
-+ compatible = "snps,dw-apb-uart";
-+ reg = <0x01c29000 0x400>;
-+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-+ reg-shift = <2>;
-+ reg-io-width = <4>;
-+ clocks = <&bus_gates 116>;
-+ resets = <&apb2_rst 20>;
-+ status = "disabled";
-+ };
-+
-+ rtc: rtc@1f00000 {
-+ compatible = "allwinner,sun6i-a31-rtc";
-+ reg = <0x01f00000 0x54>;
-+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
-+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-+ };
-+
-+ i2c0: i2c@1c2ac00 {
-+ compatible = "allwinner,sun6i-a31-i2c";
-+ reg = <0x01c2ac00 0x400>;
-+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&bus_gates 96>;
-+ resets = <&apb2_rst 0>;
-+ status = "disabled";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+
-+ i2c1: i2c@1c2b000 {
-+ compatible = "allwinner,sun6i-a31-i2c";
-+ reg = <0x01c2b000 0x400>;
-+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&bus_gates 97>;
-+ resets = <&apb2_rst 1>;
-+ status = "disabled";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+
-+ i2c2: i2c@1c2b400 {
-+ compatible = "allwinner,sun6i-a31-i2c";
-+ reg = <0x01c2b400 0x400>;
-+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&bus_gates 98>;
-+ resets = <&apb2_rst 2>;
-+ status = "disabled";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+ };
-+};
-diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
-index 3fd7901..3a9dc31 100644
---- a/drivers/clk/sunxi/Makefile
-+++ b/drivers/clk/sunxi/Makefile
-@@ -11,6 +11,7 @@ obj-y += clk-a10-ve.o
- obj-y += clk-a20-gmac.o
- obj-y += clk-mod0.o
- obj-y += clk-simple-gates.o
-+obj-y += clk-multi-gates.o
- obj-y += clk-sun8i-bus-gates.o
- obj-y += clk-sun8i-mbus.o
- obj-y += clk-sun9i-core.o
-diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
-index 59428db..607ba53 100644
---- a/drivers/clk/sunxi/clk-factors.c
-+++ b/drivers/clk/sunxi/clk-factors.c
-@@ -184,7 +184,8 @@ struct clk *sunxi_factors_register(struct device_node *node,
- if (data->name)
- clk_name = data->name;
- else
-- of_property_read_string(node, "clock-output-names", &clk_name);
-+ of_property_read_string_index(node, "clock-output-names",
-+ data->name_idx, &clk_name);
-
- factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL);
- if (!factors)
-diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h
-index 171085a..cc89d1f 100644
---- a/drivers/clk/sunxi/clk-factors.h
-+++ b/drivers/clk/sunxi/clk-factors.h
-@@ -26,6 +26,7 @@ struct factors_data {
- void (*getter)(struct factors_request *req);
- void (*recalc)(struct factors_request *req);
- const char *name;
-+ int name_idx;
- };
-
- struct clk_factors {
-diff --git a/drivers/clk/sunxi/clk-multi-gates.c b/drivers/clk/sunxi/clk-multi-gates.c
-new file mode 100644
-index 0000000..76e715a
---- /dev/null
-+++ b/drivers/clk/sunxi/clk-multi-gates.c
-@@ -0,0 +1,105 @@
-+/*
-+ * Copyright (C) 2016 ARM Ltd.
-+ *
-+ * Based on clk-sun8i-bus-gates.c, which is:
-+ * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
-+ * Based on clk-simple-gates.c, which is:
-+ * Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/clk-provider.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+static DEFINE_SPINLOCK(gates_lock);
-+
-+static void __init sunxi_parse_parent(struct device_node *node,
-+ struct clk_onecell_data *clk_data,
-+ void __iomem *reg)
-+{
-+ const char *parent = of_clk_get_parent_name(node, 0);
-+ const char *clk_name;
-+ struct property *prop;
-+ struct clk *clk;
-+ const __be32 *p;
-+ int index, i = 0;
-+
-+ of_property_for_each_u32(node, "clock-indices", prop, p, index) {
-+ of_property_read_string_index(node, "clock-output-names",
-+ i, &clk_name);
-+
-+ clk = clk_register_gate(NULL, clk_name, parent, 0,
-+ reg + 4 * (index / 32), index % 32,
-+ 0, &gates_lock);
-+ i++;
-+ if (IS_ERR(clk)) {
-+ pr_warn("could not register gate clock \"%s\"\n",
-+ clk_name);
-+ continue;
-+ }
-+ if (clk_data->clks[index])
-+ pr_warn("bus-gate clock %s: index #%d already registered as %s\n",
-+ clk_name, index, "?");
-+ else
-+ clk_data->clks[index] = clk;
-+ }
-+}
-+
-+static void __init sunxi_multi_bus_gates_init(struct device_node *node)
-+{
-+ struct clk_onecell_data *clk_data;
-+ struct device_node *child;
-+ struct property *prop;
-+ struct resource res;
-+ void __iomem *reg;
-+ const __be32 *p;
-+ int number = 0;
-+ int index;
-+
-+ reg = of_io_request_and_map(node, 0, of_node_full_name(node));
-+ if (IS_ERR(reg))
-+ return;
-+
-+ clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
-+ if (!clk_data)
-+ goto err_unmap;
-+
-+ for_each_child_of_node(node, child)
-+ of_property_for_each_u32(child, "clock-indices", prop, p, index)
-+ number = max(number, index);
-+
-+ clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);
-+ if (!clk_data->clks)
-+ goto err_free_data;
-+
-+ for_each_child_of_node(node, child)
-+ sunxi_parse_parent(child, clk_data, reg);
-+
-+ clk_data->clk_num = number + 1;
-+ if (of_clk_add_provider(node, of_clk_src_onecell_get, clk_data))
-+ pr_err("registering bus-gate clock %s failed\n", node->name);
-+
-+ return;
-+
-+err_free_data:
-+ kfree(clk_data);
-+err_unmap:
-+ iounmap(reg);
-+ of_address_to_resource(node, 0, &res);
-+ release_mem_region(res.start, resource_size(&res));
-+}
-+
-+CLK_OF_DECLARE(sunxi_multi_bus_gates, "allwinner,sunxi-multi-bus-gates-clk",
-+ sunxi_multi_bus_gates_init);
-diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
-index 5ba2188..ca59458 100644
---- a/drivers/clk/sunxi/clk-sunxi.c
-+++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -711,14 +711,14 @@ static const struct factors_data sun4i_pll6_data __initconst = {
- .enable = 31,
- .table = &sun4i_pll5_config,
- .getter = sun4i_get_pll5_factors,
-- .name = "pll6",
-+ .name_idx = 2,
- };
-
- static const struct factors_data sun6i_a31_pll6_data __initconst = {
- .enable = 31,
- .table = &sun6i_a31_pll6_config,
- .getter = sun6i_a31_get_pll6_factors,
-- .name = "pll6x2",
-+ .name_idx = 1,
- };
-
- static const struct factors_data sun5i_a13_ahb_data __initconst = {
---
-2.5.0
-
diff --git a/bcm283x-upstream-fixes.patch b/bcm283x-upstream-fixes.patch
index c5ee31784..82abd874b 100644
--- a/bcm283x-upstream-fixes.patch
+++ b/bcm283x-upstream-fixes.patch
@@ -164,31 +164,3 @@ index 0000000..2f36722
+};
--
2.7.3
-
-From 528285e99c25249456023d28f521689bf9e9eb8b Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Wed, 30 Mar 2016 09:35:13 +0100
-Subject: [PATCH 32/36] drop usb power domain support for the moment, kills usb
-
----
- arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
-index caf2707..b1e8145 100644
---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
-+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
-@@ -71,10 +71,6 @@
- status = "okay";
- };
-
--&usb {
-- power-domains = <&power RPI_POWER_DOMAIN_USB>;
--};
--
- &v3d {
- power-domains = <&power RPI_POWER_DOMAIN_V3D>;
- };
---
-2.7.3
-
diff --git a/config-armv7-generic b/config-armv7-generic
index dbbcbc81e..e619963bb 100644
--- a/config-armv7-generic
+++ b/config-armv7-generic
@@ -243,7 +243,7 @@ CONFIG_SERIAL_8250_BCM2835AUX=y
CONFIG_DMA_BCM2835=m
# CONFIG_MMC_SDHCI_BCM2835 is not set
CONFIG_MMC_SDHCI_IPROC=m
-CONFIG_BCM2835_MBOX=m
+CONFIG_BCM2835_MBOX=y
CONFIG_PWM_BCM2835=m
CONFIG_HW_RANDOM_BCM2835=m
CONFIG_I2C_BCM2835=m
@@ -557,7 +557,6 @@ CONFIG_RTC_DRV_TPS80031=m
# CONFIG_RTC_DRV_DS1347 is not set
# CONFIG_RTC_DRV_DS1343 is not set
# CONFIG_RTC_DRV_MCP795 is not set
-# CONFIG_RTC_DRV_XGENE is not set
# Regulators
# CONFIG_REGULATOR_ACT8865 is not set
diff --git a/kernel.spec b/kernel.spec
index 21a92c39b..44c579643 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -502,10 +502,6 @@ Patch420: arm64-avoid-needing-console-to-enable-serial-console.patch
# http://www.spinics.net/lists/arm-kernel/msg490981.html
Patch422: geekbox-v4-device-tree-support.patch
-# http://www.spinics.net/lists/arm-kernel/msg483898.html
-# This has major conflicts and needs to be rebased
-# Patch423: Initial-AllWinner-A64-and-PINE64-support.patch
-
Patch424: arm64-pcie-acpi.patch
Patch425: arm64-pcie-quirks-xgene.patch
@@ -2168,6 +2164,9 @@ fi
#
#
%changelog
+* Sun Aug 28 2016 Peter Robinson <pbrobinson@fedoraproject.org>
+- Minor ARM updates
+
* Fri Aug 26 2016 Laura Abbott <labbott@redhat.com> - 4.7.2-201
- Bump and build