Merge remote-tracking branch 'origin/f23' into f23-user-thl-vanilla-fedorakernel-4.5.3-200.vanilla.knurd.1.fc23

55 files changed, 8506 insertions, 1105 deletions

diff --git a/0001-drm-i915-Pretend-cursor-is-always-on-for-ILK-style-W.patch b/0001-drm-i915-Pretend-cursor-is-always-on-for-ILK-style-W.patch
deleted file mode 100644
index 462f1132a..000000000
--- a/0001-drm-i915-Pretend-cursor-is-always-on-for-ILK-style-W.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From e2e407dc093f530b771ee8bf8fe1be41e3cea8b3 Mon Sep 17 00:00:00 2001
-From: Matt Roper <matthew.d.roper@intel.com>
-Date: Mon, 8 Feb 2016 11:05:28 -0800
-Subject: [PATCH] drm/i915: Pretend cursor is always on for ILK-style WM
- calculations (v2)
-
-Due to our lack of two-step watermark programming, our driver has
-historically pretended that the cursor plane is always on for the
-purpose of watermark calculations; this helps avoid serious flickering
-when the cursor turns off/on (e.g., when the user moves the mouse
-pointer to a different screen).  That workaround was accidentally
-dropped as we started working toward atomic watermark updates.  Since we
-still aren't quite there yet with two-stage updates, we need to
-resurrect the workaround and treat the cursor as always active.
-
-v2: Tweak cursor width calculations slightly to more closely match the
-    logic we used before the atomic overhaul began.  (Ville)
-
-Cc: simdev11@outlook.com
-Cc: manfred.kitzbichler@gmail.com
-Cc: drm-intel-fixes@lists.freedesktop.org
-Reported-by: simdev11@outlook.com
-Reported-by: manfred.kitzbichler@gmail.com
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93892
-Fixes: 43d59eda1 ("drm/i915: Eliminate usage of plane_wm_parameters from ILK-style WM code (v2)")
-Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1454479611-6804-1-git-send-email-matthew.d.roper@intel.com
-(cherry picked from commit b2435692dbb709d4c8ff3b2f2815c9b8423b72bb)
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1454958328-30129-1-git-send-email-matthew.d.roper@intel.com
----
- drivers/gpu/drm/i915/intel_pm.c | 14 +++++++++-----
- 1 file changed, 9 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index eb5fa05..a234687 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -1783,16 +1783,20 @@ static uint32_t ilk_compute_cur_wm(const struct intel_crtc_state *cstate,
- 				   const struct intel_plane_state *pstate,
- 				   uint32_t mem_value)
- {
--	int bpp = pstate->base.fb ? pstate->base.fb->bits_per_pixel / 8 : 0;
-+	/*
-+	 * We treat the cursor plane as always-on for the purposes of watermark
-+	 * calculation.  Until we have two-stage watermark programming merged,
-+	 * this is necessary to avoid flickering.
-+	 */
-+	int cpp = 4;
-+	int width = pstate->visible ? pstate->base.crtc_w : 64;
- 
--	if (!cstate->base.active || !pstate->visible)
-+	if (!cstate->base.active)
- 		return 0;
- 
- 	return ilk_wm_method2(ilk_pipe_pixel_rate(cstate),
- 			      cstate->base.adjusted_mode.crtc_htotal,
--			      drm_rect_width(&pstate->dst),
--			      bpp,
--			      mem_value);
-+			      width, cpp, mem_value);
- }
- 
- /* Only for WM_LP. */
--- 
-2.5.0
-
diff --git a/0001-mm-CONFIG_NR_ZONES_EXTENDED.patch b/0001-mm-CONFIG_NR_ZONES_EXTENDED.patch
new file mode 100644
index 000000000..44ef3662b
--- /dev/null
+++ b/0001-mm-CONFIG_NR_ZONES_EXTENDED.patch
@@ -0,0 +1,173 @@
+From 8b368e8e961944105945fbe36f3f264252bfd19a Mon Sep 17 00:00:00 2001
+From: Dan Williams <dan.j.williams@intel.com>
+Date: Thu, 25 Feb 2016 01:02:30 +0000
+Subject: [PATCH] mm: CONFIG_NR_ZONES_EXTENDED
+
+ZONE_DEVICE (merged in 4.3) and ZONE_CMA (proposed) are examples of new mm
+zones that are bumping up against the current maximum limit of 4 zones,
+i.e.  2 bits in page->flags.  When adding a zone this equation still needs
+to be satisified:
+
+    SECTIONS_WIDTH + ZONES_WIDTH + NODES_SHIFT + LAST_CPUPID_SHIFT
+	  <= BITS_PER_LONG - NR_PAGEFLAGS
+
+ZONE_DEVICE currently tries to satisfy this equation by requiring that
+ZONE_DMA be disabled, but this is untenable given generic kernels want to
+support ZONE_DEVICE and ZONE_DMA simultaneously.  ZONE_CMA would like to
+increase the amount of memory covered per section, but that limits the
+minimum granularity at which consecutive memory ranges can be added via
+devm_memremap_pages().
+
+The trade-off of what is acceptable to sacrifice depends heavily on the
+platform.  For example, ZONE_CMA is targeted for 32-bit platforms where
+page->flags is constrained, but those platforms likely do not care about
+the minimum granularity of memory hotplug.  A big iron machine with 1024
+numa nodes can likely sacrifice ZONE_DMA where a general purpose
+distribution kernel can not.
+
+CONFIG_NR_ZONES_EXTENDED is a configuration symbol that gets selected when
+the number of configured zones exceeds 4.  It documents the configuration
+symbols and definitions that get modified when ZONES_WIDTH is greater than
+2.
+
+For now, it steals a bit from NODES_SHIFT.  Later on it can be used to
+document the definitions that get modified when a 32-bit configuration
+wants more zone bits.
+
+Note that GFP_ZONE_TABLE poses an interesting constraint since
+include/linux/gfp.h gets included by the 32-bit portion of a 64-bit build.
+We need to be careful to only build the table for zones that have a
+corresponding gfp_t flag.  GFP_ZONES_SHIFT is introduced for this purpose.
+This patch does not attempt to solve the problem of adding a new zone
+that also has a corresponding GFP_ flag.
+
+Link: https://bugzilla.kernel.org/show_bug.cgi?id=110931
+Fixes: 033fbae988fc ("mm: ZONE_DEVICE for "device memory"")
+Signed-off-by: Dan Williams <dan.j.williams@intel.com>
+Reported-by: Mark <markk@clara.co.uk>
+Cc: Mel Gorman <mgorman@suse.de>
+Cc: Rik van Riel <riel@redhat.com>
+Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com>
+Cc: Dave Hansen <dave.hansen@linux.intel.com>
+Cc: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+---
+ arch/x86/Kconfig                  |  6 ++++--
+ include/linux/gfp.h               | 33 ++++++++++++++++++++-------------
+ include/linux/page-flags-layout.h |  2 ++
+ mm/Kconfig                        |  7 +++++--
+ 4 files changed, 31 insertions(+), 17 deletions(-)
+
+diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
+index 3fef519..b94704a 100644
+--- a/arch/x86/Kconfig
++++ b/arch/x86/Kconfig
+@@ -1409,8 +1409,10 @@ config NUMA_EMU
+ 
+ config NODES_SHIFT
+ 	int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP
+-	range 1 10
+-	default "10" if MAXSMP
++	range 1 10 if !NR_ZONES_EXTENDED
++	range 1 9 if NR_ZONES_EXTENDED
++	default "10" if MAXSMP && !NR_ZONES_EXTENDED
++	default "9" if MAXSMP && NR_ZONES_EXTENDED
+ 	default "6" if X86_64
+ 	default "3"
+ 	depends on NEED_MULTIPLE_NODES
+diff --git a/include/linux/gfp.h b/include/linux/gfp.h
+index af1f2b2..d201d8a 100644
+--- a/include/linux/gfp.h
++++ b/include/linux/gfp.h
+@@ -329,22 +329,29 @@ static inline bool gfpflags_allow_blocking(const gfp_t gfp_flags)
+  *       0xe    => BAD (MOVABLE+DMA32+HIGHMEM)
+  *       0xf    => BAD (MOVABLE+DMA32+HIGHMEM+DMA)
+  *
+- * ZONES_SHIFT must be <= 2 on 32 bit platforms.
++ * GFP_ZONES_SHIFT must be <= 2 on 32 bit platforms.
+  */
+ 
+-#if 16 * ZONES_SHIFT > BITS_PER_LONG
+-#error ZONES_SHIFT too large to create GFP_ZONE_TABLE integer
++#if defined(CONFIG_ZONE_DEVICE) && (MAX_NR_ZONES-1) <= 4
++/* ZONE_DEVICE is not a valid GFP zone specifier */
++#define GFP_ZONES_SHIFT 2
++#else
++#define GFP_ZONES_SHIFT ZONES_SHIFT
++#endif
++
++#if 16 * GFP_ZONES_SHIFT > BITS_PER_LONG
++#error GFP_ZONES_SHIFT too large to create GFP_ZONE_TABLE integer
+ #endif
+ 
+ #define GFP_ZONE_TABLE ( \
+-	(ZONE_NORMAL << 0 * ZONES_SHIFT)				      \
+-	| (OPT_ZONE_DMA << ___GFP_DMA * ZONES_SHIFT)			      \
+-	| (OPT_ZONE_HIGHMEM << ___GFP_HIGHMEM * ZONES_SHIFT)		      \
+-	| (OPT_ZONE_DMA32 << ___GFP_DMA32 * ZONES_SHIFT)		      \
+-	| (ZONE_NORMAL << ___GFP_MOVABLE * ZONES_SHIFT)			      \
+-	| (OPT_ZONE_DMA << (___GFP_MOVABLE | ___GFP_DMA) * ZONES_SHIFT)	      \
+-	| (ZONE_MOVABLE << (___GFP_MOVABLE | ___GFP_HIGHMEM) * ZONES_SHIFT)   \
+-	| (OPT_ZONE_DMA32 << (___GFP_MOVABLE | ___GFP_DMA32) * ZONES_SHIFT)   \
++	(ZONE_NORMAL << 0 * GFP_ZONES_SHIFT)					\
++	| (OPT_ZONE_DMA << ___GFP_DMA * GFP_ZONES_SHIFT)			\
++	| (OPT_ZONE_HIGHMEM << ___GFP_HIGHMEM * GFP_ZONES_SHIFT)		\
++	| (OPT_ZONE_DMA32 << ___GFP_DMA32 * GFP_ZONES_SHIFT)		      	\
++	| (ZONE_NORMAL << ___GFP_MOVABLE * GFP_ZONES_SHIFT)			\
++	| (OPT_ZONE_DMA << (___GFP_MOVABLE | ___GFP_DMA) * GFP_ZONES_SHIFT)	\
++	| (ZONE_MOVABLE << (___GFP_MOVABLE | ___GFP_HIGHMEM) * GFP_ZONES_SHIFT)	\
++	| (OPT_ZONE_DMA32 << (___GFP_MOVABLE | ___GFP_DMA32) * GFP_ZONES_SHIFT)	\
+ )
+ 
+ /*
+@@ -369,8 +376,8 @@ static inline enum zone_type gfp_zone(gfp_t flags)
+ 	enum zone_type z;
+ 	int bit = (__force int) (flags & GFP_ZONEMASK);
+ 
+-	z = (GFP_ZONE_TABLE >> (bit * ZONES_SHIFT)) &
+-					 ((1 << ZONES_SHIFT) - 1);
++	z = (GFP_ZONE_TABLE >> (bit * GFP_ZONES_SHIFT)) &
++					 ((1 << GFP_ZONES_SHIFT) - 1);
+ 	VM_BUG_ON((GFP_ZONE_BAD >> bit) & 1);
+ 	return z;
+ }
+diff --git a/include/linux/page-flags-layout.h b/include/linux/page-flags-layout.h
+index da52366..77b078c 100644
+--- a/include/linux/page-flags-layout.h
++++ b/include/linux/page-flags-layout.h
+@@ -17,6 +17,8 @@
+ #define ZONES_SHIFT 1
+ #elif MAX_NR_ZONES <= 4
+ #define ZONES_SHIFT 2
++#elif MAX_NR_ZONES <= 8
++#define ZONES_SHIFT 3
+ #else
+ #error ZONES_SHIFT -- too many zones configured adjust calculation
+ #endif
+diff --git a/mm/Kconfig b/mm/Kconfig
+index 031a329..7826216 100644
+--- a/mm/Kconfig
++++ b/mm/Kconfig
+@@ -652,8 +652,6 @@ config IDLE_PAGE_TRACKING
+ 
+ config ZONE_DEVICE
+ 	bool "Device memory (pmem, etc...) hotplug support"
+-	default !ZONE_DMA
+-	depends on !ZONE_DMA
+ 	depends on MEMORY_HOTPLUG
+ 	depends on MEMORY_HOTREMOVE
+ 	depends on X86_64 #arch_add_memory() comprehends device memory
+@@ -667,5 +665,10 @@ config ZONE_DEVICE
+ 
+ 	  If FS_DAX is enabled, then say Y.
+ 
++config NR_ZONES_EXTENDED
++	bool
++	default n if !64BIT
++	default y if ZONE_DEVICE && ZONE_DMA && ZONE_DMA32
++
+ config FRAME_VECTOR
+ 	bool
+-- 
+2.5.0
+
diff --git a/0001-net-dsa-mv88e6xxx-Introduce-_mv88e6xxx_phy_page_-rea.patch b/0001-net-dsa-mv88e6xxx-Introduce-_mv88e6xxx_phy_page_-rea.patch
new file mode 100644
index 000000000..1e2d4db59
--- /dev/null
+++ b/0001-net-dsa-mv88e6xxx-Introduce-_mv88e6xxx_phy_page_-rea.patch
@@ -0,0 +1,95 @@
+From 4d1b08a69350d40e0aa14baba4797ef175295718 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Wed, 30 Mar 2016 12:40:54 +0100
+Subject: [PATCH 1/2] net: dsa: mv88e6xxx: Introduce
+ _mv88e6xxx_phy_page_{read,write}
+
+Add versions of the phy_page_read and _write functions to
+be used in a context where the SMI mutex is held.
+
+Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
+Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
+Signed-off-by: Patrick Uiterwijk <patrick@puiterwijk.org>
+---
+ drivers/net/dsa/mv88e6xxx.c | 49 +++++++++++++++++++++++++++++++++------------
+ 1 file changed, 36 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c
+index 512c8c0..3dcfe13 100644
+--- a/drivers/net/dsa/mv88e6xxx.c
++++ b/drivers/net/dsa/mv88e6xxx.c
+@@ -1929,6 +1929,38 @@ static void mv88e6xxx_bridge_work(struct work_struct *work)
+ 	}
+ }
+ 
++static int _mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page,
++				     int reg, int val)
++{
++	int ret;
++
++	ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page);
++	if (ret < 0)
++		goto restore_page_0;
++
++	ret = _mv88e6xxx_phy_write_indirect(ds, port, reg, val);
++restore_page_0:
++	_mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0);
++
++	return ret;
++}
++
++static int _mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page,
++				    int reg)
++{
++	int ret;
++
++	ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page);
++	if (ret < 0)
++		goto restore_page_0;
++
++	ret = _mv88e6xxx_phy_read_indirect(ds, port, reg);
++restore_page_0:
++	_mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0);
++
++	return ret;
++}
++
+ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
+ {
+ 	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
+@@ -2383,13 +2415,9 @@ int mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, int reg)
+ 	int ret;
+ 
+ 	mutex_lock(&ps->smi_mutex);
+-	ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page);
+-	if (ret < 0)
+-		goto error;
+-	ret = _mv88e6xxx_phy_read_indirect(ds, port, reg);
+-error:
+-	_mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0);
++	ret = _mv88e6xxx_phy_page_read(ds, port, page, reg);
+ 	mutex_unlock(&ps->smi_mutex);
++
+ 	return ret;
+ }
+ 
+@@ -2400,14 +2428,9 @@ int mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page,
+ 	int ret;
+ 
+ 	mutex_lock(&ps->smi_mutex);
+-	ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page);
+-	if (ret < 0)
+-		goto error;
+-
+-	ret = _mv88e6xxx_phy_write_indirect(ds, port, reg, val);
+-error:
+-	_mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0);
++	ret = _mv88e6xxx_phy_page_write(ds, port, page, reg, val);
+ 	mutex_unlock(&ps->smi_mutex);
++
+ 	return ret;
+ }
+ 
+-- 
+2.7.3
+
diff --git a/0001-usb-hub-fix-panic-in-usb_reset_and_verify_device.patch b/0001-usb-hub-fix-panic-in-usb_reset_and_verify_device.patch
deleted file mode 100644
index 1fa0e0fce..000000000
--- a/0001-usb-hub-fix-panic-in-usb_reset_and_verify_device.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 07197eb61cfabc153846b1ae9d080a5d6c449d12 Mon Sep 17 00:00:00 2001
-From: "Du, Changbin" <changbin.du@intel.com>
-Date: Mon, 22 Feb 2016 10:08:36 +0800
-Subject: [PATCH] usb: hub: fix panic in usb_reset_and_verify_device
-
-Signed-off-by: Du, Changbin <changbin.du@intel.com>
----
- drivers/usb/core/hub.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
-index 350dcd9..045f951 100644
---- a/drivers/usb/core/hub.c
-+++ b/drivers/usb/core/hub.c
-@@ -5501,8 +5501,10 @@ done:
- 	return 0;
- 
- re_enumerate:
--	usb_release_bos_descriptor(udev);
--	udev->bos = bos;
-+	if (udev->bos != bos) {
-+		usb_release_bos_descriptor(udev);
-+		udev->bos = bos;
-+	}
- re_enumerate_no_bos:
- 	/* LPM state doesn't matter when we're about to destroy the device. */
- 	hub_port_logical_disconnect(parent_hub, port1);
--- 
-2.5.0
-
diff --git a/0002-net-dsa-mv88e6xxx-Clear-the-PDOWN-bit-on-setup.patch b/0002-net-dsa-mv88e6xxx-Clear-the-PDOWN-bit-on-setup.patch
new file mode 100644
index 000000000..35b369312
--- /dev/null
+++ b/0002-net-dsa-mv88e6xxx-Clear-the-PDOWN-bit-on-setup.patch
@@ -0,0 +1,104 @@
+From a878e3fa9657646ff85468075823870fbbd5745f Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Wed, 30 Mar 2016 12:41:22 +0100
+Subject: [PATCH 2/2] net: dsa: mv88e6xxx: Clear the PDOWN bit on setup
+
+Some of the vendor-specific bootloaders set up this part
+of the initialization for us, so this was never added.
+However, since upstream bootloaders don't initialize the
+chip specifically, they leave the fiber MII's PDOWN flag
+set, which means that the CPU port doesn't connect.
+
+This patch checks whether this flag has been clear prior
+by something else, and if not make us clear it.
+
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Patrick Uiterwijk <patrick@puiterwijk.org>
+---
+ drivers/net/dsa/mv88e6xxx.c | 36 ++++++++++++++++++++++++++++++++++++
+ drivers/net/dsa/mv88e6xxx.h |  8 ++++++++
+ 2 files changed, 44 insertions(+)
+
+diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c
+index 3dcfe13..a4e3750 100644
+--- a/drivers/net/dsa/mv88e6xxx.c
++++ b/drivers/net/dsa/mv88e6xxx.c
+@@ -1961,6 +1961,25 @@ restore_page_0:
+ 	return ret;
+ }
+ 
++static int mv88e6xxx_power_on_serdes(struct dsa_switch *ds)
++{
++	int ret;
++
++	ret = _mv88e6xxx_phy_page_read(ds, REG_FIBER_SERDES, PAGE_FIBER_SERDES,
++				       MII_BMCR);
++	if (ret < 0)
++		return ret;
++
++	if (ret & BMCR_PDOWN) {
++		ret &= ~BMCR_PDOWN;
++		ret = _mv88e6xxx_phy_page_write(ds, REG_FIBER_SERDES,
++						PAGE_FIBER_SERDES, MII_BMCR,
++						ret);
++	}
++
++	return ret;
++}
++
+ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
+ {
+ 	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
+@@ -2064,6 +2083,23 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
+ 			goto abort;
+ 	}
+ 
++	/* If this port is connected to a SerDes, make sure the SerDes is not
++	 * powered down.
++	 */
++	if (mv88e6xxx_6352_family(ds)) {
++		ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_STATUS);
++		if (ret < 0)
++			goto abort;
++		ret &= PORT_STATUS_CMODE_MASK;
++		if ((ret == PORT_STATUS_CMODE_100BASE_X) ||
++		    (ret == PORT_STATUS_CMODE_1000BASE_X) ||
++		    (ret == PORT_STATUS_CMODE_SGMII)) {
++			ret = mv88e6xxx_power_on_serdes(ds);
++			if (ret < 0)
++				goto abort;
++		}
++	}
++
+ 	/* Port Control 2: don't force a good FCS, set the maximum frame size to
+ 	 * 10240 bytes, enable secure 802.1q tags, don't discard tagged or
+ 	 * untagged frames on this port, do a destination address lookup on all
+diff --git a/drivers/net/dsa/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx.h
+index ca08f91..adc7f0d 100644
+--- a/drivers/net/dsa/mv88e6xxx.h
++++ b/drivers/net/dsa/mv88e6xxx.h
+@@ -28,6 +28,10 @@
+ #define SMI_CMD_OP_45_READ_DATA_INC	((3 << 10) | SMI_CMD_BUSY)
+ #define SMI_DATA		0x01
+ 
++/* Fiber/SERDES Registers are located at SMI address F, page 1 */
++#define REG_FIBER_SERDES	0x0f
++#define PAGE_FIBER_SERDES	0x01
++
+ #define REG_PORT(p)		(0x10 + (p))
+ #define PORT_STATUS		0x00
+ #define PORT_STATUS_PAUSE_EN	BIT(15)
+@@ -45,6 +49,10 @@
+ #define PORT_STATUS_MGMII	BIT(6) /* 6185 */
+ #define PORT_STATUS_TX_PAUSED	BIT(5)
+ #define PORT_STATUS_FLOW_CTRL	BIT(4)
++#define PORT_STATUS_CMODE_MASK	0x0f
++#define PORT_STATUS_CMODE_100BASE_X	0x8
++#define PORT_STATUS_CMODE_1000BASE_X	0x9
++#define PORT_STATUS_CMODE_SGMII		0xa
+ #define PORT_PCS_CTRL		0x01
+ #define PORT_PCS_CTRL_RGMII_DELAY_RXCLK	BIT(15)
+ #define PORT_PCS_CTRL_RGMII_DELAY_TXCLK	BIT(14)
+-- 
+2.7.3
+
diff --git a/ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch b/ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch
new file mode 100644
index 000000000..cff3d3339
--- /dev/null
+++ b/ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch
@@ -0,0 +1,101 @@
+From patchwork Wed Jan 27 15:08:19 2016
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [1/2] ARM: mvebu: change order of ethernet DT nodes on Armada 38x
+From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+X-Patchwork-Id: 8134751
+Message-Id: <1453907300-28283-2-git-send-email-thomas.petazzoni@free-electrons.com>
+To: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
+	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
+	Gregory Clement <gregory.clement@free-electrons.com>
+Cc: Nadav Haklai <nadavh@marvell.com>, Lior Amsalem <alior@marvell.com>,
+	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
+	linux-arm-kernel@lists.infradead.org
+Date: Wed, 27 Jan 2016 16:08:19 +0100
+
+On Armada 38x, the available network interfaces are:
+
+ - port 0, at 0x70000
+ - port 1, at 0x30000
+ - port 2, at 0x34000
+
+Due to the rule saying that DT nodes should be ordered by register
+addresses, the network interfaces are probed in this order:
+
+ - port 1, at 0x30000, which gets named eth0
+ - port 2, at 0x34000, which gets named eth1
+ - port 0, at 0x70000, which gets named eth2
+
+(if all three ports are enabled at the board level)
+
+Unfortunately, the network subsystem doesn't provide any way to rename
+network interfaces from the kernel (it can only be done from
+userspace). So, the default naming of the network interfaces is very
+confusing as it doesn't match the datasheet, nor the naming of the
+interfaces in the bootloader, nor the naming of the interfaces on
+labels printed on the board.
+
+For example, on the Armada 388 GP, the board has two ports, labelled
+GE0 and GE1. One has to know that GE0 is eth1 and GE1 is eth0, which
+isn't really obvious.
+
+In order to solve this, this patch proposes to exceptionaly violate
+the rule of "order DT nodes by register address", and put the 0x70000
+node before the 0x30000 node, so that network interfaces get named in
+a more natural way.
+
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+
+---
+arch/arm/boot/dts/armada-38x.dtsi | 30 +++++++++++++++++++++---------
+ 1 file changed, 21 insertions(+), 9 deletions(-)
+
+diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
+index e8b7f67..b50784d 100644
+--- a/arch/arm/boot/dts/armada-38x.dtsi
++++ b/arch/arm/boot/dts/armada-38x.dtsi
+@@ -429,6 +429,27 @@
+ 				reg = <0x22000 0x1000>;
+ 			};
+ 
++			/*
++			 * As a special exception to the "order by
++			 * register address" rule, the eth0 node is
++			 * placed here to ensure that it gets
++			 * registered as the first interface, since
++			 * the network subsystem doesn't allow naming
++			 * interfaces using DT aliases. Without this,
++			 * the ordering of interfaces is different
++			 * from the one used in U-Boot and the
++			 * labeling of interfaces on the boards, which
++			 * is very confusing for users.
++			 */
++			eth0: ethernet@70000 {
++				compatible = "marvell,armada-370-neta";
++				reg = <0x70000 0x4000>;
++				interrupts-extended = <&mpic 8>;
++				clocks = <&gateclk 4>;
++				tx-csum-limit = <9800>;
++				status = "disabled";
++			};
++
+ 			eth1: ethernet@30000 {
+ 				compatible = "marvell,armada-370-neta";
+ 				reg = <0x30000 0x4000>;
+@@ -493,15 +514,6 @@
+ 				};
+ 			};
+ 
+-			eth0: ethernet@70000 {
+-				compatible = "marvell,armada-370-neta";
+-				reg = <0x70000 0x4000>;
+-				interrupts-extended = <&mpic 8>;
+-				clocks = <&gateclk 4>;
+-				tx-csum-limit = <9800>;
+-				status = "disabled";
+-			};
+-
+ 			mdio: mdio@72004 {
+ 				#address-cells = <1>;
+ 				#size-cells = <0>;
diff --git a/Fix-tegra-to-use-stdout-path-for-serial-console.patch b/Fix-tegra-to-use-stdout-path-for-serial-console.patch
new file mode 100644
index 000000000..80a2d1b95
--- /dev/null
+++ b/Fix-tegra-to-use-stdout-path-for-serial-console.patch
@@ -0,0 +1,318 @@
+From 15b8caef5f380d9465876478ff5e365bc6afa5b6 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Sun, 6 Mar 2016 10:59:13 +0000
+Subject: [PATCH] Fix tegra to use stdout-path for serial console
+
+---
+ arch/arm/boot/dts/tegra114-dalmore.dts         | 4 ++++
+ arch/arm/boot/dts/tegra124-jetson-tk1.dts      | 4 ++++
+ arch/arm/boot/dts/tegra124-nyan.dtsi           | 4 ++++
+ arch/arm/boot/dts/tegra124-venice2.dts         | 4 ++++
+ arch/arm/boot/dts/tegra20-harmony.dts          | 4 ++++
+ arch/arm/boot/dts/tegra20-iris-512.dts         | 4 ++++
+ arch/arm/boot/dts/tegra20-medcom-wide.dts      | 4 ++++
+ arch/arm/boot/dts/tegra20-paz00.dts            | 4 ++++
+ arch/arm/boot/dts/tegra20-seaboard.dts         | 4 ++++
+ arch/arm/boot/dts/tegra20-tamonten.dtsi        | 4 ++++
+ arch/arm/boot/dts/tegra20-trimslice.dts        | 4 ++++
+ arch/arm/boot/dts/tegra20-ventana.dts          | 4 ++++
+ arch/arm/boot/dts/tegra20-whistler.dts         | 4 ++++
+ arch/arm/boot/dts/tegra30-apalis-eval.dts      | 4 ++++
+ arch/arm/boot/dts/tegra30-beaver.dts           | 4 ++++
+ arch/arm/boot/dts/tegra30-cardhu.dtsi          | 4 ++++
+ arch/arm/boot/dts/tegra30-colibri-eval-v3.dts  | 4 ++++
+ arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 5 ++++-
+ arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi | 4 ++++
+ 19 files changed, 76 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
+index 8b7aa0d..b5748ee 100644
+--- a/arch/arm/boot/dts/tegra114-dalmore.dts
++++ b/arch/arm/boot/dts/tegra114-dalmore.dts
+@@ -18,6 +18,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x80000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+index 66b4451..abf046a 100644
+--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
++++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+@@ -15,6 +15,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x0 0x80000000 0x0 0x80000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
+index ec1aa64..e2cd39e 100644
+--- a/arch/arm/boot/dts/tegra124-nyan.dtsi
++++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
+@@ -8,6 +8,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x0 0x80000000 0x0 0x80000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
+index cfbdf42..604f4b7 100644
+--- a/arch/arm/boot/dts/tegra124-venice2.dts
++++ b/arch/arm/boot/dts/tegra124-venice2.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x0 0x80000000 0x0 0x80000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
+index b926a07..4b73c76 100644
+--- a/arch/arm/boot/dts/tegra20-harmony.dts
++++ b/arch/arm/boot/dts/tegra20-harmony.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts
+index 1dd7d7b..bb56dfe 100644
+--- a/arch/arm/boot/dts/tegra20-iris-512.dts
++++ b/arch/arm/boot/dts/tegra20-iris-512.dts
+@@ -11,6 +11,10 @@
+ 		serial1 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	host1x@50000000 {
+ 		hdmi@54280000 {
+ 			status = "okay";
+diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts
+index 9b87526..34c6588 100644
+--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
++++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
+@@ -10,6 +10,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	pwm@7000a000 {
+ 		status = "okay";
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
+index ed7e100..81a10a9 100644
+--- a/arch/arm/boot/dts/tegra20-paz00.dts
++++ b/arch/arm/boot/dts/tegra20-paz00.dts
+@@ -14,6 +14,10 @@
+ 		serial1 = &uartc;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x20000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
+index aea8994..0aed748 100644
+--- a/arch/arm/boot/dts/tegra20-seaboard.dts
++++ b/arch/arm/boot/dts/tegra20-seaboard.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
+index 13d4e61..025e9e8 100644
+--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
++++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
+@@ -10,6 +10,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x20000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
+index d99af4e..69d25ca 100644
+--- a/arch/arm/boot/dts/tegra20-trimslice.dts
++++ b/arch/arm/boot/dts/tegra20-trimslice.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
+index 04c58e9..c61533a 100644
+--- a/arch/arm/boot/dts/tegra20-ventana.dts
++++ b/arch/arm/boot/dts/tegra20-ventana.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
+index 340d811..bd76585 100644
+--- a/arch/arm/boot/dts/tegra20-whistler.dts
++++ b/arch/arm/boot/dts/tegra20-whistler.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x20000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts
+index f2879cf..b914bcb 100644
+--- a/arch/arm/boot/dts/tegra30-apalis-eval.dts
++++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts
+@@ -17,6 +17,10 @@
+ 		serial3 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	pcie-controller@00003000 {
+ 		status = "okay";
+ 
+diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
+index 3dede39..1eca3b2 100644
+--- a/arch/arm/boot/dts/tegra30-beaver.dts
++++ b/arch/arm/boot/dts/tegra30-beaver.dts
+@@ -12,6 +12,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x80000000 0x7ff00000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
+index bb1ca15..de9d6cc 100644
+--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
++++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
+@@ -35,6 +35,10 @@
+ 		serial1 = &uartc;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x80000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+index 3ff019f..93e1ffd 100644
+--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
++++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+@@ -15,6 +15,10 @@
+ 		serial2 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	host1x@50000000 {
+ 		dc@54200000 {
+ 			rgb {
+diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+index 62f33fc..3c0b4d7 100644
+--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
++++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+@@ -10,9 +10,12 @@
+ 	aliases {
+ 		rtc0 = "/i2c@0,7000d000/as3722@40";
+ 		rtc1 = "/rtc@0,7000e000";
++		serial0 = &uarta;
+ 	};
+ 
+-	chosen { };
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
+ 
+ 	memory {
+ 		device_type = "memory";
+diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
+index ece0dec..73ba582 100644
+--- a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
+@@ -9,6 +9,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		device_type = "memory";
+ 		reg = <0x0 0x80000000 0x0 0xc0000000>;
+-- 
+2.5.0
+
diff --git a/HID-multitouch-enable-palm-rejection-if-device-imple.patch b/HID-multitouch-enable-palm-rejection-if-device-imple.patch
deleted file mode 100644
index b9753fce7..000000000
--- a/HID-multitouch-enable-palm-rejection-if-device-imple.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 37e81f1a82ba4f214c05c4cc3807378753c7a867 Mon Sep 17 00:00:00 2001
-From: Allen Hung <allen_hung@dell.com>
-Date: Fri, 20 Nov 2015 18:21:06 +0800
-Subject: [PATCH] HID: multitouch: enable palm rejection if device implements
- confidence usage
-
-The usage Confidence is mandary to Windows Precision Touchpad devices. The
-appearance of this usage is checked in hidinput_connect but the quirk
-MT_QUIRK_VALID_IS_CONFIDENCE is not applied to device accordingly.
-Apply this quirk and also remove quirk MT_QUIRK_ALWAYS_VALID to enable palm
-rejection for the WIN 8 touchpad devices which have implemented usage
-Confidence in its input reports.
-
-Tested on Dell XPS 13 laptop.
-
-Signed-off-by: Allen Hung <allen_hung@dell.com>
-Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
-Signed-off-by: Jiri Kosina <jkosina@suse.cz>
----
- drivers/hid/hid-multitouch.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
-index 7c811252c1ce..0c94348a168d 100644
---- a/drivers/hid/hid-multitouch.c
-+++ b/drivers/hid/hid-multitouch.c
-@@ -448,6 +448,11 @@ static int mt_touch_input_mapping(struct hid_device *hdev, struct hid_input *hi,
- 			mt_store_field(usage, td, hi);
- 			return 1;
- 		case HID_DG_CONFIDENCE:
-+			if (cls->name == MT_CLS_WIN_8 &&
-+				field->application == HID_DG_TOUCHPAD) {
-+				cls->quirks &= ~MT_QUIRK_ALWAYS_VALID;
-+				cls->quirks |= MT_QUIRK_VALID_IS_CONFIDENCE;
-+			}
- 			mt_store_field(usage, td, hi);
- 			return 1;
- 		case HID_DG_TIPSWITCH:
--- 
-2.5.0
-
diff --git a/Initial-AllWinner-A64-and-PINE64-support.patch b/Initial-AllWinner-A64-and-PINE64-support.patch
new file mode 100644
index 000000000..d21cbc1ca
--- /dev/null
+++ b/Initial-AllWinner-A64-and-PINE64-support.patch
@@ -0,0 +1,1882 @@
+From 97f002d28e975991226ab70599731bd2ccc8c060 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Sun, 6 Mar 2016 12:06:41 +0000
+Subject: [PATCH] Initial AllWinner A64 and PINE64 support
+
+---
+ Documentation/devicetree/bindings/arm/sunxi.txt    |   1 +
+ Documentation/devicetree/bindings/clock/sunxi.txt  |   7 +
+ .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt   |   1 +
+ .../devicetree/bindings/vendor-prefixes.txt        |   1 +
+ arch/arm/boot/dts/sun8i-h3.dtsi                    |  18 +-
+ arch/arm/mach-sunxi/Kconfig                        |   7 +
+ arch/arm64/Kconfig.platforms                       |   6 +
+ arch/arm64/boot/dts/Makefile                       |   1 +
+ arch/arm64/boot/dts/allwinner/Makefile             |   5 +
+ .../dts/allwinner/sun50i-a64-pine64-common.dtsi    |  80 +++
+ .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts  |  59 ++
+ .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts |  58 ++
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      | 624 +++++++++++++++++++++
+ drivers/clk/sunxi/Makefile                         |   1 +
+ drivers/clk/sunxi/clk-factors.c                    |   3 +-
+ drivers/clk/sunxi/clk-factors.h                    |   1 +
+ drivers/clk/sunxi/clk-multi-gates.c                | 105 ++++
+ drivers/clk/sunxi/clk-sunxi.c                      |   4 +-
+ drivers/crypto/Kconfig                             |   2 +-
+ drivers/pinctrl/sunxi/Kconfig                      |   4 +
+ drivers/pinctrl/sunxi/Makefile                     |   1 +
+ drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c         | 602 ++++++++++++++++++++
+ drivers/rtc/Kconfig                                |   7 +-
+ 23 files changed, 1582 insertions(+), 16 deletions(-)
+ create mode 100644 arch/arm64/boot/dts/allwinner/Makefile
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+ create mode 100644 drivers/clk/sunxi/clk-multi-gates.c
+ create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+
+diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt
+index bb9b0faa..8b39d2b 100644
+--- a/Documentation/devicetree/bindings/arm/sunxi.txt
++++ b/Documentation/devicetree/bindings/arm/sunxi.txt
+@@ -13,3 +13,4 @@ using one of the following compatible strings:
+   allwinner,sun8i-a33
+   allwinner,sun8i-h3
+   allwinner,sun9i-a80
++  allwinner,sun50i-a64
+diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
+index e59f57b..8af12b5 100644
+--- a/Documentation/devicetree/bindings/clock/sunxi.txt
++++ b/Documentation/devicetree/bindings/clock/sunxi.txt
+@@ -77,6 +77,8 @@ Required properties:
+ 	"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
+ 	"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
+ 	"allwinner,sun4i-a10-ve-clk" - for the Video Engine clock
++	"allwinner,sunxi-multi-bus-gates-clk" - for the multi-parent bus gates
++	"allwinner,sun50i-a64-bus-gates-clk" - for the bus gates on A64
+ 
+ Required properties for all clocks:
+ - reg : shall be the control register address for the clock.
+@@ -117,6 +119,11 @@ For "allwinner,sun6i-a31-pll6-clk", there are 2 outputs. The first output
+ is the normal PLL6 output, or "pll6". The second output is rate doubled
+ PLL6, or "pll6x2".
+ 
++The "allwinner,sunxi-multi-bus-gates-clk" holds the actual clocks in
++child nodes, where each one specifies the parent clock that the particular
++gates are depending from. The child nodes each follow the common clock
++binding as described in this document.
++
+ The "allwinner,*-mmc-clk" clocks have three different outputs: the
+ main clock, with the ID 0, and the output and sample clocks, with the
+ IDs 1 and 2, respectively.
+diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
+index 9213b27..08b2361 100644
+--- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
++++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
+@@ -21,6 +21,7 @@ Required properties:
+   "allwinner,sun9i-a80-r-pinctrl"
+   "allwinner,sun8i-a83t-pinctrl"
+   "allwinner,sun8i-h3-pinctrl"
++  "allwinner,sun50i-a64-pinctrl"
+ 
+ - reg: Should contain the register physical address and length for the
+   pin controller.
+diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
+index 72e2c5a..0c22fa9 100644
+--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
++++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
+@@ -175,6 +175,7 @@ parade	Parade Technologies Inc.
+ pericom	Pericom Technology Inc.
+ phytec	PHYTEC Messtechnik GmbH
+ picochip	Picochip Ltd
++pine64	Pine64
+ plathome	Plat'Home Co., Ltd.
+ plda	PLDA
+ pixcir  PIXCIR MICROELECTRONICS Co., Ltd
+diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
+index 1524130e..7c50fa0 100644
+--- a/arch/arm/boot/dts/sun8i-h3.dtsi
++++ b/arch/arm/boot/dts/sun8i-h3.dtsi
+@@ -137,12 +137,12 @@
+ 			clock-output-names = "pll6d2";
+ 		};
+ 
+-		/* dummy clock until pll6 can be reused */
+-		pll8: pll8_clk {
+-			#clock-cells = <0>;
+-			compatible = "fixed-clock";
+-			clock-frequency = <1>;
+-			clock-output-names = "pll8";
++		pll8: clk@c01c20044 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun6i-a31-pll6-clk";
++			reg = <0x01c20044 0x4>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll8", "pll8x2";
+ 		};
+ 
+ 		cpu: cpu_clk@01c20050 {
+@@ -243,7 +243,7 @@
+ 			#clock-cells = <1>;
+ 			compatible = "allwinner,sun4i-a10-mmc-clk";
+ 			reg = <0x01c20088 0x4>;
+-			clocks = <&osc24M>, <&pll6 0>, <&pll8>;
++			clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
+ 			clock-output-names = "mmc0",
+ 					     "mmc0_output",
+ 					     "mmc0_sample";
+@@ -253,7 +253,7 @@
+ 			#clock-cells = <1>;
+ 			compatible = "allwinner,sun4i-a10-mmc-clk";
+ 			reg = <0x01c2008c 0x4>;
+-			clocks = <&osc24M>, <&pll6 0>, <&pll8>;
++			clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
+ 			clock-output-names = "mmc1",
+ 					     "mmc1_output",
+ 					     "mmc1_sample";
+@@ -263,7 +263,7 @@
+ 			#clock-cells = <1>;
+ 			compatible = "allwinner,sun4i-a10-mmc-clk";
+ 			reg = <0x01c20090 0x4>;
+-			clocks = <&osc24M>, <&pll6 0>, <&pll8>;
++			clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
+ 			clock-output-names = "mmc2",
+ 					     "mmc2_output",
+ 					     "mmc2_sample";
+diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
+index c124d65..b305f5b 100644
+--- a/arch/arm/mach-sunxi/Kconfig
++++ b/arch/arm/mach-sunxi/Kconfig
+@@ -46,4 +46,11 @@ config MACH_SUN9I
+ 	default ARCH_SUNXI
+ 	select ARM_GIC
+ 
++config MACH_SUN50I
++	bool "Allwinner A64 (sun50i) SoCs support"
++	default ARCH_SUNXI
++	select ARM_GIC
++	select HAVE_ARM_ARCH_TIMER
++	select PINCTRL_SUN50I_A64
++
+ endif
+diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
+index 21074f6..63a690d 100644
+--- a/arch/arm64/Kconfig.platforms
++++ b/arch/arm64/Kconfig.platforms
+@@ -72,6 +72,12 @@ config ARCH_SEATTLE
+ config ARCH_SHMOBILE
+ 	bool
+ 
++config ARCH_SUNXI
++	bool "Allwinner sunxi 64-bit SoC Family"
++	select PINCTRL_SUN50I_A64
++	help
++	  This enables support for Allwinner sunxi based SoCs like the A64.
++
+ config ARCH_RENESAS
+ 	bool "Renesas SoC Platforms"
+ 	select ARCH_SHMOBILE
+diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
+index f832b8a..3b7428a 100644
+--- a/arch/arm64/boot/dts/Makefile
++++ b/arch/arm64/boot/dts/Makefile
+@@ -1,3 +1,4 @@
++dts-dirs += allwinner
+ dts-dirs += altera
+ dts-dirs += amd
+ dts-dirs += apm
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
+new file mode 100644
+index 0000000..1e29a5a
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -0,0 +1,5 @@
++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
++
++always		:= $(dtb-y)
++subdir-y	:= $(dts-dirs)
++clean-files	:= *.dtb
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi
+new file mode 100644
+index 0000000..d5a7249
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi
+@@ -0,0 +1,80 @@
++/*
++ * Copyright (c) 2016 ARM Ltd.
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This library is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This library is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++#include "sun50i-a64.dtsi"
++
++/ {
++
++	aliases {
++		serial0 = &uart0;
++	};
++
++	soc {
++		reg_vcc3v3: vcc3v3 {
++			compatible = "regulator-fixed";
++			regulator-name = "vcc3v3";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++		};
++	};
++};
++
++&mmc0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>;
++	vmmc-supply = <&reg_vcc3v3>;
++	cd-gpios = <&pio 5 6 0>;
++	cd-inverted;
++	status = "okay";
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pins_a>;
++	status = "okay";
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins>;
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+new file mode 100644
+index 0000000..549dc15
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+@@ -0,0 +1,59 @@
++/*
++ * Copyright (c) 2016 ARM Ltd.
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This library is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This library is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include "sun50i-a64-pine64-common.dtsi"
++
++/ {
++	model = "Pine64+";
++	compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	/* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */
++	memory {
++		reg = <0x40000000 0x40000000>;
++	};
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+new file mode 100644
+index 0000000..ebe029e
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+@@ -0,0 +1,58 @@
++/*
++ * Copyright (c) 2016 ARM Ltd.
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This library is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This library is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include "sun50i-a64-pine64-common.dtsi"
++
++/ {
++	model = "Pine64";
++	compatible = "pine64,pine64", "allwinner,sun50i-a64";
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	memory {
++		reg = <0x40000000 0x20000000>;
++	};
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+new file mode 100644
+index 0000000..1bd436f
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -0,0 +1,624 @@
++/*
++ * Copyright (C) 2016 ARM Ltd.
++ * based on the Allwinner H3 dtsi:
++ *    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
++
++/ {
++	interrupt-parent = <&gic>;
++	#address-cells = <1>;
++	#size-cells = <1>;
++
++	cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		cpu@0 {
++			compatible = "arm,cortex-a53", "arm,armv8";
++			device_type = "cpu";
++			reg = <0>;
++			enable-method = "psci";
++		};
++
++		cpu@1 {
++			compatible = "arm,cortex-a53", "arm,armv8";
++			device_type = "cpu";
++			reg = <1>;
++			enable-method = "psci";
++		};
++
++		cpu@2 {
++			compatible = "arm,cortex-a53", "arm,armv8";
++			device_type = "cpu";
++			reg = <2>;
++			enable-method = "psci";
++		};
++
++		cpu@3 {
++			compatible = "arm,cortex-a53", "arm,armv8";
++			device_type = "cpu";
++			reg = <3>;
++			enable-method = "psci";
++		};
++	};
++
++	psci {
++		compatible = "arm,psci-0.2";
++		method = "smc";
++	};
++
++	memory {
++		device_type = "memory";
++		reg = <0x40000000 0>;
++	};
++
++	gic: interrupt-controller@1c81000 {
++		compatible = "arm,gic-400";
++		interrupt-controller;
++		#interrupt-cells = <3>;
++		#address-cells = <0>;
++
++		reg = <0x01c81000 0x1000>,
++		      <0x01c82000 0x2000>,
++		      <0x01c84000 0x2000>,
++		      <0x01c86000 0x2000>;
++		interrupts = <GIC_PPI 9
++		      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
++	};
++
++	timer {
++		compatible = "arm,armv8-timer";
++		interrupts = <GIC_PPI 13
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
++			     <GIC_PPI 14
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
++			     <GIC_PPI 11
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
++			     <GIC_PPI 10
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
++	};
++
++	clocks {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges;
++
++		osc24M: osc24M_clk {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <24000000>;
++			clock-output-names = "osc24M";
++		};
++
++		osc32k: osc32k_clk {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <32768>;
++			clock-output-names = "osc32k";
++		};
++
++		pll1: pll1_clk@1c20000 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun8i-a23-pll1-clk";
++			reg = <0x01c20000 0x4>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll1";
++		};
++
++		pll6: pll6_clk@1c20028 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun6i-a31-pll6-clk";
++			reg = <0x01c20028 0x4>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll6", "pll6x2";
++		};
++
++		pll6d2: pll6d2_clk {
++			#clock-cells = <0>;
++			compatible = "fixed-factor-clock";
++			clock-div = <2>;
++			clock-mult = <1>;
++			clocks = <&pll6 0>;
++			clock-output-names = "pll6d2";
++		};
++
++		pll7: pll7_clk@1c2002c {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun6i-a31-pll6-clk";
++			reg = <0x01c2002c 0x4>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll7", "pll7x2";
++		};
++
++		cpu: cpu_clk@1c20050 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-cpu-clk";
++			reg = <0x01c20050 0x4>;
++			clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>;
++			clock-output-names = "cpu";
++			critical-clocks = <0>;
++		};
++
++		axi: axi_clk@1c20050 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-axi-clk";
++			reg = <0x01c20050 0x4>;
++			clocks = <&cpu>;
++			clock-output-names = "axi";
++		};
++
++		ahb1: ahb1_clk@1c20054 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun6i-a31-ahb1-clk";
++			reg = <0x01c20054 0x4>;
++			clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
++			clock-output-names = "ahb1";
++		};
++
++		ahb2: ahb2_clk@1c2005c {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun8i-h3-ahb2-clk";
++			reg = <0x01c2005c 0x4>;
++			clocks = <&ahb1>, <&pll6d2>;
++			clock-output-names = "ahb2";
++		};
++
++		apb1: apb1_clk@1c20054 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-apb0-clk";
++			reg = <0x01c20054 0x4>;
++			clocks = <&ahb1>;
++			clock-output-names = "apb1";
++		};
++
++		apb2: apb2_clk@1c20058 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-apb1-clk";
++			reg = <0x01c20058 0x4>;
++			clocks = <&osc32k>, <&osc24M>, <&pll6 1>, <&pll6 1>;
++			clock-output-names = "apb2";
++		};
++
++		bus_gates: bus_gates_clk@1c20060 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun50i-a64-bus-gates-clk",
++				     "allwinner,sunxi-multi-bus-gates-clk";
++			reg = <0x01c20060 0x14>;
++			ahb1_parent {
++				clocks = <&ahb1>;
++				clock-indices = <1>, <5>,
++						<6>, <8>,
++						<9>, <10>,
++						<13>, <14>,
++						<18>, <19>,
++						<20>, <21>,
++						<23>, <24>,
++						<25>, <28>,
++						<32>, <35>,
++						<36>, <37>,
++						<40>, <43>,
++						<44>, <52>,
++						<53>, <54>,
++						<135>;
++				clock-output-names = "bus_mipidsi", "bus_ce",
++						"bus_dma", "bus_mmc0",
++						"bus_mmc1", "bus_mmc2",
++						"bus_nand", "bus_sdram",
++						"bus_ts", "bus_hstimer",
++						"bus_spi0", "bus_spi1",
++						"bus_otg", "bus_otg_ehci0",
++						"bus_ehci0", "bus_otg_ohci0",
++						"bus_ve", "bus_lcd0",
++						"bus_lcd1", "bus_deint",
++						"bus_csi", "bus_hdmi",
++						"bus_de", "bus_gpu",
++						"bus_msgbox", "bus_spinlock",
++						"bus_dbg";
++			};
++			ahb2_parent {
++				clocks = <&ahb2>;
++				clock-indices = <17>, <29>;
++				clock-output-names = "bus_gmac", "bus_ohci0";
++			};
++			apb1_parent {
++				clocks = <&apb1>;
++				clock-indices = <64>, <65>,
++						<69>, <72>,
++						<76>, <77>,
++						<78>;
++				clock-output-names = "bus_codec", "bus_spdif",
++						"bus_pio", "bus_ths",
++						"bus_i2s0", "bus_i2s1",
++						"bus_i2s2";
++			};
++			abp2_parent {
++				clocks = <&apb2>;
++				clock-indices = <96>, <97>,
++						<98>, <101>,
++						<112>, <113>,
++						<114>, <115>,
++						<116>;
++				clock-output-names = "bus_i2c0", "bus_i2c1",
++						"bus_i2c2", "bus_scr",
++						"bus_uart0", "bus_uart1",
++						"bus_uart2", "bus_uart3",
++						"bus_uart4";
++			};
++		};
++
++		mmc0_clk: mmc0_clk@1c20088 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			reg = <0x01c20088 0x4>;
++			clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
++			clock-output-names = "mmc0";
++                };
++
++		mmc1_clk: mmc1_clk@1c2008c {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			reg = <0x01c2008c 0x4>;
++			clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
++			clock-output-names = "mmc1";
++		};
++
++		mmc2_clk: mmc2_clk@1c20090 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			reg = <0x01c20090 0x4>;
++			clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
++			clock-output-names = "mmc2";
++		};
++	};
++
++	soc {
++		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges;
++
++		mmc0: mmc@1c0f000 {
++			compatible = "allwinner,sun50i-a64-mmc",
++				     "allwinner,sun5i-a13-mmc";
++			reg = <0x01c0f000 0x1000>;
++			clocks = <&bus_gates 8>, <&mmc0_clk>,
++				 <&mmc0_clk>, <&mmc0_clk>;
++			clock-names = "ahb", "mmc",
++				      "output", "sample";
++			resets = <&ahb_rst 8>;
++			reset-names = "ahb";
++			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		mmc1: mmc@1c10000 {
++			compatible = "allwinner,sun50i-a64-mmc",
++				     "allwinner,sun5i-a13-mmc";
++			reg = <0x01c10000 0x1000>;
++			clocks = <&bus_gates 9>, <&mmc1_clk>,
++				 <&mmc1_clk>, <&mmc1_clk>;
++			clock-names = "ahb", "mmc",
++				      "output", "sample";
++			resets = <&ahb_rst 9>;
++			reset-names = "ahb";
++			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		mmc2: mmc@1c11000 {
++			compatible = "allwinner,sun50i-a64-mmc",
++				     "allwinner,sun5i-a13-mmc";
++			reg = <0x01c11000 0x1000>;
++			clocks = <&bus_gates 10>, <&mmc2_clk>,
++				 <&mmc2_clk>, <&mmc2_clk>;
++			clock-names = "ahb", "mmc",
++				      "output", "sample";
++			resets = <&ahb_rst 10>;
++			reset-names = "ahb";
++			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		pio: pinctrl@1c20800 {
++			compatible = "allwinner,sun50i-a64-pinctrl";
++			reg = <0x01c20800 0x400>;
++			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&bus_gates 69>;
++			gpio-controller;
++			#gpio-cells = <3>;
++			interrupt-controller;
++			#interrupt-cells = <2>;
++
++			uart0_pins_a: uart0@0 {
++				allwinner,pins = "PB8", "PB9";
++				allwinner,function = "uart0";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart0_pins_b: uart0@1 {
++				allwinner,pins = "PF2", "PF3";
++				allwinner,function = "uart0";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart1_2pins: uart1_2@0 {
++				allwinner,pins = "PG6", "PG7";
++				allwinner,function = "uart1";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart1_4pins: uart1_4@0 {
++				allwinner,pins = "PG6", "PG7", "PG8", "PG9";
++				allwinner,function = "uart1";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart2_2pins: uart2_2@0 {
++				allwinner,pins = "PB0", "PB1";
++				allwinner,function = "uart2";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart2_4pins: uart2_4@0 {
++				allwinner,pins = "PB0", "PB1", "PB2", "PB3";
++				allwinner,function = "uart2";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart3_pins_a: uart3@0 {
++				allwinner,pins = "PD0", "PD1";
++				allwinner,function = "uart3";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart3_2pins_b: uart3_2@1 {
++				allwinner,pins = "PH4", "PH5";
++				allwinner,function = "uart3";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart3_4pins_b: uart3_4@1 {
++				allwinner,pins = "PH4", "PH5", "PH6", "PH7";
++				allwinner,function = "uart3";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart4_2pins: uart4_2@0 {
++				allwinner,pins = "PD2", "PD3";
++				allwinner,function = "uart4";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart4_4pins: uart4_4@0 {
++				allwinner,pins = "PD2", "PD3", "PD4", "PD5";
++				allwinner,function = "uart4";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			mmc0_pins: mmc0@0 {
++				allwinner,pins = "PF0", "PF1", "PF2", "PF3",
++						 "PF4", "PF5";
++				allwinner,function = "mmc0";
++				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			mmc0_default_cd_pin: mmc0_cd_pin@0 {
++				allwinner,pins = "PF6";
++				allwinner,function = "gpio_in";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++			};
++
++			mmc1_pins: mmc1@0 {
++				allwinner,pins = "PG0", "PG1", "PG2", "PG3",
++						 "PG4", "PG5";
++				allwinner,function = "mmc1";
++				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			mmc2_pins: mmc2@0 {
++				allwinner,pins = "PC1", "PC5", "PC6", "PC8",
++						 "PC9", "PC10";
++				allwinner,function = "mmc2";
++				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			i2c0_pins: i2c0_pins {
++				allwinner,pins = "PH0", "PH1";
++				allwinner,function = "i2c0";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			i2c1_pins: i2c1_pins {
++				allwinner,pins = "PH2", "PH3";
++				allwinner,function = "i2c1";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			i2c2_pins: i2c2_pins {
++				allwinner,pins = "PE14", "PE15";
++				allwinner,function = "i2c2";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++		};
++
++		ahb_rst: reset@1c202c0 {
++			#reset-cells = <1>;
++			compatible = "allwinner,sun6i-a31-clock-reset";
++			reg = <0x01c202c0 0xc>;
++		};
++
++		apb1_rst: reset@1c202d0 {
++			#reset-cells = <1>;
++			compatible = "allwinner,sun6i-a31-clock-reset";
++			reg = <0x01c202d0 0x4>;
++		};
++
++		apb2_rst: reset@1c202d8 {
++			#reset-cells = <1>;
++			compatible = "allwinner,sun6i-a31-clock-reset";
++			reg = <0x01c202d8 0x4>;
++		};
++
++		uart0: serial@1c28000 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x01c28000 0x400>;
++			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&bus_gates 112>;
++			resets = <&apb2_rst 16>;
++			status = "disabled";
++		};
++
++		uart1: serial@1c28400 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x01c28400 0x400>;
++			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&bus_gates 113>;
++			resets = <&apb2_rst 17>;
++			status = "disabled";
++		};
++
++		uart2: serial@1c28800 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x01c28800 0x400>;
++			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&bus_gates 114>;
++			resets = <&apb2_rst 18>;
++			status = "disabled";
++		};
++
++		uart3: serial@1c28c00 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x01c28c00 0x400>;
++			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&bus_gates 115>;
++			resets = <&apb2_rst 19>;
++			status = "disabled";
++		};
++
++		uart4: serial@1c29000 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x01c29000 0x400>;
++			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&bus_gates 116>;
++			resets = <&apb2_rst 20>;
++			status = "disabled";
++		};
++
++		rtc: rtc@1f00000 {
++			compatible = "allwinner,sun6i-a31-rtc";
++			reg = <0x01f00000 0x54>;
++			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
++		};
++
++		i2c0: i2c@1c2ac00 {
++			compatible = "allwinner,sun6i-a31-i2c";
++			reg = <0x01c2ac00 0x400>;
++			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&bus_gates 96>;
++			resets = <&apb2_rst 0>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		i2c1: i2c@1c2b000 {
++			compatible = "allwinner,sun6i-a31-i2c";
++			reg = <0x01c2b000 0x400>;
++			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&bus_gates 97>;
++			resets = <&apb2_rst 1>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		i2c2: i2c@1c2b400 {
++			compatible = "allwinner,sun6i-a31-i2c";
++			reg = <0x01c2b400 0x400>;
++			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&bus_gates 98>;
++			resets = <&apb2_rst 2>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++	};
++};
+diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
+index 3fd7901..3a9dc31 100644
+--- a/drivers/clk/sunxi/Makefile
++++ b/drivers/clk/sunxi/Makefile
+@@ -11,6 +11,7 @@ obj-y += clk-a10-ve.o
+ obj-y += clk-a20-gmac.o
+ obj-y += clk-mod0.o
+ obj-y += clk-simple-gates.o
++obj-y += clk-multi-gates.o
+ obj-y += clk-sun8i-bus-gates.o
+ obj-y += clk-sun8i-mbus.o
+ obj-y += clk-sun9i-core.o
+diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
+index 59428db..607ba53 100644
+--- a/drivers/clk/sunxi/clk-factors.c
++++ b/drivers/clk/sunxi/clk-factors.c
+@@ -184,7 +184,8 @@ struct clk *sunxi_factors_register(struct device_node *node,
+ 	if (data->name)
+ 		clk_name = data->name;
+ 	else
+-		of_property_read_string(node, "clock-output-names", &clk_name);
++		of_property_read_string_index(node, "clock-output-names",
++					      data->name_idx, &clk_name);
+ 
+ 	factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL);
+ 	if (!factors)
+diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h
+index 171085a..cc89d1f 100644
+--- a/drivers/clk/sunxi/clk-factors.h
++++ b/drivers/clk/sunxi/clk-factors.h
+@@ -26,6 +26,7 @@ struct factors_data {
+ 	struct clk_factors_config *table;
+ 	void (*getter) (u32 *rate, u32 parent_rate, u8 *n, u8 *k, u8 *m, u8 *p);
+ 	const char *name;
++	int name_idx;
+ };
+ 
+ struct clk_factors {
+diff --git a/drivers/clk/sunxi/clk-multi-gates.c b/drivers/clk/sunxi/clk-multi-gates.c
+new file mode 100644
+index 0000000..76e715a
+--- /dev/null
++++ b/drivers/clk/sunxi/clk-multi-gates.c
+@@ -0,0 +1,105 @@
++/*
++ * Copyright (C) 2016 ARM Ltd.
++ *
++ * Based on clk-sun8i-bus-gates.c, which is:
++ *  Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
++ * Based on clk-simple-gates.c, which is:
++ *  Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/clk-provider.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++static DEFINE_SPINLOCK(gates_lock);
++
++static void __init sunxi_parse_parent(struct device_node *node,
++				      struct clk_onecell_data *clk_data,
++				      void __iomem *reg)
++{
++	const char *parent = of_clk_get_parent_name(node, 0);
++	const char *clk_name;
++	struct property *prop;
++	struct clk *clk;
++	const __be32 *p;
++	int index, i = 0;
++
++	of_property_for_each_u32(node, "clock-indices", prop, p, index) {
++		of_property_read_string_index(node, "clock-output-names",
++					      i, &clk_name);
++
++		clk = clk_register_gate(NULL, clk_name, parent, 0,
++					reg + 4 * (index / 32), index % 32,
++					0, &gates_lock);
++		i++;
++		if (IS_ERR(clk)) {
++			pr_warn("could not register gate clock \"%s\"\n",
++				clk_name);
++			continue;
++		}
++		if (clk_data->clks[index])
++			pr_warn("bus-gate clock %s: index #%d already registered as %s\n",
++				clk_name, index, "?");
++		else
++			clk_data->clks[index] = clk;
++	}
++}
++
++static void __init sunxi_multi_bus_gates_init(struct device_node *node)
++{
++	struct clk_onecell_data *clk_data;
++	struct device_node *child;
++	struct property *prop;
++	struct resource res;
++	void __iomem *reg;
++	const __be32 *p;
++	int number = 0;
++	int index;
++
++	reg = of_io_request_and_map(node, 0, of_node_full_name(node));
++	if (IS_ERR(reg))
++		return;
++
++	clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
++	if (!clk_data)
++		goto err_unmap;
++
++	for_each_child_of_node(node, child)
++		of_property_for_each_u32(child, "clock-indices", prop, p, index)
++			number = max(number, index);
++
++	clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);
++	if (!clk_data->clks)
++		goto err_free_data;
++
++	for_each_child_of_node(node, child)
++		sunxi_parse_parent(child, clk_data, reg);
++
++	clk_data->clk_num = number + 1;
++	if (of_clk_add_provider(node, of_clk_src_onecell_get, clk_data))
++		pr_err("registering bus-gate clock %s failed\n", node->name);
++
++	return;
++
++err_free_data:
++	kfree(clk_data);
++err_unmap:
++	iounmap(reg);
++	of_address_to_resource(node, 0, &res);
++	release_mem_region(res.start, resource_size(&res));
++}
++
++CLK_OF_DECLARE(sunxi_multi_bus_gates, "allwinner,sunxi-multi-bus-gates-clk",
++	       sunxi_multi_bus_gates_init);
+diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
+index 5ba2188..ca59458 100644
+--- a/drivers/clk/sunxi/clk-sunxi.c
++++ b/drivers/clk/sunxi/clk-sunxi.c
+@@ -711,14 +711,14 @@ static const struct factors_data sun4i_pll6_data __initconst = {
+ 	.enable = 31,
+ 	.table = &sun4i_pll5_config,
+ 	.getter = sun4i_get_pll5_factors,
+-	.name = "pll6",
++	.name_idx = 2,
+ };
+ 
+ static const struct factors_data sun6i_a31_pll6_data __initconst = {
+ 	.enable = 31,
+ 	.table = &sun6i_a31_pll6_config,
+ 	.getter = sun6i_a31_get_pll6_factors,
+-	.name = "pll6x2",
++	.name_idx = 1,
+ };
+ 
+ static const struct factors_data sun5i_a13_ahb_data __initconst = {
+diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
+index 07d4942..737200f 100644
+--- a/drivers/crypto/Kconfig
++++ b/drivers/crypto/Kconfig
+@@ -487,7 +487,7 @@ config CRYPTO_DEV_IMGTEC_HASH
+ 
+ config CRYPTO_DEV_SUN4I_SS
+ 	tristate "Support for Allwinner Security System cryptographic accelerator"
+-	depends on ARCH_SUNXI
++	depends on ARCH_SUNXI && !64BIT
+ 	select CRYPTO_MD5
+ 	select CRYPTO_SHA1
+ 	select CRYPTO_AES
+diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
+index f8dbc8b..c1f970f 100644
+--- a/drivers/pinctrl/sunxi/Kconfig
++++ b/drivers/pinctrl/sunxi/Kconfig
+@@ -64,4 +64,8 @@ config PINCTRL_SUN9I_A80_R
+ 	depends on RESET_CONTROLLER
+ 	select PINCTRL_SUNXI_COMMON
+ 
++config PINCTRL_SUN50I_A64
++	bool
++	select PINCTRL_SUNXI_COMMON
++
+ endif
+diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile
+index ef82f22..0ca7681 100644
+--- a/drivers/pinctrl/sunxi/Makefile
++++ b/drivers/pinctrl/sunxi/Makefile
+@@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_SUN7I_A20)		+= pinctrl-sun7i-a20.o
+ obj-$(CONFIG_PINCTRL_SUN8I_A23)		+= pinctrl-sun8i-a23.o
+ obj-$(CONFIG_PINCTRL_SUN8I_A23_R)	+= pinctrl-sun8i-a23-r.o
+ obj-$(CONFIG_PINCTRL_SUN8I_A33)		+= pinctrl-sun8i-a33.o
++obj-$(CONFIG_PINCTRL_SUN50I_A64)	+= pinctrl-sun50i-a64.o
+ obj-$(CONFIG_PINCTRL_SUN8I_A83T)	+= pinctrl-sun8i-a83t.o
+ obj-$(CONFIG_PINCTRL_SUN8I_H3)		+= pinctrl-sun8i-h3.o
+ obj-$(CONFIG_PINCTRL_SUN9I_A80)		+= pinctrl-sun9i-a80.o
+diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+new file mode 100644
+index 0000000..a53cc23
+--- /dev/null
++++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+@@ -0,0 +1,602 @@
++/*
++ * Allwinner A64 SoCs pinctrl driver.
++ *
++ * Copyright (C) 2016 - ARM Ltd.
++ * Author: Andre Przywara <andre.przywara@arm.com>
++ *
++ * Based on pinctrl-sun7i-a20.c, which is:
++ * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2.  This program is licensed "as is" without any
++ * warranty of any kind, whether express or implied.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/pinctrl/pinctrl.h>
++
++#include "pinctrl-sunxi.h"
++
++static const struct sunxi_desc_pin a64_pins[] = {
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart2"),		/* TX */
++		  SUNXI_FUNCTION(0x4, "jtag"),		/* MS0 */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/* EINT0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart2"),		/* RX */
++		  SUNXI_FUNCTION(0x4, "jtag"),		/* CK0 */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* VCCEN */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),		/* EINT1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart2"),		/* RTS */
++		  SUNXI_FUNCTION(0x4, "jtag"),		/* DO0 */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* VPPEN */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),		/* EINT2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart2"),		/* CTS */
++		  SUNXI_FUNCTION(0x3, "i2s0"),		/* MCLK */
++		  SUNXI_FUNCTION(0x4, "jtag"),		/* DI0 */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* VPPPP */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),		/* EINT3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif2"),		/* SYNC */
++		  SUNXI_FUNCTION(0x3, "i2s0"),		/* SYNC */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* CLK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),		/* EINT4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif2"),		/* BCLK */
++		  SUNXI_FUNCTION(0x3, "i2s0"),		/* BCLK */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* DATA */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),		/* EINT5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif2"),		/* DOUT */
++		  SUNXI_FUNCTION(0x3, "i2s0"),		/* DOUT */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* RST */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),		/* EINT6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif2"),		/* DIN */
++		  SUNXI_FUNCTION(0x3, "i2s0"),		/* DIN */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* DET */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),		/* EINT7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x4, "uart0"),		/* TX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),		/* EINT8 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x4, "uart0"),		/* RX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),		/* EINT9 */
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NWE */
++		  SUNXI_FUNCTION(0x4, "spi0")),		/* MOSI */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NALE */
++		  SUNXI_FUNCTION(0x3, "mmc2"),		/* DS */
++		  SUNXI_FUNCTION(0x4, "spi0")),		/* MISO */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NCLE */
++		  SUNXI_FUNCTION(0x4, "spi0")),		/* SCK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NCE1 */
++		  SUNXI_FUNCTION(0x4, "spi0")),		/* CS */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0")),	/* NCE0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NRE# */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* CLK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NRB0 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* CMD */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0")),	/* NRB1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ0 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ1 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ2 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ3 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ4 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ5 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ6 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ7 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQS */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* RST */
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D2 */
++		  SUNXI_FUNCTION(0x3, "uart3"),		/* TX */
++		  SUNXI_FUNCTION(0x4, "spi1"),		/* CS */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* CLK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D3 */
++		  SUNXI_FUNCTION(0x3, "uart3"),		/* RX */
++		  SUNXI_FUNCTION(0x4, "spi1"),		/* CLK */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* DE */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D4 */
++		  SUNXI_FUNCTION(0x3, "uart4"),		/* TX */
++		  SUNXI_FUNCTION(0x4, "spi1"),		/* MOSI */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* HSYNC */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D5 */
++		  SUNXI_FUNCTION(0x3, "uart4"),		/* RX */
++		  SUNXI_FUNCTION(0x4, "spi1"),		/* MISO */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* VSYNC */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D6 */
++		  SUNXI_FUNCTION(0x3, "uart4"),		/* RTS */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D7 */
++		  SUNXI_FUNCTION(0x3, "uart4"),		/* CTS */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D10 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D11 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D12 */
++		  SUNXI_FUNCTION(0x4, "emac"),		/* ERXD3 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D13 */
++		  SUNXI_FUNCTION(0x4, "emac"),		/* ERXD2 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D14 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ERXD1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D15 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ERXD0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D18 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP0 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ERXCK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D19 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN0 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ERXCTL */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D20 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP1 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ENULL */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D21 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN1 */
++		  SUNXI_FUNCTION(0x4, "emac"),		/* ETXD3 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D22 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP2 */
++		  SUNXI_FUNCTION(0x4, "emac"),		/* ETXD2 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D23 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN2 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ETXD1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* CLK */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VPC */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ETXD0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* DE */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VNC */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ETXCK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* HSYNC */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP3 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ETXCTL */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* VSYNC */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN3 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ECLKIN */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "pwm"),		/* PWM0 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* EMDC */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x4, "emac")),		/* EMDIO */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out")),
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* PCK */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* CLK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* CK */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* ERR */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* HSYNC */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* SYNC */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* VSYNC */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* DVLD */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D0 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D1 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D2 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D3 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D4 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D5 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D6 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D7 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0")),		/* SCK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0")),		/* SDA */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "pll"),		/* LOCK_DBG */
++		  SUNXI_FUNCTION(0x3, "i2c2")),		/* SCK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x3, "i2c2")),		/* SDA */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out")),
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out")),
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* D1 */
++		  SUNXI_FUNCTION(0x3, "jtag")),		/* MSI */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* D0 */
++		  SUNXI_FUNCTION(0x3, "jtag")),		/* DI1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* CLK */
++		  SUNXI_FUNCTION(0x3, "uart0")),	/* TX */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* CMD */
++		  SUNXI_FUNCTION(0x3, "jtag")),		/* DO1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* D3 */
++		  SUNXI_FUNCTION(0x4, "uart0")),	/* RX */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* D2 */
++		  SUNXI_FUNCTION(0x3, "jtag")),		/* CK1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out")),
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* CLK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),	/* EINT0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* CMD */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),	/* EINT1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* D0 */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),	/* EINT2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* D1 */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),	/* EINT3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* D2 */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),	/* EINT4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* D3 */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),	/* EINT5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart1"),		/* TX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),	/* EINT6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart1"),		/* RX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),	/* EINT7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart1"),		/* RTS */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)),	/* EINT8 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart1"),		/* CTS */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)),	/* EINT9 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif3"),		/* SYNC */
++		  SUNXI_FUNCTION(0x3, "i2s1"),		/* SYNC */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)),	/* EINT10 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif3"),		/* BCLK */
++		  SUNXI_FUNCTION(0x3, "i2s1"),		/* BCLK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)),	/* EINT11 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif3"),		/* DOUT */
++		  SUNXI_FUNCTION(0x3, "i2s1"),		/* DOUT */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)),	/* EINT12 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif3"),		/* DIN */
++		  SUNXI_FUNCTION(0x3, "i2s1"),		/* DIN */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)),	/* EINT13 */
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "i2c0"),		/* SCK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),	/* EINT0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "i2c0"),		/* SDA */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),	/* EINT1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "i2c1"),		/* SCK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),	/* EINT2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "i2c1"),		/* SDA */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),	/* EINT3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart3"),		/* TX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),	/* EINT4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart3"),		/* RX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),	/* EINT5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart3"),		/* RTS */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)),	/* EINT6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart3"),		/* CTS */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)),	/* EINT7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "spdif"),		/* OUT */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)),	/* EINT8 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)),	/* EINT9 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mic"),		/* CLK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)),	/* EINT10 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mic"),		/* DATA */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)),	/* EINT11 */
++};
++
++static const struct sunxi_pinctrl_desc a64_pinctrl_data = {
++	.pins = a64_pins,
++	.npins = ARRAY_SIZE(a64_pins),
++	.irq_banks = 3,
++};
++
++static int a64_pinctrl_probe(struct platform_device *pdev)
++{
++	return sunxi_pinctrl_init(pdev,
++				  &a64_pinctrl_data);
++}
++
++static const struct of_device_id a64_pinctrl_match[] = {
++	{ .compatible = "allwinner,sun50i-a64-pinctrl", },
++	{}
++};
++MODULE_DEVICE_TABLE(of, a64_pinctrl_match);
++
++static struct platform_driver a64_pinctrl_driver = {
++	.probe	= a64_pinctrl_probe,
++	.driver	= {
++		.name		= "sun50i-a64-pinctrl",
++		.of_match_table	= a64_pinctrl_match,
++	},
++};
++builtin_platform_driver(a64_pinctrl_driver);
+diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
+index 376322f..526eaf4 100644
+--- a/drivers/rtc/Kconfig
++++ b/drivers/rtc/Kconfig
+@@ -1360,10 +1360,11 @@ config RTC_DRV_SUN4V
+ 
+ config RTC_DRV_SUN6I
+ 	tristate "Allwinner A31 RTC"
+-	depends on MACH_SUN6I || MACH_SUN8I
++	default MACH_SUN6I || MACH_SUN8I
++	depends on ARCH_SUNXI
+ 	help
+-	  If you say Y here you will get support for the RTC found on
+-	  Allwinner A31.
++	  If you say Y here you will get support for the RTC found in
++	  some Allwinner SoCs like the A31 or the A64.
+ 
+ config RTC_DRV_SUNXI
+ 	tristate "Allwinner sun4i/sun7i RTC"
+-- 
+2.5.0
+
diff --git a/KEYS-Add-a-system-blacklist-keyring.patch b/KEYS-Add-a-system-blacklist-keyring.patch
index be35564a6..469ac35ab 100644
--- a/KEYS-Add-a-system-blacklist-keyring.patch
+++ b/KEYS-Add-a-system-blacklist-keyring.patch
@@ -71,7 +71,7 @@ diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h
 index b20cd885c1fd..51d8ddc60e0f 100644
 --- a/include/keys/system_keyring.h
 +++ b/include/keys/system_keyring.h
-@@ -35,4 +35,8 @@ extern int system_verify_data(const void *data, unsigned long len,
+@@ -35,6 +35,10 @@ extern int system_verify_data(const void *data, unsigned long len,
  			      enum key_being_used_for usage);
  #endif
  
@@ -79,7 +79,9 @@ index b20cd885c1fd..51d8ddc60e0f 100644
 +extern struct key *system_blacklist_keyring;
 +#endif
 +
- #endif /* _KEYS_SYSTEM_KEYRING_H */
+ #ifdef CONFIG_IMA_MOK_KEYRING
+ extern struct key *ima_mok_keyring;
+ extern struct key *ima_blacklist_keyring;
 diff --git a/init/Kconfig b/init/Kconfig
 index 02da9f1fd9df..782d26f02885 100644
 --- a/init/Kconfig
diff --git a/PNP-Add-Broadwell-to-Intel-MCH-size-workaround.patch b/PNP-Add-Broadwell-to-Intel-MCH-size-workaround.patch
deleted file mode 100644
index 3a877105d..000000000
--- a/PNP-Add-Broadwell-to-Intel-MCH-size-workaround.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 61feb31b0dfecfd7949e672a54ac7256f4dd2c3d Mon Sep 17 00:00:00 2001
-From: Christophe Le Roy <christophe.fish@gmail.com>
-Date: Fri, 11 Dec 2015 09:13:42 +0100
-Subject: [PATCH] PNP: Add Broadwell to Intel MCH size workaround
-
-Add device ID 0x1604 for Broadwell to commit cb171f7abb9a ("PNP:
-Work around BIOS defects in Intel MCH area reporting").
-
->From a Lenovo ThinkPad T550:
-
-  system 00:01: [io  0x1800-0x189f] could not be reserved
-  system 00:01: [io  0x0800-0x087f] has been reserved
-  system 00:01: [io  0x0880-0x08ff] has been reserved
-  system 00:01: [io  0x0900-0x097f] has been reserved
-  system 00:01: [io  0x0980-0x09ff] has been reserved
-  system 00:01: [io  0x0a00-0x0a7f] has been reserved
-  system 00:01: [io  0x0a80-0x0aff] has been reserved
-  system 00:01: [io  0x0b00-0x0b7f] has been reserved
-  system 00:01: [io  0x0b80-0x0bff] has been reserved
-  system 00:01: [io  0x15e0-0x15ef] has been reserved
-  system 00:01: [io  0x1600-0x167f] has been reserved
-  system 00:01: [io  0x1640-0x165f] has been reserved
-  system 00:01: [mem 0xf8000000-0xfbffffff] could not be reserved
-  system 00:01: [mem 0xfed1c000-0xfed1ffff] has been reserved
-  system 00:01: [mem 0xfed10000-0xfed13fff] has been reserved
-  system 00:01: [mem 0xfed18000-0xfed18fff] has been reserved
-  system 00:01: [mem 0xfed19000-0xfed19fff] has been reserved
-  system 00:01: [mem 0xfed45000-0xfed4bfff] has been reserved
-  system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
-  [...]
-  resource sanity check: requesting [mem 0xfed10000-0xfed15fff], which spans more than pnp 00:01 [mem 0xfed10000-0xfed13fff]
-  ------------[ cut here ]------------
-  WARNING: CPU: 2 PID: 1 at /build/linux-CrHvZ_/linux-4.2.6/arch/x86/mm/ioremap.c:198 __ioremap_caller+0x2ee/0x360()
-  Info: mapping multiple BARs. Your kernel is fine.
-  Modules linked in:
-  CPU: 2 PID: 1 Comm: swapper/0 Not tainted 4.2.0-1-amd64 #1 Debian 4.2.6-1
-  Hardware name: LENOVO 20CKCTO1WW/20CKCTO1WW, BIOS N11ET34W (1.10 ) 08/20/2015
-   0000000000000000 ffffffff817e6868 ffffffff8154e2f6 ffff8802241efbf8
-   ffffffff8106e5b1 ffffc90000e98000 0000000000006000 ffffc90000e98000
-   0000000000006000 0000000000000000 ffffffff8106e62a ffffffff817e68c8
-  Call Trace:
-   [<ffffffff8154e2f6>] ? dump_stack+0x40/0x50
-   [<ffffffff8106e5b1>] ? warn_slowpath_common+0x81/0xb0
-   [<ffffffff8106e62a>] ? warn_slowpath_fmt+0x4a/0x50
-   [<ffffffff810742a3>] ? iomem_map_sanity_check+0xb3/0xc0
-   [<ffffffff8105dade>] ? __ioremap_caller+0x2ee/0x360
-   [<ffffffff81036ae6>] ? snb_uncore_imc_init_box+0x66/0x90
-   [<ffffffff810351a8>] ? uncore_pci_probe+0xc8/0x1a0
-   [<ffffffff81302d7f>] ? local_pci_probe+0x3f/0xa0
-   [<ffffffff81303ea4>] ? pci_device_probe+0xc4/0x110
-   [<ffffffff813d9b1e>] ? driver_probe_device+0x1ee/0x450
-   [<ffffffff813d9dfb>] ? __driver_attach+0x7b/0x80
-   [<ffffffff813d9d80>] ? driver_probe_device+0x450/0x450
-   [<ffffffff813d796a>] ? bus_for_each_dev+0x5a/0x90
-   [<ffffffff813d9091>] ? bus_add_driver+0x1f1/0x290
-   [<ffffffff81b37fa8>] ? uncore_cpu_setup+0xc/0xc
-   [<ffffffff813da73f>] ? driver_register+0x5f/0xe0
-   [<ffffffff81b38074>] ? intel_uncore_init+0xcc/0x2b0
-   [<ffffffff81b37fa8>] ? uncore_cpu_setup+0xc/0xc
-   [<ffffffff8100213e>] ? do_one_initcall+0xce/0x200
-   [<ffffffff8108a100>] ? parse_args+0x140/0x4e0
-   [<ffffffff81b2b0cb>] ? kernel_init_freeable+0x162/0x1e8
-   [<ffffffff815443f0>] ? rest_init+0x80/0x80
-   [<ffffffff815443fe>] ? kernel_init+0xe/0xf0
-   [<ffffffff81553e5f>] ? ret_from_fork+0x3f/0x70
-   [<ffffffff815443f0>] ? rest_init+0x80/0x80
-  ---[ end trace 472e7959536abf12 ]---
-
-  00:00.0 Host bridge: Intel Corporation Broadwell-U Host Bridge -OPI (rev 09)
-          Subsystem: Lenovo Device 2223
-          Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
-          Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-
-          Latency: 0
-          Capabilities: [e0] Vendor Specific Information: Len=0c <?>
-          Kernel driver in use: bdw_uncore
-  00: 86 80 04 16 06 00 90 20 09 00 00 06 00 00 00 00
-  10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-  20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 23 22
-  30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00
-
-Signed-off-by: Christophe Le Roy <christophe.fish@gmail.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/pnp/quirks.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c
-index 943c1cb9566c..f700723ca5d6 100644
---- a/drivers/pnp/quirks.c
-+++ b/drivers/pnp/quirks.c
-@@ -343,6 +343,7 @@ static void quirk_amd_mmconfig_area(struct pnp_dev *dev)
- static const unsigned int mch_quirk_devices[] = {
- 	0x0154,	/* Ivy Bridge */
- 	0x0c00,	/* Haswell */
-+	0x1604, /* Broadwell */
- };
- 
- static struct pci_dev *get_intel_host(void)
--- 
-2.5.0
-
diff --git a/PNP-Add-Haswell-ULT-to-Intel-MCH-size-workaround.patch b/PNP-Add-Haswell-ULT-to-Intel-MCH-size-workaround.patch
deleted file mode 100644
index c2082a3b4..000000000
--- a/PNP-Add-Haswell-ULT-to-Intel-MCH-size-workaround.patch
+++ /dev/null
@@ -1,119 +0,0 @@
-From afa5b65015ff2a7f0b4ec8cab6f58fa47025259a Mon Sep 17 00:00:00 2001
-From: Josh Boyer <jwboyer@fedoraproject.org>
-Date: Fri, 22 Jan 2016 08:11:46 -0500
-Subject: [PATCH] PNP: Add Haswell-ULT to Intel MCH size workaround
-
-Add device ID 0x0a04 for Haswell-ULT to the list of devices with MCH
-problems.
-
-From a Lenovo ThinkPad T440S:
-[    0.188604] pnp: PnP ACPI init
-[    0.189044] system 00:00: [mem 0x00000000-0x0009ffff] could not be reserved
-[    0.189048] system 00:00: [mem 0x000c0000-0x000c3fff] could not be reserved
-[    0.189050] system 00:00: [mem 0x000c4000-0x000c7fff] could not be reserved
-[    0.189052] system 00:00: [mem 0x000c8000-0x000cbfff] could not be reserved
-[    0.189054] system 00:00: [mem 0x000cc000-0x000cffff] could not be reserved
-[    0.189056] system 00:00: [mem 0x000d0000-0x000d3fff] has been reserved
-[    0.189058] system 00:00: [mem 0x000d4000-0x000d7fff] has been reserved
-[    0.189060] system 00:00: [mem 0x000d8000-0x000dbfff] has been reserved
-[    0.189061] system 00:00: [mem 0x000dc000-0x000dffff] has been reserved
-[    0.189063] system 00:00: [mem 0x000e0000-0x000e3fff] could not be reserved
-[    0.189065] system 00:00: [mem 0x000e4000-0x000e7fff] could not be reserved
-[    0.189067] system 00:00: [mem 0x000e8000-0x000ebfff] could not be reserved
-[    0.189069] system 00:00: [mem 0x000ec000-0x000effff] could not be reserved
-[    0.189071] system 00:00: [mem 0x000f0000-0x000fffff] could not be reserved
-[    0.189073] system 00:00: [mem 0x00100000-0xdf9fffff] could not be reserved
-[    0.189075] system 00:00: [mem 0xfec00000-0xfed3ffff] could not be reserved
-[    0.189078] system 00:00: [mem 0xfed4c000-0xffffffff] could not be reserved
-[    0.189082] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active)
-[    0.189216] system 00:01: [io  0x1800-0x189f] could not be reserved
-[    0.189220] system 00:01: [io  0x0800-0x087f] has been reserved
-[    0.189222] system 00:01: [io  0x0880-0x08ff] has been reserved
-[    0.189224] system 00:01: [io  0x0900-0x097f] has been reserved
-[    0.189226] system 00:01: [io  0x0980-0x09ff] has been reserved
-[    0.189229] system 00:01: [io  0x0a00-0x0a7f] has been reserved
-[    0.189231] system 00:01: [io  0x0a80-0x0aff] has been reserved
-[    0.189233] system 00:01: [io  0x0b00-0x0b7f] has been reserved
-[    0.189235] system 00:01: [io  0x0b80-0x0bff] has been reserved
-[    0.189238] system 00:01: [io  0x15e0-0x15ef] has been reserved
-[    0.189240] system 00:01: [io  0x1600-0x167f] has been reserved
-[    0.189242] system 00:01: [io  0x1640-0x165f] has been reserved
-[    0.189246] system 00:01: [mem 0xf8000000-0xfbffffff] could not be reserved
-[    0.189249] system 00:01: [mem 0x00000000-0x00000fff] could not be reserved
-[    0.189251] system 00:01: [mem 0xfed1c000-0xfed1ffff] has been reserved
-[    0.189254] system 00:01: [mem 0xfed10000-0xfed13fff] has been reserved
-[    0.189256] system 00:01: [mem 0xfed18000-0xfed18fff] has been reserved
-[    0.189258] system 00:01: [mem 0xfed19000-0xfed19fff] has been reserved
-[    0.189261] system 00:01: [mem 0xfed45000-0xfed4bfff] has been reserved
-[    0.189264] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
-[....]
-[    0.583653] resource sanity check: requesting [mem 0xfed10000-0xfed15fff], which spans more than pnp 00:01 [mem 0xfed10000-0xfed13fff]
-[    0.583654] ------------[ cut here ]------------
-[    0.583660] WARNING: CPU: 0 PID: 1 at arch/x86/mm/ioremap.c:198 __ioremap_caller+0x2c5/0x380()
-[    0.583661] Info: mapping multiple BARs. Your kernel is fine.
-[    0.583662] Modules linked in:
-
-[    0.583666] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.3.3-303.fc23.x86_64 #1
-[    0.583668] Hardware name: LENOVO 20AR001GXS/20AR001GXS, BIOS GJET86WW (2.36 ) 12/04/2015
-[    0.583670]  0000000000000000 0000000014cf7e59 ffff880214a1baf8 ffffffff813a625f
-[    0.583673]  ffff880214a1bb40 ffff880214a1bb30 ffffffff810a07c2 00000000fed10000
-[    0.583675]  ffffc90000cb8000 0000000000006000 0000000000000000 ffff8800d6381040
-[    0.583678] Call Trace:
-[    0.583683]  [<ffffffff813a625f>] dump_stack+0x44/0x55
-[    0.583686]  [<ffffffff810a07c2>] warn_slowpath_common+0x82/0xc0
-[    0.583688]  [<ffffffff810a085c>] warn_slowpath_fmt+0x5c/0x80
-[    0.583692]  [<ffffffff810a6fba>] ? iomem_map_sanity_check+0xba/0xd0
-[    0.583695]  [<ffffffff81065835>] __ioremap_caller+0x2c5/0x380
-[    0.583698]  [<ffffffff81065907>] ioremap_nocache+0x17/0x20
-[    0.583701]  [<ffffffff8103a119>] snb_uncore_imc_init_box+0x79/0xb0
-[    0.583705]  [<ffffffff81038900>] uncore_pci_probe+0xd0/0x1b0
-[    0.583707]  [<ffffffff813efda5>] local_pci_probe+0x45/0xa0
-[    0.583710]  [<ffffffff813f118d>] pci_device_probe+0xfd/0x140
-[    0.583713]  [<ffffffff814d9b52>] driver_probe_device+0x222/0x480
-[    0.583715]  [<ffffffff814d9e34>] __driver_attach+0x84/0x90
-[    0.583717]  [<ffffffff814d9db0>] ? driver_probe_device+0x480/0x480
-[    0.583720]  [<ffffffff814d762c>] bus_for_each_dev+0x6c/0xc0
-[    0.583722]  [<ffffffff814d930e>] driver_attach+0x1e/0x20
-[    0.583724]  [<ffffffff814d8e4b>] bus_add_driver+0x1eb/0x280
-[    0.583727]  [<ffffffff81d6af1a>] ? uncore_cpu_setup+0x12/0x12
-[    0.583729]  [<ffffffff814da680>] driver_register+0x60/0xe0
-[    0.583733]  [<ffffffff813ef78c>] __pci_register_driver+0x4c/0x50
-[    0.583736]  [<ffffffff81d6affc>] intel_uncore_init+0xe2/0x2e6
-[    0.583738]  [<ffffffff81d6af1a>] ? uncore_cpu_setup+0x12/0x12
-[    0.583741]  [<ffffffff81002123>] do_one_initcall+0xb3/0x200
-[    0.583745]  [<ffffffff810be500>] ? parse_args+0x1a0/0x4a0
-[    0.583749]  [<ffffffff81d5c1c8>] kernel_init_freeable+0x189/0x223
-[    0.583752]  [<ffffffff81775c40>] ? rest_init+0x80/0x80
-[    0.583754]  [<ffffffff81775c4e>] kernel_init+0xe/0xe0
-[    0.583758]  [<ffffffff81781adf>] ret_from_fork+0x3f/0x70
-[    0.583760]  [<ffffffff81775c40>] ? rest_init+0x80/0x80
-[    0.583765] ---[ end trace 077c426a39e018aa ]---
-
-00:00.0 Host bridge [0600]: Intel Corporation Haswell-ULT DRAM Controller [8086:0a04] (rev 0b)
-	Subsystem: Lenovo Device [17aa:220c]
-	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
-	Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-
-	Latency: 0
-	Capabilities: <access denied>
-	Kernel driver in use: hsw_uncore
-
-Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org>
----
- drivers/pnp/quirks.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c
-index f700723ca5d6..d28e3ab9479c 100644
---- a/drivers/pnp/quirks.c
-+++ b/drivers/pnp/quirks.c
-@@ -342,6 +342,7 @@ static void quirk_amd_mmconfig_area(struct pnp_dev *dev)
- /* Device IDs of parts that have 32KB MCH space */
- static const unsigned int mch_quirk_devices[] = {
- 	0x0154,	/* Ivy Bridge */
-+	0x0a04, /* Haswell-ULT */
- 	0x0c00,	/* Haswell */
- 	0x1604, /* Broadwell */
- };
--- 
-2.5.0
-
diff --git a/alua_fix.patch b/alua_fix.patch
deleted file mode 100644
index eb278fabb..000000000
--- a/alua_fix.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 221255aee67ec1c752001080aafec0c4e9390d95 Mon Sep 17 00:00:00 2001
-From: Hannes Reinecke <hare@suse.de>
-Date: Tue, 1 Dec 2015 10:16:42 +0100
-Subject: scsi: ignore errors from scsi_dh_add_device()
-
-device handler initialisation might fail due to a number of
-reasons. But as device_handlers are optional this shouldn't
-cause us to disable the device entirely.
-So just ignore errors from scsi_dh_add_device().
-
-Reviewed-by: Johannes Thumshirn <jthumshirn@suse.com>
-Reviewed-by: Christoph Hellwig <hch@lst.de>
-Signed-off-by: Hannes Reinecke <hare@suse.de>
-Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
----
- drivers/scsi/scsi_sysfs.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c
-index fc3cd26..d015374 100644
---- a/drivers/scsi/scsi_sysfs.c
-+++ b/drivers/scsi/scsi_sysfs.c
-@@ -1120,11 +1120,12 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev)
- 	}
- 
- 	error = scsi_dh_add_device(sdev);
--	if (error) {
-+	if (error)
-+		/*
-+		 * device_handler is optional, so any error can be ignored
-+		 */
- 		sdev_printk(KERN_INFO, sdev,
- 				"failed to add device handler: %d\n", error);
--		return error;
--	}
- 
- 	device_enable_async_suspend(&sdev->sdev_dev);
- 	error = device_add(&sdev->sdev_dev);
--- 
-cgit v0.11.2
-
diff --git a/bcm283x-Pull-upstream-fixes-plus-iproc-mmc-driver.patch b/bcm283x-Pull-upstream-fixes-plus-iproc-mmc-driver.patch
new file mode 100644
index 000000000..092e7206a
--- /dev/null
+++ b/bcm283x-Pull-upstream-fixes-plus-iproc-mmc-driver.patch
@@ -0,0 +1,3526 @@
+From 735f01326873349426f041a4fa2f5703a1ed43a4 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 5 Feb 2016 15:06:15 -0800
+Subject: [PATCH 01/36] drm/vc4: Fix a framebuffer reference leak on async flip
+ interrupt.
+
+We'd need X to queue up an async pageflip while another is
+outstanding, and then take a SIGIO.  I think X actually avoids sending
+out the next pageflip while one's already queued, but I'm not sure.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
+index 018145e..989ee72 100644
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -544,6 +544,7 @@ static int vc4_async_page_flip(struct drm_crtc *crtc,
+ 	/* Make sure all other async modesetes have landed. */
+ 	ret = down_interruptible(&vc4->async_modeset);
+ 	if (ret) {
++		drm_framebuffer_unreference(fb);
+ 		kfree(flip_state);
+ 		return ret;
+ 	}
+-- 
+2.7.3
+
+From e1ceac2cefbda12d1d9d9ee547fc0cc8bfeebde6 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 12 Feb 2016 14:15:14 -0800
+Subject: [PATCH 02/36] drm/vc4: Bring HDMI up from power off if necessary.
+
+If the firmware hadn't brought up HDMI for us, we need to do its
+power-on reset sequence (reset HD and and clear its STANDBY bits,
+reset HDMI, and leave the PHY disabled).
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 29 ++++++++++++++++++++++++++++-
+ drivers/gpu/drm/vc4/vc4_regs.h |  2 ++
+ 2 files changed, 30 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
+index c69c046..6e55760 100644
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -495,6 +495,16 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
+ 		goto err_put_i2c;
+ 	}
+ 
++	/* This is the rate that is set by the firmware.  The number
++	 * needs to be a bit higher than the pixel clock rate
++	 * (generally 148.5Mhz).
++	 */
++	ret = clk_set_rate(hdmi->hsm_clock, 163682864);
++	if (ret) {
++		DRM_ERROR("Failed to set HSM clock rate: %d\n", ret);
++		goto err_unprepare_pix;
++	}
++
+ 	ret = clk_prepare_enable(hdmi->hsm_clock);
+ 	if (ret) {
+ 		DRM_ERROR("Failed to turn on HDMI state machine clock: %d\n",
+@@ -516,7 +526,24 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
+ 	vc4->hdmi = hdmi;
+ 
+ 	/* HDMI core must be enabled. */
+-	WARN_ON_ONCE((HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE) == 0);
++	if (!(HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE)) {
++		HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_SW_RST);
++		udelay(1);
++		HD_WRITE(VC4_HD_M_CTL, 0);
++
++		HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_ENABLE);
++
++		HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL,
++			   VC4_HDMI_SW_RESET_HDMI |
++			   VC4_HDMI_SW_RESET_FORMAT_DETECT);
++
++		HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL, 0);
++
++		/* PHY should be in reset, like
++		 * vc4_hdmi_encoder_disable() does.
++		 */
++		HDMI_WRITE(VC4_HDMI_TX_PHY_RESET_CTL, 0xf << 16);
++	}
+ 
+ 	drm_encoder_init(drm, hdmi->encoder, &vc4_hdmi_encoder_funcs,
+ 			 DRM_MODE_ENCODER_TMDS, NULL);
+diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
+index 4e52a0a..85c36d2 100644
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -456,6 +456,8 @@
+ #define VC4_HDMI_TX_PHY_RESET_CTL		0x2c0
+ 
+ #define VC4_HD_M_CTL				0x00c
++# define VC4_HD_M_REGISTER_FILE_STANDBY		(3 << 6)
++# define VC4_HD_M_RAM_STANDBY			(3 << 4)
+ # define VC4_HD_M_SW_RST			BIT(2)
+ # define VC4_HD_M_ENABLE			BIT(0)
+ 
+-- 
+2.7.3
+
+From 63d38d99739736480b24c9f9bd7880ce4e49eb0c Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 12 Feb 2016 15:16:56 -0800
+Subject: [PATCH 03/36] drm/vc4: Add another reg to HDMI debug dumping.
+
+This is also involved in the HDMI setup sequence so it's nice to see
+it.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
+index 6e55760..56272ca 100644
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -95,6 +95,7 @@ static const struct {
+ 	HDMI_REG(VC4_HDMI_SW_RESET_CONTROL),
+ 	HDMI_REG(VC4_HDMI_HOTPLUG_INT),
+ 	HDMI_REG(VC4_HDMI_HOTPLUG),
++	HDMI_REG(VC4_HDMI_RAM_PACKET_CONFIG),
+ 	HDMI_REG(VC4_HDMI_HORZA),
+ 	HDMI_REG(VC4_HDMI_HORZB),
+ 	HDMI_REG(VC4_HDMI_FIFO_CTL),
+-- 
+2.7.3
+
+From 46e96facb9b67486285c26f88ee747b8d9f4abc9 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 15 Feb 2016 17:06:02 -0800
+Subject: [PATCH 04/36] drm/vc4: Fix the name of the VSYNCD_EVEN register.
+
+It's used for delaying vsync in interlaced mode.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
+ drivers/gpu/drm/vc4/vc4_regs.h | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
+index 989ee72..5e84be2 100644
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -83,7 +83,7 @@ static const struct {
+ } crtc_regs[] = {
+ 	CRTC_REG(PV_CONTROL),
+ 	CRTC_REG(PV_V_CONTROL),
+-	CRTC_REG(PV_VSYNCD),
++	CRTC_REG(PV_VSYNCD_EVEN),
+ 	CRTC_REG(PV_HORZA),
+ 	CRTC_REG(PV_HORZB),
+ 	CRTC_REG(PV_VERTA),
+diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
+index 85c36d2..d529665 100644
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -187,7 +187,7 @@
+ # define PV_VCONTROL_CONTINUOUS			BIT(1)
+ # define PV_VCONTROL_VIDEN			BIT(0)
+ 
+-#define PV_VSYNCD				0x08
++#define PV_VSYNCD_EVEN				0x08
+ 
+ #define PV_HORZA				0x0c
+ # define PV_HORZA_HBP_MASK			VC4_MASK(31, 16)
+-- 
+2.7.3
+
+From baff41935a7b4c1b6015a99a0ca222fd0a5552b9 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 15 Feb 2016 17:31:41 -0800
+Subject: [PATCH 05/36] drm/vc4: Fix setting of vertical timings in the CRTC.
+
+It looks like when I went to add the interlaced bits, I just took the
+existing PV_VERT* block and indented it, instead of copy and pasting
+it first.  Without this, changing resolution never worked.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
+index 5e84be2..93d53c2 100644
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -212,6 +212,16 @@ static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
+ 				 PV_HORZB_HFP) |
+ 		   VC4_SET_FIELD(mode->hdisplay, PV_HORZB_HACTIVE));
+ 
++	CRTC_WRITE(PV_VERTA,
++		   VC4_SET_FIELD(mode->vtotal - mode->vsync_end,
++				 PV_VERTA_VBP) |
++		   VC4_SET_FIELD(mode->vsync_end - mode->vsync_start,
++				 PV_VERTA_VSYNC));
++	CRTC_WRITE(PV_VERTB,
++		   VC4_SET_FIELD(mode->vsync_start - mode->vdisplay,
++				 PV_VERTB_VFP) |
++		   VC4_SET_FIELD(vactive, PV_VERTB_VACTIVE));
++
+ 	if (interlace) {
+ 		CRTC_WRITE(PV_VERTA_EVEN,
+ 			   VC4_SET_FIELD(mode->vtotal - mode->vsync_end - 1,
+-- 
+2.7.3
+
+From 6f7cde6ad6e866660b8e5607a213872e5f34e8fd Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 16 Feb 2016 10:24:08 -0800
+Subject: [PATCH 06/36] drm/vc4: Initialize scaler DISPBKGND on modeset.
+
+We weren't updating the interlaced bit, so we'd scan out incorrectly
+if the firmware had brought up the TV encoder and we were switching to
+HDMI.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c |  6 ++++++
+ drivers/gpu/drm/vc4/vc4_regs.h | 14 ++++++++++++++
+ 2 files changed, 20 insertions(+)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
+index 93d53c2..6ae5abc 100644
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -183,6 +183,8 @@ static int vc4_get_clock_select(struct drm_crtc *crtc)
+ 
+ static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
+ {
++	struct drm_device *dev = crtc->dev;
++	struct vc4_dev *vc4 = to_vc4_dev(dev);
+ 	struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
+ 	struct drm_crtc_state *state = crtc->state;
+ 	struct drm_display_mode *mode = &state->adjusted_mode;
+@@ -251,6 +253,10 @@ static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
+ 		   PV_CONTROL_FIFO_CLR |
+ 		   PV_CONTROL_EN);
+ 
++	HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel),
++		  SCALER_DISPBKGND_AUTOHS |
++		  (interlace ? SCALER_DISPBKGND_INTERLACE : 0));
++
+ 	if (debug_dump_regs) {
+ 		DRM_INFO("CRTC %d regs after:\n", drm_crtc_index(crtc));
+ 		vc4_crtc_dump_regs(vc4_crtc);
+diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
+index d529665..7c29993 100644
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -350,6 +350,17 @@
+ # define SCALER_DISPCTRLX_HEIGHT_SHIFT		0
+ 
+ #define SCALER_DISPBKGND0                       0x00000044
++# define SCALER_DISPBKGND_AUTOHS		BIT(31)
++# define SCALER_DISPBKGND_INTERLACE		BIT(30)
++# define SCALER_DISPBKGND_GAMMA			BIT(29)
++# define SCALER_DISPBKGND_TESTMODE_MASK		VC4_MASK(28, 25)
++# define SCALER_DISPBKGND_TESTMODE_SHIFT	25
++/* Enables filling the scaler line with the RGB value in the low 24
++ * bits before compositing.  Costs cycles, so should be skipped if
++ * opaque display planes will cover everything.
++ */
++# define SCALER_DISPBKGND_FILL			BIT(24)
++
+ #define SCALER_DISPSTAT0                        0x00000048
+ #define SCALER_DISPBASE0                        0x0000004c
+ # define SCALER_DISPSTATX_MODE_MASK		VC4_MASK(31, 30)
+@@ -362,6 +373,9 @@
+ # define SCALER_DISPSTATX_EMPTY			BIT(28)
+ #define SCALER_DISPCTRL1                        0x00000050
+ #define SCALER_DISPBKGND1                       0x00000054
++#define SCALER_DISPBKGNDX(x)			(SCALER_DISPBKGND0 +        \
++						 (x) * (SCALER_DISPBKGND1 - \
++							SCALER_DISPBKGND0))
+ #define SCALER_DISPSTAT1                        0x00000058
+ #define SCALER_DISPSTATX(x)			(SCALER_DISPSTAT0 +        \
+ 						 (x) * (SCALER_DISPSTAT1 - \
+-- 
+2.7.3
+
+From 449c91f1f06a573ad4a3edd18d7b493bf44478f6 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 28 Dec 2015 14:14:09 -0800
+Subject: [PATCH 07/36] drm/vc4: Improve comments on vc4_plane_state members.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 9 ++++++---
+ 1 file changed, 6 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
+index 0addbad..45e353d 100644
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -26,16 +26,19 @@
+ 
+ struct vc4_plane_state {
+ 	struct drm_plane_state base;
++	/* System memory copy of the display list for this element, computed
++	 * at atomic_check time.
++	 */
+ 	u32 *dlist;
+-	u32 dlist_size; /* Number of dwords in allocated for the display list */
++	u32 dlist_size; /* Number of dwords allocated for the display list */
+ 	u32 dlist_count; /* Number of used dwords in the display list. */
+ 
+ 	/* Offset in the dlist to pointer word 0. */
+ 	u32 pw0_offset;
+ 
+ 	/* Offset where the plane's dlist was last stored in the
+-	   hardware at vc4_crtc_atomic_flush() time.
+-	*/
++	 * hardware at vc4_crtc_atomic_flush() time.
++	 */
+ 	u32 *hw_dlist;
+ };
+ 
+-- 
+2.7.3
+
+From 4c8b2ce80659e1c7a75b7b54430dab320aeb440b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 28 Dec 2015 14:14:57 -0800
+Subject: [PATCH 08/36] drm/vc4: Add missing __iomem annotation to hw_dlist.
+
+This is the pointer to the HVS device's memory where we stored the
+contents of *dlist.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
+index 45e353d..ed07ee5 100644
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -39,7 +39,7 @@ struct vc4_plane_state {
+ 	/* Offset where the plane's dlist was last stored in the
+ 	 * hardware at vc4_crtc_atomic_flush() time.
+ 	 */
+-	u32 *hw_dlist;
++	u32 __iomem *hw_dlist;
+ };
+ 
+ static inline struct vc4_plane_state *
+-- 
+2.7.3
+
+From f792f380190638916b495f3051547a849fc97fd2 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 28 Dec 2015 14:34:44 -0800
+Subject: [PATCH 09/36] drm/vc4: Move the plane clipping/scaling setup to a
+ separate function.
+
+As we add actual scaling, this is going to get way more complicated.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 78 +++++++++++++++++++++++++++--------------
+ 1 file changed, 52 insertions(+), 26 deletions(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
+index ed07ee5..554ed54 100644
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -40,6 +40,14 @@ struct vc4_plane_state {
+ 	 * hardware at vc4_crtc_atomic_flush() time.
+ 	 */
+ 	u32 __iomem *hw_dlist;
++
++	/* Clipped coordinates of the plane on the display. */
++	int crtc_x, crtc_y, crtc_w, crtc_h;
++
++	/* Offset to start scanning out from the start of the plane's
++	 * BO.
++	 */
++	u32 offset;
+ };
+ 
+ static inline struct vc4_plane_state *
+@@ -151,22 +159,17 @@ static void vc4_dlist_write(struct vc4_plane_state *vc4_state, u32 val)
+ 	vc4_state->dlist[vc4_state->dlist_count++] = val;
+ }
+ 
+-/* Writes out a full display list for an active plane to the plane's
+- * private dlist state.
+- */
+-static int vc4_plane_mode_set(struct drm_plane *plane,
+-			      struct drm_plane_state *state)
++static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ {
+ 	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ 	struct drm_framebuffer *fb = state->fb;
+-	struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
+-	u32 ctl0_offset = vc4_state->dlist_count;
+-	const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
+-	uint32_t offset = fb->offsets[0];
+-	int crtc_x = state->crtc_x;
+-	int crtc_y = state->crtc_y;
+-	int crtc_w = state->crtc_w;
+-	int crtc_h = state->crtc_h;
++
++	vc4_state->offset = fb->offsets[0];
++
++	vc4_state->crtc_x = state->crtc_x;
++	vc4_state->crtc_y = state->crtc_y;
++	vc4_state->crtc_w = state->crtc_w;
++	vc4_state->crtc_h = state->crtc_h;
+ 
+ 	if (state->crtc_w << 16 != state->src_w ||
+ 	    state->crtc_h << 16 != state->src_h) {
+@@ -178,18 +181,41 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 		return -EINVAL;
+ 	}
+ 
+-	if (crtc_x < 0) {
+-		offset += drm_format_plane_cpp(fb->pixel_format, 0) * -crtc_x;
+-		crtc_w += crtc_x;
+-		crtc_x = 0;
++	if (vc4_state->crtc_x < 0) {
++		vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
++							   0) *
++				      -vc4_state->crtc_x);
++		vc4_state->crtc_w += vc4_state->crtc_x;
++		vc4_state->crtc_x = 0;
+ 	}
+ 
+-	if (crtc_y < 0) {
+-		offset += fb->pitches[0] * -crtc_y;
+-		crtc_h += crtc_y;
+-		crtc_y = 0;
++	if (vc4_state->crtc_y < 0) {
++		vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
++		vc4_state->crtc_h += vc4_state->crtc_y;
++		vc4_state->crtc_y = 0;
+ 	}
+ 
++	return 0;
++}
++
++
++/* Writes out a full display list for an active plane to the plane's
++ * private dlist state.
++ */
++static int vc4_plane_mode_set(struct drm_plane *plane,
++			      struct drm_plane_state *state)
++{
++	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
++	struct drm_framebuffer *fb = state->fb;
++	struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
++	u32 ctl0_offset = vc4_state->dlist_count;
++	const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
++	int ret;
++
++	ret = vc4_plane_setup_clipping_and_scaling(state);
++	if (ret)
++		return ret;
++
+ 	vc4_dlist_write(vc4_state,
+ 			SCALER_CTL0_VALID |
+ 			(format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
+@@ -199,8 +225,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 	/* Position Word 0: Image Positions and Alpha Value */
+ 	vc4_dlist_write(vc4_state,
+ 			VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) |
+-			VC4_SET_FIELD(crtc_x, SCALER_POS0_START_X) |
+-			VC4_SET_FIELD(crtc_y, SCALER_POS0_START_Y));
++			VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
++			VC4_SET_FIELD(vc4_state->crtc_y, SCALER_POS0_START_Y));
+ 
+ 	/* Position Word 1: Scaled Image Dimensions.
+ 	 * Skipped due to SCALER_CTL0_UNITY scaling.
+@@ -212,8 +238,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 				      SCALER_POS2_ALPHA_MODE_PIPELINE :
+ 				      SCALER_POS2_ALPHA_MODE_FIXED,
+ 				      SCALER_POS2_ALPHA_MODE) |
+-			VC4_SET_FIELD(crtc_w, SCALER_POS2_WIDTH) |
+-			VC4_SET_FIELD(crtc_h, SCALER_POS2_HEIGHT));
++			VC4_SET_FIELD(vc4_state->crtc_w, SCALER_POS2_WIDTH) |
++			VC4_SET_FIELD(vc4_state->crtc_h, SCALER_POS2_HEIGHT));
+ 
+ 	/* Position Word 3: Context.  Written by the HVS. */
+ 	vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+@@ -221,7 +247,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 	vc4_state->pw0_offset = vc4_state->dlist_count;
+ 
+ 	/* Pointer Word 0: RGB / Y Pointer */
+-	vc4_dlist_write(vc4_state, bo->paddr + offset);
++	vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
+ 
+ 	/* Pointer Context Word 0: Written by the HVS */
+ 	vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+-- 
+2.7.3
+
+From 696f1db279f08e58bc94172818209d5914e0e2d8 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 30 Dec 2015 11:50:22 -0800
+Subject: [PATCH 10/36] drm/vc4: Add a proper short-circut path for legacy
+ cursor updates.
+
+Previously, on every modeset we would allocate new display list
+memory, recompute changed planes, write all of them to the new memory,
+and pointed scanout at the new list (which will latch approximately at
+the next line of scanout).  We let
+drm_atomic_helper_wait_for_vblanks() decide whether we needed to wait
+for a vblank after a modeset before cleaning up the old state and
+letting the next modeset proceed, and on legacy cursor updates we
+wouldn't wait.  If you moved the cursor fast enough, we could
+potentially wrap around the display list memory area and overwrite the
+existing display list while it was still being scanned out, resulting
+in the HVS scanning out garbage or just halting.
+
+Instead of making cursor updates wait for scanout to move to the new
+display list area (which introduces significant cursor lag in X), we
+just rewrite our current display list.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_kms.c   |  9 ++++
+ drivers/gpu/drm/vc4/vc4_plane.c | 94 ++++++++++++++++++++++++++++++++++++++---
+ 2 files changed, 96 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
+index f95f2df..4718ae5 100644
+--- a/drivers/gpu/drm/vc4/vc4_kms.c
++++ b/drivers/gpu/drm/vc4/vc4_kms.c
+@@ -49,6 +49,15 @@ vc4_atomic_complete_commit(struct vc4_commit *c)
+ 
+ 	drm_atomic_helper_commit_modeset_enables(dev, state);
+ 
++	/* Make sure that drm_atomic_helper_wait_for_vblanks()
++	 * actually waits for vblank.  If we're doing a full atomic
++	 * modeset (as opposed to a vc4_update_plane() short circuit),
++	 * then we need to wait for scanout to be done with our
++	 * display lists before we free it and potentially reallocate
++	 * and overwrite the dlist memory with a new modeset.
++	 */
++	state->legacy_cursor_update = false;
++
+ 	drm_atomic_helper_wait_for_vblanks(dev, state);
+ 
+ 	drm_atomic_helper_cleanup_planes(dev, state);
+diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
+index 554ed54..713ec00 100644
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -33,8 +33,12 @@ struct vc4_plane_state {
+ 	u32 dlist_size; /* Number of dwords allocated for the display list */
+ 	u32 dlist_count; /* Number of used dwords in the display list. */
+ 
+-	/* Offset in the dlist to pointer word 0. */
+-	u32 pw0_offset;
++	/* Offset in the dlist to various words, for pageflip or
++	 * cursor updates.
++	 */
++	u32 pos0_offset;
++	u32 pos2_offset;
++	u32 ptr0_offset;
+ 
+ 	/* Offset where the plane's dlist was last stored in the
+ 	 * hardware at vc4_crtc_atomic_flush() time.
+@@ -223,6 +227,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 			SCALER_CTL0_UNITY);
+ 
+ 	/* Position Word 0: Image Positions and Alpha Value */
++	vc4_state->pos0_offset = vc4_state->dlist_count;
+ 	vc4_dlist_write(vc4_state,
+ 			VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) |
+ 			VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
+@@ -233,6 +238,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 	 */
+ 
+ 	/* Position Word 2: Source Image Size, Alpha Mode */
++	vc4_state->pos2_offset = vc4_state->dlist_count;
+ 	vc4_dlist_write(vc4_state,
+ 			VC4_SET_FIELD(format->has_alpha ?
+ 				      SCALER_POS2_ALPHA_MODE_PIPELINE :
+@@ -244,9 +250,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 	/* Position Word 3: Context.  Written by the HVS. */
+ 	vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+ 
+-	vc4_state->pw0_offset = vc4_state->dlist_count;
+-
+ 	/* Pointer Word 0: RGB / Y Pointer */
++	vc4_state->ptr0_offset = vc4_state->dlist_count;
+ 	vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
+ 
+ 	/* Pointer Context Word 0: Written by the HVS */
+@@ -332,13 +337,13 @@ void vc4_plane_async_set_fb(struct drm_plane *plane, struct drm_framebuffer *fb)
+ 	 * scanout will start from this address as soon as the FIFO
+ 	 * needs to refill with pixels.
+ 	 */
+-	writel(addr, &vc4_state->hw_dlist[vc4_state->pw0_offset]);
++	writel(addr, &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
+ 
+ 	/* Also update the CPU-side dlist copy, so that any later
+ 	 * atomic updates that don't do a new modeset on our plane
+ 	 * also use our updated address.
+ 	 */
+-	vc4_state->dlist[vc4_state->pw0_offset] = addr;
++	vc4_state->dlist[vc4_state->ptr0_offset] = addr;
+ }
+ 
+ static const struct drm_plane_helper_funcs vc4_plane_helper_funcs = {
+@@ -354,8 +359,83 @@ static void vc4_plane_destroy(struct drm_plane *plane)
+ 	drm_plane_cleanup(plane);
+ }
+ 
++/* Implements immediate (non-vblank-synced) updates of the cursor
++ * position, or falls back to the atomic helper otherwise.
++ */
++static int
++vc4_update_plane(struct drm_plane *plane,
++		 struct drm_crtc *crtc,
++		 struct drm_framebuffer *fb,
++		 int crtc_x, int crtc_y,
++		 unsigned int crtc_w, unsigned int crtc_h,
++		 uint32_t src_x, uint32_t src_y,
++		 uint32_t src_w, uint32_t src_h)
++{
++	struct drm_plane_state *plane_state;
++	struct vc4_plane_state *vc4_state;
++
++	if (plane != crtc->cursor)
++		goto out;
++
++	plane_state = plane->state;
++	vc4_state = to_vc4_plane_state(plane_state);
++
++	if (!plane_state)
++		goto out;
++
++	/* If we're changing the cursor contents, do that in the
++	 * normal vblank-synced atomic path.
++	 */
++	if (fb != plane_state->fb)
++		goto out;
++
++	/* No configuring new scaling in the fast path. */
++	if (crtc_w != plane_state->crtc_w ||
++	    crtc_h != plane_state->crtc_h ||
++	    src_w != plane_state->src_w ||
++	    src_h != plane_state->src_h) {
++		goto out;
++	}
++
++	/* Set the cursor's position on the screen.  This is the
++	 * expected change from the drm_mode_cursor_universal()
++	 * helper.
++	 */
++	plane_state->crtc_x = crtc_x;
++	plane_state->crtc_y = crtc_y;
++
++	/* Allow changing the start position within the cursor BO, if
++	 * that matters.
++	 */
++	plane_state->src_x = src_x;
++	plane_state->src_y = src_y;
++
++	/* Update the display list based on the new crtc_x/y. */
++	vc4_plane_atomic_check(plane, plane_state);
++
++	/* Note that we can't just call vc4_plane_write_dlist()
++	 * because that would smash the context data that the HVS is
++	 * currently using.
++	 */
++	writel(vc4_state->dlist[vc4_state->pos0_offset],
++	       &vc4_state->hw_dlist[vc4_state->pos0_offset]);
++	writel(vc4_state->dlist[vc4_state->pos2_offset],
++	       &vc4_state->hw_dlist[vc4_state->pos2_offset]);
++	writel(vc4_state->dlist[vc4_state->ptr0_offset],
++	       &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
++
++	return 0;
++
++out:
++	return drm_atomic_helper_update_plane(plane, crtc, fb,
++					      crtc_x, crtc_y,
++					      crtc_w, crtc_h,
++					      src_x, src_y,
++					      src_w, src_h);
++}
++
+ static const struct drm_plane_funcs vc4_plane_funcs = {
+-	.update_plane = drm_atomic_helper_update_plane,
++	.update_plane = vc4_update_plane,
+ 	.disable_plane = drm_atomic_helper_disable_plane,
+ 	.destroy = vc4_plane_destroy,
+ 	.set_property = NULL,
+-- 
+2.7.3
+
+From cd30019db690e3a92fe5d7d771352f118a105f82 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 28 Dec 2015 13:25:41 -0800
+Subject: [PATCH 11/36] drm/vc4: Make the CRTCs cooperate on allocating display
+ lists.
+
+So far, we've only ever lit up one CRTC, so this has been fine.  To
+extend to more displays or more planes, we need to make sure we don't
+run our display lists into each other.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 115 +++++++++++++++++++++++------------------
+ drivers/gpu/drm/vc4/vc4_drv.h  |   8 ++-
+ drivers/gpu/drm/vc4/vc4_hvs.c  |  13 +++++
+ 3 files changed, 84 insertions(+), 52 deletions(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
+index 6ae5abc..9032c06 100644
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -49,22 +49,27 @@ struct vc4_crtc {
+ 	/* Which HVS channel we're using for our CRTC. */
+ 	int channel;
+ 
+-	/* Pointer to the actual hardware display list memory for the
+-	 * crtc.
+-	 */
+-	u32 __iomem *dlist;
+-
+-	u32 dlist_size; /* in dwords */
+-
+ 	struct drm_pending_vblank_event *event;
+ };
+ 
++struct vc4_crtc_state {
++	struct drm_crtc_state base;
++	/* Dlist area for this CRTC configuration. */
++	struct drm_mm_node mm;
++};
++
+ static inline struct vc4_crtc *
+ to_vc4_crtc(struct drm_crtc *crtc)
+ {
+ 	return (struct vc4_crtc *)crtc;
+ }
+ 
++static inline struct vc4_crtc_state *
++to_vc4_crtc_state(struct drm_crtc_state *crtc_state)
++{
++	return (struct vc4_crtc_state *)crtc_state;
++}
++
+ struct vc4_crtc_data {
+ 	/* Which channel of the HVS this pixelvalve sources from. */
+ 	int hvs_channel;
+@@ -335,11 +340,13 @@ static void vc4_crtc_enable(struct drm_crtc *crtc)
+ static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
+ 				 struct drm_crtc_state *state)
+ {
++	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
+ 	struct drm_device *dev = crtc->dev;
+ 	struct vc4_dev *vc4 = to_vc4_dev(dev);
+ 	struct drm_plane *plane;
+-	struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
++	unsigned long flags;
+ 	u32 dlist_count = 0;
++	int ret;
+ 
+ 	/* The pixelvalve can only feed one encoder (and encoders are
+ 	 * 1:1 with connectors.)
+@@ -362,18 +369,12 @@ static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
+ 
+ 	dlist_count++; /* Account for SCALER_CTL0_END. */
+ 
+-	if (!vc4_crtc->dlist || dlist_count > vc4_crtc->dlist_size) {
+-		vc4_crtc->dlist = ((u32 __iomem *)vc4->hvs->dlist +
+-				   HVS_BOOTLOADER_DLIST_END);
+-		vc4_crtc->dlist_size = ((SCALER_DLIST_SIZE >> 2) -
+-					HVS_BOOTLOADER_DLIST_END);
+-
+-		if (dlist_count > vc4_crtc->dlist_size) {
+-			DRM_DEBUG_KMS("dlist too large for CRTC (%d > %d).\n",
+-				      dlist_count, vc4_crtc->dlist_size);
+-			return -EINVAL;
+-		}
+-	}
++	spin_lock_irqsave(&vc4->hvs->mm_lock, flags);
++	ret = drm_mm_insert_node(&vc4->hvs->dlist_mm, &vc4_state->mm,
++				 dlist_count, 1, 0);
++	spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags);
++	if (ret)
++		return ret;
+ 
+ 	return 0;
+ }
+@@ -384,47 +385,29 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,
+ 	struct drm_device *dev = crtc->dev;
+ 	struct vc4_dev *vc4 = to_vc4_dev(dev);
+ 	struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
++	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
+ 	struct drm_plane *plane;
+ 	bool debug_dump_regs = false;
+-	u32 __iomem *dlist_next = vc4_crtc->dlist;
++	u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start;
++	u32 __iomem *dlist_next = dlist_start;
+ 
+ 	if (debug_dump_regs) {
+ 		DRM_INFO("CRTC %d HVS before:\n", drm_crtc_index(crtc));
+ 		vc4_hvs_dump_state(dev);
+ 	}
+ 
+-	/* Copy all the active planes' dlist contents to the hardware dlist.
+-	 *
+-	 * XXX: If the new display list was large enough that it
+-	 * overlapped a currently-read display list, we need to do
+-	 * something like disable scanout before putting in the new
+-	 * list.  For now, we're safe because we only have the two
+-	 * planes.
+-	 */
++	/* Copy all the active planes' dlist contents to the hardware dlist. */
+ 	drm_atomic_crtc_for_each_plane(plane, crtc) {
+ 		dlist_next += vc4_plane_write_dlist(plane, dlist_next);
+ 	}
+ 
+-	if (dlist_next == vc4_crtc->dlist) {
+-		/* If no planes were enabled, use the SCALER_CTL0_END
+-		 * at the start of the display list memory (in the
+-		 * bootloader section).  We'll rewrite that
+-		 * SCALER_CTL0_END, just in case, though.
+-		 */
+-		writel(SCALER_CTL0_END, vc4->hvs->dlist);
+-		HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), 0);
+-	} else {
+-		writel(SCALER_CTL0_END, dlist_next);
+-		dlist_next++;
+-
+-		HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+-			  (u32 __iomem *)vc4_crtc->dlist -
+-			  (u32 __iomem *)vc4->hvs->dlist);
+-
+-		/* Make the next display list start after ours. */
+-		vc4_crtc->dlist_size -= (dlist_next - vc4_crtc->dlist);
+-		vc4_crtc->dlist = dlist_next;
+-	}
++	writel(SCALER_CTL0_END, dlist_next);
++	dlist_next++;
++
++	WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
++
++	HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
++		  vc4_state->mm.start);
+ 
+ 	if (debug_dump_regs) {
+ 		DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
+@@ -590,6 +573,36 @@ static int vc4_page_flip(struct drm_crtc *crtc,
+ 		return drm_atomic_helper_page_flip(crtc, fb, event, flags);
+ }
+ 
++static struct drm_crtc_state *vc4_crtc_duplicate_state(struct drm_crtc *crtc)
++{
++	struct vc4_crtc_state *vc4_state;
++
++	vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL);
++	if (!vc4_state)
++		return NULL;
++
++	__drm_atomic_helper_crtc_duplicate_state(crtc, &vc4_state->base);
++	return &vc4_state->base;
++}
++
++static void vc4_crtc_destroy_state(struct drm_crtc *crtc,
++				   struct drm_crtc_state *state)
++{
++	struct vc4_dev *vc4 = to_vc4_dev(crtc->dev);
++	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
++
++	if (vc4_state->mm.allocated) {
++		unsigned long flags;
++
++		spin_lock_irqsave(&vc4->hvs->mm_lock, flags);
++		drm_mm_remove_node(&vc4_state->mm);
++		spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags);
++
++	}
++
++	__drm_atomic_helper_crtc_destroy_state(crtc, state);
++}
++
+ static const struct drm_crtc_funcs vc4_crtc_funcs = {
+ 	.set_config = drm_atomic_helper_set_config,
+ 	.destroy = vc4_crtc_destroy,
+@@ -598,8 +611,8 @@ static const struct drm_crtc_funcs vc4_crtc_funcs = {
+ 	.cursor_set = NULL, /* handled by drm_mode_cursor_universal */
+ 	.cursor_move = NULL, /* handled by drm_mode_cursor_universal */
+ 	.reset = drm_atomic_helper_crtc_reset,
+-	.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
+-	.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
++	.atomic_duplicate_state = vc4_crtc_duplicate_state,
++	.atomic_destroy_state = vc4_crtc_destroy_state,
+ };
+ 
+ static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {
+diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
+index 51a6333..38a31c7 100644
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -154,7 +154,13 @@ struct vc4_v3d {
+ struct vc4_hvs {
+ 	struct platform_device *pdev;
+ 	void __iomem *regs;
+-	void __iomem *dlist;
++	u32 __iomem *dlist;
++
++	/* Memory manager for CRTCs to allocate space in the display
++	 * list.  Units are dwords.
++	 */
++	struct drm_mm dlist_mm;
++	spinlock_t mm_lock;
+ };
+ 
+ struct vc4_plane {
+diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
+index 8098c5b..9e43554 100644
+--- a/drivers/gpu/drm/vc4/vc4_hvs.c
++++ b/drivers/gpu/drm/vc4/vc4_hvs.c
+@@ -119,6 +119,17 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
+ 
+ 	hvs->dlist = hvs->regs + SCALER_DLIST_START;
+ 
++	spin_lock_init(&hvs->mm_lock);
++
++	/* Set up the HVS display list memory manager.  We never
++	 * overwrite the setup from the bootloader (just 128b out of
++	 * our 16K), since we don't want to scramble the screen when
++	 * transitioning from the firmware's boot setup to runtime.
++	 */
++	drm_mm_init(&hvs->dlist_mm,
++		    HVS_BOOTLOADER_DLIST_END,
++		    (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END);
++
+ 	vc4->hvs = hvs;
+ 	return 0;
+ }
+@@ -129,6 +140,8 @@ static void vc4_hvs_unbind(struct device *dev, struct device *master,
+ 	struct drm_device *drm = dev_get_drvdata(master);
+ 	struct vc4_dev *vc4 = drm->dev_private;
+ 
++	drm_mm_takedown(&vc4->hvs->dlist_mm);
++
+ 	vc4->hvs = NULL;
+ }
+ 
+-- 
+2.7.3
+
+From 7934fe9bdbbe2ffb4bcfe656a22a8f9f4e3d266a Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 28 Dec 2015 14:45:25 -0800
+Subject: [PATCH 12/36] drm/vc4: Fix which value is being used for source image
+ size.
+
+This doesn't matter yet since we only allow 1:1 scaling, but the
+comment clearly says we should be using the source size.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 23 ++++++++++++++---------
+ 1 file changed, 14 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
+index 713ec00..d9c9290 100644
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -47,6 +47,8 @@ struct vc4_plane_state {
+ 
+ 	/* Clipped coordinates of the plane on the display. */
+ 	int crtc_x, crtc_y, crtc_w, crtc_h;
++	/* Clipped size of the area scanned from in the FB. */
++	u32 src_w, src_h;
+ 
+ 	/* Offset to start scanning out from the start of the plane's
+ 	 * BO.
+@@ -170,11 +172,6 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ 
+ 	vc4_state->offset = fb->offsets[0];
+ 
+-	vc4_state->crtc_x = state->crtc_x;
+-	vc4_state->crtc_y = state->crtc_y;
+-	vc4_state->crtc_w = state->crtc_w;
+-	vc4_state->crtc_h = state->crtc_h;
+-
+ 	if (state->crtc_w << 16 != state->src_w ||
+ 	    state->crtc_h << 16 != state->src_h) {
+ 		/* We don't support scaling yet, which involves
+@@ -185,17 +182,25 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ 		return -EINVAL;
+ 	}
+ 
++	vc4_state->src_w = state->src_w >> 16;
++	vc4_state->src_h = state->src_h >> 16;
++
++	vc4_state->crtc_x = state->crtc_x;
++	vc4_state->crtc_y = state->crtc_y;
++	vc4_state->crtc_w = state->crtc_w;
++	vc4_state->crtc_h = state->crtc_h;
++
+ 	if (vc4_state->crtc_x < 0) {
+ 		vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
+ 							   0) *
+ 				      -vc4_state->crtc_x);
+-		vc4_state->crtc_w += vc4_state->crtc_x;
++		vc4_state->src_w += vc4_state->crtc_x;
+ 		vc4_state->crtc_x = 0;
+ 	}
+ 
+ 	if (vc4_state->crtc_y < 0) {
+ 		vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
+-		vc4_state->crtc_h += vc4_state->crtc_y;
++		vc4_state->src_h += vc4_state->crtc_y;
+ 		vc4_state->crtc_y = 0;
+ 	}
+ 
+@@ -244,8 +249,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 				      SCALER_POS2_ALPHA_MODE_PIPELINE :
+ 				      SCALER_POS2_ALPHA_MODE_FIXED,
+ 				      SCALER_POS2_ALPHA_MODE) |
+-			VC4_SET_FIELD(vc4_state->crtc_w, SCALER_POS2_WIDTH) |
+-			VC4_SET_FIELD(vc4_state->crtc_h, SCALER_POS2_HEIGHT));
++			VC4_SET_FIELD(vc4_state->src_w, SCALER_POS2_WIDTH) |
++			VC4_SET_FIELD(vc4_state->src_h, SCALER_POS2_HEIGHT));
+ 
+ 	/* Position Word 3: Context.  Written by the HVS. */
+ 	vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+-- 
+2.7.3
+
+From e710e8e1d13c85a635c09168df6d008955ac5a4e Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 20 Oct 2015 16:06:57 +0100
+Subject: [PATCH 13/36] drm/vc4: Add support for scaling of display planes.
+
+This implements a simple policy for choosing scaling modes
+(trapezoidal for decimation, PPF for magnification), and a single PPF
+filter (Mitchell/Netravali's recommendation).
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_drv.h   |   4 +
+ drivers/gpu/drm/vc4/vc4_hvs.c   |  84 +++++++++++++
+ drivers/gpu/drm/vc4/vc4_plane.c | 253 +++++++++++++++++++++++++++++++++++++---
+ drivers/gpu/drm/vc4/vc4_regs.h  |  46 ++++++++
+ 4 files changed, 374 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
+index 38a31c7..83db0b7 100644
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -160,7 +160,11 @@ struct vc4_hvs {
+ 	 * list.  Units are dwords.
+ 	 */
+ 	struct drm_mm dlist_mm;
++	/* Memory manager for the LBM memory used by HVS scaling. */
++	struct drm_mm lbm_mm;
+ 	spinlock_t mm_lock;
++
++	struct drm_mm_node mitchell_netravali_filter;
+ };
+ 
+ struct vc4_plane {
+diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
+index 9e43554..6fbab1c 100644
+--- a/drivers/gpu/drm/vc4/vc4_hvs.c
++++ b/drivers/gpu/drm/vc4/vc4_hvs.c
+@@ -100,12 +100,76 @@ int vc4_hvs_debugfs_regs(struct seq_file *m, void *unused)
+ }
+ #endif
+ 
++/* The filter kernel is composed of dwords each containing 3 9-bit
++ * signed integers packed next to each other.
++ */
++#define VC4_INT_TO_COEFF(coeff) (coeff & 0x1ff)
++#define VC4_PPF_FILTER_WORD(c0, c1, c2)				\
++	((((c0) & 0x1ff) << 0) |				\
++	 (((c1) & 0x1ff) << 9) |				\
++	 (((c2) & 0x1ff) << 18))
++
++/* The whole filter kernel is arranged as the coefficients 0-16 going
++ * up, then a pad, then 17-31 going down and reversed within the
++ * dwords.  This means that a linear phase kernel (where it's
++ * symmetrical at the boundary between 15 and 16) has the last 5
++ * dwords matching the first 5, but reversed.
++ */
++#define VC4_LINEAR_PHASE_KERNEL(c0, c1, c2, c3, c4, c5, c6, c7, c8,	\
++				c9, c10, c11, c12, c13, c14, c15)	\
++	{VC4_PPF_FILTER_WORD(c0, c1, c2),				\
++	 VC4_PPF_FILTER_WORD(c3, c4, c5),				\
++	 VC4_PPF_FILTER_WORD(c6, c7, c8),				\
++	 VC4_PPF_FILTER_WORD(c9, c10, c11),				\
++	 VC4_PPF_FILTER_WORD(c12, c13, c14),				\
++	 VC4_PPF_FILTER_WORD(c15, c15, 0)}
++
++#define VC4_LINEAR_PHASE_KERNEL_DWORDS 6
++#define VC4_KERNEL_DWORDS (VC4_LINEAR_PHASE_KERNEL_DWORDS * 2 - 1)
++
++/* Recommended B=1/3, C=1/3 filter choice from Mitchell/Netravali.
++ * http://www.cs.utexas.edu/~fussell/courses/cs384g/lectures/mitchell/Mitchell.pdf
++ */
++static const u32 mitchell_netravali_1_3_1_3_kernel[] =
++	VC4_LINEAR_PHASE_KERNEL(0, -2, -6, -8, -10, -8, -3, 2, 18,
++				50, 82, 119, 155, 187, 213, 227);
++
++static int vc4_hvs_upload_linear_kernel(struct vc4_hvs *hvs,
++					struct drm_mm_node *space,
++					const u32 *kernel)
++{
++	int ret, i;
++	u32 __iomem *dst_kernel;
++
++	ret = drm_mm_insert_node(&hvs->dlist_mm, space, VC4_KERNEL_DWORDS, 1,
++				 0);
++	if (ret) {
++		DRM_ERROR("Failed to allocate space for filter kernel: %d\n",
++			  ret);
++		return ret;
++	}
++
++	dst_kernel = hvs->dlist + space->start;
++
++	for (i = 0; i < VC4_KERNEL_DWORDS; i++) {
++		if (i < VC4_LINEAR_PHASE_KERNEL_DWORDS)
++			writel(kernel[i], &dst_kernel[i]);
++		else {
++			writel(kernel[VC4_KERNEL_DWORDS - i - 1],
++			       &dst_kernel[i]);
++		}
++	}
++
++	return 0;
++}
++
+ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
+ {
+ 	struct platform_device *pdev = to_platform_device(dev);
+ 	struct drm_device *drm = dev_get_drvdata(master);
+ 	struct vc4_dev *vc4 = drm->dev_private;
+ 	struct vc4_hvs *hvs = NULL;
++	int ret;
+ 
+ 	hvs = devm_kzalloc(&pdev->dev, sizeof(*hvs), GFP_KERNEL);
+ 	if (!hvs)
+@@ -130,6 +194,22 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
+ 		    HVS_BOOTLOADER_DLIST_END,
+ 		    (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END);
+ 
++	/* Set up the HVS LBM memory manager.  We could have some more
++	 * complicated data structure that allowed reuse of LBM areas
++	 * between planes when they don't overlap on the screen, but
++	 * for now we just allocate globally.
++	 */
++	drm_mm_init(&hvs->lbm_mm, 0, 96 * 1024);
++
++	/* Upload filter kernels.  We only have the one for now, so we
++	 * keep it around for the lifetime of the driver.
++	 */
++	ret = vc4_hvs_upload_linear_kernel(hvs,
++					   &hvs->mitchell_netravali_filter,
++					   mitchell_netravali_1_3_1_3_kernel);
++	if (ret)
++		return ret;
++
+ 	vc4->hvs = hvs;
+ 	return 0;
+ }
+@@ -140,7 +220,11 @@ static void vc4_hvs_unbind(struct device *dev, struct device *master,
+ 	struct drm_device *drm = dev_get_drvdata(master);
+ 	struct vc4_dev *vc4 = drm->dev_private;
+ 
++	if (vc4->hvs->mitchell_netravali_filter.allocated)
++		drm_mm_remove_node(&vc4->hvs->mitchell_netravali_filter);
++
+ 	drm_mm_takedown(&vc4->hvs->dlist_mm);
++	drm_mm_takedown(&vc4->hvs->lbm_mm);
+ 
+ 	vc4->hvs = NULL;
+ }
+diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
+index d9c9290..7c2d697 100644
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -24,6 +24,12 @@
+ #include "drm_fb_cma_helper.h"
+ #include "drm_plane_helper.h"
+ 
++enum vc4_scaling_mode {
++	VC4_SCALING_NONE,
++	VC4_SCALING_TPZ,
++	VC4_SCALING_PPF,
++};
++
+ struct vc4_plane_state {
+ 	struct drm_plane_state base;
+ 	/* System memory copy of the display list for this element, computed
+@@ -47,13 +53,19 @@ struct vc4_plane_state {
+ 
+ 	/* Clipped coordinates of the plane on the display. */
+ 	int crtc_x, crtc_y, crtc_w, crtc_h;
+-	/* Clipped size of the area scanned from in the FB. */
+-	u32 src_w, src_h;
++	/* Clipped area being scanned from in the FB. */
++	u32 src_x, src_y, src_w, src_h;
++
++	enum vc4_scaling_mode x_scaling, y_scaling;
++	bool is_unity;
+ 
+ 	/* Offset to start scanning out from the start of the plane's
+ 	 * BO.
+ 	 */
+ 	u32 offset;
++
++	/* Our allocation in LBM for temporary storage during scaling. */
++	struct drm_mm_node lbm;
+ };
+ 
+ static inline struct vc4_plane_state *
+@@ -90,6 +102,16 @@ static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
+ 	return NULL;
+ }
+ 
++static enum vc4_scaling_mode vc4_get_scaling_mode(u32 src, u32 dst)
++{
++	if (dst > src)
++		return VC4_SCALING_PPF;
++	else if (dst < src)
++		return VC4_SCALING_TPZ;
++	else
++		return VC4_SCALING_NONE;
++}
++
+ static bool plane_enabled(struct drm_plane_state *state)
+ {
+ 	return state->fb && state->crtc;
+@@ -106,6 +128,8 @@ static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane
+ 	if (!vc4_state)
+ 		return NULL;
+ 
++	memset(&vc4_state->lbm, 0, sizeof(vc4_state->lbm));
++
+ 	__drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base);
+ 
+ 	if (vc4_state->dlist) {
+@@ -125,8 +149,17 @@ static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane
+ static void vc4_plane_destroy_state(struct drm_plane *plane,
+ 				    struct drm_plane_state *state)
+ {
++	struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
+ 	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ 
++	if (vc4_state->lbm.allocated) {
++		unsigned long irqflags;
++
++		spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
++		drm_mm_remove_node(&vc4_state->lbm);
++		spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
++	}
++
+ 	kfree(vc4_state->dlist);
+ 	__drm_atomic_helper_plane_destroy_state(plane, &vc4_state->base);
+ 	kfree(state);
+@@ -165,23 +198,60 @@ static void vc4_dlist_write(struct vc4_plane_state *vc4_state, u32 val)
+ 	vc4_state->dlist[vc4_state->dlist_count++] = val;
+ }
+ 
++/* Returns the scl0/scl1 field based on whether the dimensions need to
++ * be up/down/non-scaled.
++ *
++ * This is a replication of a table from the spec.
++ */
++static u32 vc4_get_scl_field(struct drm_plane_state *state)
++{
++	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
++
++	switch (vc4_state->x_scaling << 2 | vc4_state->y_scaling) {
++	case VC4_SCALING_PPF << 2 | VC4_SCALING_PPF:
++		return SCALER_CTL0_SCL_H_PPF_V_PPF;
++	case VC4_SCALING_TPZ << 2 | VC4_SCALING_PPF:
++		return SCALER_CTL0_SCL_H_TPZ_V_PPF;
++	case VC4_SCALING_PPF << 2 | VC4_SCALING_TPZ:
++		return SCALER_CTL0_SCL_H_PPF_V_TPZ;
++	case VC4_SCALING_TPZ << 2 | VC4_SCALING_TPZ:
++		return SCALER_CTL0_SCL_H_TPZ_V_TPZ;
++	case VC4_SCALING_PPF << 2 | VC4_SCALING_NONE:
++		return SCALER_CTL0_SCL_H_PPF_V_NONE;
++	case VC4_SCALING_NONE << 2 | VC4_SCALING_PPF:
++		return SCALER_CTL0_SCL_H_NONE_V_PPF;
++	case VC4_SCALING_NONE << 2 | VC4_SCALING_TPZ:
++		return SCALER_CTL0_SCL_H_NONE_V_TPZ;
++	case VC4_SCALING_TPZ << 2 | VC4_SCALING_NONE:
++		return SCALER_CTL0_SCL_H_TPZ_V_NONE;
++	default:
++	case VC4_SCALING_NONE << 2 | VC4_SCALING_NONE:
++		/* The unity case is independently handled by
++		 * SCALER_CTL0_UNITY.
++		 */
++		return 0;
++	}
++}
++
+ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ {
++	struct drm_plane *plane = state->plane;
+ 	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ 	struct drm_framebuffer *fb = state->fb;
++	u32 subpixel_src_mask = (1 << 16) - 1;
+ 
+ 	vc4_state->offset = fb->offsets[0];
+ 
+-	if (state->crtc_w << 16 != state->src_w ||
+-	    state->crtc_h << 16 != state->src_h) {
+-		/* We don't support scaling yet, which involves
+-		 * allocating the LBM memory for scaling temporary
+-		 * storage, and putting filter kernels in the HVS
+-		 * context.
+-		 */
++	/* We don't support subpixel source positioning for scaling. */
++	if ((state->src_x & subpixel_src_mask) ||
++	    (state->src_y & subpixel_src_mask) ||
++	    (state->src_w & subpixel_src_mask) ||
++	    (state->src_h & subpixel_src_mask)) {
+ 		return -EINVAL;
+ 	}
+ 
++	vc4_state->src_x = state->src_x >> 16;
++	vc4_state->src_y = state->src_y >> 16;
+ 	vc4_state->src_w = state->src_w >> 16;
+ 	vc4_state->src_h = state->src_h >> 16;
+ 
+@@ -190,6 +260,23 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ 	vc4_state->crtc_w = state->crtc_w;
+ 	vc4_state->crtc_h = state->crtc_h;
+ 
++	vc4_state->x_scaling = vc4_get_scaling_mode(vc4_state->src_w,
++						    vc4_state->crtc_w);
++	vc4_state->y_scaling = vc4_get_scaling_mode(vc4_state->src_h,
++						    vc4_state->crtc_h);
++	vc4_state->is_unity = (vc4_state->x_scaling == VC4_SCALING_NONE &&
++			       vc4_state->y_scaling == VC4_SCALING_NONE);
++
++	/* No configuring scaling on the cursor plane, since it gets
++	   non-vblank-synced updates, and scaling requires requires
++	   LBM changes which have to be vblank-synced.
++	 */
++	if (plane->type == DRM_PLANE_TYPE_CURSOR && !vc4_state->is_unity)
++		return -EINVAL;
++
++	/* Clamp the on-screen start x/y to 0.  The hardware doesn't
++	 * support negative y, and negative x wastes bandwidth.
++	 */
+ 	if (vc4_state->crtc_x < 0) {
+ 		vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
+ 							   0) *
+@@ -207,6 +294,87 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ 	return 0;
+ }
+ 
++static void vc4_write_tpz(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
++{
++	u32 scale, recip;
++
++	scale = (1 << 16) * src / dst;
++
++	/* The specs note that while the reciprocal would be defined
++	 * as (1<<32)/scale, ~0 is close enough.
++	 */
++	recip = ~0 / scale;
++
++	vc4_dlist_write(vc4_state,
++			VC4_SET_FIELD(scale, SCALER_TPZ0_SCALE) |
++			VC4_SET_FIELD(0, SCALER_TPZ0_IPHASE));
++	vc4_dlist_write(vc4_state,
++			VC4_SET_FIELD(recip, SCALER_TPZ1_RECIP));
++}
++
++static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
++{
++	u32 scale = (1 << 16) * src / dst;
++
++	vc4_dlist_write(vc4_state,
++			SCALER_PPF_AGC |
++			VC4_SET_FIELD(scale, SCALER_PPF_SCALE) |
++			VC4_SET_FIELD(0, SCALER_PPF_IPHASE));
++}
++
++static u32 vc4_lbm_size(struct drm_plane_state *state)
++{
++	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
++	/* This is the worst case number.  One of the two sizes will
++	 * be used depending on the scaling configuration.
++	 */
++	u32 pix_per_line = max(vc4_state->src_w, (u32)vc4_state->crtc_w);
++	u32 lbm;
++
++	if (vc4_state->is_unity)
++		return 0;
++	else if (vc4_state->y_scaling == VC4_SCALING_TPZ)
++		lbm = pix_per_line * 8;
++	else {
++		/* In special cases, this multiplier might be 12. */
++		lbm = pix_per_line * 16;
++	}
++
++	lbm = roundup(lbm, 32);
++
++	return lbm;
++}
++
++static void vc4_write_scaling_parameters(struct drm_plane_state *state)
++{
++	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
++
++	/* Ch0 H-PPF Word 0: Scaling Parameters */
++	if (vc4_state->x_scaling == VC4_SCALING_PPF) {
++		vc4_write_ppf(vc4_state,
++			      vc4_state->src_w, vc4_state->crtc_w);
++	}
++
++	/* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
++	if (vc4_state->y_scaling == VC4_SCALING_PPF) {
++		vc4_write_ppf(vc4_state,
++			      vc4_state->src_h, vc4_state->crtc_h);
++		vc4_dlist_write(vc4_state, 0xc0c0c0c0);
++	}
++
++	/* Ch0 H-TPZ Words 0-1: Scaling Parameters, Recip */
++	if (vc4_state->x_scaling == VC4_SCALING_TPZ) {
++		vc4_write_tpz(vc4_state,
++			      vc4_state->src_w, vc4_state->crtc_w);
++	}
++
++	/* Ch0 V-TPZ Words 0-2: Scaling Parameters, Recip, Context */
++	if (vc4_state->y_scaling == VC4_SCALING_TPZ) {
++		vc4_write_tpz(vc4_state,
++			      vc4_state->src_h, vc4_state->crtc_h);
++		vc4_dlist_write(vc4_state, 0xc0c0c0c0);
++	}
++}
+ 
+ /* Writes out a full display list for an active plane to the plane's
+  * private dlist state.
+@@ -214,22 +382,50 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 			      struct drm_plane_state *state)
+ {
++	struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
+ 	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ 	struct drm_framebuffer *fb = state->fb;
+ 	struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
+ 	u32 ctl0_offset = vc4_state->dlist_count;
+ 	const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
++	u32 scl;
++	u32 lbm_size;
++	unsigned long irqflags;
+ 	int ret;
+ 
+ 	ret = vc4_plane_setup_clipping_and_scaling(state);
+ 	if (ret)
+ 		return ret;
+ 
++	/* Allocate the LBM memory that the HVS will use for temporary
++	 * storage due to our scaling/format conversion.
++	 */
++	lbm_size = vc4_lbm_size(state);
++	if (lbm_size) {
++		if (!vc4_state->lbm.allocated) {
++			spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
++			ret = drm_mm_insert_node(&vc4->hvs->lbm_mm,
++						 &vc4_state->lbm,
++						 lbm_size, 32, 0);
++			spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
++		} else {
++			WARN_ON_ONCE(lbm_size != vc4_state->lbm.size);
++		}
++	}
++
++	if (ret)
++		return ret;
++
++	scl = vc4_get_scl_field(state);
++
++	/* Control word */
+ 	vc4_dlist_write(vc4_state,
+ 			SCALER_CTL0_VALID |
+ 			(format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
+ 			(format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
+-			SCALER_CTL0_UNITY);
++			(vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) |
++			VC4_SET_FIELD(scl, SCALER_CTL0_SCL0) |
++			VC4_SET_FIELD(scl, SCALER_CTL0_SCL1));
+ 
+ 	/* Position Word 0: Image Positions and Alpha Value */
+ 	vc4_state->pos0_offset = vc4_state->dlist_count;
+@@ -238,9 +434,14 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 			VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
+ 			VC4_SET_FIELD(vc4_state->crtc_y, SCALER_POS0_START_Y));
+ 
+-	/* Position Word 1: Scaled Image Dimensions.
+-	 * Skipped due to SCALER_CTL0_UNITY scaling.
+-	 */
++	/* Position Word 1: Scaled Image Dimensions. */
++	if (!vc4_state->is_unity) {
++		vc4_dlist_write(vc4_state,
++				VC4_SET_FIELD(vc4_state->crtc_w,
++					      SCALER_POS1_SCL_WIDTH) |
++				VC4_SET_FIELD(vc4_state->crtc_h,
++					      SCALER_POS1_SCL_HEIGHT));
++	}
+ 
+ 	/* Position Word 2: Source Image Size, Alpha Mode */
+ 	vc4_state->pos2_offset = vc4_state->dlist_count;
+@@ -266,6 +467,32 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 	vc4_dlist_write(vc4_state,
+ 			VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH));
+ 
++	if (!vc4_state->is_unity) {
++		/* LBM Base Address. */
++		if (vc4_state->y_scaling != VC4_SCALING_NONE)
++			vc4_dlist_write(vc4_state, vc4_state->lbm.start);
++
++		vc4_write_scaling_parameters(state);
++
++		/* If any PPF setup was done, then all the kernel
++		 * pointers get uploaded.
++		 */
++		if (vc4_state->x_scaling == VC4_SCALING_PPF ||
++		    vc4_state->y_scaling == VC4_SCALING_PPF) {
++			u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start,
++						   SCALER_PPF_KERNEL_OFFSET);
++
++			/* HPPF plane 0 */
++			vc4_dlist_write(vc4_state, kernel);
++			/* VPPF plane 0 */
++			vc4_dlist_write(vc4_state, kernel);
++			/* HPPF plane 1 */
++			vc4_dlist_write(vc4_state, kernel);
++			/* VPPF plane 1 */
++			vc4_dlist_write(vc4_state, kernel);
++		}
++	}
++
+ 	vc4_state->dlist[ctl0_offset] |=
+ 		VC4_SET_FIELD(vc4_state->dlist_count, SCALER_CTL0_SIZE);
+ 
+diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
+index 7c29993..a5b544d 100644
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -552,6 +552,21 @@ enum hvs_pixel_format {
+ #define SCALER_CTL0_ORDER_MASK			VC4_MASK(14, 13)
+ #define SCALER_CTL0_ORDER_SHIFT			13
+ 
++#define SCALER_CTL0_SCL1_MASK			VC4_MASK(10, 8)
++#define SCALER_CTL0_SCL1_SHIFT			8
++
++#define SCALER_CTL0_SCL0_MASK			VC4_MASK(7, 5)
++#define SCALER_CTL0_SCL0_SHIFT			5
++
++#define SCALER_CTL0_SCL_H_PPF_V_PPF		0
++#define SCALER_CTL0_SCL_H_TPZ_V_PPF		1
++#define SCALER_CTL0_SCL_H_PPF_V_TPZ		2
++#define SCALER_CTL0_SCL_H_TPZ_V_TPZ		3
++#define SCALER_CTL0_SCL_H_PPF_V_NONE		4
++#define SCALER_CTL0_SCL_H_NONE_V_PPF		5
++#define SCALER_CTL0_SCL_H_NONE_V_TPZ		6
++#define SCALER_CTL0_SCL_H_TPZ_V_NONE		7
++
+ /* Set to indicate no scaling. */
+ #define SCALER_CTL0_UNITY			BIT(4)
+ 
+@@ -567,6 +582,12 @@ enum hvs_pixel_format {
+ #define SCALER_POS0_START_X_MASK		VC4_MASK(11, 0)
+ #define SCALER_POS0_START_X_SHIFT		0
+ 
++#define SCALER_POS1_SCL_HEIGHT_MASK		VC4_MASK(27, 16)
++#define SCALER_POS1_SCL_HEIGHT_SHIFT		16
++
++#define SCALER_POS1_SCL_WIDTH_MASK		VC4_MASK(11, 0)
++#define SCALER_POS1_SCL_WIDTH_SHIFT		0
++
+ #define SCALER_POS2_ALPHA_MODE_MASK		VC4_MASK(31, 30)
+ #define SCALER_POS2_ALPHA_MODE_SHIFT		30
+ #define SCALER_POS2_ALPHA_MODE_PIPELINE		0
+@@ -580,6 +601,31 @@ enum hvs_pixel_format {
+ #define SCALER_POS2_WIDTH_MASK			VC4_MASK(11, 0)
+ #define SCALER_POS2_WIDTH_SHIFT			0
+ 
++#define SCALER_TPZ0_VERT_RECALC			BIT(31)
++#define SCALER_TPZ0_SCALE_MASK			VC4_MASK(28, 8)
++#define SCALER_TPZ0_SCALE_SHIFT			8
++#define SCALER_TPZ0_IPHASE_MASK			VC4_MASK(7, 0)
++#define SCALER_TPZ0_IPHASE_SHIFT		0
++#define SCALER_TPZ1_RECIP_MASK			VC4_MASK(15, 0)
++#define SCALER_TPZ1_RECIP_SHIFT			0
++
++/* Skips interpolating coefficients to 64 phases, so just 8 are used.
++ * Required for nearest neighbor.
++ */
++#define SCALER_PPF_NOINTERP			BIT(31)
++/* Replaes the highest valued coefficient with one that makes all 4
++ * sum to unity.
++ */
++#define SCALER_PPF_AGC				BIT(30)
++#define SCALER_PPF_SCALE_MASK			VC4_MASK(24, 8)
++#define SCALER_PPF_SCALE_SHIFT			8
++#define SCALER_PPF_IPHASE_MASK			VC4_MASK(6, 0)
++#define SCALER_PPF_IPHASE_SHIFT			0
++
++#define SCALER_PPF_KERNEL_OFFSET_MASK		VC4_MASK(13, 0)
++#define SCALER_PPF_KERNEL_OFFSET_SHIFT		0
++#define SCALER_PPF_KERNEL_UNCACHED		BIT(31)
++
+ #define SCALER_SRC_PITCH_MASK			VC4_MASK(15, 0)
+ #define SCALER_SRC_PITCH_SHIFT			0
+ 
+-- 
+2.7.3
+
+From c1f11c3b1a4379841341911c379237d3a3870607 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 20 Oct 2015 13:59:15 +0100
+Subject: [PATCH 14/36] drm/vc4: Add support a few more RGB display plane
+ formats.
+
+These were all touch-tested with modetest.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
+index 7c2d697..013ebff 100644
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -88,6 +88,22 @@ static const struct hvs_format {
+ 		.drm = DRM_FORMAT_ARGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
+ 		.pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true,
+ 	},
++	{
++		.drm = DRM_FORMAT_RGB565, .hvs = HVS_PIXEL_FORMAT_RGB565,
++		.pixel_order = HVS_PIXEL_ORDER_XRGB, .has_alpha = false,
++	},
++	{
++		.drm = DRM_FORMAT_BGR565, .hvs = HVS_PIXEL_FORMAT_RGB565,
++		.pixel_order = HVS_PIXEL_ORDER_XBGR, .has_alpha = false,
++	},
++	{
++		.drm = DRM_FORMAT_ARGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551,
++		.pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true,
++	},
++	{
++		.drm = DRM_FORMAT_XRGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551,
++		.pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false,
++	},
+ };
+ 
+ static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
+-- 
+2.7.3
+
+From 149a88adaedd0bea6c6f2f12dcf893d740be2ebb Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 30 Dec 2015 12:25:44 -0800
+Subject: [PATCH 15/36] drm/vc4: Add support for YUV planes.
+
+This supports 420 and 422 subsampling with 2 or 3 planes, tested with
+modetest.  It doesn't set up chroma subsampling position (which it
+appears KMS doesn't deal with yet).
+
+The LBM memory is overallocated in many cases, but apparently the docs
+aren't quite correct and I'll probably need to look at the hardware
+source to really figure it out.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 256 +++++++++++++++++++++++++++++++---------
+ drivers/gpu/drm/vc4/vc4_regs.h  |  56 ++++++++-
+ 2 files changed, 253 insertions(+), 59 deletions(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
+index 013ebff..7b0c72a 100644
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -54,15 +54,19 @@ struct vc4_plane_state {
+ 	/* Clipped coordinates of the plane on the display. */
+ 	int crtc_x, crtc_y, crtc_w, crtc_h;
+ 	/* Clipped area being scanned from in the FB. */
+-	u32 src_x, src_y, src_w, src_h;
++	u32 src_x, src_y;
+ 
+-	enum vc4_scaling_mode x_scaling, y_scaling;
++	u32 src_w[2], src_h[2];
++
++	/* Scaling selection for the RGB/Y plane and the Cb/Cr planes. */
++	enum vc4_scaling_mode x_scaling[2], y_scaling[2];
+ 	bool is_unity;
++	bool is_yuv;
+ 
+ 	/* Offset to start scanning out from the start of the plane's
+ 	 * BO.
+ 	 */
+-	u32 offset;
++	u32 offsets[3];
+ 
+ 	/* Our allocation in LBM for temporary storage during scaling. */
+ 	struct drm_mm_node lbm;
+@@ -79,6 +83,7 @@ static const struct hvs_format {
+ 	u32 hvs; /* HVS_FORMAT_* */
+ 	u32 pixel_order;
+ 	bool has_alpha;
++	bool flip_cbcr;
+ } hvs_formats[] = {
+ 	{
+ 		.drm = DRM_FORMAT_XRGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
+@@ -104,6 +109,32 @@ static const struct hvs_format {
+ 		.drm = DRM_FORMAT_XRGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551,
+ 		.pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false,
+ 	},
++	{
++		.drm = DRM_FORMAT_YUV422,
++		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
++	},
++	{
++		.drm = DRM_FORMAT_YVU422,
++		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
++		.flip_cbcr = true,
++	},
++	{
++		.drm = DRM_FORMAT_YUV420,
++		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
++	},
++	{
++		.drm = DRM_FORMAT_YVU420,
++		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
++		.flip_cbcr = true,
++	},
++	{
++		.drm = DRM_FORMAT_NV12,
++		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
++	},
++	{
++		.drm = DRM_FORMAT_NV16,
++		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
++	},
+ };
+ 
+ static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
+@@ -219,11 +250,11 @@ static void vc4_dlist_write(struct vc4_plane_state *vc4_state, u32 val)
+  *
+  * This is a replication of a table from the spec.
+  */
+-static u32 vc4_get_scl_field(struct drm_plane_state *state)
++static u32 vc4_get_scl_field(struct drm_plane_state *state, int plane)
+ {
+ 	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ 
+-	switch (vc4_state->x_scaling << 2 | vc4_state->y_scaling) {
++	switch (vc4_state->x_scaling[plane] << 2 | vc4_state->y_scaling[plane]) {
+ 	case VC4_SCALING_PPF << 2 | VC4_SCALING_PPF:
+ 		return SCALER_CTL0_SCL_H_PPF_V_PPF;
+ 	case VC4_SCALING_TPZ << 2 | VC4_SCALING_PPF:
+@@ -254,9 +285,16 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ 	struct drm_plane *plane = state->plane;
+ 	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ 	struct drm_framebuffer *fb = state->fb;
++	struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
+ 	u32 subpixel_src_mask = (1 << 16) - 1;
++	u32 format = fb->pixel_format;
++	int num_planes = drm_format_num_planes(format);
++	u32 h_subsample = 1;
++	u32 v_subsample = 1;
++	int i;
+ 
+-	vc4_state->offset = fb->offsets[0];
++	for (i = 0; i < num_planes; i++)
++		vc4_state->offsets[i] = bo->paddr + fb->offsets[i];
+ 
+ 	/* We don't support subpixel source positioning for scaling. */
+ 	if ((state->src_x & subpixel_src_mask) ||
+@@ -268,20 +306,48 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ 
+ 	vc4_state->src_x = state->src_x >> 16;
+ 	vc4_state->src_y = state->src_y >> 16;
+-	vc4_state->src_w = state->src_w >> 16;
+-	vc4_state->src_h = state->src_h >> 16;
++	vc4_state->src_w[0] = state->src_w >> 16;
++	vc4_state->src_h[0] = state->src_h >> 16;
+ 
+ 	vc4_state->crtc_x = state->crtc_x;
+ 	vc4_state->crtc_y = state->crtc_y;
+ 	vc4_state->crtc_w = state->crtc_w;
+ 	vc4_state->crtc_h = state->crtc_h;
+ 
+-	vc4_state->x_scaling = vc4_get_scaling_mode(vc4_state->src_w,
+-						    vc4_state->crtc_w);
+-	vc4_state->y_scaling = vc4_get_scaling_mode(vc4_state->src_h,
+-						    vc4_state->crtc_h);
+-	vc4_state->is_unity = (vc4_state->x_scaling == VC4_SCALING_NONE &&
+-			       vc4_state->y_scaling == VC4_SCALING_NONE);
++	vc4_state->x_scaling[0] = vc4_get_scaling_mode(vc4_state->src_w[0],
++						       vc4_state->crtc_w);
++	vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0],
++						       vc4_state->crtc_h);
++
++	if (num_planes > 1) {
++		vc4_state->is_yuv = true;
++
++		h_subsample = drm_format_horz_chroma_subsampling(format);
++		v_subsample = drm_format_vert_chroma_subsampling(format);
++		vc4_state->src_w[1] = vc4_state->src_w[0] / h_subsample;
++		vc4_state->src_h[1] = vc4_state->src_h[0] / v_subsample;
++
++		vc4_state->x_scaling[1] =
++			vc4_get_scaling_mode(vc4_state->src_w[1],
++					     vc4_state->crtc_w);
++		vc4_state->y_scaling[1] =
++			vc4_get_scaling_mode(vc4_state->src_h[1],
++					     vc4_state->crtc_h);
++
++		/* YUV conversion requires that scaling be enabled,
++		 * even on a plane that's otherwise 1:1.  Choose TPZ
++		 * for simplicity.
++		 */
++		if (vc4_state->x_scaling[0] == VC4_SCALING_NONE)
++			vc4_state->x_scaling[0] = VC4_SCALING_TPZ;
++		if (vc4_state->y_scaling[0] == VC4_SCALING_NONE)
++			vc4_state->y_scaling[0] = VC4_SCALING_TPZ;
++	}
++
++	vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&
++			       vc4_state->y_scaling[0] == VC4_SCALING_NONE &&
++			       vc4_state->x_scaling[1] == VC4_SCALING_NONE &&
++			       vc4_state->y_scaling[1] == VC4_SCALING_NONE);
+ 
+ 	/* No configuring scaling on the cursor plane, since it gets
+ 	   non-vblank-synced updates, and scaling requires requires
+@@ -294,16 +360,27 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ 	 * support negative y, and negative x wastes bandwidth.
+ 	 */
+ 	if (vc4_state->crtc_x < 0) {
+-		vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
+-							   0) *
+-				      -vc4_state->crtc_x);
+-		vc4_state->src_w += vc4_state->crtc_x;
++		for (i = 0; i < num_planes; i++) {
++			u32 cpp = drm_format_plane_cpp(fb->pixel_format, i);
++			u32 subs = ((i == 0) ? 1 : h_subsample);
++
++			vc4_state->offsets[i] += (cpp *
++						  (-vc4_state->crtc_x) / subs);
++		}
++		vc4_state->src_w[0] += vc4_state->crtc_x;
++		vc4_state->src_w[1] += vc4_state->crtc_x / h_subsample;
+ 		vc4_state->crtc_x = 0;
+ 	}
+ 
+ 	if (vc4_state->crtc_y < 0) {
+-		vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
+-		vc4_state->src_h += vc4_state->crtc_y;
++		for (i = 0; i < num_planes; i++) {
++			u32 subs = ((i == 0) ? 1 : v_subsample);
++
++			vc4_state->offsets[i] += (fb->pitches[i] *
++						  (-vc4_state->crtc_y) / subs);
++		}
++		vc4_state->src_h[0] += vc4_state->crtc_y;
++		vc4_state->src_h[1] += vc4_state->crtc_y / v_subsample;
+ 		vc4_state->crtc_y = 0;
+ 	}
+ 
+@@ -344,15 +421,23 @@ static u32 vc4_lbm_size(struct drm_plane_state *state)
+ 	/* This is the worst case number.  One of the two sizes will
+ 	 * be used depending on the scaling configuration.
+ 	 */
+-	u32 pix_per_line = max(vc4_state->src_w, (u32)vc4_state->crtc_w);
++	u32 pix_per_line = max(vc4_state->src_w[0], (u32)vc4_state->crtc_w);
+ 	u32 lbm;
+ 
+-	if (vc4_state->is_unity)
+-		return 0;
+-	else if (vc4_state->y_scaling == VC4_SCALING_TPZ)
+-		lbm = pix_per_line * 8;
+-	else {
+-		/* In special cases, this multiplier might be 12. */
++	if (!vc4_state->is_yuv) {
++		if (vc4_state->is_unity)
++			return 0;
++		else if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ)
++			lbm = pix_per_line * 8;
++		else {
++			/* In special cases, this multiplier might be 12. */
++			lbm = pix_per_line * 16;
++		}
++	} else {
++		/* There are cases for this going down to a multiplier
++		 * of 2, but according to the firmware source, the
++		 * table in the docs is somewhat wrong.
++		 */
+ 		lbm = pix_per_line * 16;
+ 	}
+ 
+@@ -361,33 +446,34 @@ static u32 vc4_lbm_size(struct drm_plane_state *state)
+ 	return lbm;
+ }
+ 
+-static void vc4_write_scaling_parameters(struct drm_plane_state *state)
++static void vc4_write_scaling_parameters(struct drm_plane_state *state,
++					 int channel)
+ {
+ 	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ 
+ 	/* Ch0 H-PPF Word 0: Scaling Parameters */
+-	if (vc4_state->x_scaling == VC4_SCALING_PPF) {
++	if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
+ 		vc4_write_ppf(vc4_state,
+-			      vc4_state->src_w, vc4_state->crtc_w);
++			      vc4_state->src_w[channel], vc4_state->crtc_w);
+ 	}
+ 
+ 	/* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
+-	if (vc4_state->y_scaling == VC4_SCALING_PPF) {
++	if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
+ 		vc4_write_ppf(vc4_state,
+-			      vc4_state->src_h, vc4_state->crtc_h);
++			      vc4_state->src_h[channel], vc4_state->crtc_h);
+ 		vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+ 	}
+ 
+ 	/* Ch0 H-TPZ Words 0-1: Scaling Parameters, Recip */
+-	if (vc4_state->x_scaling == VC4_SCALING_TPZ) {
++	if (vc4_state->x_scaling[channel] == VC4_SCALING_TPZ) {
+ 		vc4_write_tpz(vc4_state,
+-			      vc4_state->src_w, vc4_state->crtc_w);
++			      vc4_state->src_w[channel], vc4_state->crtc_w);
+ 	}
+ 
+ 	/* Ch0 V-TPZ Words 0-2: Scaling Parameters, Recip, Context */
+-	if (vc4_state->y_scaling == VC4_SCALING_TPZ) {
++	if (vc4_state->y_scaling[channel] == VC4_SCALING_TPZ) {
+ 		vc4_write_tpz(vc4_state,
+-			      vc4_state->src_h, vc4_state->crtc_h);
++			      vc4_state->src_h[channel], vc4_state->crtc_h);
+ 		vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+ 	}
+ }
+@@ -401,13 +487,13 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 	struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
+ 	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ 	struct drm_framebuffer *fb = state->fb;
+-	struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
+ 	u32 ctl0_offset = vc4_state->dlist_count;
+ 	const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
+-	u32 scl;
++	int num_planes = drm_format_num_planes(format->drm);
++	u32 scl0, scl1;
+ 	u32 lbm_size;
+ 	unsigned long irqflags;
+-	int ret;
++	int ret, i;
+ 
+ 	ret = vc4_plane_setup_clipping_and_scaling(state);
+ 	if (ret)
+@@ -432,7 +518,19 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 	if (ret)
+ 		return ret;
+ 
+-	scl = vc4_get_scl_field(state);
++	/* SCL1 is used for Cb/Cr scaling of planar formats.  For RGB
++	 * and 4:4:4, scl1 should be set to scl0 so both channels of
++	 * the scaler do the same thing.  For YUV, the Y plane needs
++	 * to be put in channel 1 and Cb/Cr in channel 0, so we swap
++	 * the scl fields here.
++	 */
++	if (num_planes == 1) {
++		scl0 = vc4_get_scl_field(state, 1);
++		scl1 = scl0;
++	} else {
++		scl0 = vc4_get_scl_field(state, 1);
++		scl1 = vc4_get_scl_field(state, 0);
++	}
+ 
+ 	/* Control word */
+ 	vc4_dlist_write(vc4_state,
+@@ -440,8 +538,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 			(format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
+ 			(format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
+ 			(vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) |
+-			VC4_SET_FIELD(scl, SCALER_CTL0_SCL0) |
+-			VC4_SET_FIELD(scl, SCALER_CTL0_SCL1));
++			VC4_SET_FIELD(scl0, SCALER_CTL0_SCL0) |
++			VC4_SET_FIELD(scl1, SCALER_CTL0_SCL1));
+ 
+ 	/* Position Word 0: Image Positions and Alpha Value */
+ 	vc4_state->pos0_offset = vc4_state->dlist_count;
+@@ -466,35 +564,68 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
+ 				      SCALER_POS2_ALPHA_MODE_PIPELINE :
+ 				      SCALER_POS2_ALPHA_MODE_FIXED,
+ 				      SCALER_POS2_ALPHA_MODE) |
+-			VC4_SET_FIELD(vc4_state->src_w, SCALER_POS2_WIDTH) |
+-			VC4_SET_FIELD(vc4_state->src_h, SCALER_POS2_HEIGHT));
++			VC4_SET_FIELD(vc4_state->src_w[0], SCALER_POS2_WIDTH) |
++			VC4_SET_FIELD(vc4_state->src_h[0], SCALER_POS2_HEIGHT));
+ 
+ 	/* Position Word 3: Context.  Written by the HVS. */
+ 	vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+ 
+-	/* Pointer Word 0: RGB / Y Pointer */
++
++	/* Pointer Word 0/1/2: RGB / Y / Cb / Cr Pointers
++	 *
++	 * The pointers may be any byte address.
++	 */
+ 	vc4_state->ptr0_offset = vc4_state->dlist_count;
+-	vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
++	if (!format->flip_cbcr) {
++		for (i = 0; i < num_planes; i++)
++			vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
++	} else {
++		WARN_ON_ONCE(num_planes != 3);
++		vc4_dlist_write(vc4_state, vc4_state->offsets[0]);
++		vc4_dlist_write(vc4_state, vc4_state->offsets[2]);
++		vc4_dlist_write(vc4_state, vc4_state->offsets[1]);
++	}
+ 
+-	/* Pointer Context Word 0: Written by the HVS */
+-	vc4_dlist_write(vc4_state, 0xc0c0c0c0);
++	/* Pointer Context Word 0/1/2: Written by the HVS */
++	for (i = 0; i < num_planes; i++)
++		vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+ 
+-	/* Pitch word 0: Pointer 0 Pitch */
+-	vc4_dlist_write(vc4_state,
+-			VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH));
++	/* Pitch word 0/1/2 */
++	for (i = 0; i < num_planes; i++) {
++		vc4_dlist_write(vc4_state,
++				VC4_SET_FIELD(fb->pitches[i], SCALER_SRC_PITCH));
++	}
++
++	/* Colorspace conversion words */
++	if (vc4_state->is_yuv) {
++		vc4_dlist_write(vc4_state, SCALER_CSC0_ITR_R_601_5);
++		vc4_dlist_write(vc4_state, SCALER_CSC1_ITR_R_601_5);
++		vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5);
++	}
+ 
+ 	if (!vc4_state->is_unity) {
+ 		/* LBM Base Address. */
+-		if (vc4_state->y_scaling != VC4_SCALING_NONE)
++		if (vc4_state->y_scaling[0] != VC4_SCALING_NONE ||
++		    vc4_state->y_scaling[1] != VC4_SCALING_NONE) {
+ 			vc4_dlist_write(vc4_state, vc4_state->lbm.start);
++		}
+ 
+-		vc4_write_scaling_parameters(state);
++		if (num_planes > 1) {
++			/* Emit Cb/Cr as channel 0 and Y as channel
++			 * 1. This matches how we set up scl0/scl1
++			 * above.
++			 */
++			vc4_write_scaling_parameters(state, 1);
++		}
++		vc4_write_scaling_parameters(state, 0);
+ 
+ 		/* If any PPF setup was done, then all the kernel
+ 		 * pointers get uploaded.
+ 		 */
+-		if (vc4_state->x_scaling == VC4_SCALING_PPF ||
+-		    vc4_state->y_scaling == VC4_SCALING_PPF) {
++		if (vc4_state->x_scaling[0] == VC4_SCALING_PPF ||
++		    vc4_state->y_scaling[0] == VC4_SCALING_PPF ||
++		    vc4_state->x_scaling[1] == VC4_SCALING_PPF ||
++		    vc4_state->y_scaling[1] == VC4_SCALING_PPF) {
+ 			u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start,
+ 						   SCALER_PPF_KERNEL_OFFSET);
+ 
+@@ -698,6 +829,7 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
+ 	struct drm_plane *plane = NULL;
+ 	struct vc4_plane *vc4_plane;
+ 	u32 formats[ARRAY_SIZE(hvs_formats)];
++	u32 num_formats = 0;
+ 	int ret = 0;
+ 	unsigned i;
+ 
+@@ -708,12 +840,20 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
+ 		goto fail;
+ 	}
+ 
+-	for (i = 0; i < ARRAY_SIZE(hvs_formats); i++)
+-		formats[i] = hvs_formats[i].drm;
++	for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) {
++		/* Don't allow YUV in cursor planes, since that means
++		 * tuning on the scaler, which we don't allow for the
++		 * cursor.
++		 */
++		if (type != DRM_PLANE_TYPE_CURSOR ||
++		    hvs_formats[i].hvs < HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE) {
++			formats[num_formats++] = hvs_formats[i].drm;
++		}
++	}
+ 	plane = &vc4_plane->base;
+ 	ret = drm_universal_plane_init(dev, plane, 0xff,
+ 				       &vc4_plane_funcs,
+-				       formats, ARRAY_SIZE(formats),
++				       formats, num_formats,
+ 				       type, NULL);
+ 
+ 	drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
+diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
+index a5b544d..bf42a8e 100644
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -519,7 +519,12 @@ enum hvs_pixel_format {
+ 	HVS_PIXEL_FORMAT_RGB888 = 5,
+ 	HVS_PIXEL_FORMAT_RGBA6666 = 6,
+ 	/* 32bpp */
+-	HVS_PIXEL_FORMAT_RGBA8888 = 7
++	HVS_PIXEL_FORMAT_RGBA8888 = 7,
++
++	HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE = 8,
++	HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE = 9,
++	HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE = 10,
++	HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE = 11,
+ };
+ 
+ /* Note: the LSB is the rightmost character shown.  Only valid for
+@@ -601,6 +606,55 @@ enum hvs_pixel_format {
+ #define SCALER_POS2_WIDTH_MASK			VC4_MASK(11, 0)
+ #define SCALER_POS2_WIDTH_SHIFT			0
+ 
++/* Color Space Conversion words.  Some values are S2.8 signed
++ * integers, except that the 2 integer bits map as {0x0: 0, 0x1: 1,
++ * 0x2: 2, 0x3: -1}
++ */
++/* bottom 8 bits of S2.8 contribution of Cr to Blue */
++#define SCALER_CSC0_COEF_CR_BLU_MASK		VC4_MASK(31, 24)
++#define SCALER_CSC0_COEF_CR_BLU_SHIFT		24
++/* Signed offset to apply to Y before CSC. (Y' = Y + YY_OFS) */
++#define SCALER_CSC0_COEF_YY_OFS_MASK		VC4_MASK(23, 16)
++#define SCALER_CSC0_COEF_YY_OFS_SHIFT		16
++/* Signed offset to apply to CB before CSC (Cb' = Cb - 128 + CB_OFS). */
++#define SCALER_CSC0_COEF_CB_OFS_MASK		VC4_MASK(15, 8)
++#define SCALER_CSC0_COEF_CB_OFS_SHIFT		8
++/* Signed offset to apply to CB before CSC (Cr' = Cr - 128 + CR_OFS). */
++#define SCALER_CSC0_COEF_CR_OFS_MASK		VC4_MASK(7, 0)
++#define SCALER_CSC0_COEF_CR_OFS_SHIFT		0
++#define SCALER_CSC0_ITR_R_601_5			0x00f00000
++#define SCALER_CSC0_ITR_R_709_3			0x00f00000
++#define SCALER_CSC0_JPEG_JFIF			0x00000000
++
++/* S2.8 contribution of Cb to Green */
++#define SCALER_CSC1_COEF_CB_GRN_MASK		VC4_MASK(31, 22)
++#define SCALER_CSC1_COEF_CB_GRN_SHIFT		22
++/* S2.8 contribution of Cr to Green */
++#define SCALER_CSC1_COEF_CR_GRN_MASK		VC4_MASK(21, 12)
++#define SCALER_CSC1_COEF_CR_GRN_SHIFT		12
++/* S2.8 contribution of Y to all of RGB */
++#define SCALER_CSC1_COEF_YY_ALL_MASK		VC4_MASK(11, 2)
++#define SCALER_CSC1_COEF_YY_ALL_SHIFT		2
++/* top 2 bits of S2.8 contribution of Cr to Blue */
++#define SCALER_CSC1_COEF_CR_BLU_MASK		VC4_MASK(1, 0)
++#define SCALER_CSC1_COEF_CR_BLU_SHIFT		0
++#define SCALER_CSC1_ITR_R_601_5			0xe73304a8
++#define SCALER_CSC1_ITR_R_709_3			0xf2b784a8
++#define SCALER_CSC1_JPEG_JFIF			0xea34a400
++
++/* S2.8 contribution of Cb to Red */
++#define SCALER_CSC2_COEF_CB_RED_MASK		VC4_MASK(29, 20)
++#define SCALER_CSC2_COEF_CB_RED_SHIFT		20
++/* S2.8 contribution of Cr to Red */
++#define SCALER_CSC2_COEF_CR_RED_MASK		VC4_MASK(19, 10)
++#define SCALER_CSC2_COEF_CR_RED_SHIFT		10
++/* S2.8 contribution of Cb to Blue */
++#define SCALER_CSC2_COEF_CB_BLU_MASK		VC4_MASK(19, 10)
++#define SCALER_CSC2_COEF_CB_BLU_SHIFT		10
++#define SCALER_CSC2_ITR_R_601_5			0x00066204
++#define SCALER_CSC2_ITR_R_709_3			0x00072a1c
++#define SCALER_CSC2_JPEG_JFIF			0x000599c5
++
+ #define SCALER_TPZ0_VERT_RECALC			BIT(31)
+ #define SCALER_TPZ0_SCALE_MASK			VC4_MASK(28, 8)
+ #define SCALER_TPZ0_SCALE_SHIFT			8
+-- 
+2.7.3
+
+From 47ed1ee3dbfde89297b81bc09f1b483f4da1b06d Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 29 Feb 2016 17:53:00 -0800
+Subject: [PATCH 16/36] drm/vc4: Let gpiolib know that we're OK with sleeping
+ for HPD.
+
+Fixes an error thrown every few seconds when we poll HPD when it's on
+a I2C to GPIO expander.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Tested-by: Daniel Stone <daniels@collabora.com>
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
+index 56272ca..6bcf51d 100644
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -166,7 +166,7 @@ vc4_hdmi_connector_detect(struct drm_connector *connector, bool force)
+ 	struct vc4_dev *vc4 = to_vc4_dev(dev);
+ 
+ 	if (vc4->hdmi->hpd_gpio) {
+-		if (gpio_get_value(vc4->hdmi->hpd_gpio))
++		if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio))
+ 			return connector_status_connected;
+ 		else
+ 			return connector_status_disconnected;
+-- 
+2.7.3
+
+From 24b28acef42486c282bc58e977cbfc66191a8f38 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 29 Feb 2016 17:53:01 -0800
+Subject: [PATCH 17/36] drm/vc4: Respect GPIO_ACTIVE_LOW on HDMI HPD if set in
+ the devicetree.
+
+The original Raspberry Pi had the GPIO active high, but the later
+models are active low.  The DT GPIO bindings allow specifying the
+active flag, except that it doesn't get propagated to the gpiodesc, so
+you have to handle it yourself.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Tested-by: Daniel Stone <daniels@collabora.com>
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
+index 6bcf51d..d8b8649 100644
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -47,6 +47,7 @@ struct vc4_hdmi {
+ 	void __iomem *hdmicore_regs;
+ 	void __iomem *hd_regs;
+ 	int hpd_gpio;
++	bool hpd_active_low;
+ 
+ 	struct clk *pixel_clock;
+ 	struct clk *hsm_clock;
+@@ -166,7 +167,8 @@ vc4_hdmi_connector_detect(struct drm_connector *connector, bool force)
+ 	struct vc4_dev *vc4 = to_vc4_dev(dev);
+ 
+ 	if (vc4->hdmi->hpd_gpio) {
+-		if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio))
++		if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
++		    vc4->hdmi->hpd_active_low)
+ 			return connector_status_connected;
+ 		else
+ 			return connector_status_disconnected;
+@@ -517,11 +519,17 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
+ 	 * we'll use the HDMI core's register.
+ 	 */
+ 	if (of_find_property(dev->of_node, "hpd-gpios", &value)) {
+-		hdmi->hpd_gpio = of_get_named_gpio(dev->of_node, "hpd-gpios", 0);
++		enum of_gpio_flags hpd_gpio_flags;
++
++		hdmi->hpd_gpio = of_get_named_gpio_flags(dev->of_node,
++							 "hpd-gpios", 0,
++							 &hpd_gpio_flags);
+ 		if (hdmi->hpd_gpio < 0) {
+ 			ret = hdmi->hpd_gpio;
+ 			goto err_unprepare_hsm;
+ 		}
++
++		hdmi->hpd_active_low = hpd_gpio_flags & OF_GPIO_ACTIVE_LOW;
+ 	}
+ 
+ 	vc4->hdmi = hdmi;
+-- 
+2.7.3
+
+From ed6836e411dd559a811dd063509a01772f4fe00f Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 4 Mar 2016 12:32:07 -0800
+Subject: [PATCH 19/36] drm/vc4: Recognize a more specific compatible string
+ for V3D.
+
+The Raspberry Pi Foundation's firmware updates are shipping device
+trees using the old string, so we'll keep recognizing that as this rev
+of V3D.  Still, we should use a more specific name in the upstream DT
+to clarify which board is being supported, in case we do other revs of
+V3D in the future.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Stephen Warren <swarren@wwwdotorg.org>
+---
+ drivers/gpu/drm/vc4/vc4_v3d.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c
+index 31de5d1..e6d3c60 100644
+--- a/drivers/gpu/drm/vc4/vc4_v3d.c
++++ b/drivers/gpu/drm/vc4/vc4_v3d.c
+@@ -268,6 +268,7 @@ static int vc4_v3d_dev_remove(struct platform_device *pdev)
+ }
+ 
+ static const struct of_device_id vc4_v3d_dt_match[] = {
++	{ .compatible = "brcm,bcm2835-v3d" },
+ 	{ .compatible = "brcm,vc4-v3d" },
+ 	{}
+ };
+-- 
+2.7.3
+
+From 55acd7db60c8247d926969b705373765c26c1f44 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 11 Sep 2015 11:22:05 +0000
+Subject: [PATCH 21/36] ARM: bcm2835: add the auxiliary spi1 and spi2 to the
+ device tree
+
+This enables the use of the auxiliary spi1 and spi2 devices
+on the bcm2835 SOC.
+
+Note that this requires the use of the new clk-bcm2835-aux to work.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Acked-by: Stephen Warren <swarren@wwwdotorg.org>
+[anholt: Rebased on 2835.dtsi -> 283x.dtsi change]
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm283x.dtsi | 21 +++++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+
+diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
+index 971e741..f0d4573 100644
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -1,5 +1,6 @@
+ #include <dt-bindings/pinctrl/bcm2835.h>
+ #include <dt-bindings/clock/bcm2835.h>
++#include <dt-bindings/clock/bcm2835-aux.h>
+ #include "skeleton.dtsi"
+ 
+ /* This include file covers the common peripherals and configuration between
+@@ -159,6 +160,26 @@
+ 			clocks = <&clocks BCM2835_CLOCK_VPU>;
+ 		};
+ 
++		spi1: spi@7e215080 {
++			compatible = "brcm,bcm2835-aux-spi";
++			reg = <0x7e215080 0x40>;
++			interrupts = <1 29>;
++			clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		spi2: spi@7e2150c0 {
++			compatible = "brcm,bcm2835-aux-spi";
++			reg = <0x7e2150c0 0x40>;
++			interrupts = <1 29>;
++			clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
+ 		sdhci: sdhci@7e300000 {
+ 			compatible = "brcm,bcm2835-sdhci";
+ 			reg = <0x7e300000 0x100>;
+-- 
+2.7.3
+
+From 3e0a385cebe3b0d9338cab356c6a11daaa64f808 Mon Sep 17 00:00:00 2001
+From: Remi Pommarel <repk@triplefau.lt>
+Date: Mon, 21 Dec 2015 21:12:59 +0100
+Subject: [PATCH 22/36] ARM: bcm2835: Add PWM clock support to the device tree
+
+Signed-off-by: Remi Pommarel <repk@triplefau.lt>
+[anholt: Rebased on 2835.dtsi -> 283x.dtsi change]
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2835-rpi.dtsi |  4 ++++
+ arch/arm/boot/dts/bcm283x.dtsi     | 10 ++++++++++
+ 2 files changed, 14 insertions(+)
+
+diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+index 3afb9fe..a584a93 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -58,3 +58,7 @@
+ 	status = "okay";
+ 	bus-width = <4>;
+ };
++
++&pwm {
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
+index f0d4573..e4a2792 100644
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -180,6 +180,16 @@
+ 			status = "disabled";
+ 		};
+ 
++		pwm: pwm@7e20c000 {
++			compatible = "brcm,bcm2835-pwm";
++			reg = <0x7e20c000 0x28>;
++			clocks = <&clocks BCM2835_CLOCK_PWM>;
++			assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
++			assigned-clock-rates = <10000000>;
++			#pwm-cells = <2>;
++			status = "disabled";
++		};
++
+ 		sdhci: sdhci@7e300000 {
+ 			compatible = "brcm,bcm2835-sdhci";
+ 			reg = <0x7e300000 0x100>;
+-- 
+2.7.3
+
+From 84416a8360e7c31e6ba9f7775c077bd5f3fe32de Mon Sep 17 00:00:00 2001
+From: Lubomir Rintel <lkundrak@v3.sk>
+Date: Mon, 25 Jan 2016 21:40:06 +0100
+Subject: [PATCH 23/36] ARM: bcm2835: dt: Add Raspberry Pi Model A
+
+This one is essentially the same as revision 2 B board (with the I2S on
+P5 header).
+
+Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
+Acked-by: Stephen Warren <swarren@wwwdotorg.org>
+[anholt: Rebased on bcm2835.dtsi -> bcm283x.dtsi change]
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/Makefile          |  1 +
+ arch/arm/boot/dts/bcm2835-rpi-a.dts | 24 ++++++++++++++++++++++++
+ 2 files changed, 25 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm2835-rpi-a.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index a4a6d70..d000814 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -60,6 +60,7 @@ dtb-$(CONFIG_ARCH_AXXIA) += \
+ 	axm5516-amarillo.dtb
+ dtb-$(CONFIG_ARCH_BCM2835) += \
+ 	bcm2835-rpi-b.dtb \
++	bcm2835-rpi-a.dtb \
+ 	bcm2835-rpi-b-rev2.dtb \
+ 	bcm2835-rpi-b-plus.dtb \
+ 	bcm2835-rpi-a-plus.dtb \
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
+new file mode 100644
+index 0000000..ddbbbbd
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
+@@ -0,0 +1,24 @@
++/dts-v1/;
++#include "bcm2835.dtsi"
++#include "bcm2835-rpi.dtsi"
++
++/ {
++	compatible = "raspberrypi,model-a", "brcm,bcm2835";
++	model = "Raspberry Pi Model A";
++
++	leds {
++		act {
++			gpios = <&gpio 16 1>;
++		};
++	};
++};
++
++&gpio {
++	pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
++
++	/* I2S interface */
++	i2s_alt2: i2s_alt2 {
++		brcm,pins = <28 29 30 31>;
++		brcm,function = <BCM2835_FSEL_ALT2>;
++	};
++};
+-- 
+2.7.3
+
+From f6fd06c97f0d6d8398b8caba1b6879fa7e0284ba Mon Sep 17 00:00:00 2001
+From: Alexander Aring <alex.aring@gmail.com>
+Date: Wed, 16 Dec 2015 16:26:49 -0800
+Subject: [PATCH 24/36] ARM: bcm2835: Add the Raspberry Pi power domain driver
+ to the DT.
+
+This connects the USB driver to the USB power domain, so that USB can
+actually be turned on at boot if the bootloader didn't do it for us.
+
+Signed-off-by: Alexander Aring <alex.aring@gmail.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Kevin Hilman <khilman@linaro.org>
+---
+ arch/arm/boot/dts/bcm2835-rpi.dtsi | 12 ++++++++++++
+ arch/arm/boot/dts/bcm283x.dtsi     |  2 +-
+ 2 files changed, 13 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+index a584a93..76bdbca 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -1,3 +1,5 @@
++#include <dt-bindings/power/raspberrypi-power.h>
++
+ / {
+ 	memory {
+ 		reg = <0 0x10000000>;
+@@ -18,6 +20,12 @@
+ 			compatible = "raspberrypi,bcm2835-firmware";
+ 			mboxes = <&mailbox>;
+ 		};
++
++		power: power {
++			compatible = "raspberrypi,bcm2835-power";
++			firmware = <&firmware>;
++			#power-domain-cells = <1>;
++		};
+ 	};
+ };
+ 
+@@ -62,3 +70,7 @@
+ &pwm {
+ 	status = "okay";
+ };
++
++&usb {
++	power-domains = <&power RPI_POWER_DOMAIN_USB>;
++};
+diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
+index e4a2792..e69a6cf 100644
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -218,7 +218,7 @@
+ 			status = "disabled";
+ 		};
+ 
+-		usb@7e980000 {
++		usb: usb@7e980000 {
+ 			compatible = "brcm,bcm2835-usb";
+ 			reg = <0x7e980000 0x10000>;
+ 			interrupts = <1 9>;
+-- 
+2.7.3
+
+From 580146c680ac7b706ac54d7d7db8204bee3d2e93 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 12 Feb 2016 11:14:25 +0000
+Subject: [PATCH 25/36] ARM: bcm2835: add bcm2835-aux-uart support to DT
+
+Add bcm2835-aux-uart support to the device tree.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm283x.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
+index e69a6cf..fc67964 100644
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -160,6 +160,14 @@
+ 			clocks = <&clocks BCM2835_CLOCK_VPU>;
+ 		};
+ 
++		uart1: serial@7e215040 {
++			compatible = "brcm,bcm2835-aux-uart";
++			reg = <0x7e215040 0x40>;
++			interrupts = <1 29>;
++			clocks = <&aux BCM2835_AUX_CLOCK_UART>;
++			status = "disabled";
++		};
++
+ 		spi1: spi@7e215080 {
+ 			compatible = "brcm,bcm2835-aux-spi";
+ 			reg = <0x7e215080 0x40>;
+-- 
+2.7.3
+
+From 41135d2ce60509e53306e5b76afab98ddc15951b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 2 Mar 2015 14:36:16 -0800
+Subject: [PATCH 26/36] ARM: bcm2835: Add VC4 to the device tree.
+
+VC4 is the GPU (display and 3D) present on the 283x.
+
+v2: Sort by register address, mark HDMI as disabled by default in the
+    SoC file and enable it from -rpi.
+v3: Add references to the pixel/HSM clocks for HDMI.  Rename
+    compatibility strings and clean up node names.
+v4: Fix comment marking pv0's interrupt as pwa2 instead of pwa0.
+    Rename hpd-gpio to hpd-gpios.
+v5: Rebase on bcm283x.dtsi change, add v3d.
+v6: Make HDMI reference the power domain.
+v7: Fix the HDMI HPD gpios active value and HDMI enable for each RPI
+    board.  Change V3D compatible string to 2835.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2835-rpi-a-plus.dts |  4 +++
+ arch/arm/boot/dts/bcm2835-rpi-a.dts      |  4 +++
+ arch/arm/boot/dts/bcm2835-rpi-b-plus.dts |  4 +++
+ arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts |  4 +++
+ arch/arm/boot/dts/bcm2835-rpi-b.dts      |  4 +++
+ arch/arm/boot/dts/bcm2835-rpi.dtsi       |  9 ++++++
+ arch/arm/boot/dts/bcm2836-rpi-2-b.dts    |  4 +++
+ arch/arm/boot/dts/bcm283x.dtsi           | 47 ++++++++++++++++++++++++++++++++
+ 8 files changed, 80 insertions(+)
+
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+index 228614f..35ff4e7a 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+@@ -29,3 +29,7 @@
+ 		brcm,function = <BCM2835_FSEL_ALT0>;
+ 	};
+ };
++
++&hdmi {
++	hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
+index ddbbbbd..306a84e 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
+@@ -22,3 +22,7 @@
+ 		brcm,function = <BCM2835_FSEL_ALT2>;
+ 	};
+ };
++
++&hdmi {
++	hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+index ef54050..57d313b 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+@@ -29,3 +29,7 @@
+ 		brcm,function = <BCM2835_FSEL_ALT0>;
+ 	};
+ };
++
++&hdmi {
++	hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+index 86f1f2f..cf2774e 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+@@ -22,3 +22,7 @@
+ 		brcm,function = <BCM2835_FSEL_ALT2>;
+ 	};
+ };
++
++&hdmi {
++	hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
+index 4859e9d..8b15f9c 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
+@@ -16,3 +16,7 @@
+ &gpio {
+ 	pinctrl-0 = <&gpioout &alt0 &alt3>;
+ };
++
++&hdmi {
++	hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
++};
+diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+index 76bdbca..caf2707 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -74,3 +74,12 @@
+ &usb {
+ 	power-domains = <&power RPI_POWER_DOMAIN_USB>;
+ };
++
++&v3d {
++	power-domains = <&power RPI_POWER_DOMAIN_V3D>;
++};
++
++&hdmi {
++	power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+index ff94666..c4743f4 100644
+--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
++++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+@@ -33,3 +33,7 @@
+ 		brcm,function = <BCM2835_FSEL_ALT0>;
+ 	};
+ };
++
++&hdmi {
++	hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
+diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
+index fc67964..bbe4eab 100644
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -1,6 +1,7 @@
+ #include <dt-bindings/pinctrl/bcm2835.h>
+ #include <dt-bindings/clock/bcm2835.h>
+ #include <dt-bindings/clock/bcm2835-aux.h>
++#include <dt-bindings/gpio/gpio.h>
+ #include "skeleton.dtsi"
+ 
+ /* This include file covers the common peripherals and configuration between
+@@ -153,6 +154,18 @@
+ 			status = "disabled";
+ 		};
+ 
++		pixelvalve@7e206000 {
++			compatible = "brcm,bcm2835-pixelvalve0";
++			reg = <0x7e206000 0x100>;
++			interrupts = <2 13>; /* pwa0 */
++		};
++
++		pixelvalve@7e207000 {
++			compatible = "brcm,bcm2835-pixelvalve1";
++			reg = <0x7e207000 0x100>;
++			interrupts = <2 14>; /* pwa1 */
++		};
++
+ 		aux: aux@0x7e215000 {
+ 			compatible = "brcm,bcm2835-aux";
+ 			#clock-cells = <1>;
+@@ -206,6 +219,12 @@
+ 			status = "disabled";
+ 		};
+ 
++		hvs@7e400000 {
++			compatible = "brcm,bcm2835-hvs";
++			reg = <0x7e400000 0x6000>;
++			interrupts = <2 1>;
++		};
++
+ 		i2c1: i2c@7e804000 {
+ 			compatible = "brcm,bcm2835-i2c";
+ 			reg = <0x7e804000 0x1000>;
+@@ -226,11 +245,39 @@
+ 			status = "disabled";
+ 		};
+ 
++		pixelvalve@7e807000 {
++			compatible = "brcm,bcm2835-pixelvalve2";
++			reg = <0x7e807000 0x100>;
++			interrupts = <2 10>; /* pixelvalve */
++		};
++
++		hdmi: hdmi@7e902000 {
++			compatible = "brcm,bcm2835-hdmi";
++			reg = <0x7e902000 0x600>,
++			      <0x7e808000 0x100>;
++			interrupts = <2 8>, <2 9>;
++			ddc = <&i2c2>;
++			clocks = <&clocks BCM2835_PLLH_PIX>,
++				 <&clocks BCM2835_CLOCK_HSM>;
++			clock-names = "pixel", "hdmi";
++			status = "disabled";
++		};
++
+ 		usb: usb@7e980000 {
+ 			compatible = "brcm,bcm2835-usb";
+ 			reg = <0x7e980000 0x10000>;
+ 			interrupts = <1 9>;
+ 		};
++
++		v3d: v3d@7ec00000 {
++			compatible = "brcm,bcm2835-v3d";
++			reg = <0x7ec00000 0x1000>;
++			interrupts = <1 10>;
++		};
++
++		vc4: gpu {
++			compatible = "brcm,bcm2835-vc4";
++		};
+ 	};
+ 
+ 	clocks {
+-- 
+2.7.3
+
+From da77f737f9f5a487f3a1f80f8546585ee18cd7b9 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 4 Mar 2016 10:39:28 -0800
+Subject: [PATCH 27/36] dt-bindings: Add root properties for Raspberry Pi 3
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Rob Herring <robh@kernel.org>
+---
+ Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
+index 11d3056..6ffe087 100644
+--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
++++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
+@@ -30,6 +30,10 @@ Raspberry Pi 2 Model B
+ Required root node properties:
+ compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
+ 
++Raspberry Pi 3 Model B
++Required root node properties:
++compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
++
+ Raspberry Pi Compute Module
+ Required root node properties:
+ compatible = "raspberrypi,compute-module", "brcm,bcm2835";
+-- 
+2.7.3
+
+From b76b1cdf2e569cceab41dcf3b3f6a90965d0a02c Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 4 Mar 2016 10:39:29 -0800
+Subject: [PATCH 28/36] ARM: bcm2835: Add devicetree for the Raspberry Pi 3.
+
+For now this doesn't support the new hardware present on the Pi 3 (BT,
+wifi, GPIO expander).  Since the GPIO expander isn't supported, we
+also don't have the LEDs like the other board files do.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Stephen Warren <swarren@wwwdotorg.org>
+---
+ arch/arm/boot/dts/Makefile            |  3 +-
+ arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 22 ++++++++++++
+ arch/arm/boot/dts/bcm2837.dtsi        | 68 +++++++++++++++++++++++++++++++++++
+ 3 files changed, 92 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+ create mode 100644 arch/arm/boot/dts/bcm2837.dtsi
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index d000814..a8a0767 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -64,7 +64,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
+ 	bcm2835-rpi-b-rev2.dtb \
+ 	bcm2835-rpi-b-plus.dtb \
+ 	bcm2835-rpi-a-plus.dtb \
+-	bcm2836-rpi-2-b.dtb
++	bcm2836-rpi-2-b.dtb \
++	bcm2837-rpi-3-b.dtb
+ dtb-$(CONFIG_ARCH_BCM_5301X) += \
+ 	bcm4708-asus-rt-ac56u.dtb \
+ 	bcm4708-asus-rt-ac68u.dtb \
+diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+new file mode 100644
+index 0000000..5e8eafd
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+@@ -0,0 +1,22 @@
++/dts-v1/;
++#include "bcm2837.dtsi"
++#include "bcm2835-rpi.dtsi"
++
++/ {
++	compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
++	model = "Raspberry Pi 3 Model B";
++
++	memory {
++		reg = <0 0x40000000>;
++	};
++};
++
++&gpio {
++	pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
++
++	/* I2S interface */
++	i2s_alt0: i2s_alt0 {
++		brcm,pins = <28 29 30 31>;
++		brcm,function = <BCM2835_FSEL_ALT2>;
++	};
++};
+diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
+new file mode 100644
+index 0000000..2f36722
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2837.dtsi
+@@ -0,0 +1,68 @@
++#include "bcm283x.dtsi"
++
++/ {
++	compatible = "brcm,bcm2836";
++
++	soc {
++		ranges = <0x7e000000 0x3f000000 0x1000000>,
++			 <0x40000000 0x40000000 0x00001000>;
++		dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
++
++		local_intc: local_intc {
++			compatible = "brcm,bcm2836-l1-intc";
++			reg = <0x40000000 0x100>;
++			interrupt-controller;
++			#interrupt-cells = <1>;
++			interrupt-parent = <&local_intc>;
++		};
++	};
++
++	timer {
++		compatible = "arm,armv7-timer";
++		interrupt-parent = <&local_intc>;
++		interrupts = <0>, // PHYS_SECURE_PPI
++			     <1>, // PHYS_NONSECURE_PPI
++			     <3>, // VIRT_PPI
++			     <2>; // HYP_PPI
++		always-on;
++	};
++
++	cpus: cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		cpu0: cpu@0 {
++			device_type = "cpu";
++			compatible = "arm,cortex-a53";
++			reg = <0>;
++		};
++
++		cpu1: cpu@1 {
++			device_type = "cpu";
++			compatible = "arm,cortex-a53";
++			reg = <1>;
++		};
++
++		cpu2: cpu@2 {
++			device_type = "cpu";
++			compatible = "arm,cortex-a53";
++			reg = <2>;
++		};
++
++		cpu3: cpu@3 {
++			device_type = "cpu";
++			compatible = "arm,cortex-a53";
++			reg = <3>;
++		};
++	};
++};
++
++/* Make the BCM2835-style global interrupt controller be a child of the
++ * CPU-local interrupt controller.
++ */
++&intc {
++	compatible = "brcm,bcm2836-armctrl-ic";
++	reg = <0x7e00b200 0x200>;
++	interrupt-parent = <&local_intc>;
++	interrupts = <8>;
++};
+-- 
+2.7.3
+
+From 43aa67b7bccfb189a3e57832f08710c98fe707c6 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Sun, 17 Jan 2016 12:15:28 +0000
+Subject: [PATCH 29/36] ARM: bcm2835: follow dt uart node-naming convention
+
+This patch fixes the naming of the device tree node: uart@7e201000
+to conform to the standard of: serial@7e201000
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+---
+ arch/arm/boot/dts/bcm283x.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
+index bbe4eab..31cc2f2 100644
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -113,7 +113,7 @@
+ 			#interrupt-cells = <2>;
+ 		};
+ 
+-		uart0: uart@7e201000 {
++		uart0: serial@7e201000 {
+ 			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+ 			reg = <0x7e201000 0x1000>;
+ 			interrupts = <2 25>;
+-- 
+2.7.3
+
+From 72b53a14be5ff0bda535faefa09bc9726acbe1ff Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Sun, 17 Jan 2016 12:15:29 +0000
+Subject: [PATCH 30/36] dt/bindings: serial: bcm2835: add binding documentation
+ for bcm2835-aux-uart
+
+Add binding documentation for the bcm2835-aux-uart driver.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+
+Changelog:
+	V2->V3: fixed naming convention for node
+Acked-by: Rob Herring <robh@kernel.org>
+Acked-by: Eric Anholt <eric@anholt.net>
+---
+ .../bindings/serial/brcm,bcm2835-aux-uart.txt          | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/serial/brcm,bcm2835-aux-uart.txt
+
+diff --git a/Documentation/devicetree/bindings/serial/brcm,bcm2835-aux-uart.txt b/Documentation/devicetree/bindings/serial/brcm,bcm2835-aux-uart.txt
+new file mode 100644
+index 0000000..b5cc629
+--- /dev/null
++++ b/Documentation/devicetree/bindings/serial/brcm,bcm2835-aux-uart.txt
+@@ -0,0 +1,18 @@
++* BCM2835 AUXILIAR UART
++
++Required properties:
++
++- compatible: "brcm,bcm2835-aux-uart"
++- reg: The base address of the UART register bank.
++- interrupts: A single interrupt specifier.
++- clocks: Clock driving the hardware; used to figure out the baud rate
++  divisor.
++
++Example:
++
++	uart1: serial@7e215040 {
++		compatible = "brcm,bcm2835-aux-uart";
++		reg = <0x7e215040 0x40>;
++		interrupts = <1 29>;
++		clocks = <&aux BCM2835_AUX_CLOCK_UART>;
++	};
+-- 
+2.7.3
+
+From 285a4ac466d3712b50f5c0d29bf5874476f00c30 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Sun, 17 Jan 2016 12:15:30 +0000
+Subject: [PATCH 31/36] serial: bcm2835: add driver for bcm2835-aux-uart
+
+The bcm2835 SOC contains an auxiliary uart, which is very close
+to the ns16550 with some differences.
+
+The big difference is that the uart HW is not using an internal divider
+of 16 but 8, which results in an effictive baud-rate being twice
+the requested baud-rate.
+
+This driver handles this device correctly and handles the difference in
+the HW divider by scaling up the clock by a factor of 2.
+
+The approach to write a separate (wrapper) driver instead of using a
+multiplying clock and "ns16550" as compatibility in the device-tree
+has been recommended by Stephen Warren.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+
+Changelog:
+	V1->V2: made an explicit bcm2835-aux-uart driver
+		not conrolling the settings via DT only
+	V2->V3: added comments on UART capabilities
+		applied recommendations by Stefan Wahren
+		keep registered line-id in bcm2835aux_data
+Acked-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/tty/serial/8250/8250_bcm2835aux.c | 146 ++++++++++++++++++++++++++++++
+ drivers/tty/serial/8250/Kconfig           |  24 +++++
+ drivers/tty/serial/8250/Makefile          |   1 +
+ 3 files changed, 171 insertions(+)
+ create mode 100644 drivers/tty/serial/8250/8250_bcm2835aux.c
+
+diff --git a/drivers/tty/serial/8250/8250_bcm2835aux.c b/drivers/tty/serial/8250/8250_bcm2835aux.c
+new file mode 100644
+index 0000000..ecf89f1
+--- /dev/null
++++ b/drivers/tty/serial/8250/8250_bcm2835aux.c
+@@ -0,0 +1,146 @@
++/*
++ * Serial port driver for BCM2835AUX UART
++ *
++ * Copyright (C) 2016 Martin Sperl <kernel@martin.sperl.org>
++ *
++ * Based on 8250_lpc18xx.c:
++ * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/clk.h>
++#include <linux/io.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
++
++#include "8250.h"
++
++struct bcm2835aux_data {
++	struct uart_8250_port uart;
++	struct clk *clk;
++	int line;
++};
++
++static int bcm2835aux_serial_probe(struct platform_device *pdev)
++{
++	struct bcm2835aux_data *data;
++	struct resource *res;
++	int ret;
++
++	/* allocate the custom structure */
++	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
++	if (!data)
++		return -ENOMEM;
++
++	/* initialize data */
++	spin_lock_init(&data->uart.port.lock);
++	data->uart.capabilities = UART_CAP_FIFO;
++	data->uart.port.dev = &pdev->dev;
++	data->uart.port.regshift = 2;
++	data->uart.port.type = PORT_16550;
++	data->uart.port.iotype = UPIO_MEM;
++	data->uart.port.fifosize = 8;
++	data->uart.port.flags = UPF_SHARE_IRQ |
++				UPF_FIXED_PORT |
++				UPF_FIXED_TYPE |
++				UPF_SKIP_TEST;
++
++	/* get the clock - this also enables the HW */
++	data->clk = devm_clk_get(&pdev->dev, NULL);
++	ret = PTR_ERR_OR_ZERO(data->clk);
++	if (ret) {
++		dev_err(&pdev->dev, "could not get clk: %d\n", ret);
++		return ret;
++	}
++
++	/* get the interrupt */
++	data->uart.port.irq = platform_get_irq(pdev, 0);
++	if (data->uart.port.irq < 0) {
++		dev_err(&pdev->dev, "irq not found - %i",
++			data->uart.port.irq);
++		return data->uart.port.irq;
++	}
++
++	/* map the main registers */
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res) {
++		dev_err(&pdev->dev, "memory resource not found");
++		return -EINVAL;
++	}
++	data->uart.port.membase = devm_ioremap_resource(&pdev->dev, res);
++	ret = PTR_ERR_OR_ZERO(data->uart.port.membase);
++	if (ret)
++		return ret;
++
++	/* Check for a fixed line number */
++	ret = of_alias_get_id(pdev->dev.of_node, "serial");
++	if (ret >= 0)
++		data->uart.port.line = ret;
++
++	/* enable the clock as a last step */
++	ret = clk_prepare_enable(data->clk);
++	if (ret) {
++		dev_err(&pdev->dev, "unable to enable uart clock - %d\n",
++			ret);
++		return ret;
++	}
++
++	/* the HW-clock divider for bcm2835aux is 8,
++	 * but 8250 expects a divider of 16,
++	 * so we have to multiply the actual clock by 2
++	 * to get identical baudrates.
++	 */
++	data->uart.port.uartclk = clk_get_rate(data->clk) * 2;
++
++	/* register the port */
++	ret = serial8250_register_8250_port(&data->uart);
++	if (ret < 0) {
++		dev_err(&pdev->dev, "unable to register 8250 port - %d\n",
++			ret);
++		goto dis_clk;
++	}
++	data->line = ret;
++
++	platform_set_drvdata(pdev, data);
++
++	return 0;
++
++dis_clk:
++	clk_disable_unprepare(data->clk);
++	return ret;
++}
++
++static int bcm2835aux_serial_remove(struct platform_device *pdev)
++{
++	struct bcm2835aux_data *data = platform_get_drvdata(pdev);
++
++	serial8250_unregister_port(data->uart.port.line);
++	clk_disable_unprepare(data->clk);
++
++	return 0;
++}
++
++static const struct of_device_id bcm2835aux_serial_match[] = {
++	{ .compatible = "brcm,bcm2835-aux-uart" },
++	{ },
++};
++MODULE_DEVICE_TABLE(of, bcm2835aux_serial_match);
++
++static struct platform_driver bcm2835aux_serial_driver = {
++	.driver = {
++		.name = "bcm2835-aux-uart",
++		.of_match_table = bcm2835aux_serial_match,
++	},
++	.probe  = bcm2835aux_serial_probe,
++	.remove = bcm2835aux_serial_remove,
++};
++module_platform_driver(bcm2835aux_serial_driver);
++
++MODULE_DESCRIPTION("BCM2835 auxiliar UART driver");
++MODULE_AUTHOR("Martin Sperl <kernel@martin.sperl.org>");
++MODULE_LICENSE("GPL v2");
+diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig
+index b03cb517..67ad6b0 100644
+--- a/drivers/tty/serial/8250/Kconfig
++++ b/drivers/tty/serial/8250/Kconfig
+@@ -272,6 +272,30 @@ config SERIAL_8250_ACORN
+ 	  system, say Y to this option.  The driver can handle 1, 2, or 3 port
+ 	  cards.  If unsure, say N.
+ 
++config SERIAL_8250_BCM2835AUX
++	tristate "BCM2835 auxiliar mini UART support"
++	depends on ARCH_BCM2835 || COMPILE_TEST
++	depends on SERIAL_8250 && SERIAL_8250_SHARE_IRQ
++	help
++	  Support for the BCM2835 auxiliar mini UART.
++
++	  Features and limitations of the UART are
++	    Registers are similar to 16650 registers,
++              set bits in the control registers that are unsupported
++	      are ignored and read back as 0
++	    7/8 bit operation with 1 start and 1 stop bit
++	    8 symbols deep fifo for rx and tx
++	    SW controlled RTS and SW readable CTS
++	    Clock rate derived from system clock
++	    Uses 8 times oversampling (compared to 16 times for 16650)
++	    Missing break detection (but break generation)
++	    Missing framing error detection
++	    Missing parity bit
++	    Missing receive time-out interrupt
++	    Missing DCD, DSR, DTR and RI signals
++
++	  If unsure, say N.
++
+ config SERIAL_8250_FSL
+ 	bool
+ 	depends on SERIAL_8250_CONSOLE
+diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile
+index b9b9bca..5c1869f 100644
+--- a/drivers/tty/serial/8250/Makefile
++++ b/drivers/tty/serial/8250/Makefile
+@@ -12,6 +12,7 @@ obj-$(CONFIG_SERIAL_8250_PCI)		+= 8250_pci.o
+ obj-$(CONFIG_SERIAL_8250_HP300)		+= 8250_hp300.o
+ obj-$(CONFIG_SERIAL_8250_CS)		+= serial_cs.o
+ obj-$(CONFIG_SERIAL_8250_ACORN)		+= 8250_acorn.o
++obj-$(CONFIG_SERIAL_8250_BCM2835AUX)	+= 8250_bcm2835aux.o
+ obj-$(CONFIG_SERIAL_8250_CONSOLE)	+= 8250_early.o
+ obj-$(CONFIG_SERIAL_8250_FOURPORT)	+= 8250_fourport.o
+ obj-$(CONFIG_SERIAL_8250_ACCENT)	+= 8250_accent.o
+-- 
+2.7.3
+
+From 528285e99c25249456023d28f521689bf9e9eb8b Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Wed, 30 Mar 2016 09:35:13 +0100
+Subject: [PATCH 32/36] drop usb power domain support for the moment, kills usb
+
+---
+ arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+index caf2707..b1e8145 100644
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -71,10 +71,6 @@
+ 	status = "okay";
+ };
+ 
+-&usb {
+-	power-domains = <&power RPI_POWER_DOMAIN_USB>;
+-};
+-
+ &v3d {
+ 	power-domains = <&power RPI_POWER_DOMAIN_V3D>;
+ };
+-- 
+2.7.3
+
+From 6af83c5ff7f5514f32b1b3fa6d8d7dfe77e3acce Mon Sep 17 00:00:00 2001
+From: Stefan Wahren <stefan.wahren@i2se.com>
+Date: Sun, 17 Jan 2016 14:59:00 +0000
+Subject: [PATCH 33/36] mmc: sdhci-iproc: Clean up platform allocations if
+ shdci init fails
+
+This patch adopts the changes from 475c9e43bfa7 ("mmc: sdhci-bcm2835:
+Clean up platform allocations if sdhci init fails") to sdhci-iproc.
+
+Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
+Acked-by: Scott Branden <sbranden@broadcom.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+---
+ drivers/mmc/host/sdhci-iproc.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c
+index 3b423b0..e22060a 100644
+--- a/drivers/mmc/host/sdhci-iproc.c
++++ b/drivers/mmc/host/sdhci-iproc.c
+@@ -213,7 +213,11 @@ static int sdhci_iproc_probe(struct platform_device *pdev)
+ 		host->caps1 = iproc_host->data->caps1;
+ 	}
+ 
+-	return sdhci_add_host(host);
++	ret = sdhci_add_host(host);
++	if (ret)
++		goto err;
++
++	return 0;
+ 
+ err:
+ 	sdhci_pltfm_free(pdev);
+-- 
+2.7.3
+
+From 1565145761d5d94991e4763001c9e60c655818f1 Mon Sep 17 00:00:00 2001
+From: Stefan Wahren <stefan.wahren@i2se.com>
+Date: Sun, 17 Jan 2016 14:59:01 +0000
+Subject: [PATCH 34/36] mmc: sdhci-iproc: Actually enable the clock
+
+The RPi firmware-based clocks driver can actually disable
+unused clocks, so when switching to use it we ended up losing
+our MMC clock once all devices were probed.
+
+This patch adopts the changes from 1e5a0a9a58e2 ("mmc: sdhci-bcm2835:
+Actually enable the clock") to sdhci-iproc.
+
+Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
+Acked-by: Scott Branden <sbranden@broadcom.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+---
+ drivers/mmc/host/sdhci-iproc.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c
+index e22060a..55bc348 100644
+--- a/drivers/mmc/host/sdhci-iproc.c
++++ b/drivers/mmc/host/sdhci-iproc.c
+@@ -207,6 +207,11 @@ static int sdhci_iproc_probe(struct platform_device *pdev)
+ 		ret = PTR_ERR(pltfm_host->clk);
+ 		goto err;
+ 	}
++	ret = clk_prepare_enable(pltfm_host->clk);
++	if (ret) {
++		dev_err(&pdev->dev, "failed to enable host clk\n");
++		goto err;
++	}
+ 
+ 	if (iproc_host->data->pdata->quirks & SDHCI_QUIRK_MISSING_CAPS) {
+ 		host->caps = iproc_host->data->caps;
+@@ -215,10 +220,12 @@ static int sdhci_iproc_probe(struct platform_device *pdev)
+ 
+ 	ret = sdhci_add_host(host);
+ 	if (ret)
+-		goto err;
++		goto err_clk;
+ 
+ 	return 0;
+ 
++err_clk:
++	clk_disable_unprepare(pltfm_host->clk);
+ err:
+ 	sdhci_pltfm_free(pdev);
+ 	return ret;
+-- 
+2.7.3
+
+From 49ebf153a97a0840c1e54f934411aceb93bbdee4 Mon Sep 17 00:00:00 2001
+From: Stefan Wahren <stefan.wahren@i2se.com>
+Date: Wed, 27 Jan 2016 22:25:40 +0000
+Subject: [PATCH 35/36] mmc: sdhci-iproc: define MMC caps in platform data
+
+This patch moves the definition of the MMC capabilities
+from the probe function into iproc platform data. After
+that we are able to add support for another platform more
+easily.
+
+Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
+Suggested-by: Stephen Warren <swarren@wwwdotorg.org>
+Acked-by: Scott Branden <sbranden@broadcom.com>
+Acked-by: Stephen Warren <swarren@wwwdotorg.org>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+---
+ drivers/mmc/host/sdhci-iproc.c | 5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c
+index 55bc348..cdc6c4a 100644
+--- a/drivers/mmc/host/sdhci-iproc.c
++++ b/drivers/mmc/host/sdhci-iproc.c
+@@ -26,6 +26,7 @@ struct sdhci_iproc_data {
+ 	const struct sdhci_pltfm_data *pdata;
+ 	u32 caps;
+ 	u32 caps1;
++	u32 mmc_caps;
+ };
+ 
+ struct sdhci_iproc_host {
+@@ -165,6 +166,7 @@ static const struct sdhci_iproc_data iproc_data = {
+ 	.pdata = &sdhci_iproc_pltfm_data,
+ 	.caps = 0x05E90000,
+ 	.caps1 = 0x00000064,
++	.mmc_caps = MMC_CAP_1_8V_DDR,
+ };
+ 
+ static const struct of_device_id sdhci_iproc_of_match[] = {
+@@ -199,8 +201,7 @@ static int sdhci_iproc_probe(struct platform_device *pdev)
+ 	mmc_of_parse(host->mmc);
+ 	sdhci_get_of_property(pdev);
+ 
+-	/* Enable EMMC 1/8V DDR capable */
+-	host->mmc->caps |= MMC_CAP_1_8V_DDR;
++	host->mmc->caps |= iproc_host->data->mmc_caps;
+ 
+ 	pltfm_host->clk = devm_clk_get(&pdev->dev, NULL);
+ 	if (IS_ERR(pltfm_host->clk)) {
+-- 
+2.7.3
+
+From 208897fb02fa78d06f960916bc3781c8a060ab72 Mon Sep 17 00:00:00 2001
+From: Stefan Wahren <stefan.wahren@i2se.com>
+Date: Wed, 27 Jan 2016 22:25:41 +0000
+Subject: [PATCH 36/36] mmc: sdhci-iproc: add bcm2835 support
+
+Scott Branden from Broadcom said that the BCM2835 eMMC IP core is
+very similar to IPROC and share most of the quirks. So use this driver
+instead of separate one.
+
+The sdhci-iproc contains a better workaround for the clock domain
+crossing problem which doesn't need any delays. This results in a
+better write performance.
+
+Btw we get the rid of the SDHCI_CAPABILITIES hack in the sdhci_readl
+function.
+
+Suggested-by: Scott Branden <sbranden@broadcom.com>
+Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
+Acked-by: Eric Anholt <eric@anholt.net>
+Acked-by: Scott Branden <sbranden@broadcom.com>
+Acked-by: Stephen Warren <swarren@wwwdotorg.org>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+---
+ drivers/mmc/host/Kconfig       |  6 +++---
+ drivers/mmc/host/sdhci-iproc.c | 15 +++++++++++++++
+ 2 files changed, 18 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
+index 1526b8a..60de1e4 100644
+--- a/drivers/mmc/host/Kconfig
++++ b/drivers/mmc/host/Kconfig
+@@ -318,15 +318,15 @@ config MMC_SDHCI_F_SDH30
+ 	  If unsure, say N.
+ 
+ config MMC_SDHCI_IPROC
+-	tristate "SDHCI platform support for the iProc SD/MMC Controller"
+-	depends on ARCH_BCM_IPROC || COMPILE_TEST
++	tristate "SDHCI support for the BCM2835 & iProc SD/MMC Controller"
++	depends on ARCH_BCM2835 || ARCH_BCM_IPROC || COMPILE_TEST
+ 	depends on MMC_SDHCI_PLTFM
+ 	default ARCH_BCM_IPROC
+ 	select MMC_SDHCI_IO_ACCESSORS
+ 	help
+ 	  This selects the iProc SD/MMC controller.
+ 
+-	  If you have an IPROC platform with SD or MMC devices,
++	  If you have a BCM2835 or IPROC platform with SD or MMC devices,
+ 	  say Y or M here.
+ 
+ 	  If unsure, say N.
+diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c
+index cdc6c4a..871c92c 100644
+--- a/drivers/mmc/host/sdhci-iproc.c
++++ b/drivers/mmc/host/sdhci-iproc.c
+@@ -169,7 +169,22 @@ static const struct sdhci_iproc_data iproc_data = {
+ 	.mmc_caps = MMC_CAP_1_8V_DDR,
+ };
+ 
++static const struct sdhci_pltfm_data sdhci_bcm2835_pltfm_data = {
++	.quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
++		  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
++		  SDHCI_QUIRK_MISSING_CAPS,
++	.ops = &sdhci_iproc_ops,
++};
++
++static const struct sdhci_iproc_data bcm2835_data = {
++	.pdata = &sdhci_bcm2835_pltfm_data,
++	.caps = SDHCI_CAN_VDD_330,
++	.caps1 = 0x00000000,
++	.mmc_caps = 0x00000000,
++};
++
+ static const struct of_device_id sdhci_iproc_of_match[] = {
++	{ .compatible = "brcm,bcm2835-sdhci", .data = &bcm2835_data },
+ 	{ .compatible = "brcm,sdhci-iproc-cygnus", .data = &iproc_data },
+ 	{ }
+ };
+-- 
+2.7.3
+
diff --git a/bpf-fix-double-fdput-in-replace_map_fd_with_map_ptr.patch b/bpf-fix-double-fdput-in-replace_map_fd_with_map_ptr.patch
new file mode 100644
index 000000000..3ba32bae7
--- /dev/null
+++ b/bpf-fix-double-fdput-in-replace_map_fd_with_map_ptr.patch
@@ -0,0 +1,46 @@
+From 8358b02bf67d3a5d8a825070e1aa73f25fb2e4c7 Mon Sep 17 00:00:00 2001
+From: Jann Horn <jannh@google.com>
+Date: Tue, 26 Apr 2016 22:26:26 +0200
+Subject: [PATCH] bpf: fix double-fdput in replace_map_fd_with_map_ptr()
+
+When bpf(BPF_PROG_LOAD, ...) was invoked with a BPF program whose bytecode
+references a non-map file descriptor as a map file descriptor, the error
+handling code called fdput() twice instead of once (in __bpf_map_get() and
+in replace_map_fd_with_map_ptr()). If the file descriptor table of the
+current task is shared, this causes f_count to be decremented too much,
+allowing the struct file to be freed while it is still in use
+(use-after-free). This can be exploited to gain root privileges by an
+unprivileged user.
+
+This bug was introduced in
+commit 0246e64d9a5f ("bpf: handle pseudo BPF_LD_IMM64 insn"), but is only
+exploitable since
+commit 1be7f75d1668 ("bpf: enable non-root eBPF programs") because
+previously, CAP_SYS_ADMIN was required to reach the vulnerable code.
+
+(posted publicly according to request by maintainer)
+
+Signed-off-by: Jann Horn <jannh@google.com>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Acked-by: Alexei Starovoitov <ast@kernel.org>
+Acked-by: Daniel Borkmann <daniel@iogearbox.net>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ kernel/bpf/verifier.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c
+index 618ef77c302a..db2574e7b8b0 100644
+--- a/kernel/bpf/verifier.c
++++ b/kernel/bpf/verifier.c
+@@ -2030,7 +2030,6 @@ static int replace_map_fd_with_map_ptr(struct verifier_env *env)
+ 			if (IS_ERR(map)) {
+ 				verbose("fd %d is not pointing to valid bpf_map\n",
+ 					insn->imm);
+-				fdput(f);
+ 				return PTR_ERR(map);
+ 			}
+ 
+-- 
+2.5.5
+
diff --git a/bpf-fix-refcnt-overflow.patch b/bpf-fix-refcnt-overflow.patch
new file mode 100644
index 000000000..1143c8286
--- /dev/null
+++ b/bpf-fix-refcnt-overflow.patch
@@ -0,0 +1,158 @@
+From 86db8dac9286f8397434184a6b442b6419e54ec0 Mon Sep 17 00:00:00 2001
+From: Alexei Starovoitov <ast@fb.com>
+Date: Wed, 27 Apr 2016 18:56:20 -0700
+Subject: [PATCH] bpf: fix refcnt overflow
+
+On a system with >32Gbyte of phyiscal memory and infinite RLIMIT_MEMLOCK,
+the malicious application may overflow 32-bit bpf program refcnt.
+It's also possible to overflow map refcnt on 1Tb system.
+Impose 32k hard limit which means that the same bpf program or
+map cannot be shared by more than 32k processes.
+
+Fixes: 1be7f75d1668 ("bpf: enable non-root eBPF programs")
+Reported-by: Jann Horn <jannh@google.com>
+Signed-off-by: Alexei Starovoitov <ast@kernel.org>
+Acked-by: Daniel Borkmann <daniel@iogearbox.net>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ include/linux/bpf.h   |  3 ++-
+ kernel/bpf/inode.c    |  7 ++++---
+ kernel/bpf/syscall.c  | 24 ++++++++++++++++++++----
+ kernel/bpf/verifier.c | 11 +++++++----
+ 4 files changed, 33 insertions(+), 12 deletions(-)
+
+diff --git a/include/linux/bpf.h b/include/linux/bpf.h
+index 83d1926c61e4..67bc2da5d233 100644
+--- a/include/linux/bpf.h
++++ b/include/linux/bpf.h
+@@ -165,12 +165,13 @@ void bpf_register_prog_type(struct bpf_prog_type_list *tl);
+ void bpf_register_map_type(struct bpf_map_type_list *tl);
+ 
+ struct bpf_prog *bpf_prog_get(u32 ufd);
++struct bpf_prog *bpf_prog_inc(struct bpf_prog *prog);
+ void bpf_prog_put(struct bpf_prog *prog);
+ void bpf_prog_put_rcu(struct bpf_prog *prog);
+ 
+ struct bpf_map *bpf_map_get_with_uref(u32 ufd);
+ struct bpf_map *__bpf_map_get(struct fd f);
+-void bpf_map_inc(struct bpf_map *map, bool uref);
++struct bpf_map *bpf_map_inc(struct bpf_map *map, bool uref);
+ void bpf_map_put_with_uref(struct bpf_map *map);
+ void bpf_map_put(struct bpf_map *map);
+ 
+diff --git a/kernel/bpf/inode.c b/kernel/bpf/inode.c
+index 5a8a797d50b7..d1a7646f79c5 100644
+--- a/kernel/bpf/inode.c
++++ b/kernel/bpf/inode.c
+@@ -31,10 +31,10 @@ static void *bpf_any_get(void *raw, enum bpf_type type)
+ {
+ 	switch (type) {
+ 	case BPF_TYPE_PROG:
+-		atomic_inc(&((struct bpf_prog *)raw)->aux->refcnt);
++		raw = bpf_prog_inc(raw);
+ 		break;
+ 	case BPF_TYPE_MAP:
+-		bpf_map_inc(raw, true);
++		raw = bpf_map_inc(raw, true);
+ 		break;
+ 	default:
+ 		WARN_ON_ONCE(1);
+@@ -277,7 +277,8 @@ static void *bpf_obj_do_get(const struct filename *pathname,
+ 		goto out;
+ 
+ 	raw = bpf_any_get(inode->i_private, *type);
+-	touch_atime(&path);
++	if (!IS_ERR(raw))
++		touch_atime(&path);
+ 
+ 	path_put(&path);
+ 	return raw;
+diff --git a/kernel/bpf/syscall.c b/kernel/bpf/syscall.c
+index 3b39550d8485..4e32cc94edd9 100644
+--- a/kernel/bpf/syscall.c
++++ b/kernel/bpf/syscall.c
+@@ -181,11 +181,18 @@ struct bpf_map *__bpf_map_get(struct fd f)
+ 	return f.file->private_data;
+ }
+ 
+-void bpf_map_inc(struct bpf_map *map, bool uref)
++/* prog's and map's refcnt limit */
++#define BPF_MAX_REFCNT 32768
++
++struct bpf_map *bpf_map_inc(struct bpf_map *map, bool uref)
+ {
+-	atomic_inc(&map->refcnt);
++	if (atomic_inc_return(&map->refcnt) > BPF_MAX_REFCNT) {
++		atomic_dec(&map->refcnt);
++		return ERR_PTR(-EBUSY);
++	}
+ 	if (uref)
+ 		atomic_inc(&map->usercnt);
++	return map;
+ }
+ 
+ struct bpf_map *bpf_map_get_with_uref(u32 ufd)
+@@ -197,7 +204,7 @@ struct bpf_map *bpf_map_get_with_uref(u32 ufd)
+ 	if (IS_ERR(map))
+ 		return map;
+ 
+-	bpf_map_inc(map, true);
++	map = bpf_map_inc(map, true);
+ 	fdput(f);
+ 
+ 	return map;
+@@ -580,6 +587,15 @@ static struct bpf_prog *__bpf_prog_get(struct fd f)
+ 	return f.file->private_data;
+ }
+ 
++struct bpf_prog *bpf_prog_inc(struct bpf_prog *prog)
++{
++	if (atomic_inc_return(&prog->aux->refcnt) > BPF_MAX_REFCNT) {
++		atomic_dec(&prog->aux->refcnt);
++		return ERR_PTR(-EBUSY);
++	}
++	return prog;
++}
++
+ /* called by sockets/tracing/seccomp before attaching program to an event
+  * pairs with bpf_prog_put()
+  */
+@@ -592,7 +608,7 @@ struct bpf_prog *bpf_prog_get(u32 ufd)
+ 	if (IS_ERR(prog))
+ 		return prog;
+ 
+-	atomic_inc(&prog->aux->refcnt);
++	prog = bpf_prog_inc(prog);
+ 	fdput(f);
+ 
+ 	return prog;
+diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c
+index 2e7f7ab739e4..060e4c4c37ea 100644
+--- a/kernel/bpf/verifier.c
++++ b/kernel/bpf/verifier.c
+@@ -2023,15 +2023,18 @@ static int replace_map_fd_with_map_ptr(struct verifier_env *env)
+ 				return -E2BIG;
+ 			}
+ 
+-			/* remember this map */
+-			env->used_maps[env->used_map_cnt++] = map;
+-
+ 			/* hold the map. If the program is rejected by verifier,
+ 			 * the map will be released by release_maps() or it
+ 			 * will be used by the valid program until it's unloaded
+ 			 * and all maps are released in free_bpf_prog_info()
+ 			 */
+-			bpf_map_inc(map, false);
++			map = bpf_map_inc(map, false);
++			if (IS_ERR(map)) {
++				fdput(f);
++				return PTR_ERR(map);
++			}
++			env->used_maps[env->used_map_cnt++] = map;
++
+ 			fdput(f);
+ next_insn:
+ 			insn++;
+-- 
+2.5.5
+
diff --git a/cdc_ncm-do-not-call-usbnet_link_change-from-cdc_ncm_.patch b/cdc_ncm-do-not-call-usbnet_link_change-from-cdc_ncm_.patch
deleted file mode 100644
index 479914dc2..000000000
--- a/cdc_ncm-do-not-call-usbnet_link_change-from-cdc_ncm_.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 4d06dd537f95683aba3651098ae288b7cbff8274 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= <bjorn@mork.no>
-Date: Mon, 7 Mar 2016 21:15:36 +0100
-Subject: [PATCH] cdc_ncm: do not call usbnet_link_change from cdc_ncm_bind
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-usbnet_link_change will call schedule_work and should be
-avoided if bind is failing. Otherwise we will end up with
-scheduled work referring to a netdev which has gone away.
-
-Instead of making the call conditional, we can just defer
-it to usbnet_probe, using the driver_info flag made for
-this purpose.
-
-Fixes: 8a34b0ae8778 ("usbnet: cdc_ncm: apply usbnet_link_change")
-Reported-by: Andrey Konovalov <andreyknvl@gmail.com>
-Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
-Signed-off-by: Bjørn Mork <bjorn@mork.no>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/usb/cdc_ncm.c | 20 +++++---------------
- 1 file changed, 5 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c
-index be927964375b..86ba30ba35e8 100644
---- a/drivers/net/usb/cdc_ncm.c
-+++ b/drivers/net/usb/cdc_ncm.c
-@@ -988,8 +988,6 @@ EXPORT_SYMBOL_GPL(cdc_ncm_select_altsetting);
- 
- static int cdc_ncm_bind(struct usbnet *dev, struct usb_interface *intf)
- {
--	int ret;
--
- 	/* MBIM backwards compatible function? */
- 	if (cdc_ncm_select_altsetting(intf) != CDC_NCM_COMM_ALTSETTING_NCM)
- 		return -ENODEV;
-@@ -998,16 +996,7 @@ static int cdc_ncm_bind(struct usbnet *dev, struct usb_interface *intf)
- 	 * Additionally, generic NCM devices are assumed to accept arbitrarily
- 	 * placed NDP.
- 	 */
--	ret = cdc_ncm_bind_common(dev, intf, CDC_NCM_DATA_ALTSETTING_NCM, 0);
--
--	/*
--	 * We should get an event when network connection is "connected" or
--	 * "disconnected". Set network connection in "disconnected" state
--	 * (carrier is OFF) during attach, so the IP network stack does not
--	 * start IPv6 negotiation and more.
--	 */
--	usbnet_link_change(dev, 0, 0);
--	return ret;
-+	return cdc_ncm_bind_common(dev, intf, CDC_NCM_DATA_ALTSETTING_NCM, 0);
- }
- 
- static void cdc_ncm_align_tail(struct sk_buff *skb, size_t modulus, size_t remainder, size_t max)
-@@ -1590,7 +1579,8 @@ static void cdc_ncm_status(struct usbnet *dev, struct urb *urb)
- 
- static const struct driver_info cdc_ncm_info = {
- 	.description = "CDC NCM",
--	.flags = FLAG_POINTTOPOINT | FLAG_NO_SETINT | FLAG_MULTI_PACKET,
-+	.flags = FLAG_POINTTOPOINT | FLAG_NO_SETINT | FLAG_MULTI_PACKET
-+			| FLAG_LINK_INTR,
- 	.bind = cdc_ncm_bind,
- 	.unbind = cdc_ncm_unbind,
- 	.manage_power = usbnet_manage_power,
-@@ -1603,7 +1593,7 @@ static const struct driver_info cdc_ncm_info = {
- static const struct driver_info wwan_info = {
- 	.description = "Mobile Broadband Network Device",
- 	.flags = FLAG_POINTTOPOINT | FLAG_NO_SETINT | FLAG_MULTI_PACKET
--			| FLAG_WWAN,
-+			| FLAG_LINK_INTR | FLAG_WWAN,
- 	.bind = cdc_ncm_bind,
- 	.unbind = cdc_ncm_unbind,
- 	.manage_power = usbnet_manage_power,
-@@ -1616,7 +1606,7 @@ static const struct driver_info wwan_info = {
- static const struct driver_info wwan_noarp_info = {
- 	.description = "Mobile Broadband Network Device (NO ARP)",
- 	.flags = FLAG_POINTTOPOINT | FLAG_NO_SETINT | FLAG_MULTI_PACKET
--			| FLAG_WWAN | FLAG_NOARP,
-+			| FLAG_LINK_INTR | FLAG_WWAN | FLAG_NOARP,
- 	.bind = cdc_ncm_bind,
- 	.unbind = cdc_ncm_unbind,
- 	.manage_power = usbnet_manage_power,
--- 
-2.5.5
-
diff --git a/config-arm-generic b/config-arm-generic
index 0831ea38e..6d27a0828 100644
--- a/config-arm-generic
+++ b/config-arm-generic
@@ -17,10 +17,6 @@ CONFIG_CC_STACKPROTECTOR=y
 # CONFIG_BIG_LITTLE is not set
 # CONFIG_IWMMXT is not set
 
-CONFIG_PWM=y
-CONFIG_PWM_SYSFS=y
-# CONFIG_PWM_FSL_FTM is not set
-
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RESET_GPIO=y
 
@@ -55,6 +51,7 @@ CONFIG_ARM_GIC=y
 CONFIG_ARM_GIC_V2M=y
 CONFIG_ARM_GIC_V3=y
 CONFIG_ARM_GIC_V3_ITS=y
+# CONFIG_HISILICON_IRQ_MBIGEN is not set
 CONFIG_ARM_GLOBAL_TIMER=y
 CONFIG_ARM_SMMU=y
 CONFIG_MMC_ARMMMCI=y
@@ -78,6 +75,11 @@ CONFIG_CRYPTO_SHA1_ARM_NEON=y
 CONFIG_CRYPTO_SHA512_ARM_NEON=y
 CONFIG_CRYPTO_SHA512_ARM=y
 
+# EDAC
+CONFIG_EDAC=y
+CONFIG_EDAC_MM_EDAC=m
+CONFIG_EDAC_LEGACY_SYSFS=y
+
 # ARM VExpress
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_MFD_VEXPRESS_SYSREG=y
@@ -113,6 +115,7 @@ CONFIG_ROCKCHIP_IOMMU=y
 CONFIG_ROCKCHIP_THERMAL=m
 CONFIG_DRM_ROCKCHIP=m
 CONFIG_ROCKCHIP_DW_HDMI=m
+CONFIG_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_PHY_ROCKCHIP_USB=m
 CONFIG_DWMAC_ROCKCHIP=m
 CONFIG_SND_SOC_ROCKCHIP=m
@@ -122,10 +125,53 @@ CONFIG_SND_SOC_ROCKCHIP_RT5645=m
 CONFIG_SND_SOC_ROCKCHIP_SPDIF=m
 CONFIG_REGULATOR_ACT8865=m
 CONFIG_ROCKCHIP_PM_DOMAINS=y
+CONFIG_CRYPTO_DEV_ROCKCHIP=m
 CONFIG_ROCKCHIP_EFUSE=m
 
 # Tegra
-# CONFIG_TEGRA_AHB is not set
+CONFIG_ARM_TEGRA_CPUFREQ=y
+CONFIG_TEGRA_MC=y
+CONFIG_TEGRA124_EMC=y
+CONFIG_TEGRA_IOMMU_SMMU=y
+CONFIG_TEGRA_AHB=y
+CONFIG_TEGRA20_APB_DMA=y
+CONFIG_TRUSTED_FOUNDATIONS=y
+CONFIG_SERIAL_TEGRA=y
+CONFIG_PCI_TEGRA=y
+CONFIG_AHCI_TEGRA=m
+CONFIG_MMC_SDHCI_TEGRA=m
+CONFIG_TEGRA_WATCHDOG=m
+CONFIG_I2C_TEGRA=m
+CONFIG_SPI_TEGRA114=m
+CONFIG_PWM_TEGRA=m
+CONFIG_KEYBOARD_TEGRA=m
+CONFIG_USB_EHCI_TEGRA=m
+CONFIG_RTC_DRV_TEGRA=m
+CONFIG_ARM_TEGRA_DEVFREQ=m
+CONFIG_ARM_TEGRA124_CPUFREQ=m
+CONFIG_TEGRA_SOCTHERM=m
+
+CONFIG_TEGRA_HOST1X=m
+CONFIG_TEGRA_HOST1X_FIREWALL=y
+CONFIG_DRM_TEGRA=m
+CONFIG_DRM_TEGRA_FBDEV=y
+# CONFIG_DRM_TEGRA_DEBUG is not set
+CONFIG_DRM_TEGRA_STAGING=y
+CONFIG_NOUVEAU_PLATFORM_DRIVER=y
+CONFIG_SND_HDA_TEGRA=m
+
+# CONFIG_ARM_TEGRA20_CPUFREQ is not set
+# CONFIG_MFD_NVEC is not set
+
+# Virt
+CONFIG_PARAVIRT=y
+CONFIG_PARAVIRT_TIME_ACCOUNTING=y
+
+CONFIG_EFI=y
+CONFIG_EFI_VARS=y
+CONFIG_EFIVAR_FS=y
+CONFIG_EFI_VARS_PSTORE=y
+CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
 
 # Power management / thermal / cpu scaling
 # CONFIG_ARM_CPUIDLE is not set
@@ -171,15 +217,100 @@ CONFIG_ARM_SCPI_PROTOCOL=m
 # NVMem
 CONFIG_NVMEM=m
 
+# SPI
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_GPIO=m
+CONFIG_SPI_SPIDEV=m
+CONFIG_SPI_BITBANG=m
+CONFIG_SPI_DESIGNWARE=m
+# CONFIG_SPI_CADENCE is not set
+# CONFIG_SPI_SUN4I is not set
+# CONFIG_SPI_SUN6I is not set
+# CONFIG_SPI_TEGRA20_SFLASH is not set
+# CONFIG_SPI_TEGRA20_SLINK is not set
+# CONFIG_SPI_ZYNQMP_GQSPI is not set
+
+CONFIG_PWM=y
+CONFIG_PWM_SYSFS=y
+# CONFIG_PWM_FSL_FTM is not set
+
 # USB
 CONFIG_USB_OHCI_HCD_PLATFORM=m
 CONFIG_USB_EHCI_HCD_PLATFORM=m
 CONFIG_USB_XHCI_PLATFORM=m
+CONFIG_USB_ULPI=y
+
+# usb gadget
+CONFIG_USB_OTG=y
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_GADGET=m
+CONFIG_USB_GADGET_VBUS_DRAW=100
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+CONFIG_U_SERIAL_CONSOLE=y
+CONFIG_USB_MUSB_HDRC=m
+CONFIG_USB_MUSB_DUAL_ROLE=y
+CONFIG_USB_MUSB_DSPS=m
+# CONFIG_MUSB_PIO_ONLY is not set
+# CONFIG_USB_MUSB_TUSB6010 is not set
+# CONFIG_USB_MUSB_UX500 is not set
+CONFIG_USB_GPIO_VBUS=m
+CONFIG_USB_CONFIGFS=m
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_USB_CONFIGFS_ECM=y
+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_F_TCM=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_OBEX=y
+# CONFIG_USB_CONFIGFS_RNDIS is not set
+CONFIG_USB_CONFIGFS_SERIAL=y
+# CONFIG_USB_CONFIGFS_F_LB_SS is not set
+# CONFIG_USB_CONFIGFS_F_FS is not set
+# CONFIG_USB_CONFIGFS_F_UAC1 is not set
+# CONFIG_USB_CONFIGFS_F_UAC2 is not set
+# CONFIG_USB_CONFIGFS_F_MIDI is not set
+# CONFIG_USB_CONFIGFS_F_HID is not set
+# CONFIG_USB_CONFIGFS_F_UVC is not set
+# CONFIG_USB_CONFIGFS_F_PRINTER is not set
+
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+# CONFIG_USB_GADGET_XILINX is not set
+# CONFIG_USB_FUSB300 is not set
+# CONFIG_USB_FOTG210_UDC is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_PXA27X is not set
+# CONFIG_USB_MV_UDC is not set
+# CONFIG_USB_MV_U3D is not set
+# CONFIG_USB_BDC_UDC is not set
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_AMD5536UDC is not set
+# CONFIG_USB_NET2272 is not set
+# CONFIG_USB_NET2280 is not set
+# CONFIG_USB_GOKU is not set
+# CONFIG_USB_EG20T is not set
+# CONFIG_USB_DUMMY_HCD is not set
+# CONFIG_USB_ZERO_HNPTEST is not set
 
 # MMC/SD
 CONFIG_MMC_SPI=m
 CONFIG_MMC_SDHCI_OF_ARASAN=m
 
+# LCD Panels
+CONFIG_DRM_PANEL=y
+CONFIG_DRM_PANEL_SIMPLE=m
+CONFIG_DRM_PANEL_LD9040=m
+CONFIG_DRM_PANEL_LG_LG4573=m
+CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m
+CONFIG_DRM_PANEL_S6E8AA0=m
+CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m
+CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m
+CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
+CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
+
 # Designware (used by numerous devices)
 CONFIG_MMC_DW=m
 CONFIG_MMC_DW_PLTFM=m
@@ -200,6 +331,7 @@ CONFIG_USB_DWC2_PCI=m
 CONFIG_USB_DWC3=m
 CONFIG_USB_DWC3_DUAL_ROLE=y
 CONFIG_USB_DWC3_PCI=m
+CONFIG_USB_DWC3_OF_SIMPLE=m
 # CONFIG_USB_DWC3_DEBUG is not set
 CONFIG_USB_DWC3_ULPI=y
 CONFIG_DW_WATCHDOG=m
@@ -214,10 +346,12 @@ CONFIG_EXTCON=m
 CONFIG_EXTCON_GPIO=m
 CONFIG_EXTCON_ADC_JACK=m
 CONFIG_EXTCON_USB_GPIO=m
+# CONFIG_EXTCON_MAX3355 is not set
 # CONFIG_EXTCON_SM5502 is not set
 # CONFIG_EXTCON_RT8973A is not set
 
 # MTD
+# CONFIG_MTD_AFS_PARTS is not set
 CONFIG_MTD_BLKDEVS=m
 CONFIG_MTD_BLOCK=m
 CONFIG_MTD_CFI=m
@@ -265,6 +399,7 @@ CONFIG_I2C_MUX_PINCTRL=m
 CONFIG_I2C_MUX_PCA9541=m
 CONFIG_I2C_MUX_PCA954x=m
 CONFIG_I2C_MUX_REG=m
+CONFIG_I2C_MV64XXX=m
 
 # spi
 CONFIG_SPI_PL022=m
@@ -296,11 +431,6 @@ CONFIG_CMA_SIZE_SEL_MBYTES=y
 CONFIG_CMA_ALIGNMENT=8
 CONFIG_CMA_AREAS=7
 
-# EDAC
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=m
-CONFIG_EDAC_LEGACY_SYSFS=y
-
 # VFIO
 CONFIG_VFIO_PLATFORM=m
 CONFIG_VFIO_AMBA=m
@@ -320,7 +450,6 @@ CONFIG_VFIO_AMBA=m
 # CONFIG_CADENCE_WATCHDOG is not set
 
 # CONFIG_DRM_ARMADA is not set
-# CONFIG_DRM_TEGRA is not set
 # CONFIG_SHMOBILE_IOMMU is not set
 
 # CONFIG_COMMON_CLK_SI570 is not set
diff --git a/config-arm64 b/config-arm64
index 7256a6414..77dde021b 100644
--- a/config-arm64
+++ b/config-arm64
@@ -9,6 +9,8 @@ CONFIG_SCHED_SMT=y
 # arm64 only SoCs
 CONFIG_ARCH_HISI=y
 CONFIG_ARCH_SEATTLE=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_ARCH_XGENE=y
 # CONFIG_ARCH_BCM_IPROC is not set
 # CONFIG_ARCH_BERLIN is not set
@@ -17,11 +19,12 @@ CONFIG_ARCH_XGENE=y
 # CONFIG_ARCH_LAYERSCAPE is not set
 # CONFIG_ARCH_MEDIATEK is not set
 # CONFIG_ARCH_QCOM is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SPRD is not set
 # CONFIG_ARCH_STRATIX10 is not set
-# CONFIG_ARCH_TEGRA is not set
 # CONFIG_ARCH_THUNDER is not set
 # CONFIG_ARCH_ZYNQMP is not set
+# CONFIG_ARCH_UNIPHIER is not set
 
 # Erratum
 CONFIG_ARM64_ERRATUM_826319=y
@@ -73,11 +76,6 @@ CONFIG_SPARSEMEM_VMEMMAP=y
 
 # CONFIG_SYS_HYPERVISOR is not set
 
-CONFIG_EFI=y
-CONFIG_EFI_VARS=y
-CONFIG_EFIVAR_FS=y
-CONFIG_EFI_VARS_PSTORE=y
-CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
 CONFIG_RTC_DRV_EFI=y
 
 CONFIG_ACPI=y
@@ -117,7 +115,7 @@ CONFIG_POWER_RESET_XGENE=y
 CONFIG_COMMON_CLK_XGENE=y
 CONFIG_AHCI_XGENE=y
 CONFIG_PHY_XGENE=y
-CONFIG_NET_XGENE=y
+CONFIG_NET_XGENE=m
 CONFIG_RTC_DRV_XGENE=m
 CONFIG_HW_RANDOM_XGENE=m
 CONFIG_GPIO_XGENE=y
@@ -132,15 +130,45 @@ CONFIG_I2C_XGENE_SLIMPRO=m
 CONFIG_NET_SB1000=y
 CONFIG_AMD_XGBE=m
 CONFIG_AMD_XGBE_PHY=m
-# CONFIG_AMD_XGBE_DCB is not set
-# CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set
+CONFIG_AMD_XGBE_DCB=y
+CONFIG_VFIO_PLATFORM_AMDXGBE_RESET=m
 CONFIG_PINCTRL_AMD=y
 
 # HiSilicon
+CONFIG_HISILICON_IRQ_MBIGEN=y
+CONFIG_COMMON_CLK_HI6220=y
+CONFIG_PCI_HISI=y
 CONFIG_POWER_RESET_HISI=y
 CONFIG_HISI_THERMAL=m
 CONFIG_STUB_CLK_HI6220=y
-CONFIG_PCI_HISI=y
+CONFIG_MFD_HI655X_PMIC=m
+CONFIG_REGULATOR_HI655X=m
+CONFIG_PHY_HI6220_USB=m
+CONFIG_COMMON_RESET_HI6220=m
+
+# Tegra
+CONFIG_ARCH_TEGRA_132_SOC=y
+CONFIG_ARCH_TEGRA_210_SOC=y
+
+# AllWinner
+CONFIG_MACH_SUN50I=y
+CONFIG_SUNXI_RSB=m
+CONFIG_AHCI_SUNXI=m
+CONFIG_NET_VENDOR_ALLWINNER=y
+# CONFIG_SUN4I_EMAC is not set
+# CONFIG_MDIO_SUN4I is not set
+# CONFIG_KEYBOARD_SUN4I_LRADC is not set
+# CONFIG_TOUCHSCREEN_SUN4I is not set
+# CONFIG_SERIO_SUN4I_PS2 is not set
+CONFIG_SUNXI_WATCHDOG=m
+CONFIG_MFD_SUN6I_PRCM=y
+CONFIG_IR_SUNXI=m
+CONFIG_MMC_SUNXI=m
+CONFIG_RTC_DRV_SUN6I=m
+CONFIG_PWM_SUN4I=m
+# CONFIG_PHY_SUN4I_USB is not set
+# CONFIG_PHY_SUN9I_USB is not set
+CONFIG_NVMEM_SUNXI_SID=m
 
 # ThunderX
 # CONFIG_MDIO_OCTEON is not set
diff --git a/config-armv7 b/config-armv7
index 751797867..1a040d692 100644
--- a/config-armv7
+++ b/config-armv7
@@ -3,11 +3,11 @@
 # CONFIG_ARCH_BERLIN is not set
 # CONFIG_ARCH_KEYSTONE is not set
 CONFIG_ARCH_MXC=y
+CONFIG_ARCH_MMP=y
 CONFIG_ARCH_OMAP3=y
 CONFIG_ARCH_OMAP4=y
 CONFIG_ARCH_QCOM=y
 CONFIG_ARCH_TEGRA=y
-CONFIG_ARCH_U8500=y
 CONFIG_ARCH_ZYNQ=y
 
 # These are supported in the LPAE kernel
@@ -106,12 +106,8 @@ CONFIG_RTC_DRV_PALMAS=m
 CONFIG_OMAP5_DSS_HDMI=y
 CONFIG_COMMON_CLK_PALMAS=m
 CONFIG_INPUT_PALMAS_PWRBUTTON=m
+CONFIG_PALMAS_GPADC=m
 
-CONFIG_WL_TI=y
-CONFIG_WLCORE_SDIO=m
-CONFIG_WLCORE_SPI=m
-CONFIG_WL18XX=m
-CONFIG_WILINK_PLATFORM_DATA=y
 CONFIG_MFD_WL1273_CORE=m
 CONFIG_NFC_WILINK=m
 
@@ -143,6 +139,7 @@ CONFIG_PWM_TIECAP=m
 CONFIG_PWM_TIEHRPWM=m
 CONFIG_PWM_TWL=m
 CONFIG_PWM_TWL_LED=m
+CONFIG_PWM_OMAP_DMTIMER=m
 
 CONFIG_CRYPTO_DEV_OMAP_SHAM=m
 CONFIG_CRYPTO_DEV_OMAP_AES=m
@@ -261,11 +258,12 @@ CONFIG_INPUT_TPS65218_PWRBUTTON=m
 CONFIG_VIDEO_AM437X_VPFE=m
 CONFIG_UIO_PRUSS=m
 CONFIG_WKUP_M3_RPROC=m
+CONFIG_WKUP_M3_IPC=m
 
 # Builtin needed for BBone White
 CONFIG_MFD_TPS65217=y
 CONFIG_REGULATOR_TPS65217=y
-CONFOG_CHARGER_TPS65217=m
+CONFIG_CHARGER_TPS65217=m
 CONFIG_BACKLIGHT_TPS65217=m
 CONFIG_REGULATOR_TPS65217=m
 
@@ -303,6 +301,8 @@ CONFIG_MSM_GCC_8960=m
 CONFIG_MSM_MMCC_8960=m
 CONFIG_MSM_GCC_8974=m
 CONFIG_MSM_MMCC_8974=m
+CONFIG_MSM_GCC_8996=m
+CONFIG_MSM_MMCC_8996=m
 CONFIG_HW_RANDOM_MSM=m
 CONFIG_I2C_QUP=m
 CONFIG_SPI_QUP=m
@@ -350,6 +350,10 @@ CONFIG_QCOM_SMEM=m
 CONFIG_REGULATOR_QCOM_SMD_RPM=m
 CONFIG_QCOM_SMEM=m
 CONFIG_QCOM_QFPROM=m
+CONFIG_QCOM_WCNSS_CTRL=m
+CONFIG_QCOM_SMSM=y
+CONFIG_QCOM_SMP2P=m
+CONFIG_PCIE_QCOM=y
 
 # i.MX
 # CONFIG_MXC_DEBUG_BOARD is not set
@@ -377,7 +381,6 @@ CONFIG_USB_EHCI_MXC=m
 CONFIG_USB_CHIPIDEA=m
 CONFIG_USB_CHIPIDEA_UDC=y
 CONFIG_USB_CHIPIDEA_HOST=y
-# CONFIG_USB_CHIPIDEA_DEBUG is not set
 CONFIG_USB_FSL_USB2=m
 CONFIG_NET_VENDOR_FREESCALE=y
 # CONFIG_GIANFAR is not set
@@ -467,8 +470,11 @@ CONFIG_DRM_IMX_IPUV3=m
 CONFIG_DRM_IMX_LDB=m
 CONFIG_DRM_IMX_PARALLEL_DISPLAY=m
 CONFIG_DRM_IMX_TVE=m
+CONFIG_DRM_ETNAVIV=m
+# CONFIG_DRM_ETNAVIV_REGISTER_LOGGING is not set
 CONFIG_VIDEO_CODA=m
 
+CONFIG_IMX7D_ADC=m
 CONFIG_SENSORS_MC13783_ADC=m
 CONFIG_REGULATOR_ANATOP=m
 CONFIG_REGULATOR_MC13783=m
@@ -505,6 +511,24 @@ CONFIG_REGULATOR_DA9055=m
 # picoxcell
 # CONFIG_CRYPTO_DEV_PICOXCELL is not set
 
+# MMP XO 1.75
+# CONFIG_MACH_BROWNSTONE is not set
+# CONFIG_MACH_FLINT is not set
+# CONFIG_MACH_MARVELL_JASPER is not set
+CONFIG_MACH_MMP2_DT=y
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_KEYBOARD_PXA27x=y
+CONFIG_I2C_PXA=m
+# CONFIG_I2C_PXA_SLAVE is not set
+CONFIG_SND_MMP_SOC=y
+CONFIG_SND_PXA910_SOC=m
+CONFIG_MMC_SDHCI_PXAV2=m
+CONFIG_MMP_PDMA=y
+CONFIG_MMP_TDMA=y
+CONFIG_PXA_DMA=y
+CONFIG_SERIO_OLPC_APSP=m
+
 # Exynos 4
 CONFIG_ARCH_EXYNOS4=y
 CONFIG_SOC_EXYNOS4212=y
@@ -514,46 +538,6 @@ CONFIG_AK8975=m
 CONFIG_CM36651=m
 CONFIG_KEYBOARD_SAMSUNG=m
 
-# ST Ericsson
-CONFIG_MACH_HREFV60=y
-CONFIG_MACH_SNOWBALL=y
-
-CONFIG_ABX500_CORE=y
-# CONFIG_ARM_U8500_CPUIDLE is not set
-CONFIG_UX500_DEBUG_UART=2
-CONFIG_AB8500_CORE=y
-CONFIG_STE_DMA40=y
-CONFIG_HSEM_U8500=m
-CONFIG_PINCTRL_ABX500=y
-CONFIG_PINCTRL_AB8500=y
-CONFIG_I2C_NOMADIK=m
-CONFIG_KEYBOARD_NOMADIK=m
-CONFIG_DB8500_CPUFREQ_COOLING=m
-CONFIG_DB8500_THERMAL=y
-CONFIG_UX500_WATCHDOG=m
-CONFIG_AHCI_ST=m
-CONFIG_INPUT_AB8500_PONKEY=m
-CONFIG_REGULATOR_AB8500=y
-CONFIG_AB8500_USB=m
-CONFIG_USB_MUSB_UX500=m
-# CONFIG_USB_UX500_DMA is not set
-CONFIG_RTC_DRV_AB8500=m
-CONFIG_PWM_AB8500=m
-CONFIG_SND_SOC_UX500=m
-CONFIG_SND_SOC_UX500_PLAT_DMA=m
-CONFIG_SND_SOC_UX500_MACH_MOP500=m
-CONFIG_CLKSRC_DBX500_PRCMU=y
-CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK=y
-CONFIG_CRYPTO_DEV_UX500=m
-CONFIG_CRYPTO_DEV_UX500_CRYP=m
-CONFIG_CRYPTO_DEV_UX500_HASH=m
-CONFIG_SENSORS_LIS3_I2C=m
-CONFIG_AB8500_BM=y
-CONFIG_AB8500_GPADC=y
-CONFIG_SENSORS_AB8500=m
-CONFIG_STE_MODEM_RPROC=m
-CONFIG_STIH415_RESET=y
-
 # Allwinner
 CONFIG_MACH_SUN4I=y
 CONFIG_MACH_SUN5I=y
@@ -586,9 +570,6 @@ CONFIG_MFD_TPS6586X=y
 CONFIG_GPIO_TPS6586X=y
 CONFIG_RTC_DRV_TPS6586X=m
 
-# OLPC XO
-CONFIG_SERIO_OLPC_APSP=m
-
 # Zynq-7xxx
 CONFIG_SERIAL_UARTLITE=y
 CONFIG_SERIAL_UARTLITE_CONSOLE=y
@@ -621,9 +602,9 @@ CONFIG_USB_GADGET_XILINX=m
 CONFIG_PCIE_XILINX=y
 CONFIG_CADENCE_WATCHDOG=m
 CONFIG_REGULATOR_ISL9305=m
-CONFIG_EDAC_SYNOPSYS=m
 CONFIG_PINCTRL_ZYNQ=y
 CONFIG_AXI_DMAC=m
+CONFIG_EDAC_SYNOPSYS=m
 
 # Multi function devices
 CONFIG_MFD_88PM800=m
diff --git a/config-armv7-generic b/config-armv7-generic
index 717c23320..54f79c962 100644
--- a/config-armv7-generic
+++ b/config-armv7-generic
@@ -19,6 +19,7 @@ CONFIG_ARM_UNWIND=y
 CONFIG_ARM_THUMB=y
 CONFIG_ARM_THUMBEE=y
 CONFIG_ARM_ASM_UNIFIED=y
+CONFIG_ARM_PATCH_IDIV=y
 CONFIG_ARM_CPU_TOPOLOGY=y
 CONFIG_ARM_DMA_MEM_BUFFERABLE=y
 CONFIG_SWP_EMULATE=y
@@ -48,25 +49,37 @@ CONFIG_CPU_SW_DOMAIN_PAN=y
 # CONFIG_ARM_VIRT_EXT is not set
 
 # Platforms enabled/disabled globally on ARMv7
+CONFIG_ARCH_BCM=y
+CONFIG_ARCH_BCM2835=y
 CONFIG_ARCH_EXYNOS=y
 CONFIG_ARCH_HIGHBANK=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_ARCH_TEGRA=y
 CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA=y
 CONFIG_ARCH_VIRT=y
-# CONFIG_ARCH_BCM is not set
+# CONFIG_ARCH_BCM_CYGNUS is not set
+# CONFIG_ARCH_BCM_NSP is not set
+# CONFIG_ARCH_BCM_5301X is not set
+# CONFIG_ARCH_BCM_281XX is not set
+# CONFIG_ARCH_BCM_21664 is not set
+# CONFIG_ARCH_BCM_63XX is not set
+# CONFIG_ARCH_BRCMSTB is not set
 # CONFIG_ARCH_BERLIN is not set
 # CONFIG_ARCH_HI3xxx is not set
 # CONFIG_ARCH_HISI is not set
 # CONFIG_ARCH_MEDIATEK is not set
 # CONFIG_ARCH_MESON is not set
+# CONFIG_ARCH_MMP is not set
 # CONFIG_ARCH_QCOM is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_S5PV210 is not set
 # CONFIG_ARCH_SHMOBILE_MULTI is not set
 # CONFIG_ARCH_SIRF is not set
 # CONFIG_ARCH_SOCFPGA is not set
 # CONFIG_PLAT_SPEAR is not set
 # CONFIG_ARCH_STI is not set
+# CONFIG_ARCH_TANGO is not set
 # CONFIG_ARCH_U8500 is not set
 # CONFIG_ARCH_VEXPRESS_SPC is not set
 # CONFIG_ARCH_WM8850 is not set
@@ -165,8 +178,6 @@ CONFIG_RTC_DRV_PL030=y
 CONFIG_AMBA_PL08X=y
 CONFIG_SND_ARMAACI=m
 
-CONFIG_EDAC=y
-
 # highbank
 CONFIG_EDAC_HIGHBANK_MC=m
 CONFIG_EDAC_HIGHBANK_L2=m
@@ -183,6 +194,7 @@ CONFIG_MACH_SUN6I=y
 CONFIG_MACH_SUN7I=y
 CONFIG_MACH_SUN8I=y
 # CONFIG_MACH_SUN9I is not set
+# CONFIG_MACH_SUN50I is not set
 CONFIG_SUNXI_SRAM=y
 CONFIG_DMA_SUN4I=m
 CONFIG_DMA_SUN6I=m
@@ -218,12 +230,32 @@ CONFIG_MTD_NAND_SUNXI=m
 CONFIG_SERIO_SUN4I_PS2=m
 CONFIG_KEYBOARD_SUN4I_LRADC=m
 CONFIG_PWM_SUN4I=m
+CONFIG_CAN_SUN4I=m
 CONFIG_USB_MUSB_SUNXI=m
 CONFIG_CRYPTO_DEV_SUN4I_SS=m
 CONFIG_SND_SUN4I_CODEC=m
 CONFIG_SUNXI_RSB=m
 CONFIG_NVMEM_SUNXI_SID=m
 
+# BCM 283x
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_8250_BCM2835AUX=y
+CONFIG_DMA_BCM2835=m
+# CONFIG_MMC_SDHCI_BCM2835 is not set
+CONFIG_MMC_SDHCI_IPROC=m
+CONFIG_BCM2835_MBOX=m
+CONFIG_PWM_BCM2835=m
+CONFIG_HW_RANDOM_BCM2835=m
+CONFIG_I2C_BCM2835=m
+CONFIG_SPI_BCM2835=m
+CONFIG_SPI_BCM2835AUX=m
+CONFIG_BCM2835_WDT=m
+CONFIG_SND_BCM2835_SOC_I2S=m
+CONFIG_DRM_VC4=m
+CONFIG_RASPBERRYPI_FIRMWARE=y
+CONFIG_RASPBERRYPI_POWER=y
+
 # Exynos
 CONFIG_ARCH_EXYNOS3=y
 # CONFIG_ARCH_EXYNOS4 is not set
@@ -255,6 +287,7 @@ CONFIG_MMC_DW_EXYNOS=m
 # CONFIG_EXYNOS_IOMMU is not set
 CONFIG_PCI_EXYNOS=y
 CONFIG_PHY_EXYNOS5_USBDRD=m
+CONFIG_SAMSUNG_USBPHY=m
 CONFIG_PHY_SAMSUNG_USB2=m
 CONFIG_USB_EHCI_EXYNOS=m
 CONFIG_USB_OHCI_EXYNOS=m
@@ -294,9 +327,8 @@ CONFIG_DRM_EXYNOS_ROTATOR=y
 CONFIG_DRM_EXYNOS_VIDI=y
 CONFIG_DRM_EXYNOS_MIXER=y
 CONFIG_PHY_EXYNOS_DP_VIDEO=m
-# CONFIG_FB_S3C is not set
 CONFIG_PHY_EXYNOS_MIPI_VIDEO=m
-CONFIG_PHY_EXYNOS_DP_VIDEO=m
+# CONFIG_FB_S3C is not set
 CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=y
 CONFIG_VIDEO_EXYNOS_FIMC_LITE=m
 CONFIG_VIDEO_EXYNOS4_FIMC_IS=m
@@ -340,45 +372,15 @@ CONFIG_EXTCON_MAX8997=m
 # Tegra
 CONFIG_ARCH_TEGRA_114_SOC=y
 CONFIG_ARCH_TEGRA_124_SOC=y
-CONFIG_ARM_TEGRA_CPUFREQ=y
-CONFIG_TRUSTED_FOUNDATIONS=y
-CONFIG_SERIAL_TEGRA=y
-CONFIG_PCI_TEGRA=y
-CONFIG_AHCI_TEGRA=m
-CONFIG_TEGRA_IOMMU_SMMU=y
-CONFIG_MMC_SDHCI_TEGRA=m
-CONFIG_TEGRA_WATCHDOG=m
-CONFIG_I2C_TEGRA=m
-CONFIG_TEGRA_AHB=y
-CONFIG_TEGRA20_APB_DMA=y
-CONFIG_SPI_TEGRA114=m
-CONFIG_PWM_TEGRA=m
-CONFIG_KEYBOARD_TEGRA=m
-CONFIG_USB_EHCI_TEGRA=m
-CONFIG_RTC_DRV_TEGRA=m
 CONFIG_SND_SOC_TEGRA=m
-CONFIG_SND_SOC_TEGRA_MAX98090=m
-CONFIG_SND_SOC_TEGRA_RT5640=m
 CONFIG_SND_SOC_TEGRA30_AHUB=m
 CONFIG_SND_SOC_TEGRA30_I2S=m
+CONFIG_SND_SOC_TEGRA_MAX98090=m
+CONFIG_SND_SOC_TEGRA_RT5640=m
 CONFIG_SND_SOC_TEGRA_RT5677=m
-CONFIG_SND_HDA_TEGRA=m
-CONFIG_TEGRA_HOST1X=m
-CONFIG_TEGRA_HOST1X_FIREWALL=y
-CONFIG_DRM_TEGRA=m
-CONFIG_DRM_TEGRA_FBDEV=y
-# CONFIG_DRM_TEGRA_DEBUG is not set
-CONFIG_DRM_TEGRA_STAGING=y
-CONFIG_NOUVEAU_PLATFORM_DRIVER=y
 CONFIG_AD525X_DPOT=m
 CONFIG_AD525X_DPOT_I2C=m
 CONFIG_AD525X_DPOT_SPI=m
-CONFIG_TEGRA_SOCTHERM=m
-CONFIG_TEGRA_MC=y
-CONFIG_TEGRA124_EMC=y
-CONFIG_ARM_TEGRA_DEVFREQ=m
-# CONFIG_ARM_TEGRA20_CPUFREQ is not set
-CONFIG_ARM_TEGRA124_CPUFREQ=m
 
 # Jetson TK1
 CONFIG_PINCTRL_AS3722=y
@@ -453,11 +455,13 @@ CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_LD9040=m
 CONFIG_DRM_PANEL_S6E8AA0=m
 CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m
+CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m
 CONFIG_DRM_PANEL_LG_LG4573=m
 CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
+CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m
 CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
 CONFIG_DRM_DW_HDMI=m
-# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
+CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
 
 # regmap
 CONFIG_REGMAP_SPI=m
@@ -465,62 +469,10 @@ CONFIG_REGMAP_SPMI=m
 CONFIG_REGMAP_MMIO=m
 CONFIG_REGMAP_IRQ=y
 
-# usb
-# CONFIG_USB_OTG_BLACKLIST_HUB is not set
-CONFIG_USB_ULPI=y
+# usb net
 CONFIG_AX88796=m
 CONFIG_AX88796_93CX6=y
 
-# usb gadget 
-CONFIG_USB_OTG=y
-CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_VBUS_DRAW=100
-CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
-CONFIG_USB_MUSB_HDRC=m
-CONFIG_USB_MUSB_DUAL_ROLE=y
-CONFIG_USB_MUSB_DSPS=m
-# CONFIG_MUSB_PIO_ONLY is not set
-# CONFIG_USB_MUSB_TUSB6010 is not set
-# CONFIG_USB_MUSB_UX500 is not set
-CONFIG_USB_GPIO_VBUS=m
-CONFIG_USB_CONFIGFS=m
-CONFIG_USB_CONFIGFS_ACM=y
-CONFIG_USB_CONFIGFS_ECM=y
-CONFIG_USB_CONFIGFS_ECM_SUBSET=y
-CONFIG_USB_CONFIGFS_EEM=y
-CONFIG_USB_CONFIGFS_MASS_STORAGE=y
-CONFIG_USB_CONFIGFS_NCM=y
-CONFIG_USB_CONFIGFS_OBEX=y
-# CONFIG_USB_CONFIGFS_RNDIS is not set
-CONFIG_USB_CONFIGFS_SERIAL=y
-# CONFIG_USB_CONFIGFS_F_LB_SS is not set
-# CONFIG_USB_CONFIGFS_F_FS is not set
-# CONFIG_USB_CONFIGFS_F_UAC1 is not set
-# CONFIG_USB_CONFIGFS_F_UAC2 is not set
-# CONFIG_USB_CONFIGFS_F_MIDI is not set
-# CONFIG_USB_CONFIGFS_F_HID is not set
-# CONFIG_USB_CONFIGFS_F_UVC is not set
-# CONFIG_USB_CONFIGFS_F_PRINTER is not set
-
-# CONFIG_USB_GADGET_DEBUG is not set
-# CONFIG_USB_GADGET_DEBUG_FILES is not set
-# CONFIG_USB_GADGET_DEBUG_FS is not set
-# CONFIG_USB_FUSB300 is not set
-# CONFIG_USB_FOTG210_UDC is not set
-# CONFIG_USB_R8A66597 is not set
-# CONFIG_USB_PXA27X is not set
-# CONFIG_USB_MV_UDC is not set
-# CONFIG_USB_MV_U3D is not set
-# CONFIG_USB_BDC_UDC is not set
-# CONFIG_USB_M66592 is not set
-# CONFIG_USB_AMD5536UDC is not set
-# CONFIG_USB_NET2272 is not set
-# CONFIG_USB_NET2280 is not set
-# CONFIG_USB_GOKU is not set
-# CONFIG_USB_EG20T is not set
-# CONFIG_USB_DUMMY_HCD is not set
-# CONFIG_USB_ZERO_HNPTEST is not set
-
 # Multifunction Devices
 CONFIG_MFD_TPS65090=y
 CONFIG_MFD_TPS65910=y
@@ -552,6 +504,7 @@ CONFIG_MFD_TPS65912_SPI=y
 # CONFIG_PINCTRL_IPQ8064 is not set
 # CONFIG_PINCTRL_MSM8960 is not set
 # CONFIG_PINCTRL_MSM8660 is not set
+# CONFIG_PINCTRL_MSM8996 is not set
 
 # GPIO
 # CONFIG_GPIO_EM is not set
@@ -574,29 +527,6 @@ CONFIG_KEYBOARD_MATRIX=m
 # CONFIG_GPIO_RCAR is not set
 CONFIG_W1_MASTER_GPIO=m
 
-# SPI
-CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_GPIO=m
-CONFIG_SPI_SPIDEV=m
-CONFIG_SPI_ALTERA=m
-CONFIG_SPI_BITBANG=m
-CONFIG_SPI_BUTTERFLY=m
-CONFIG_SPI_DESIGNWARE=m
-CONFIG_SPI_LM70_LLP=m
-CONFIG_SPI_OC_TINY=m
-CONFIG_SPI_SC18IS602=m
-CONFIG_SPI_TLE62X0=m
-CONFIG_SPI_XCOMM=m
-# CONFIG_SPI_FSL_SPI is not set
-# CONFIG_SPI_CADENCE is not set
-# CONFIG_SPI_ZYNQMP_GQSPI is not set
-
-CONFIG_NFC_NCI_SPI=y
-
-# i2c
-CONFIG_I2C_MV64XXX=m
-
 # HW crypto and rng
 # CONFIG_CRYPTO_SHA1_ARM_CE is not set
 # CONFIG_CRYPTO_SHA2_ARM_CE is not set
@@ -628,6 +558,7 @@ CONFIG_MTD_NAND_PXA3xx=m
 CONFIG_MTD_NAND_RICOH=m
 CONFIG_MTD_NAND_TMIO=m
 # CONFIG_MTD_NAND_BRCMNAND is not set
+# CONFIG_MTD_MT81xx_NOR is not set
 CONFIG_MTD_SPI_NOR=m
 # CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
 CONFIG_MTD_SPINAND_MT29F=m
@@ -682,6 +613,8 @@ CONFIG_REGULATOR_MAX8660=m
 CONFIG_REGULATOR_MAX8952=m
 CONFIG_REGULATOR_MAX8973=m
 CONFIG_REGULATOR_PFUZE100=m
+CONFIG_REGULATOR_PV88060=m
+CONFIG_REGULATOR_PV88090=m
 CONFIG_REGULATOR_TPS51632=m
 CONFIG_REGULATOR_TPS62360=m
 CONFIG_REGULATOR_TPS65023=m
@@ -732,7 +665,6 @@ CONFIG_SENSORS_LM70=m
 CONFIG_SENSORS_MAX1111=m
 CONFIG_MPL115=m
 CONFIG_MPL3115=m
-CONFIG_DHT11=m
 CONFIG_SI7005=m
 CONFIG_SI7020=m
 
@@ -830,7 +762,6 @@ CONFIG_R8188EU=m
 # CONFIG_CAN_TI_HECC is not set
 # CONFIG_CAN_FLEXCAN is not set
 # CONFIG_CAN_RCAR is not set
-# CONFIG_CAN_MCP251X is not set
 
 # Needs work/investigation
 # CONFIG_ARM_KPROBES_TEST is not set
@@ -864,7 +795,6 @@ CONFIG_R8188EU=m
 # CONFIG_SERIAL_BCM63XX is not set
 # CONFIG_SERIAL_STM32 is not set
 # CONFIG_FB_XILINX is not set
-# CONFIG_USB_GADGET_XILINX is not set
 # CONFIG_BRCMSTB_GISB_ARB is not set
 # CONFIG_SUNGEM is not set
 # CONFIG_FB_SAVAGE is not set
@@ -896,18 +826,18 @@ CONFIG_R8188EU=m
 # CONFIG_SND_SOC_APQ8016_SBC is not set
 # CONFIG_SND_SOC_TAS571X is not set
 
+# CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set
+
+# Altera?
+# CONFIG_PCIE_ALTERA is not set
+
 # Debug options. We need to deal with them at some point like x86
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_PINCTRL is not set
 # CONFIG_DMADEVICES_VDEBUG is not set
 # CONFIG_DMADEVICES_DEBUG is not set
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
 # CONFIG_OMAP2_DSS_DEBUG is not set
 # CONFIG_CRYPTO_DEV_UX500_DEBUG is not set
 # CONFIG_AB8500_DEBUG is not set
 # CONFIG_ARM_KERNMEM_PERMS is not set
-
-# CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set
-
-# Altera?
-# CONFIG_PCIE_ALTERA is not set
+# CONFIG_DEBUG_LL is not set
diff --git a/config-armv7-lpae b/config-armv7-lpae
index 483c49960..2ecc010e5 100644
--- a/config-armv7-lpae
+++ b/config-armv7-lpae
@@ -71,7 +71,6 @@ CONFIG_GPIO_SYSCON=m
 # CONFIG_SPI_TEGRA20_SFLASH is not set
 # CONFIG_SPI_TEGRA20_SLINK is not set
 # CONFIG_MFD_MAX8907 is not set
-# CONFIG_MFD_NVEC is not set
 # CONFIG_SND_SOC_TEGRA_ALC5632 is not set
 # CONFIG_SND_SOC_TEGRA_TRIMSLICE is not set
 # CONFIG_SND_SOC_TEGRA_WM8753 is not set
@@ -80,4 +79,5 @@ CONFIG_GPIO_SYSCON=m
 # CONFIG_SND_SOC_TEGRA20_AC97 is not set
 # CONFIG_SND_SOC_TEGRA20_DAS is not set
 # CONFIG_SND_SOC_TEGRA20_SPDIF is not set
-# CONFIG_SND_SOC_TEGRA_RT5677 is not set
+# CONFIG_DRM_OMAP is not set
+# CONFIG_AM335X_PHY_USB is not set
diff --git a/config-debug b/config-debug
index d733183a2..fc6505b48 100644
--- a/config-debug
+++ b/config-debug
@@ -112,6 +112,8 @@ CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
 
+CONFIG_WQ_WATCHDOG=y
+
 CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
 
 CONFIG_DEBUG_KMEMLEAK=y
diff --git a/config-generic b/config-generic
index fa5645559..ccc53d89a 100644
--- a/config-generic
+++ b/config-generic
@@ -211,9 +211,9 @@ CONFIG_BINFMT_MISC=m
 
 # CONFIG_COMMON_CLK_SI5351 is not set
 # CONFIG_COMMON_CLK_CDCE706 is not set
+# CONFIG_COMMON_CLK_CS2000_CP is not set
 # CONFIG_COMMON_CLK_PWM is not set
 # CONFIG_COMMON_CLK_CDCE925 is not set
-# CONFIG_COMMON_CLK_HI6220 is not set
 # 
 
 #
@@ -249,6 +249,7 @@ CONFIG_REGMAP_I2C=m
 # CONFIG_SPI_XILINX is not set
 # CONFIG_SPI_DESIGNWARE is not set
 # CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_LOOPBACK_TEST is not set
 # CONFIG_SPI_TLE62X0 is not set
 # CONFIG_SPI_FSL_SPI is not set
 
@@ -384,6 +385,7 @@ CONFIG_BLK_DEV_LOOP_MIN_COUNT=0
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_NVME=m
+# CONFIG_BLK_DEV_NVME_SCSI is not set
 CONFIG_BLK_DEV_SKD=m # 64-bit only but easier to put here
 CONFIG_BLK_DEV_OSD=m
 CONFIG_BLK_DEV_RAM=m
@@ -547,6 +549,7 @@ CONFIG_SCSI_AM53C974=m
 # CONFIG_SCSI_EATA_PIO is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
 CONFIG_SCSI_GDTH=m
+# CONFIG_SCSI_HISI_SAS is not set
 CONFIG_SCSI_HPTIOP=m
 CONFIG_SCSI_IPS=m
 CONFIG_SCSI_INIA100=m
@@ -713,6 +716,7 @@ CONFIG_DM_MULTIPATH_ST=m
 CONFIG_DM_RAID=m
 CONFIG_DM_FLAKEY=m
 CONFIG_DM_VERITY=m
+CONFIG_DM_VERITY_FEC=y
 CONFIG_DM_SWITCH=m
 CONFIG_DM_LOG_WRITES=m
 
@@ -758,6 +762,8 @@ CONFIG_NETLINK_DIAG=m
 
 CONFIG_BPF_JIT=y
 
+CONFIG_INET_DIAG_DESTROY=y
+
 CONFIG_TCP_CONG_ADVANCED=y
 CONFIG_TCP_CONG_BIC=m
 CONFIG_TCP_CONG_CUBIC=y
@@ -1087,6 +1093,9 @@ CONFIG_NFT_REDIR_IPV4=m
 CONFIG_NFT_REDIR_IPV6=m
 CONFIG_NFT_REJECT=m
 CONFIG_NFT_COMPAT=m
+CONFIG_NF_DUP_NETDEV=m
+CONFIG_NFT_DUP_NETDEV=m
+CONFIG_NFT_FWD_NETDEV=m
 
 CONFIG_NF_TABLES_IPV4=m
 CONFIG_NF_DUP_IPV4=m
@@ -1495,6 +1504,7 @@ CONFIG_I40E=m
 CONFIG_I40E_VXLAN=y
 # CONFIG_I40E_DCB is not set
 # CONFIG_I40E_FCOE is not set
+CONFIG_I40E_GENEVE=y
 CONFIG_I40EVF=m
 CONFIG_FM10K=m
 # CONFIG_FM10K_VXLAN is not set
@@ -1524,6 +1534,10 @@ CONFIG_NET_VENDOR_NATSEMI=y
 CONFIG_NATSEMI=m
 CONFIG_NS83820=m
 
+CONFIG_NET_VENDOR_NETRONOME=y
+CONFIG_NFP_NETVF=m
+CONFIG_NFP_NET_DEBUG=n
+
 CONFIG_NET_VENDOR_8390=y
 CONFIG_PCMCIA_AXNET=m
 CONFIG_NE2K_PCI=m
@@ -1691,7 +1705,11 @@ CONFIG_MLX4_INFINIBAND=m
 CONFIG_MLX5_CORE=m
 CONFIG_MLX5_CORE_EN=y
 CONFIG_MLX5_INFINIBAND=m
-# CONFIG_MLXSW_CORE is not set
+CONFIG_MLXSW_CORE=m
+CONFIG_MLXSW_CORE_HWMON=y
+CONFIG_MLXSW_PCI=m
+CONFIG_MLXSW_SWITCHX2=m
+CONFIG_MLXSW_SPECTRUM=m
 # CONFIG_MLX4_DEBUG is not set
 # CONFIG_SFC is not set
 
@@ -1750,7 +1768,9 @@ CONFIG_MAC80211_DEBUGFS=y
 
 # CONFIG_WIMAX is not set
 
+# CONFIG_WLAN_VENDOR_ADMTEK is not set
 # CONFIG_ADM8211 is not set
+CONFIG_WLAN_VENDOR_ATH=y
 CONFIG_ATH_COMMON=m
 CONFIG_ATH_CARDS=m
 CONFIG_ATH5K=m
@@ -1769,6 +1789,7 @@ CONFIG_ATH9K_AHB=y
 CONFIG_ATH9K_DEBUGFS=y
 CONFIG_ATH9K_HTC=m
 CONFIG_ATH9K_BTCOEX_SUPPORT=y
+# CONFIG_ATH9K_HWRNG is not set
 # CONFIG_ATH9K_HTC_DEBUGFS is not set
 # CONFIG_ATH9K_STATION_STATISTICS is not set
 # CONFIG_ATH9K_WOW is not set
@@ -1790,9 +1811,13 @@ CONFIG_CARL9170=m
 CONFIG_CARL9170_LEDS=y
 # CONFIG_CARL9170_HWRNG is not set
 CONFIG_AT76C50X_USB=m
+# CONFIG_WLAN_VENDOR_CISCO is not set
 # CONFIG_AIRO is not set
 # CONFIG_AIRO_CS is not set
+# CONFIG_WLAN_VENDOR_ATMEL is not set
 # CONFIG_ATMEL is not set
+CONFIG_WLAN_VENDOR_INTERSIL=y
+CONFIG_WLAN_VENDOR_BROADCOM=y
 CONFIG_NET_VENDOR_BROADCOM=y
 CONFIG_B43=m
 CONFIG_B43_PCMCIA=y
@@ -1829,6 +1854,7 @@ CONFIG_PCMCIA_HERMES=m
 CONFIG_ORINOCO_USB=m
 # CONFIG_TMD_HERMES is not set
 # CONFIG_PCMCIA_SPECTRUM is not set
+CONFIG_WLAN_VENDOR_ST=y
 CONFIG_CW1200=m
 CONFIG_CW1200_WLAN_SDIO=m
 CONFIG_CW1200_WLAN_SPI=m
@@ -1838,6 +1864,7 @@ CONFIG_CW1200_WLAN_SPI=m
 # CONFIG_IPW2100_DEBUG is not set
 # CONFIG_IPW2200_DEBUG is not set
 # CONFIG_LIBIPW_DEBUG is not set
+CONFIG_WLAN_VENDOR_MARVELL=y
 CONFIG_LIBERTAS=m
 CONFIG_LIBERTAS_USB=m
 CONFIG_LIBERTAS_CS=m
@@ -1849,6 +1876,7 @@ CONFIG_LIBERTAS_MESH=y
 CONFIG_BNXT=m
 CONFIG_BNXT_SRIOV=y
 
+CONFIG_WLAN_VENDOR_INTEL=y
 CONFIG_IWLWIFI=m
 CONFIG_IWLDVM=m
 CONFIG_IWLMVM=m
@@ -1873,6 +1901,7 @@ CONFIG_P54_PCI=m
 CONFIG_MWL8K=m
 # CONFIG_PRISM54 is not set
 # CONFIG_PCMCIA_WL3501 is not set
+CONFIG_WLAN_VENDOR_RSI=y
 CONFIG_RSI_91X=m
 CONFIG_RSI_DEBUGFS=y
 CONFIG_RSI_SDIO=m
@@ -1881,7 +1910,9 @@ CONFIG_RT2X00=m
 CONFIG_RT2X00_LIB_DEBUGFS=y
 # CONFIG_RT2X00_DEBUG is not set
 CONFIG_WL_MEDIATEK=y
+CONFIG_WLAN_VENDOR_MEDIATEK=y
 CONFIG_MT7601U=m
+CONFIG_WLAN_VENDOR_RALINK=y
 CONFIG_RT2400PCI=m
 CONFIG_RT2500PCI=m
 CONFIG_RT61PCI=m
@@ -1901,6 +1932,7 @@ CONFIG_RT2800PCI_RT53XX=y
 CONFIG_RT73USB=m
 CONFIG_RTL8180=m
 CONFIG_RTL8187=m
+CONFIG_WLAN_VENDOR_ZYDAS=y
 # CONFIG_USB_ZD1201 is not set
 # CONFIG_USB_NET_SR9800 is not set
 CONFIG_USB_NET_RNDIS_WLAN=m
@@ -1912,13 +1944,19 @@ CONFIG_USB_NET_CH9200=m
 CONFIG_ZD1211RW=m
 # CONFIG_ZD1211RW_DEBUG is not set
 
+CONFIG_WLAN_VENDOR_TI=y
+CONFIG_WILINK_PLATFORM_DATA=y
+CONFIG_WLCORE=m
+CONFIG_WLCORE_SDIO=m
+CONFIG_WLCORE_SPI=m
 CONFIG_WL12XX=m
-
 CONFIG_WL1251=m
-CONFIG_WL1251_SPI=m
 CONFIG_WL1251_SDIO=m
+CONFIG_WL1251_SPI=m
+CONFIG_WL18XX=m
 
 CONFIG_RTL_CARDS=m
+CONFIG_WLAN_VENDOR_REALTEK=y
 CONFIG_RTLWIFI=m
 CONFIG_RTL8192CE=m
 CONFIG_RTL8192SE=m
@@ -1930,7 +1968,7 @@ CONFIG_RTL8723BE=m
 CONFIG_RTL8188EE=m
 CONFIG_RTL8821AE=m
 CONFIG_RTL8XXXU=m
-# Untested is intentionally disabled in stable branches
+# NOTE! This should be disabled when branching to stable
 # CONFIG_RTL8XXXU_UNTESTED is not set
 
 CONFIG_MWIFIEX=m
@@ -1947,6 +1985,7 @@ CONFIG_IEEE802154_ATUSB=m
 CONFIG_IEEE802154_CC2520=m
 CONFIG_IEEE802154_AT86RF230=m
 # CONFIG_IEEE802154_AT86RF230_DEBUGFS is not set
+# CONFIG_IEEE802154_ADF7242 is not set
 # CONFIG_IEEE802154_MRF24J40 is not set
 # CONFIG_IEEE802154_NL802154_EXPERIMENTAL is not set
 
@@ -1966,7 +2005,13 @@ CONFIG_6LOWPAN_NHC_IPV6=m
 CONFIG_6LOWPAN_NHC_MOBILITY=m
 CONFIG_6LOWPAN_NHC_ROUTING=m
 CONFIG_6LOWPAN_NHC_UDP=m
-
+CONFIG_6LOWPAN_DEBUGFS=y
+CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
+CONFIG_6LOWPAN_GHC_UDP=m
+CONFIG_6LOWPAN_GHC_ICMPV6=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
 
 #
 # Token Ring devices
@@ -2017,6 +2062,7 @@ CONFIG_CAN_PEAK_PCIEC=y
 CONFIG_CAN_PEAK_USB=m
 CONFIG_CAN_KVASER_PCI=m
 CONFIG_CAN_KVASER_USB=m
+# CONFIG_CAN_MCP251X is not set
 CONFIG_CAN_PLX_PCI=m
 # CONFIG_CAN_TSCAN1 is not set
 CONFIG_CAN_C_CAN=m
@@ -2031,7 +2077,6 @@ CONFIG_CAN_GS_USB=m
 CONFIG_CAN_8DEV_USB=m
 CONFIG_CAN_SOFTING=m
 # CONFIG_CAN_SOFTING_CS is not set
-CONFIG_CAN_SUN4I=m
 
 CONFIG_NETROM=m
 CONFIG_ROSE=m
@@ -2067,12 +2112,15 @@ CONFIG_NFC_ST21NFCA=m
 CONFIG_NFC_ST21NFCA_I2C=m
 # CONFIG_NFC_ST21NFCB is not set
 # CONFIG_NFC_ST21NFCB_I2C is not set
+# CONFIG_NFC_ST95HF is not set
 CONFIG_NFC_NXP_NCI=m
 CONFIG_NFC_NXP_NCI_I2C=m
 # CONFIG_NFC_NCI_SPI is not set
 # CONFIG_NFC_NCI_UART is not set
 # CONFIG_NFC_ST_NCI is not set
+# CONFIG_NFC_ST_NCI_I2C is not set
 # CONFIG_NFC_S3FWRN5_I2C is not set
+# CONFIG_NFC_ST_NCI_SPI is not set
 # CONFIG_NFC_FDP is not set
 # CONFIG_NFC_MRVL_I2C is not set
 # CONFIG_NFC_MRVL_SPI is not set
@@ -2443,6 +2491,7 @@ CONFIG_TOUCHSCREEN_DYNAPRO=m
 CONFIG_TOUCHSCREEN_EDT_FT5X06=m
 CONFIG_TOUCHSCREEN_EETI=m
 CONFIG_TOUCHSCREEN_EGALAX=m
+CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m
 CONFIG_TOUCHSCREEN_ELAN=m
 CONFIG_TOUCHSCREEN_ELO=m
 CONFIG_TOUCHSCREEN_FUJITSU=m
@@ -2457,6 +2506,7 @@ CONFIG_TOUCHSCREEN_MK712=m
 CONFIG_TOUCHSCREEN_PENMOUNT=m
 # CONFIG_TOUCHSCREEN_SUR40 is not set
 # CONFIG_TOUCHSCREEN_TPS6507X is not set
+CONFIG_TOUCHSCREEN_TS4800=m
 CONFIG_TOUCHSCREEN_TSC_SERIO=m
 CONFIG_TOUCHSCREEN_TSC2007=m
 CONFIG_TOUCHSCREEN_TOUCHIT213=m
@@ -2837,6 +2887,7 @@ CONFIG_SENSORS_MAX16064=m
 CONFIG_SENSORS_MAX20751=m
 CONFIG_SENSORS_LM25066=m
 CONFIG_SENSORS_LTC2978=m
+CONFIG_SENSORS_LTC3815=m
 CONFIG_SENSORS_MAX34440=m
 CONFIG_SENSORS_MAX8688=m
 CONFIG_SENSORS_MAX1668=m
@@ -2853,10 +2904,13 @@ CONFIG_IIO_BUFFER_CB=y
 # CONFIG_IIO_KFIFO_BUF is not set
 CONFIG_IIO_TRIGGERED_BUFFER=m
 CONFIG_IIO_TRIGGER=y
+CONFIG_IIO_SW_TRIGGER=y
 CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 CONFIG_IIO_INTERRUPT_TRIGGER=m
 CONFIG_HID_SENSOR_IIO_COMMON=m
 CONFIG_HID_SENSOR_IIO_TRIGGER=m
+CONFIG_IIO_CONFIGFS=m
+# CONFIG_IIO_HRTIMER_TRIGGER is not set
 # CONFIG_IIO_SYSFS_TRIGGER is not set
 # CONFIG_IIO_SSP_SENSORHUB is not set
 # CONFIG_AD5446 is not set
@@ -2884,6 +2938,7 @@ CONFIG_STK3310=m
 # CONFIG_TSL4531 is not set
 # CONFIG_NAU7802 is not set
 # CONFIG_TI_ADC081C is not set
+# CONFIG_TI_ADS8688 is not set
 # CONFIG_TI_ADC128S052 is not set
 # CONFIG_VIPERBOARD_ADC is not set
 # CONFIG_VF610_ADC is not set
@@ -2909,9 +2964,11 @@ CONFIG_ACPI_ALS=m
 # CONFIG_HID_SENSOR_PRESS is not set
 # CONFIG_IIO_ST_PRESS is not set
 # CONFIG_KXSD9 is not set
+# CONFIG_MMA7455_I2C is not set
 # CONFIG_MMA8452 is not set
 # CONFIG_MMA9551 is not set
 # CONFIG_MMA9553 is not set
+# CONFIG_MXC6255 is not set
 # CONFIG_STK8312 is not set
 # CONFIG_STK8BA50 is not set
 # CONFIG_AD7266 is not set
@@ -2946,7 +3003,7 @@ CONFIG_ACPI_ALS=m
 # CONFIG_BMG160 is not set
 # CONFIG_ADIS16400 is not set
 # CONFIG_ADIS16480 is not set
-# CONFIG_DHT11 is not set
+CONFIG_DHT11=m
 # CONFIG_MPL3115 is not set
 # CONFIG_MS5611 is not set
 # CONFIG_MPL115 is not set
@@ -2958,6 +3015,7 @@ CONFIG_KXCJK1013=m
 # CONFIG_ISL29125 is not set
 # CONFIG_JSA1212 is not set
 CONFIG_RPR0521=m
+CONFIG_MAX30100=m
 CONFIG_OPT3001=m
 CONFIG_PA12203001=m
 # CONFIG_TCS3414 is not set
@@ -2966,6 +3024,8 @@ CONFIG_PA12203001=m
 # CONFIG_MCP4922 is not set
 # CONFIG_MAX1027 is not set
 # CONFIG_MXC4005 is not set
+# CONFIG_IAQCORE is not set
+# CONFIG_INA2XX_ADC is not set
 # CONFIG_VZ89X is not set
 # CONFIG_HDC100X is not set
 # CONFIG_HTU21 is not set
@@ -2977,6 +3037,7 @@ CONFIG_PA12203001=m
 # CONFIG_TSYS01 is not set
 # CONFIG_TSYS02D is not set
 # CONFIG_HI8435 is not set
+# CONFIG_IMX7D_ADC is not set
 
 # staging IIO drivers
 # CONFIG_AD7291 is not set
@@ -3027,6 +3088,7 @@ CONFIG_PA12203001=m
 # CONFIG_SRAM is not set
 # CONFIG_TI_DAC7512 is not set
 # CONFIG_BMP085_SPI is not set
+# CONFIG_MMA7455_SPI is not set
 # CONFIG_LATTICE_ECP3_CONFIG is not set
 
 CONFIG_W1=m
@@ -3072,6 +3134,7 @@ CONFIG_IPMI_POWEROFF=m
 #
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_CORE=y
+CONFIG_WATCHDOG_SYSFS=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 CONFIG_SOFT_WATCHDOG=m
 CONFIG_WDTPCI=m
@@ -3103,6 +3166,7 @@ CONFIG_W83977F_WDT=m
 CONFIG_PCIPCWATCHDOG=m
 CONFIG_USBPCWATCHDOG=m
 # CONFIG_SBC_EPX_C3_WATCHDOG is not set
+# CONFIG_TS4800_WATCHDOG is not set
 CONFIG_WM8350_WATCHDOG=m
 CONFIG_WM831X_WATCHDOG=m
 # CONFIG_MAX63XX_WATCHDOG is not set
@@ -3112,6 +3176,7 @@ CONFIG_WM831X_WATCHDOG=m
 # CONFIG_XILINX_WATCHDOG is not set
 # CONFIG_CADENCE_WATCHDOG is not set
 # CONFIG_BCM7038_WDT is not set
+# CONFIG_ZIIRAVE_WATCHDOG is not set
 
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_TIMERIOMEM=m
@@ -3162,6 +3227,7 @@ CONFIG_RTC_DRV_V3020=m
 CONFIG_RTC_DRV_DS2404=m
 CONFIG_RTC_DRV_STK17TA8=m
 # CONFIG_RTC_DRV_S35390A is not set
+CONFIG_RTC_DRV_RX8010=m
 CONFIG_RTC_DRV_RX8581=m
 CONFIG_RTC_DRV_RX8025=m
 CONFIG_RTC_DRV_DS1286=m
@@ -3236,6 +3302,7 @@ CONFIG_DRM_RADEON_USERPTR=y
 CONFIG_DRM_AMDGPU=m
 # CONFIG_DRM_AMDGPU_CIK is not set
 CONFIG_DRM_AMDGPU_USERPTR=y
+CONFIG_DRM_AMD_POWERPLAY=y
 # CONFIG_DRM_I810 is not set
 # CONFIG_DRM_MGA is not set
 CONFIG_DRM_MGAG200=m  # do not enable on f17 or older
@@ -3343,6 +3410,10 @@ CONFIG_VIDEO_CX231XX=m
 CONFIG_VIDEO_CX231XX_ALSA=m
 CONFIG_VIDEO_CX231XX_DVB=m
 CONFIG_VIDEO_CX231XX_RC=y
+CONFIG_VIDEO_GO7007=m
+CONFIG_VIDEO_GO7007_USB=m
+CONFIG_VIDEO_GO7007_LOADER=m
+CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m
 CONFIG_VIDEO_HEXIUM_ORION=m
 CONFIG_VIDEO_HEXIUM_GEMINI=m
 CONFIG_VIDEO_IVTV=m
@@ -3355,6 +3426,7 @@ CONFIG_VIDEO_SAA6588=m
 CONFIG_VIDEO_SAA7134=m
 CONFIG_VIDEO_SAA7134_ALSA=m
 CONFIG_VIDEO_SAA7134_DVB=m
+CONFIG_VIDEO_SAA7134_GO7007=m
 CONFIG_VIDEO_SAA7134_RC=y
 CONFIG_VIDEO_SOLO6X10=m
 CONFIG_VIDEO_USBVISION=m
@@ -4172,6 +4244,7 @@ CONFIG_USB_SERIAL_KLSI=m
 CONFIG_USB_SERIAL_KOBIL_SCT=m
 CONFIG_USB_SERIAL_MCT_U232=m
 # CONFIG_USB_SERIAL_METRO is not set
+CONFIG_USB_SERIAL_MXUPORT11=m
 CONFIG_USB_SERIAL_MOS7720=m
 CONFIG_USB_SERIAL_MOS7715_PARPORT=y
 # CONFIG_USB_SERIAL_WISHBONE is not set
@@ -4224,7 +4297,6 @@ CONFIG_USB_ULPI_BUS=m
 # CONFIG_PHY_PXA_28NM_HSIC is not set
 # CONFIG_PHY_PXA_28NM_USB2 is not set
 # CONFIG_PHY_TUSB1210 is not set
-# CONFIG_AM335X_PHY_USB is not set
 # CONFIG_SAMSUNG_USBPHY is not set
 # CONFIG_BCM_KONA_USB2_PHY is not set
 # CONFIG_USB_RCAR_PHY is not set
@@ -4236,6 +4308,7 @@ CONFIG_USB_EMI26=m
 CONFIG_USB_FTDI_ELAN=m
 # CONFIG_USB_GADGET is not set
 # CONFIG_USB_DWC3 is not set
+# CONFIG_USB_DWC3_OF_SIMPLE is not set
 # CONFIG_USB_GADGETFS is not set
 # CONFIG_USB_OXU210HP_HCD is not set
 CONFIG_USB_IOWARRIOR=m
@@ -4267,7 +4340,7 @@ CONFIG_USB_STKWEBCAM=m
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_EHSET_TEST_FIXTURE is not set
 CONFIG_USB_TRANCEVIBRATOR=m
-CONFIG_USB_U132_HCD=m
+# CONFIG_USB_U132_HCD is not set
 CONFIG_USB_UEAGLEATM=m
 CONFIG_USB_XUSBATM=m
 
@@ -4371,6 +4444,7 @@ CONFIG_MFD_VIPERBOARD=m
 # CONFIG_EZX_PCAP is not set
 # CONFIG_INTEL_SOC_PMIC is not set
 # CONFIG_MFD_ATMEL_FLEXCOM is not set
+# CONFIG_TS4800_IRQ is not set
 
 #
 # File systems
@@ -4411,6 +4485,7 @@ CONFIG_QUOTA_NETLINK_INTERFACE=y
 # CONFIG_QFMT_V1 is not set
 CONFIG_QFMT_V2=y
 CONFIG_QUOTACTL=y
+# CONFIG_MANDATORY_FILE_LOCKING is not set
 CONFIG_DNOTIFY=y
 # Autofsv3 is obsolete.
 # systemd is dependant upon AUTOFS, so build it in.
@@ -4728,6 +4803,8 @@ CONFIG_HEADERS_CHECK=y
 # This breaks booting until the module patches are in-tree
 # CONFIG_DEBUG_KOBJECT_RELEASE is not set
 #
+# This just changes a default enable with workqueue.debug_force_rr_cpu
+# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
 #
 # These debug options are deliberatly left on (even in 'make release' kernels).
 # They aren't that much of a performance impact, and the value
@@ -4745,6 +4822,7 @@ CONFIG_DEBUG_BOOT_PARAMS=y
 CONFIG_DEBUG_VM=y
 # CONFIG_DEBUG_VM_VMACACHE is not set
 # CONFIG_DEBUG_VM_RB is not set # revisit this if performance isn't horrible
+CONFIG_DEBUG_VM_PGFLAGS=y
 # CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
 CONFIG_LOCKUP_DETECTOR=y
 # CONFIG_DEBUG_INFO_REDUCED is not set
@@ -4776,6 +4854,10 @@ CONFIG_KGDB_LOW_LEVEL_TRAP=y
 # CONFIG_KGDB_TESTS_ON_BOOT is not set
 # CONFIG_GDB_SCRIPTS is not set
 
+# CONFIG_UBSAN is not set
+# CONFIG_UBSAN_ALIGNMENT is not set
+# CONFIG_UBSAN_SANITIZE_ALL is not set
+
 
 #
 # Security options
@@ -4805,6 +4887,7 @@ CONFIG_AUDITSYSCALL=y
 
 CONFIG_SECCOMP=y
 CONFIG_STRICT_DEVMEM=y
+CONFIG_IO_STRICT_DEVMEM=y
 
 
 #
@@ -5121,6 +5204,9 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
 # CONFIG_SND_SOC_CS42XX8_I2C is not set
 # CONFIG_SND_SOC_PCM1681 is not set
 # CONFIG_SND_SOC_PCM1792A is not set
+# CONFIG_SND_SOC_PCM179X is not set
+# CONFIG_SND_SOC_PCM3168A_I2C is not set
+# CONFIG_SND_SOC_PCM3168A_SPI is not set
 # CONFIG_SND_SOC_PCM512x_I2C is not set
 # CONFIG_SND_SOC_PCM512x_SPI is not set
 # CONFIG_SND_SOC_QCOM is not set
@@ -5145,6 +5231,7 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
 # CONFIG_SND_SOC_WM8804_SPI is not set
 # CONFIG_SND_SOC_WM8903 is not set
 # CONFIG_SND_SOC_WM8962 is not set
+# CONFIG_SND_SOC_WM8974 is not set
 # CONFIG_SND_SOC_TPA6130A2 is not set
 # CONFIG_SND_SOC_FSL_ASRC is not set
 # CONFIG_SND_SOC_FSL_ESAI is not set
@@ -5182,7 +5269,9 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
 # CONFIG_SND_SOC_CS4349 is not set
 # CONFIG_SND_SOC_GTM601 is not set
 # CONFIG_SND_SOC_STI_SAS is not set
-# 
+# CONFIG_SND_SOC_INNO_RK3036 is not set
+# CONFIG_SND_SOC_IMG is not set
+CONFIG_SND_SOC_AMD_ACP=m
 
 CONFIG_BALLOON_COMPACTION=y
 CONFIG_COMPACTION=y
@@ -5396,7 +5485,8 @@ CONFIG_INPUT_GP2A=m
 
 # CONFIG_INTEL_MENLOW is not set
 CONFIG_ENCLOSURE_SERVICES=m
-CONFIG_IPWIRELESS=m
+# Disable temporarily while I (pbr) work out why this filters properly when build with rpmbuild but not in koji
+# CONFIG_IPWIRELESS is not set
 
 CONFIG_MEMSTICK=m
 # CONFIG_MEMSTICK_DEBUG is not set
@@ -5473,7 +5563,6 @@ CONFIG_STAGING_MEDIA=y
 # CONFIG_VIDEO_DT3155 is not set
 # CONFIG_TI_ST is not set
 # CONFIG_FB_XGI is not set
-# CONFIG_VIDEO_GO7007 is not set
 # CONFIG_I2C_BCM2048 is not set
 # CONFIG_DT3155 is not set
 # CONFIG_PRISM2_USB is not set
@@ -5531,6 +5620,8 @@ CONFIG_USBIP_HOST=m
 # CONFIG_FB_SM750 is not set
 # CONFIG_STAGING_RDMA is not set
 # CONFIG_WILC1000_DRIVER is not set
+# CONFIG_WILC1000_SDIO is not set
+# CONFIG_WILC1000_SPI is not set
 # END OF STAGING
 
 #
@@ -5762,11 +5853,22 @@ CONFIG_POWERCAP=y
 
 # CONFIG_CPUFREQ_DT is not set
 
-# CONFIG_MODULE_SIG is not set
+CONFIG_MODULE_SIG=y
+CONFIG_MODULE_SIG_ALL=y
+# CONFIG_MODULE_SIG_SHA1 is not set
+CONFIG_MODULE_SIG_SHA256=y
+# CONFIG_MODULE_SIG_FORCE is not set
+CONFIG_MODULE_SIG_KEY="certs/signing_key.pem"
+CONFIG_SYSTEM_TRUSTED_KEYS=""
+CONFIG_PKCS7_MESSAGE_PARSER=y
+# CONFIG_PKCS7_TEST_KEY is not set
+CONFIG_SIGNED_PE_FILE_VERIFICATION=y
+CONFIG_SYSTEM_TRUSTED_KEYRING=y
+CONFIG_SYSTEM_BLACKLIST_KEYRING=y
+# CONFIG_MODULE_SIG_UEFI is not set
+# CONFIG_EFI_SIGNATURE_LIST_PARSER is not set
 # FIXME: Revisit this to see if we can use it instead of the spec file stuff
 # CONFIG_MODULE_COMPRESS is not set
-# CONFIG_SYSTEM_TRUSTED_KEYRING is not set
-# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set
 
 # CONFIG_RTC_DRV_EFI is not set
 # CONFIG_NET_XGENE is not set
diff --git a/config-nodebug b/config-nodebug
index 65e8accd1..c173637a2 100644
--- a/config-nodebug
+++ b/config-nodebug
@@ -112,6 +112,7 @@ CONFIG_KDB_CONTINUE_CATASTROPHIC=0
 # CONFIG_DETECT_HUNG_TASK is not set
 CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+# CONFIG_WQ_WATCHDOG is not set
 
 # CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set
 
diff --git a/config-powerpc64-generic b/config-powerpc64-generic
index b543cfbb6..ffc765a13 100644
--- a/config-powerpc64-generic
+++ b/config-powerpc64-generic
@@ -60,6 +60,7 @@ CONFIG_MEMORY_HOTREMOVE=y
 CONFIG_PPC64_SUPPORTS_MEMORY_FAILURE=y
 
 CONFIG_CGROUP_HUGETLB=y
+CONFIG_MEM_SOFT_DIRTY=y
 
 CONFIG_RCU_FANOUT=64
 CONFIG_RCU_FANOUT_LEAF=16
@@ -74,14 +75,13 @@ CONFIG_PSERIES_CPUIDLE=y
 
 CONFIG_HW_RANDOM_PSERIES=m
 CONFIG_CRYPTO_DEV_NX=y
-CONFIG_CRYPTO_842=m
 CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
 CONFIG_CRYPTO_DEV_NX_COMPRESS=m
 CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m
 CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m
 CONFIG_CRYPTO_DEV_NX_COMPRESS_CRYPTO=m
 CONFIG_CRYPTO_DEV_VMX=y
-# CONFIG_CRYPTO_DEV_VMX_ENCRYPT is not set
+CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m
 
 CONFIG_XZ_DEC_POWERPC=y
 
@@ -352,6 +352,7 @@ CONFIG_I2C_MPC=m
 # CONFIG_IBM_EMAC is not set
 # CONFIG_NET_VENDOR_PASEMI is not set
 # CONFIG_NET_VENDOR_TOSHIBA is not set
+CONFIG_IBMVNIC=m
 
 CONFIG_MDIO_OCTEON=m
 
diff --git a/config-s390x b/config-s390x
index a41d95ac4..6188d09fb 100644
--- a/config-s390x
+++ b/config-s390x
@@ -65,6 +65,7 @@ CONFIG_SCLP_VT220_CONSOLE=y
 CONFIG_SCLP_CPI=m
 CONFIG_SCLP_ASYNC=m
 CONFIG_SCLP_ASYNC_ID="000000000"
+CONFIG_SCLP_OFB=y
 CONFIG_S390_TAPE=m
 CONFIG_S390_TAPE_3590=m
 
diff --git a/config-x86-32-generic b/config-x86-32-generic
index 865fb9004..04100f267 100644
--- a/config-x86-32-generic
+++ b/config-x86-32-generic
@@ -40,6 +40,7 @@ CONFIG_HIGHMEM4G=y
 # CONFIG_HIGHMEM64G is not set
 CONFIG_HIGHMEM=y
 CONFIG_HIGHPTE=y
+CONFIG_ZONE_DMA=y
 
 # CONFIG_MATH_EMULATION is not set
 
@@ -219,4 +220,5 @@ CONFIG_OF=y
 # CONFIG_COMMON_CLK_SI570 is not set
 # CONFIG_COMMON_CLK_QCOM is not set
 # CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
+# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
 # CONFIG_KEYBOARD_BCM is not set
diff --git a/config-x86-generic b/config-x86-generic
index 646378bb7..47060b9de 100644
--- a/config-x86-generic
+++ b/config-x86-generic
@@ -72,7 +72,6 @@ CONFIG_MMIOTRACE=y
 # CONFIG_MMIOTRACE_TEST is not set
 # CONFIG_DEBUG_PER_CPU_MAPS is not set
 CONFIG_DEBUG_RODATA=y
-# Generating too many warnings while waiting for fixes
 # CONFIG_DEBUG_WX is not set
 CONFIG_DEBUG_STACKOVERFLOW=y
 
@@ -139,11 +138,16 @@ CONFIG_CRYPTO_DEV_CCP_DD=m
 CONFIG_CRYPTO_DEV_CCP_CRYPTO=m
 CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
 CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
+CONFIG_CRYPTO_DEV_QAT_C3XXX=m
+CONFIG_CRYPTO_DEV_QAT_C62X=m
+CONFIG_CRYPTO_DEV_QAT_C3XXXVF=m
+CONFIG_CRYPTO_DEV_QAT_C62XVF=m
 
 CONFIG_GENERIC_ISA_DMA=y
 
 CONFIG_PCI_MMCONFIG=y
 CONFIG_PCI_BIOS=y
+CONFIG_VMD=m
 
 CONFIG_HOTPLUG_PCI_COMPAQ=m
 # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
@@ -176,6 +180,7 @@ CONFIG_I2C_VIA=m
 CONFIG_I2C_VIAPRO=m
 CONFIG_I2C_DESIGNWARE_CORE=m
 CONFIG_I2C_DESIGNWARE_PLATFORM=m
+CONFIG_I2C_DESIGNWARE_BAYTRAIL=y
 
 #rhbz 997149
 # CONFIG_DELL_RBU is not set
@@ -222,6 +227,7 @@ CONFIG_X86_PLATFORM_DEVICES=y
 
 CONFIG_AMILO_RFKILL=m
 CONFIG_ASUS_LAPTOP=m
+CONFIG_ASUS_WIRELESS=m
 CONFIG_COMPAL_LAPTOP=m
 CONFIG_DELL_LAPTOP=m
 CONFIG_DELL_RBTN=m
@@ -232,6 +238,7 @@ CONFIG_FUJITSU_TABLET=m
 CONFIG_FUJITSU_LAPTOP=m
 # CONFIG_FUJITSU_LAPTOP_DEBUG is not set
 CONFIG_IDEAPAD_LAPTOP=m
+CONFIG_INTEL_HID_EVENT=m
 CONFIG_MSI_LAPTOP=m
 CONFIG_PANASONIC_LAPTOP=m
 CONFIG_SAMSUNG_LAPTOP=m
@@ -319,11 +326,11 @@ CONFIG_XEN_SYMS=y
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 CONFIG_SPI_PXA2XX=m
-# CONFIG_CAN_MCP251X is not set
 # CONFIG_SPI_CADENCE is not set
 # CONFIG_SPI_ZYNQMP_GQSPI is not set
 # CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
 # CONFIG_DRM_PANEL_LG_LG4573 is not set
+# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
 
 CONFIG_MTD_ESB2ROM=m
 CONFIG_MTD_CK804XROM=m
@@ -413,6 +420,7 @@ CONFIG_LPC_ICH=m
 CONFIG_GPIO_ICH=m
 # CONFIG_GPIO_LYNXPOINT is not set
 # CONFIG_GPIO_F7188X is not set
+# CONFIG_GPIO_104_IDI_48 is not set
 
 # These should all go away with IC2_ACPI is fixed
 # CONFIG_MFD_AS3711 is not set
@@ -474,6 +482,7 @@ CONFIG_CRYPTO_CRC32_PCLMUL=m
 CONFIG_HP_ACCEL=m
 
 CONFIG_SURFACE_PRO3_BUTTON=m
+CONFIG_INTEL_PUNIT_IPC=m
 
 # CONFIG_RAPIDIO is not set
 
@@ -519,6 +528,7 @@ CONFIG_X86_INTEL_LPSS=y
 CONFIG_IDMA64=m
 
 # CONFIG_X86_AMD_PLATFORM_DEVICE is not set
+# CONFIG_X86_INTEL_MID is not set
 # CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set
 
 CONFIG_MFD_INTEL_LPSS_ACPI=m
@@ -545,12 +555,15 @@ CONFIG_SND_SOC_INTEL_HASWELL_MACH=m
 CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m
 CONFIG_SND_SOC_INTEL_BAYTRAIL=m
 CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH=m
+CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m
 CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH=m
 CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m
 CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m
 CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m
 CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m
 CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m
+CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m
+CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m
 CONFIG_SND_SOC_AC97_CODEC=m
 # CONFIG_SND_SOC_TAS571X is not set
 # CONFIG_SND_SUN4I_CODEC is not set
@@ -569,18 +582,7 @@ CONFIG_MOUSE_PS2_VMMOUSE=y
 CONFIG_XZ_DEC_X86=y
 
 CONFIG_MPILIB=y
-CONFIG_PKCS7_MESSAGE_PARSER=y
-# CONFIG_PKCS7_TEST_KEY is not set
-CONFIG_SIGNED_PE_FILE_VERIFICATION=y
-CONFIG_SYSTEM_TRUSTED_KEYRING=y
-CONFIG_SYSTEM_BLACKLIST_KEYRING=y
-CONFIG_MODULE_SIG=y
-CONFIG_MODULE_SIG_ALL=y
-# CONFIG_MODULE_SIG_SHA1 is not set
-CONFIG_MODULE_SIG_SHA256=y
-# CONFIG_MODULE_SIG_FORCE is not set
-CONFIG_MODULE_SIG_KEY="certs/signing_key.pem"
-CONFIG_SYSTEM_TRUSTED_KEYS=""
+
 CONFIG_EFI_SECURE_BOOT_SIG_ENFORCE=y
 CONFIG_EFI_SIGNATURE_LIST_PARSER=y
 
diff --git a/config-x86_64-generic b/config-x86_64-generic
index 9d13391fc..5d0f7b2b2 100644
--- a/config-x86_64-generic
+++ b/config-x86_64-generic
@@ -113,7 +113,7 @@ CONFIG_SPARSEMEM_VMEMMAP=y
 # CONFIG_MOVABLE_NODE is not set
 CONFIG_MEMORY_HOTPLUG=y
 # CONFIG_ARCH_MEMORY_PROBE is not set
-# CONFIG_MEMORY_HOTREMOVE is not set
+CONFIG_MEMORY_HOTREMOVE=y
 # CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set 
 
 # CONFIG_BLK_DEV_CMD640 is not set
@@ -176,8 +176,10 @@ CONFIG_THUNDERBOLT=m
 
 CONFIG_NTB=m
 CONFIG_NTB_NETDEV=m
+CONFIG_NTB_AMD=m
 CONFIG_NTB_INTEL=m
 CONFIG_NTB_PINGPONG=m
+CONFIG_NTB_PERF=m
 CONFIG_NTB_TOOL=m
 CONFIG_NTB_TRANSPORT=m
 
@@ -212,3 +214,23 @@ CONFIG_CMA=y
 # CONFIG_CMA_DEBUG is not set
 # CONFIG_CMA_DEBUGFS is not set
 CONFIG_CMA_AREAS=7
+
+# Changes for persistent memory devices
+# ZONE_DMA and ZONE_DEVICE can now co-exist
+CONFIG_ZONE_DMA=y
+CONFIG_ZONE_DEVICE=y
+CONFIG_NVDIMM_PFN=y
+CONFIG_ND_PFN=m
+
+# Staging
+CONFIG_STAGING_RDMA=y
+# CONFIG_INFINIBAND_AMSO1100 is not set
+# CONFIG_INFINIBAND_EHCA is not set
+CONFIG_INFINIBAND_HFI1=m
+# CONFIG_HFI1_DEBUG_SDMA_ORDER is not set
+CONFIG_HFI1_VERBS_31BIT_PSN=y
+# CONFIG_SDMA_VERBOSITY is not set
+# CONFIG_PRESCAN_RXQ is not set
+
+# Temporary workaround until SND_SOC_INTEL_HASWELL_MACH no longer requires builtin
+CONFIG_DW_DMAC=y
diff --git a/disable-CONFIG_EXPERT-for-ZONE_DMA.patch b/disable-CONFIG_EXPERT-for-ZONE_DMA.patch
new file mode 100644
index 000000000..9cc0525f4
--- /dev/null
+++ b/disable-CONFIG_EXPERT-for-ZONE_DMA.patch
@@ -0,0 +1,43 @@
+From 888ba9b2a02e8d144c3a9ae5e01a1a94280cd2bf Mon Sep 17 00:00:00 2001
+From: Fedora Kernel Team <kernel-team@fedoraproject.org>
+Date: Fri, 22 Jan 2016 13:03:36 -0600
+Subject: [PATCH] Make ZONE_DMA not depend on CONFIG_EXPERT
+
+Disable the requirement on CONFIG_EXPERT for ZONE_DMA and ZONE_DEVICE so
+that we can enable NVDIMM_PFN and ND_PFN
+
+Signed-off-by: Justin Forbes <jforbes@fedoraproject.org>
+---
+ arch/x86/Kconfig | 2 +-
+ mm/Kconfig       | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
+index a02c842..ea2eaeb 100644
+--- a/arch/x86/Kconfig
++++ b/arch/x86/Kconfig
+@@ -315,7 +315,7 @@ source "kernel/Kconfig.freezer"
+ menu "Processor type and features"
+
+ config ZONE_DMA
+-	bool "DMA memory allocation support" if EXPERT
++	bool "DMA memory allocation support"
+ 	default y
+ 	help
+ 	  DMA memory allocation support allows devices with less than 32-bit
+diff --git a/mm/Kconfig b/mm/Kconfig
+index 97a4e06..26bbbe0 100644
+--- a/mm/Kconfig
++++ b/mm/Kconfig
+@@ -650,7 +650,7 @@ config IDLE_PAGE_TRACKING
+ 	  See Documentation/vm/idle_page_tracking.txt for more details.
+
+ config ZONE_DEVICE
+-	bool "Device memory (pmem, etc...) hotplug support" if EXPERT
++	bool "Device memory (pmem, etc...) hotplug support"
+ 	default !ZONE_DMA
+ 	depends on !ZONE_DMA
+ 	depends on MEMORY_HOTPLUG
+-- 
+2.5.0
+
diff --git a/filter-aarch64.sh b/filter-aarch64.sh
index dae47aaa3..139d1791d 100755
--- a/filter-aarch64.sh
+++ b/filter-aarch64.sh
@@ -9,6 +9,8 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user"
+ethdrvs="3com adaptec arc alteon atheros broadcom cadence calxeda chelsio cisco dec dlink emulex icplus marvell micrel myricom neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis smsc stmicro sun tehuti ti via wiznet xircom"
+
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target"
diff --git a/filter-armv7hl.sh b/filter-armv7hl.sh
index 5803dd01f..6de77659a 100755
--- a/filter-armv7hl.sh
+++ b/filter-armv7hl.sh
@@ -9,6 +9,10 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn media memstick message nfc ntb pcmcia platform ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn media memstick message mwave nfc ntb pcmcia platform ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user"
+ethdrvs="3com adaptec alteon altera amd atheros broadcom cadence chelsio cisco dec dlink emulex icplus mellanox micrel myricom natsemi neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis sun tehuti via wiznet xircom"
+
+drmdrvs="amd armada bridge ast exynos i2c imx mgag200 msm omapdrm panel nouveau radeon rockchip tegra tilcdc via"
+
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target"
diff --git a/filter-i686.sh b/filter-i686.sh
index 784ab37e4..dc6f42f5a 100755
--- a/filter-i686.sh
+++ b/filter-i686.sh
@@ -9,6 +9,6 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick mfd mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick mfd mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub hid-sensor-magn-3d hid-sensor-incl-3d hid-sensor-gyro-3d hid-sensor-iio-common hid-sensor-accel-3d hid-sensor-trigger hid-sensor-als hid-sensor-rotation target_core_user"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub hid-sensor-magn-3d hid-sensor-incl-3d hid-sensor-gyro-3d hid-sensor-iio-common hid-sensor-accel-3d hid-sensor-trigger hid-sensor-als hid-sensor-rotation target_core_user sbp_target"
diff --git a/filter-modules.sh b/filter-modules.sh
index 31b78ce29..ef86416d1 100755
--- a/filter-modules.sh
+++ b/filter-modules.sh
@@ -14,25 +14,27 @@
 # listed here.
 
 # Set the default dirs/modules to filter out
-driverdirs="atm auxdisplay bcma bluetooth fmc iio infiniband isdn leds media memstick mfd mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc iio infiniband isdn leds media memstick mfd mmc mtd nfc ntb pcmcia platform power ssb staging tty uio uwb w1"
+
+chardrvs="mwave pcmcia"
 
 netdrvs="appletalk can dsa hamradio ieee802154 irda ppp slip usb wireless"
 
 ethdrvs="3com adaptec alteon amd atheros broadcom cadence calxeda chelsio cisco dec dlink emulex icplus marvell mellanox neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis smsc stmicro sun tehuti ti wiznet xircom"
 
-scsidrvs="aacraid aic7xxx aic94xx be2iscsi bfa bnx2i bnx2fc csiostor cxgbi esas2r fcoe fnic isci libsas lpfc megaraid mpt2sas mpt3sas mvsas pm8001 qla2xxx qla4xxx sym53c8xx_2 ufs"
+inputdrvs="gameport tablet touchscreen"
 
-ttydrvs="ipwireless"
+scsidrvs="aacraid aic7xxx aic94xx be2iscsi bfa bnx2i bnx2fc csiostor cxgbi esas2r fcoe fnic isci libsas lpfc megaraid mpt2sas mpt3sas mvsas pm8001 qla2xxx qla4xxx sym53c8xx_2 ufs"
 
-usbdrvs="atm wusbcore"
+usbdrvs="atm image misc serial wusbcore"
 
 fsdrvs="affs befs coda cramfs dlm ecryptfs hfs hfsplus jfs minix ncpfs nilfs2 ocfs2 reiserfs romfs squashfs sysv ubifs udf ufs"
 
-netprots="appletalk atm ax25 batman-adv bluetooth can dccp dsa ieee802154 irda l2tp mac80211 mac802154 netrom nfc rds rfkill rose sctp wireless"
+netprots="6lowpan appletalk atm ax25 batman-adv bluetooth can dccp dsa ieee802154 irda l2tp mac80211 mac802154 mpls netrom nfc rds rfkill rose sctp wireless"
 
-drmdrvs="ast gma500 mgag200 via nouveau"
+drmdrvs="amd ast gma500 i2c i915 mgag200 nouveau radeon via "
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub target_core_user"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub target_core_user sbp_target"
 
 # Grab the arch-specific filter list overrides
 source ./filter-$2.sh
@@ -83,6 +85,12 @@ do
 	filter_dir $1 drivers/net/${netdrv}
 done
 
+# Filter the char drivers
+for char in ${chardrvs}
+do
+	filter_dir $1 drivers/char/${input}
+done
+
 # Filter the ethernet drivers
 for eth in ${ethdrvs}
 do
@@ -95,10 +103,10 @@ do
 	filter_dir $1 drivers/scsi/${scsi}
 done
 
-# TTY
-for tty in ${ttydrvs}
+# Input
+for input in ${inputdrvs}
 do
-	filter_dir $1 drivers/tty/${tty}
+	filter_dir $1 drivers/input/${input}
 done
 
 # USB
diff --git a/filter-ppc64.sh b/filter-ppc64.sh
index 8001e0944..e4990bbcb 100755
--- a/filter-ppc64.sh
+++ b/filter-ppc64.sh
@@ -9,6 +9,6 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target"
diff --git a/filter-ppc64le.sh b/filter-ppc64le.sh
index c8948c94d..e44c88ec5 100755
--- a/filter-ppc64le.sh
+++ b/filter-ppc64le.sh
@@ -9,6 +9,6 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target"
diff --git a/filter-ppc64p7.sh b/filter-ppc64p7.sh
index 32c43a489..b499f0e69 100755
--- a/filter-ppc64p7.sh
+++ b/filter-ppc64p7.sh
@@ -9,6 +9,6 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target"
diff --git a/geekbox-v4-device-tree-support.patch b/geekbox-v4-device-tree-support.patch
new file mode 100644
index 000000000..77c1e5c28
--- /dev/null
+++ b/geekbox-v4-device-tree-support.patch
@@ -0,0 +1,464 @@
+From 4d321bf15d2d5e5b1b674f2a26a1c5202090a800 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Thu, 17 Mar 2016 15:19:04 +0000
+Subject: [PATCH] geekbox v4 patchset
+
+---
+ Documentation/devicetree/bindings/arm/rockchip.txt |   9 +
+ arch/arm64/boot/dts/rockchip/Makefile              |   2 +
+ arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi       |   2 +-
+ .../dts/rockchip/rk3368-geekbox-landingship.dts    |  57 ++++
+ arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts    | 319 +++++++++++++++++++++
+ arch/arm64/boot/dts/rockchip/rk3368-r88.dts        |   2 +-
+ 6 files changed, 389 insertions(+), 2 deletions(-)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
+
+diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
+index 078c14f..ae84f4e 100644
+--- a/Documentation/devicetree/bindings/arm/rockchip.txt
++++ b/Documentation/devicetree/bindings/arm/rockchip.txt
+@@ -87,6 +87,15 @@ Rockchip platforms device tree bindings
+ 		     "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
+ 		     "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
+ 
++- GeekBuying GeekBox:
++    Required root node properties:
++      - compatible = "geekbuying,geekbox", "rockchip,rk3368";
++
++- GeekBuying Landingship with GeekBox module:
++    Required root node properties:
++      - compatible = "geekbuying,geekbox-landingship",
++		     "geekbuying,geekbox", "rockchip,rk3368";
++
+ - Rockchip RK3368 evb:
+     Required root node properties:
+       - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
+diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
+index e3f0b5f..201bcd9 100644
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -1,4 +1,6 @@
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox-landingship.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
+ 
+ always		:= $(dtb-y)
+diff --git a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
+index 8c219cc..e4ceb53 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
+@@ -48,7 +48,7 @@
+ 		stdout-path = "serial2:115200n8";
+ 	};
+ 
+-	memory {
++	memory@0 {
+ 		device_type = "memory";
+ 		reg = <0x0 0x0 0x0 0x40000000>;
+ 	};
+diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
+new file mode 100644
+index 0000000..a28ace9
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
+@@ -0,0 +1,57 @@
++/*
++ * Copyright (c) 2016 Andreas Färber
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++#include "rk3368-geekbox.dts"
++
++/ {
++	model = "GeekBox on Landingship";
++	compatible = "geekbuying,geekbox-landingship",
++		     "geekbuying,geekbox", "rockchip,rk3368";
++};
++
++&i2c1 {
++	status = "disabled";
++};
++
++&i2c2 {
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
+new file mode 100644
+index 0000000..46cdddf
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
+@@ -0,0 +1,319 @@
++/*
++ * Copyright (c) 2016 Andreas Färber
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "rk3368.dtsi"
++#include <dt-bindings/input/input.h>
++
++/ {
++	model = "GeekBox";
++	compatible = "geekbuying,geekbox", "rockchip,rk3368";
++
++	chosen {
++		stdout-path = "serial2:115200n8";
++	};
++
++	memory@0 {
++		device_type = "memory";
++		reg = <0x0 0x0 0x0 0x80000000>;
++	};
++
++	ext_gmac: gmac-clk {
++		compatible = "fixed-clock";
++		clock-frequency = <125000000>;
++		clock-output-names = "ext_gmac";
++		#clock-cells = <0>;
++	};
++
++	ir: ir-receiver {
++		compatible = "gpio-ir-receiver";
++		gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&ir_int>;
++	};
++
++	keys: gpio-keys {
++		compatible = "gpio-keys";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pwr_key>;
++
++		power {
++			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
++			label = "GPIO Power";
++			linux,code = <KEY_POWER>;
++			wakeup-source;
++		};
++	};
++
++	leds: gpio-leds {
++		compatible = "gpio-leds";
++
++		blue {
++			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
++			label = "geekbox:blue:led";
++			default-state = "on";
++		};
++
++		red {
++			gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
++			label = "geekbox:red:led";
++			default-state = "off";
++		};
++	};
++
++	vcc_sys: vcc-sys-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_sys";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		regulator-always-on;
++		regulator-boot-on;
++	};
++};
++
++&emmc {
++	status = "okay";
++	bus-width = <8>;
++	cap-mmc-highspeed;
++	clock-frequency = <150000000>;
++	disable-wp;
++	keep-power-in-suspend;
++	non-removable;
++	num-slots = <1>;
++	vmmc-supply = <&vcc_io>;
++	vqmmc-supply = <&vcc18_flash>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
++};
++
++&gmac {
++	status = "okay";
++	phy-supply = <&vcc_lan>;
++	phy-mode = "rgmii";
++	clock_in_out = "input";
++	assigned-clocks = <&cru SCLK_MAC>;
++	assigned-clock-parents = <&ext_gmac>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	tx_delay = <0x30>;
++	rx_delay = <0x10>;
++};
++
++&i2c0 {
++	status = "okay";
++
++	rk808: pmic@1b {
++		compatible = "rockchip,rk808";
++		reg = <0x1b>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
++		interrupt-parent = <&gpio0>;
++		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
++		rockchip,system-power-controller;
++		vcc1-supply = <&vcc_sys>;
++		vcc2-supply = <&vcc_sys>;
++		vcc3-supply = <&vcc_sys>;
++		vcc4-supply = <&vcc_sys>;
++		vcc6-supply = <&vcc_sys>;
++		vcc7-supply = <&vcc_sys>;
++		vcc8-supply = <&vcc_io>;
++		vcc9-supply = <&vcc_sys>;
++		vcc10-supply = <&vcc_sys>;
++		vcc11-supply = <&vcc_sys>;
++		vcc12-supply = <&vcc_io>;
++		clock-output-names = "xin32k", "rk808-clkout2";
++		#clock-cells = <1>;
++
++		regulators {
++			vdd_cpu: DCDC_REG1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <700000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-name = "vdd_cpu";
++			};
++
++			vdd_log: DCDC_REG2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <700000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-name = "vdd_log";
++			};
++
++			vcc_ddr: DCDC_REG3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc_ddr";
++			};
++
++			vcc_io: DCDC_REG4 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc_io";
++			};
++
++			vcc18_flash: LDO_REG1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc18_flash";
++			};
++
++			vcc33_lcd: LDO_REG2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc33_lcd";
++			};
++
++			vdd_10: LDO_REG3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1000000>;
++				regulator-max-microvolt = <1000000>;
++				regulator-name = "vdd_10";
++			};
++
++			vcca_18: LDO_REG4 {
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcca_18";
++			};
++
++			vccio_sd: LDO_REG5 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vccio_sd";
++			};
++
++			vdd10_lcd: LDO_REG6 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1000000>;
++				regulator-max-microvolt = <1000000>;
++				regulator-name = "vdd10_lcd";
++			};
++
++			vcc_18: LDO_REG7 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc_18";
++			};
++
++			vcc18_lcd: LDO_REG8 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc18_lcd";
++			};
++
++			vcc_sd: SWITCH_REG1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc_sd";
++			};
++
++			vcc_lan: SWITCH_REG2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc_lan";
++			};
++		};
++	};
++};
++
++&pinctrl {
++	ir {
++		ir_int: ir-int {
++			rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	keys {
++		pwr_key: pwr-key {
++			rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	pmic {
++		pmic_sleep: pmic-sleep {
++			rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
++		};
++
++		pmic_int: pmic-int {
++			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++};
++
++&tsadc {
++	status = "okay";
++	rockchip,hw-tshut-mode = <0>; /* CRU */
++	rockchip,hw-tshut-polarity = <1>; /* high */
++};
++
++&uart2 {
++	status = "okay";
++};
++
++&usb_host0_ehci {
++	status = "okay";
++};
++
++&usb_otg {
++	status = "okay";
++};
++
++&wdt {
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
+index 104cbee..9548129 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
+@@ -51,7 +51,7 @@
+ 		stdout-path = "serial2:115200n8";
+ 	};
+ 
+-	memory {
++	memory@0 {
+ 		device_type = "memory";
+ 		reg = <0x0 0x0 0x0 0x40000000>;
+ 	};
+-- 
+2.5.0
+
diff --git a/kernel.spec b/kernel.spec
index 46bfccc91..63d8cbb1e 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -11,10 +11,12 @@ Summary: The Linux kernel
 # Sign modules on x86.  Make sure the config files match this setting if more
 # architectures are added.
 %ifarch %{ix86} x86_64
+%global signkernel 1
 %global signmodules 1
 %global zipmodules 1
 %else
-%global signmodules 0
+%global signkernel 0
+%global signmodules 1
 %global zipmodules 0
 %endif
 
@@ -42,13 +44,13 @@ Summary: The Linux kernel
 # For non-released -rc kernels, this will be appended after the rcX and
 # gitX tags, so a 3 here would become part of release "0.rcX.gitX.3"
 #
-%global baserelease 300
+%global baserelease 200
 %global fedora_build %{baserelease}
 
 # base_sublevel is the kernel version we're starting with and patching
 # on top of -- for example, 3.1-rc7-git1 starts with a 3.0 base,
 # which yields a base_sublevel of 0.
-%define base_sublevel 4
+%define base_sublevel 5
 
 ## If this is a released kernel ##
 %if 0%{?released_kernel}
@@ -58,7 +60,7 @@ Summary: The Linux kernel
 
 
 # Do we have a -stable update to apply?
-%define stable_update 9
+%define stable_update 3
 # Set rpm version accordingly
 %if 0%{?stable_update}
 %define stablerev %{stable_update}
@@ -100,6 +102,7 @@ Summary: The Linux kernel
 %define with_debug     %{?_with_debug:        1} %{?!_with_debug:        0}
 # kernel-headers
 %define with_headers   %{?_without_headers:   0} %{?!_without_headers:   1}
+%define with_cross_headers   %{?_without_cross_headers:   0} %{?!_without_cross_headers:   1}
 # perf
 %define with_perf      %{?_without_perf:      0} %{?!_without_perf:      1}
 # tools
@@ -242,6 +245,7 @@ Summary: The Linux kernel
 %ifarch noarch
 %define with_up 0
 %define with_headers 0
+%define with_cross_headers 0
 %define with_tools 0
 %define with_perf 0
 %define all_arch_configs kernel-%{version}-*.config
@@ -306,6 +310,7 @@ Summary: The Linux kernel
 # just like we used to only build them on i386 for x86
 %ifnarch armv7hl
 %define with_headers 0
+%define with_cross_headers 0
 %define with_perf 0
 %define with_tools 0
 %endif
@@ -403,14 +408,12 @@ BuildRequires: rpm-build, elfutils
 %define debuginfo_args --strict-build-id -r
 %endif
 
-%ifarch %{ix86} x86_64
-# MODULE_SIG is enabled in config-x86-generic and needs these:
+%if %{signkernel}%{signmodules}
 BuildRequires: openssl openssl-devel
-%endif
-
-%if %{signmodules}
+%if %{signkernel}
 BuildRequires: pesign >= 0.10-4
 %endif
+%endif
 
 %if %{with_cross}
 BuildRequires: binutils-%{_build_arch}-linux-gnu, gcc-%{_build_arch}-linux-gnu
@@ -512,20 +515,44 @@ Source5005: kbuild-AFTER_LINK.patch
 # Git trees.
 
 # Standalone patches
+Patch420: arm64-avoid-needing-console-to-enable-serial-console.patch
+
+Patch421: arm64-acpi-drop-expert-patch.patch
 
-Patch451: lib-cpumask-Make-CPUMASK_OFFSTACK-usable-without-deb.patch
+# http://www.spinics.net/lists/arm-kernel/msg490981.html
+Patch422: geekbox-v4-device-tree-support.patch
 
-Patch452: 0001-gpu-ipu-v3-Fix-imx-ipuv3-crtc-module-autoloading.patch
+# http://www.spinics.net/lists/arm-kernel/msg483898.html
+Patch423: Initial-AllWinner-A64-and-PINE64-support.patch
 
-Patch454: arm64-avoid-needing-console-to-enable-serial-console.patch
+# rhbz 1321330  http://www.spinics.net/lists/dri-devel/msg105829.html
+Patch425: 0001-gpu-ipu-v3-Fix-imx-ipuv3-crtc-module-autoloading.patch
 
-Patch456: arm64-acpi-drop-expert-patch.patch
+# http://www.spinics.net/lists/linux-tegra/msg26029.html
+Patch426: usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch
 
-Patch457: ARM-tegra-usb-no-reset.patch
+# http://patchwork.ozlabs.org/patch/587554/
+Patch430: ARM-tegra-usb-no-reset.patch
 
-Patch460: mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch
+Patch431: arm-i.MX6-Utilite-device-dtb.patch
 
-Patch463: arm-i.MX6-Utilite-device-dtb.patch
+# http://www.spinics.net/lists/linux-tegra/msg25152.html
+Patch432: Fix-tegra-to-use-stdout-path-for-serial-console.patch
+
+Patch433: bcm283x-Pull-upstream-fixes-plus-iproc-mmc-driver.patch
+
+# http://www.spinics.net/lists/netdev/msg369442.html
+Patch434: revert-stmmac-Fix-eth0-No-PHY-found-regression.patch
+Patch435: stmmac-fix-MDIO-settings.patch
+
+Patch436: ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch
+
+# mvebu DSA switch fixes
+# http://www.spinics.net/lists/netdev/msg370841.html http://www.spinics.net/lists/netdev/msg370842.html
+Patch438: 0001-net-dsa-mv88e6xxx-Introduce-_mv88e6xxx_phy_page_-rea.patch
+Patch439: 0002-net-dsa-mv88e6xxx-Clear-the-PDOWN-bit-on-setup.patch
+
+Patch460: lib-cpumask-Make-CPUMASK_OFFSTACK-usable-without-deb.patch
 
 Patch466: input-kill-stupid-messages.patch
 
@@ -603,35 +630,17 @@ Patch503: drm-i915-turn-off-wc-mmaps.patch
 
 Patch508: kexec-uefi-copy-secure_boot-flag-in-boot-params.patch
 
-#rhbz 1287819
-Patch570: HID-multitouch-enable-palm-rejection-if-device-imple.patch
-
 #rhbz 1286293
 Patch571: ideapad-laptop-Add-Lenovo-ideapad-Y700-17ISK-to-no_h.patch
 
-#rhbz 1288687
-Patch572: alua_fix.patch
-
-#rhbz 1083853
-Patch610: PNP-Add-Broadwell-to-Intel-MCH-size-workaround.patch
-
-#rhbz 1300955
-Patch640: PNP-Add-Haswell-ULT-to-Intel-MCH-size-workaround.patch
-
-#rhbz 1278942
-Patch643: media-ivtv-avoid-going-past-input-audio-array.patch
+#Required for some persistent memory options
+Patch641: disable-CONFIG_EXPERT-for-ZONE_DMA.patch
 
 #rhbz 1255325
 Patch646: HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch
 
-#Known use after free, possibly rhbz 1310579
-Patch654: 0001-usb-hub-fix-panic-in-usb_reset_and_verify_device.patch
-
-#Mitigates CVE-2013-4312 rhbz 1313428 1313433
-Patch659: pipe-limit-the-per-user-amount-of-pages-allocated-in.patch
-
-#rhbz 1310252 1313318
-Patch660: 0001-drm-i915-Pretend-cursor-is-always-on-for-ILK-style-W.patch
+#rhbz 1309658
+Patch648: 0001-mm-CONFIG_NR_ZONES_EXTENDED.patch
 
 #CVE-2016-3135 rhbz 1317386 1317387
 Patch664: netfilter-x_tables-check-for-size-overflow.patch
@@ -640,10 +649,7 @@ Patch664: netfilter-x_tables-check-for-size-overflow.patch
 Patch665: netfilter-x_tables-deal-with-bogus-nextoffset-values.patch
 
 # CVE-2016-3672 rhbz 1324749 1324750
-Patch690: x86-mm-32-Enable-full-randomization-on-i386-and-X86_.patch
-
-#CVE-2016-3951 rhbz 1324782 1324815
-Patch695: cdc_ncm-do-not-call-usbnet_link_change-from-cdc_ncm_.patch
+Patch689: x86-mm-32-Enable-full-randomization-on-i386-and-X86_.patch
 
 #rhbz 1309980
 Patch698: 0001-ACPI-processor-Request-native-thermal-interrupt-hand.patch
@@ -651,16 +657,37 @@ Patch698: 0001-ACPI-processor-Request-native-thermal-interrupt-hand.patch
 #rhbz 1309487
 Patch701: antenna_select.patch
 
+#rhbz 1302071
+Patch702: x86-build-Build-compressed-x86-kernels-as-PIE.patch
+
 # Follow on for CVE-2016-3156
-Patch702: ipv4-fib-don-t-warn-when-primary-address-is-missing-.patch
+Patch703: ipv4-fib-don-t-warn-when-primary-address-is-missing-.patch
 
 # Stop splashing crap about broken firmware BGRT
 Patch704: x86-efi-bgrt-Switch-all-pr_err-to-pr_debug-for-inval.patch
 
+#rhbz 1331092
+Patch705: mm-thp-kvm-fix-memory-corruption-in-KVM-with-THP-ena.patch
+
 #CVE-2016-4482 rhbz 1332931 1332932
-Patch705: USB-usbfs-fix-potential-infoleak-in-devio.patch
+Patch706: USB-usbfs-fix-potential-infoleak-in-devio.patch
+
+#CVE-2016-4486 CVE-2016-4485 rhbz 1333316 1333309 1333321
+Patch707: net-fix-infoleak-in-llc.patch
+Patch708: net-fix-infoleak-in-rtnetlink.patch
+
+#CVE-2016-xxxx rhbz 1333712 1333713
+Patch709: propogate_mnt-Handle-the-first-propogated-copy-being.patch
+
+#CVE-2016-4557 CVE-2016-4558 rhbz 1334307 1334303 1334311
+Patch711: bpf-fix-double-fdput-in-replace_map_fd_with_map_ptr.patch
+Patch712: bpf-fix-refcnt-overflow.patch
+
+#rhbz 1328633
+Patch713: sp5100_tco-properly-check-for-new-register-layouts.patch
 
 # END OF PATCH DEFINITIONS
+
 %endif
 
 BuildRoot: %{_tmppath}/kernel-%{KVERREL}-root
@@ -711,6 +738,17 @@ header files define structures and constants that are needed for
 building most standard programs and are also needed for rebuilding the
 glibc package.
 
+%package cross-headers
+Summary: Header files for the Linux kernel for use by cross-glibc
+Group: Development/System
+%description cross-headers
+Kernel-cross-headers includes the C header files that specify the interface
+between the Linux kernel and userspace libraries and programs.  The
+header files define structures and constants that are needed for
+building most standard programs and are also needed for rebuilding the
+cross-glibc package.
+
+
 %package bootwrapper
 Summary: Boot wrapper files for generating combined kernel + initrd images
 Group: Development/System
@@ -722,6 +760,7 @@ files combining both kernel and initial ramdisk.
 %package debuginfo-common-%{_target_cpu}
 Summary: Kernel source files used by %{name}-debuginfo packages
 Group: Development/Debug
+Provides: installonlypkg(kernel)
 %description debuginfo-common-%{_target_cpu}
 This package is required by %{name}-debuginfo subpackages.
 It provides the kernel source files common to all builds.
@@ -838,6 +877,7 @@ Summary: Debug information for package %{name}%{?1:-%{1}}\
 Group: Development/Debug\
 Requires: %{name}-debuginfo-common-%{_target_cpu} = %{version}-%{release}\
 Provides: %{name}%{?1:-%{1}}-debuginfo-%{_target_cpu} = %{version}-%{release}\
+Provides: installonlypkg(kernel)\
 AutoReqProv: no\
 %description %{?1:%{1}-}debuginfo\
 This package provides debug information for package %{name}%{?1:-%{1}}.\
@@ -917,6 +957,7 @@ summary: kernel meta-package for the %{1} kernel\
 group: system environment/kernel\
 Requires: kernel-%{1}-core-uname-r = %{KVERREL}%{?variant}+%{1}\
 Requires: kernel-%{1}-modules-uname-r = %{KVERREL}%{?variant}+%{1}\
+Provides: installonlypkg(kernel)\
 %description %{1}\
 The meta-package for the %{1} kernel\
 %{nil}
@@ -931,6 +972,7 @@ The meta-package for the %{1} kernel\
 Summary: %{variant_summary}\
 Group: System Environment/Kernel\
 Provides: kernel-%{?1:%{1}-}core-uname-r = %{KVERREL}%{?variant}%{?1:+%{1}}\
+Provides: installonlypkg(kernel)\
 %{expand:%%kernel_reqprovconf}\
 %if %{?1:1} %{!?1:0} \
 %{expand:%%kernel_meta_package %{?1:%{1}}}\
@@ -1365,7 +1407,7 @@ BuildKernel() {
     make -s mrproper
     cp configs/$Config .config
 
-    %if %{signmodules}
+    %if %{signkernel}%{signmodules}
     cp %{SOURCE11} certs/.
     %endif
 
@@ -1402,7 +1444,7 @@ BuildKernel() {
       cp arch/$Arch/boot/zImage.stub $RPM_BUILD_ROOT/%{image_install_path}/zImage.stub-$KernelVer || :
       cp arch/$Arch/boot/zImage.stub $RPM_BUILD_ROOT/lib/modules/$KernelVer/zImage.stub-$KernelVer || :
     fi
-    %if %{signmodules}
+    %if %{signkernel}
     # Sign the image if we're using EFI
     %pesign -s -i $KernelImage -o vmlinuz.signed
     if [ ! -s vmlinuz.signed ]; then
@@ -1487,9 +1529,35 @@ BuildKernel() {
     if [ -d arch/%{asmarch}/mach-${Flavour}/include ]; then
       cp -a --parents arch/%{asmarch}/mach-${Flavour}/include $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
     fi
+    # include a few files for 'make prepare'
+    cp -a --parents arch/arm/tools/gen-mach-types $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/arm/tools/mach-types $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+
 %endif
     cp -a include $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/include
-
+%ifarch %{ix86} x86_64
+    # files for 'make prepare' to succeed with kernel-devel
+    cp -a --parents arch/x86/entry/syscalls/syscall_32.tbl $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/entry/syscalls/syscalltbl.sh $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/entry/syscalls/syscallhdr.sh $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/entry/syscalls/syscall_64.tbl $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/tools/relocs_32.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/tools/relocs_64.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/tools/relocs.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/tools/relocs_common.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/tools/relocs.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents tools/include/tools/le_byteshift.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/purgatory.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/sha256.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/sha256.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/stack.S $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/string.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/setup-x86_64.S $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/entry64.S $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/boot/string.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/boot/string.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/boot/ctype.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+%endif
     # Make sure the Makefile and version.h have a matching timestamp so that
     # external modules can be built
     touch -r $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/Makefile $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/include/generated/uapi/linux/version.h
@@ -1777,11 +1845,40 @@ find $RPM_BUILD_ROOT/usr/include \
 
 %endif
 
+%if %{with_cross_headers}
+mkdir -p $RPM_BUILD_ROOT/usr/tmp-headers
+make ARCH=%{hdrarch} INSTALL_HDR_PATH=$RPM_BUILD_ROOT/usr/tmp-headers headers_install_all
+
+find $RPM_BUILD_ROOT/usr/tmp-headers/include \
+     \( -name .install -o -name .check -o \
+     	-name ..install.cmd -o -name ..check.cmd \) | xargs rm -f
+
+# Copy all the architectures we care about to their respective asm directories
+for arch in arm arm64 powerpc s390 x86 ; do
+mkdir -p $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include
+mv $RPM_BUILD_ROOT/usr/tmp-headers/include/asm-${arch} $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include/asm
+cp -a $RPM_BUILD_ROOT/usr/tmp-headers/include/asm-generic $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include/.
+done
+
+# Remove the rest of the architectures
+rm -rf $RPM_BUILD_ROOT/usr/tmp-headers/include/arch*
+rm -rf $RPM_BUILD_ROOT/usr/tmp-headers/include/asm-*
+
+# Copy the rest of the headers over
+for arch in arm arm64 powerpc s390 x86 ; do
+cp -a $RPM_BUILD_ROOT/usr/tmp-headers/include/* $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include/.
+done
+
+rm -rf $RPM_BUILD_ROOT/usr/tmp-headers
+%endif
+
 %if %{with_perf}
 # perf tool binary and supporting scripts/binaries
 %{perf_make} DESTDIR=$RPM_BUILD_ROOT lib=%{_lib} install-bin install-traceevent-plugins
 # remove the 'trace' symlink.
 rm -f %{buildroot}%{_bindir}/trace
+# remove the perf-tips
+rm -rf %{buildroot}%{_docdir}/perf-tip
 
 # python-perf extension
 %{perf_make} DESTDIR=$RPM_BUILD_ROOT install-python_ext
@@ -1961,6 +2058,12 @@ fi
 /usr/include/*
 %endif
 
+%if %{with_cross_headers}
+%files cross-headers
+%defattr(-,root,root)
+/usr/*-linux-gnu/include/*
+%endif
+
 %if %{with_bootwrapper}
 %files bootwrapper
 %defattr(-,root,root)
@@ -2078,6 +2181,7 @@ fi
 %defattr(-,root,root)\
 %{expand:%%files %{?2:%{2}-}devel}\
 %defattr(-,root,root)\
+%defverify(not mtime)\
 /usr/src/kernels/%{KVERREL}%{?2:+%{2}}\
 %{expand:%%files %{?2:%{2}-}modules-extra}\
 %defattr(-,root,root)\
@@ -2106,6 +2210,19 @@ fi
 #
 # 
 %changelog
+* Mon May 09 2016 Justin M. Forbes <jforbes@fedoraproject.org> -4.5.3-200
+- Linux v4.5.3 rebase
+
+* Mon May 09 2016 Josh Boyer <jwboyer@fedoraproject.org>
+- CVE-2016-4557 bpf: Use after free vulnerability via double fdput
+  CVE-2016-4558 bpf: refcnt overflow (rhbz 1334307 1334303 1334311)
+ 
+* Fri May 06 2016 Josh Boyer <jwboyer@fedoraproject.org>
+- Oops in propogate_mnt if first copy is slave (rhbz 1333712 1333713)
+
+* Thu May 05 2016 Josh Boyer <jwboyer@fedoraproject.org>
+- CVE-2016-4486 CVE-2016-4485 info leaks (rhbz 1333316 1333309 1333321)
+
 * Wed May 04 2016 Laura Abbott <labbott@fedoraproject.org> - 4.4.9-300
 - Linux v4.4.9
 
diff --git a/media-ivtv-avoid-going-past-input-audio-array.patch b/media-ivtv-avoid-going-past-input-audio-array.patch
deleted file mode 100644
index 42009eb71..000000000
--- a/media-ivtv-avoid-going-past-input-audio-array.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From d55ebd07b6c21a1c7e3e74f1b73b3b033cece2b5 Mon Sep 17 00:00:00 2001
-From: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
-Date: Wed, 11 Nov 2015 09:27:42 -0200
-Subject: [PATCH] [media] ivtv: avoid going past input/audio array
-
-As reported by smatch:
-	drivers/media/pci/ivtv/ivtv-driver.c:832 ivtv_init_struct2() error: buffer overflow 'itv->card->video_inputs' 6 <= 6
-
-Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
----
- drivers/media/pci/ivtv/ivtv-driver.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/media/pci/ivtv/ivtv-driver.c b/drivers/media/pci/ivtv/ivtv-driver.c
-index c2e60b4f292d..2bb10cd9ecfd 100644
---- a/drivers/media/pci/ivtv/ivtv-driver.c
-+++ b/drivers/media/pci/ivtv/ivtv-driver.c
-@@ -826,7 +826,7 @@ static void ivtv_init_struct2(struct ivtv *itv)
- 				IVTV_CARD_INPUT_VID_TUNER)
- 			break;
- 	}
--	if (i == itv->nof_inputs)
-+	if (i >= itv->nof_inputs)
- 		i = 0;
- 	itv->active_input = i;
- 	itv->audio_input = itv->card->video_inputs[i].audio_index;
--- 
-2.5.0
-
diff --git a/mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch b/mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch
deleted file mode 100644
index dfedd2ab0..000000000
--- a/mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 567a18f57213647e2c31bbdc7f6b8f9991d22fad Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Fri, 13 Nov 2015 19:03:29 +0000
-Subject: [PATCH] mfd: wm8994: Ensure that the whole MFD is built into a single
- module
-
-Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
----
- drivers/mfd/Makefile | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
-index a59e3fc..4a767ef 100644
---- a/drivers/mfd/Makefile
-+++ b/drivers/mfd/Makefile
-@@ -61,7 +61,8 @@ wm8350-objs			:= wm8350-core.o wm8350-regmap.o wm8350-gpio.o
- wm8350-objs			+= wm8350-irq.o
- obj-$(CONFIG_MFD_WM8350)	+= wm8350.o
- obj-$(CONFIG_MFD_WM8350_I2C)	+= wm8350-i2c.o
--obj-$(CONFIG_MFD_WM8994)	+= wm8994-core.o wm8994-irq.o wm8994-regmap.o
-+wm8994-objs			:= wm8994-core.o wm8994-irq.o wm8994-regmap.o
-+obj-$(CONFIG_MFD_WM8994)	+= wm8994.o
- 
- obj-$(CONFIG_TPS6105X)		+= tps6105x.o
- obj-$(CONFIG_TPS65010)		+= tps65010.o
--- 
-2.5.0
-
diff --git a/mm-thp-kvm-fix-memory-corruption-in-KVM-with-THP-ena.patch b/mm-thp-kvm-fix-memory-corruption-in-KVM-with-THP-ena.patch
new file mode 100644
index 000000000..cc3e2168c
--- /dev/null
+++ b/mm-thp-kvm-fix-memory-corruption-in-KVM-with-THP-ena.patch
@@ -0,0 +1,126 @@
+From 94f984ff563d1777652b822d7a282cacc1e481c2 Mon Sep 17 00:00:00 2001
+From: Andrea Arcangeli <aarcange@redhat.com>
+Date: Wed, 27 Apr 2016 12:04:46 -0500
+Subject: [PATCH] mm: thp: kvm: fix memory corruption in KVM with THP enabled
+
+After the THP refcounting change, obtaining a compound pages from
+get_user_pages() no longer allows us to assume the entire compound
+page is immediately mappable from a secondary MMU.
+
+A secondary MMU doesn't want to call get_user_pages() more than once
+for each compound page, in order to know if it can map the whole
+compound page. So a secondary MMU needs to know from a single
+get_user_pages() invocation when it can map immediately the entire
+compound page to avoid a flood of unnecessary secondary MMU faults and
+spurious atomic_inc()/atomic_dec() (pages don't have to be pinned by
+MMU notifier users).
+
+Ideally instead of the page->_mapcount < 1 check, get_user_pages()
+should return the granularity of the "page" mapping in the "mm" passed
+to get_user_pages(). However it's non trivial change to pass the "pmd"
+status belonging to the "mm" walked by get_user_pages up the stack (up
+to the caller of get_user_pages). So the fix just checks if there is
+not a single pte mapping on the page returned by get_user_pages, and
+in turn if the caller can assume that the whole compound page is
+mapped in the current "mm" (in a pmd_trans_huge()). In such case the
+entire compound page is safe to map into the secondary MMU without
+additional get_user_pages() calls on the surrounding tail/head
+pages. In addition of being faster, not having to run other
+get_user_pages() calls also reduces the memory footprint of the
+secondary MMU fault in case the pmd split happened as result of memory
+pressure.
+
+Without this fix after a MADV_DONTNEED (like invoked by QEMU during
+postcopy live migration or balloning) or after generic swapping (with
+a failure in split_huge_page() that would only result in pmd splitting
+and not a physical page split), KVM would map the whole compound page
+into the shadow pagetables, despite regular faults or userfaults (like
+UFFDIO_COPY) may map regular pages into the primary MMU as result of
+the pte faults, leading to the guest mode and userland mode going out
+of sync and not working on the same memory at all times.
+
+Signed-off-by: Andrea Arcangeli <aarcange@redhat.com>
+---
+ arch/arm/kvm/mmu.c         |  2 +-
+ arch/x86/kvm/mmu.c         |  4 ++--
+ include/linux/page-flags.h | 22 ++++++++++++++++++++++
+ 3 files changed, 25 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
+index aba61fd..8dafe97 100644
+--- a/arch/arm/kvm/mmu.c
++++ b/arch/arm/kvm/mmu.c
+@@ -997,7 +997,7 @@ static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
+ 	kvm_pfn_t pfn = *pfnp;
+ 	gfn_t gfn = *ipap >> PAGE_SHIFT;
+
+-	if (PageTransCompound(pfn_to_page(pfn))) {
++	if (PageTransCompoundMap(pfn_to_page(pfn))) {
+ 		unsigned long mask;
+ 		/*
+ 		 * The address we faulted on is backed by a transparent huge
+diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
+index 1e7a49b..3a371f7 100644
+--- a/arch/x86/kvm/mmu.c
++++ b/arch/x86/kvm/mmu.c
+@@ -2767,7 +2767,7 @@ static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,
+ 	 */
+ 	if (!is_error_noslot_pfn(pfn) && !kvm_is_reserved_pfn(pfn) &&
+ 	    level == PT_PAGE_TABLE_LEVEL &&
+-	    PageTransCompound(pfn_to_page(pfn)) &&
++	    PageTransCompoundMap(pfn_to_page(pfn)) &&
+ 	    !has_wrprotected_page(vcpu, gfn, PT_DIRECTORY_LEVEL)) {
+ 		unsigned long mask;
+ 		/*
+@@ -4621,7 +4621,7 @@ restart:
+ 		 */
+ 		if (sp->role.direct &&
+ 			!kvm_is_reserved_pfn(pfn) &&
+-			PageTransCompound(pfn_to_page(pfn))) {
++			PageTransCompoundMap(pfn_to_page(pfn))) {
+ 			drop_spte(kvm, sptep);
+ 			need_tlb_flush = 1;
+ 			goto restart;
+diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
+index 19724e6..522bd6d 100644
+--- a/include/linux/page-flags.h
++++ b/include/linux/page-flags.h
+@@ -517,6 +517,27 @@ static inline int PageTransCompound(struct page *page)
+ }
+
+ /*
++ * PageTransCompoundMap is the same as PageTransCompound, but it also
++ * guarantees the primary MMU has the entire compound page mapped
++ * through pmd_trans_huge, which in turn guarantees the secondary MMUs
++ * can also map the entire compound page. This allows the secondary
++ * MMUs to call get_user_pages() only once for each compound page and
++ * to immediately map the entire compound page with a single secondary
++ * MMU fault. If there will be a pmd split later, the secondary MMUs
++ * will get an update through the MMU notifier invalidation through
++ * split_huge_pmd().
++ *
++ * Unlike PageTransCompound, this is safe to be called only while
++ * split_huge_pmd() cannot run from under us, like if protected by the
++ * MMU notifier, otherwise it may result in page->_mapcount < 0 false
++ * positives.
++ */
++static inline int PageTransCompoundMap(struct page *page)
++{
++	return PageTransCompound(page) && atomic_read(&page->_mapcount) < 0;
++}
++
++/*
+  * PageTransTail returns true for both transparent huge pages
+  * and hugetlbfs pages, so it should only be called when it's known
+  * that hugetlbfs pages aren't involved.
+@@ -559,6 +580,7 @@ static inline int TestClearPageDoubleMap(struct page *page)
+ #else
+ TESTPAGEFLAG_FALSE(TransHuge)
+ TESTPAGEFLAG_FALSE(TransCompound)
++TESTPAGEFLAG_FALSE(TransCompoundMap)
+ TESTPAGEFLAG_FALSE(TransTail)
+ TESTPAGEFLAG_FALSE(DoubleMap)
+ 	TESTSETFLAG_FALSE(DoubleMap)
+-- 
+2.7.4
+
diff --git a/net-fix-infoleak-in-llc.patch b/net-fix-infoleak-in-llc.patch
new file mode 100644
index 000000000..38f0d506a
--- /dev/null
+++ b/net-fix-infoleak-in-llc.patch
@@ -0,0 +1,32 @@
+From ec0de35ded8c4a8588290a1b442aa3aa4bdf4de1 Mon Sep 17 00:00:00 2001
+From: Kangjie Lu <kangjielu@gmail.com>
+Date: Tue, 3 May 2016 16:35:05 -0400
+Subject: [PATCH 2/2] net: fix infoleak in llc
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The stack object “info” has a total size of 12 bytes. Its last byte
+is padding which is not initialized and leaked via “put_cmsg”.
+
+Signed-off-by: Kangjie Lu <kjlu@gatech.edu>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ net/llc/af_llc.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/net/llc/af_llc.c b/net/llc/af_llc.c
+index b3c52e3f689a..8ae3ed97d95c 100644
+--- a/net/llc/af_llc.c
++++ b/net/llc/af_llc.c
+@@ -626,6 +626,7 @@ static void llc_cmsg_rcv(struct msghdr *msg, struct sk_buff *skb)
+ 	if (llc->cmsg_flags & LLC_CMSG_PKTINFO) {
+ 		struct llc_pktinfo info;
+ 
++		memset(&info, 0, sizeof(info));
+ 		info.lpi_ifindex = llc_sk(skb->sk)->dev->ifindex;
+ 		llc_pdu_decode_dsap(skb, &info.lpi_sap);
+ 		llc_pdu_decode_da(skb, info.lpi_mac);
+-- 
+2.5.5
+
diff --git a/net-fix-infoleak-in-rtnetlink.patch b/net-fix-infoleak-in-rtnetlink.patch
new file mode 100644
index 000000000..0da35108d
--- /dev/null
+++ b/net-fix-infoleak-in-rtnetlink.patch
@@ -0,0 +1,50 @@
+From 55a8a812d867ec9953bde7d86eef255a1abbf93e Mon Sep 17 00:00:00 2001
+From: Kangjie Lu <kangjielu@gmail.com>
+Date: Tue, 3 May 2016 16:46:24 -0400
+Subject: [PATCH 1/2] net: fix infoleak in rtnetlink
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The stack object “map” has a total size of 32 bytes. Its last 4
+bytes are padding generated by compiler. These padding bytes are
+not initialized and sent out via “nla_put”.
+
+Signed-off-by: Kangjie Lu <kjlu@gatech.edu>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ net/core/rtnetlink.c | 18 ++++++++++--------
+ 1 file changed, 10 insertions(+), 8 deletions(-)
+
+diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
+index a75f7e94b445..65763c29f845 100644
+--- a/net/core/rtnetlink.c
++++ b/net/core/rtnetlink.c
+@@ -1180,14 +1180,16 @@ static noinline_for_stack int rtnl_fill_vfinfo(struct sk_buff *skb,
+ 
+ static int rtnl_fill_link_ifmap(struct sk_buff *skb, struct net_device *dev)
+ {
+-	struct rtnl_link_ifmap map = {
+-		.mem_start   = dev->mem_start,
+-		.mem_end     = dev->mem_end,
+-		.base_addr   = dev->base_addr,
+-		.irq         = dev->irq,
+-		.dma         = dev->dma,
+-		.port        = dev->if_port,
+-	};
++	struct rtnl_link_ifmap map;
++
++	memset(&map, 0, sizeof(map));
++	map.mem_start   = dev->mem_start;
++	map.mem_end     = dev->mem_end;
++	map.base_addr   = dev->base_addr;
++	map.irq         = dev->irq;
++	map.dma         = dev->dma;
++	map.port        = dev->if_port;
++
+ 	if (nla_put(skb, IFLA_MAP, sizeof(map), &map))
+ 		return -EMSGSIZE;
+ 
+-- 
+2.5.5
+
diff --git a/pipe-limit-the-per-user-amount-of-pages-allocated-in.patch b/pipe-limit-the-per-user-amount-of-pages-allocated-in.patch
deleted file mode 100644
index 7502c277f..000000000
--- a/pipe-limit-the-per-user-amount-of-pages-allocated-in.patch
+++ /dev/null
@@ -1,250 +0,0 @@
-From 759c01142a5d0f364a462346168a56de28a80f52 Mon Sep 17 00:00:00 2001
-From: Willy Tarreau <w@1wt.eu>
-Date: Mon, 18 Jan 2016 16:36:09 +0100
-Subject: [PATCH] pipe: limit the per-user amount of pages allocated in pipes
-
-On no-so-small systems, it is possible for a single process to cause an
-OOM condition by filling large pipes with data that are never read. A
-typical process filling 4000 pipes with 1 MB of data will use 4 GB of
-memory. On small systems it may be tricky to set the pipe max size to
-prevent this from happening.
-
-This patch makes it possible to enforce a per-user soft limit above
-which new pipes will be limited to a single page, effectively limiting
-them to 4 kB each, as well as a hard limit above which no new pipes may
-be created for this user. This has the effect of protecting the system
-against memory abuse without hurting other users, and still allowing
-pipes to work correctly though with less data at once.
-
-The limit are controlled by two new sysctls : pipe-user-pages-soft, and
-pipe-user-pages-hard. Both may be disabled by setting them to zero. The
-default soft limit allows the default number of FDs per process (1024)
-to create pipes of the default size (64kB), thus reaching a limit of 64MB
-before starting to create only smaller pipes. With 256 processes limited
-to 1024 FDs each, this results in 1024*64kB + (256*1024 - 1024) * 4kB =
-1084 MB of memory allocated for a user. The hard limit is disabled by
-default to avoid breaking existing applications that make intensive use
-of pipes (eg: for splicing).
-
-Reported-by: socketpair@gmail.com
-Reported-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
-Mitigates: CVE-2013-4312 (Linux 2.0+)
-Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
-Signed-off-by: Willy Tarreau <w@1wt.eu>
-Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
----
- Documentation/sysctl/fs.txt | 23 ++++++++++++++++++++++
- fs/pipe.c                   | 47 +++++++++++++++++++++++++++++++++++++++++++--
- include/linux/pipe_fs_i.h   |  4 ++++
- include/linux/sched.h       |  1 +
- kernel/sysctl.c             | 14 ++++++++++++++
- 5 files changed, 87 insertions(+), 2 deletions(-)
-
-diff --git a/Documentation/sysctl/fs.txt b/Documentation/sysctl/fs.txt
-index 88152f214f48..302b5ed616a6 100644
---- a/Documentation/sysctl/fs.txt
-+++ b/Documentation/sysctl/fs.txt
-@@ -32,6 +32,8 @@ Currently, these files are in /proc/sys/fs:
- - nr_open
- - overflowuid
- - overflowgid
-+- pipe-user-pages-hard
-+- pipe-user-pages-soft
- - protected_hardlinks
- - protected_symlinks
- - suid_dumpable
-@@ -159,6 +161,27 @@ The default is 65534.
- 
- ==============================================================
- 
-+pipe-user-pages-hard:
-+
-+Maximum total number of pages a non-privileged user may allocate for pipes.
-+Once this limit is reached, no new pipes may be allocated until usage goes
-+below the limit again. When set to 0, no limit is applied, which is the default
-+setting.
-+
-+==============================================================
-+
-+pipe-user-pages-soft:
-+
-+Maximum total number of pages a non-privileged user may allocate for pipes
-+before the pipe size gets limited to a single page. Once this limit is reached,
-+new pipes will be limited to a single page in size for this user in order to
-+limit total memory usage, and trying to increase them using fcntl() will be
-+denied until usage goes below the limit again. The default value allows to
-+allocate up to 1024 pipes at their default size. When set to 0, no limit is
-+applied.
-+
-+==============================================================
-+
- protected_hardlinks:
- 
- A long-standing class of security issues is the hardlink-based
-diff --git a/fs/pipe.c b/fs/pipe.c
-index 42cf8ddf0e55..ab8dad3ccb6a 100644
---- a/fs/pipe.c
-+++ b/fs/pipe.c
-@@ -38,6 +38,12 @@ unsigned int pipe_max_size = 1048576;
-  */
- unsigned int pipe_min_size = PAGE_SIZE;
- 
-+/* Maximum allocatable pages per user. Hard limit is unset by default, soft
-+ * matches default values.
-+ */
-+unsigned long pipe_user_pages_hard;
-+unsigned long pipe_user_pages_soft = PIPE_DEF_BUFFERS * INR_OPEN_CUR;
-+
- /*
-  * We use a start+len construction, which provides full use of the 
-  * allocated memory.
-@@ -583,20 +589,49 @@ pipe_fasync(int fd, struct file *filp, int on)
- 	return retval;
- }
- 
-+static void account_pipe_buffers(struct pipe_inode_info *pipe,
-+                                 unsigned long old, unsigned long new)
-+{
-+	atomic_long_add(new - old, &pipe->user->pipe_bufs);
-+}
-+
-+static bool too_many_pipe_buffers_soft(struct user_struct *user)
-+{
-+	return pipe_user_pages_soft &&
-+	       atomic_long_read(&user->pipe_bufs) >= pipe_user_pages_soft;
-+}
-+
-+static bool too_many_pipe_buffers_hard(struct user_struct *user)
-+{
-+	return pipe_user_pages_hard &&
-+	       atomic_long_read(&user->pipe_bufs) >= pipe_user_pages_hard;
-+}
-+
- struct pipe_inode_info *alloc_pipe_info(void)
- {
- 	struct pipe_inode_info *pipe;
- 
- 	pipe = kzalloc(sizeof(struct pipe_inode_info), GFP_KERNEL);
- 	if (pipe) {
--		pipe->bufs = kzalloc(sizeof(struct pipe_buffer) * PIPE_DEF_BUFFERS, GFP_KERNEL);
-+		unsigned long pipe_bufs = PIPE_DEF_BUFFERS;
-+		struct user_struct *user = get_current_user();
-+
-+		if (!too_many_pipe_buffers_hard(user)) {
-+			if (too_many_pipe_buffers_soft(user))
-+				pipe_bufs = 1;
-+			pipe->bufs = kzalloc(sizeof(struct pipe_buffer) * pipe_bufs, GFP_KERNEL);
-+		}
-+
- 		if (pipe->bufs) {
- 			init_waitqueue_head(&pipe->wait);
- 			pipe->r_counter = pipe->w_counter = 1;
--			pipe->buffers = PIPE_DEF_BUFFERS;
-+			pipe->buffers = pipe_bufs;
-+			pipe->user = user;
-+			account_pipe_buffers(pipe, 0, pipe_bufs);
- 			mutex_init(&pipe->mutex);
- 			return pipe;
- 		}
-+		free_uid(user);
- 		kfree(pipe);
- 	}
- 
-@@ -607,6 +642,8 @@ void free_pipe_info(struct pipe_inode_info *pipe)
- {
- 	int i;
- 
-+	account_pipe_buffers(pipe, pipe->buffers, 0);
-+	free_uid(pipe->user);
- 	for (i = 0; i < pipe->buffers; i++) {
- 		struct pipe_buffer *buf = pipe->bufs + i;
- 		if (buf->ops)
-@@ -998,6 +1035,7 @@ static long pipe_set_size(struct pipe_inode_info *pipe, unsigned long nr_pages)
- 			memcpy(bufs + head, pipe->bufs, tail * sizeof(struct pipe_buffer));
- 	}
- 
-+	account_pipe_buffers(pipe, pipe->buffers, nr_pages);
- 	pipe->curbuf = 0;
- 	kfree(pipe->bufs);
- 	pipe->bufs = bufs;
-@@ -1069,6 +1107,11 @@ long pipe_fcntl(struct file *file, unsigned int cmd, unsigned long arg)
- 		if (!capable(CAP_SYS_RESOURCE) && size > pipe_max_size) {
- 			ret = -EPERM;
- 			goto out;
-+		} else if ((too_many_pipe_buffers_hard(pipe->user) ||
-+			    too_many_pipe_buffers_soft(pipe->user)) &&
-+		           !capable(CAP_SYS_RESOURCE) && !capable(CAP_SYS_ADMIN)) {
-+			ret = -EPERM;
-+			goto out;
- 		}
- 		ret = pipe_set_size(pipe, nr_pages);
- 		break;
-diff --git a/include/linux/pipe_fs_i.h b/include/linux/pipe_fs_i.h
-index eb8b8ac6df3c..24f5470d3944 100644
---- a/include/linux/pipe_fs_i.h
-+++ b/include/linux/pipe_fs_i.h
-@@ -42,6 +42,7 @@ struct pipe_buffer {
-  *	@fasync_readers: reader side fasync
-  *	@fasync_writers: writer side fasync
-  *	@bufs: the circular array of pipe buffers
-+ *	@user: the user who created this pipe
-  **/
- struct pipe_inode_info {
- 	struct mutex mutex;
-@@ -57,6 +58,7 @@ struct pipe_inode_info {
- 	struct fasync_struct *fasync_readers;
- 	struct fasync_struct *fasync_writers;
- 	struct pipe_buffer *bufs;
-+	struct user_struct *user;
- };
- 
- /*
-@@ -123,6 +125,8 @@ void pipe_unlock(struct pipe_inode_info *);
- void pipe_double_lock(struct pipe_inode_info *, struct pipe_inode_info *);
- 
- extern unsigned int pipe_max_size, pipe_min_size;
-+extern unsigned long pipe_user_pages_hard;
-+extern unsigned long pipe_user_pages_soft;
- int pipe_proc_fn(struct ctl_table *, int, void __user *, size_t *, loff_t *);
- 
- 
-diff --git a/include/linux/sched.h b/include/linux/sched.h
-index 61aa9bbea871..1589ddc88e38 100644
---- a/include/linux/sched.h
-+++ b/include/linux/sched.h
-@@ -835,6 +835,7 @@ struct user_struct {
- #endif
- 	unsigned long locked_shm; /* How many pages of mlocked shm ? */
- 	unsigned long unix_inflight;	/* How many files in flight in unix sockets */
-+	atomic_long_t pipe_bufs;  /* how many pages are allocated in pipe buffers */
- 
- #ifdef CONFIG_KEYS
- 	struct key *uid_keyring;	/* UID specific keyring */
-diff --git a/kernel/sysctl.c b/kernel/sysctl.c
-index c810f8afdb7f..f6fd236429bd 100644
---- a/kernel/sysctl.c
-+++ b/kernel/sysctl.c
-@@ -1757,6 +1757,20 @@ static struct ctl_table fs_table[] = {
- 		.proc_handler	= &pipe_proc_fn,
- 		.extra1		= &pipe_min_size,
- 	},
-+	{
-+		.procname	= "pipe-user-pages-hard",
-+		.data		= &pipe_user_pages_hard,
-+		.maxlen		= sizeof(pipe_user_pages_hard),
-+		.mode		= 0644,
-+		.proc_handler	= proc_doulongvec_minmax,
-+	},
-+	{
-+		.procname	= "pipe-user-pages-soft",
-+		.data		= &pipe_user_pages_soft,
-+		.maxlen		= sizeof(pipe_user_pages_soft),
-+		.mode		= 0644,
-+		.proc_handler	= proc_doulongvec_minmax,
-+	},
- 	{ }
- };
- 
--- 
-2.5.0
-
diff --git a/propogate_mnt-Handle-the-first-propogated-copy-being.patch b/propogate_mnt-Handle-the-first-propogated-copy-being.patch
new file mode 100644
index 000000000..c5c594045
--- /dev/null
+++ b/propogate_mnt-Handle-the-first-propogated-copy-being.patch
@@ -0,0 +1,131 @@
+From ba23dd7749dfeab511f2eab29eef21dde31ad480 Mon Sep 17 00:00:00 2001
+From: "Eric W. Biederman" <ebiederm@xmission.com>
+Date: Thu, 5 May 2016 09:29:29 -0500
+Subject: [PATCH] propogate_mnt: Handle the first propogated copy being a slave
+
+When the first propgated copy was a slave the following oops would result:
+> BUG: unable to handle kernel NULL pointer dereference at 0000000000000010
+> IP: [<ffffffff811fba4e>] propagate_one+0xbe/0x1c0
+> PGD bacd4067 PUD bac66067 PMD 0
+> Oops: 0000 [#1] SMP
+> Modules linked in:
+> CPU: 1 PID: 824 Comm: mount Not tainted 4.6.0-rc5userns+ #1523
+> Hardware name: Bochs Bochs, BIOS Bochs 01/01/2007
+> task: ffff8800bb0a8000 ti: ffff8800bac3c000 task.ti: ffff8800bac3c000
+> RIP: 0010:[<ffffffff811fba4e>]  [<ffffffff811fba4e>] propagate_one+0xbe/0x1c0
+> RSP: 0018:ffff8800bac3fd38  EFLAGS: 00010283
+> RAX: 0000000000000000 RBX: ffff8800bb77ec00 RCX: 0000000000000010
+> RDX: 0000000000000000 RSI: ffff8800bb58c000 RDI: ffff8800bb58c480
+> RBP: ffff8800bac3fd48 R08: 0000000000000001 R09: 0000000000000000
+> R10: 0000000000001ca1 R11: 0000000000001c9d R12: 0000000000000000
+> R13: ffff8800ba713800 R14: ffff8800bac3fda0 R15: ffff8800bb77ec00
+> FS:  00007f3c0cd9b7e0(0000) GS:ffff8800bfb00000(0000) knlGS:0000000000000000
+> CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
+> CR2: 0000000000000010 CR3: 00000000bb79d000 CR4: 00000000000006e0
+> Stack:
+>  ffff8800bb77ec00 0000000000000000 ffff8800bac3fd88 ffffffff811fbf85
+>  ffff8800bac3fd98 ffff8800bb77f080 ffff8800ba713800 ffff8800bb262b40
+>  0000000000000000 0000000000000000 ffff8800bac3fdd8 ffffffff811f1da0
+> Call Trace:
+>  [<ffffffff811fbf85>] propagate_mnt+0x105/0x140
+>  [<ffffffff811f1da0>] attach_recursive_mnt+0x120/0x1e0
+>  [<ffffffff811f1ec3>] graft_tree+0x63/0x70
+>  [<ffffffff811f1f6b>] do_add_mount+0x9b/0x100
+>  [<ffffffff811f2c1a>] do_mount+0x2aa/0xdf0
+>  [<ffffffff8117efbe>] ? strndup_user+0x4e/0x70
+>  [<ffffffff811f3a45>] SyS_mount+0x75/0xc0
+>  [<ffffffff8100242b>] do_syscall_64+0x4b/0xa0
+>  [<ffffffff81988f3c>] entry_SYSCALL64_slow_path+0x25/0x25
+> Code: 00 00 75 ec 48 89 0d 02 22 22 01 8b 89 10 01 00 00 48 89 05 fd 21 22 01 39 8e 10 01 00 00 0f 84 e0 00 00 00 48 8b 80 d8 00 00 00 <48> 8b 50 10 48 89 05 df 21 22 01 48 89 15 d0 21 22 01 8b 53 30
+> RIP  [<ffffffff811fba4e>] propagate_one+0xbe/0x1c0
+>  RSP <ffff8800bac3fd38>
+> CR2: 0000000000000010
+> ---[ end trace 2725ecd95164f217 ]---
+
+This oops happens with the namespace_sem held and can be triggered by
+non-root users.  An all around not pleasant experience.
+
+To avoid this scenario when finding the appropriate source mount to
+copy stop the walk up the mnt_master chain when the first source mount
+is encountered.
+
+Further rewrite the walk up the last_source mnt_master chain so that
+it is clear what is going on.
+
+The reason why the first source mount is special is that it it's
+mnt_parent is not a mount in the dest_mnt propagation tree, and as
+such termination conditions based up on the dest_mnt mount propgation
+tree do not make sense.
+
+To avoid other kinds of confusion last_dest is not changed when
+computing last_source.  last_dest is only used once in propagate_one
+and that is above the point of the code being modified, so changing
+the global variable is meaningless and confusing.
+
+Cc: stable@vger.kernel.org
+fixes: f2ebb3a921c1ca1e2ddd9242e95a1989a50c4c68 ("smarter propagate_mnt()")
+Reported-by: Tycho Andersen <tycho.andersen@canonical.com>
+Reviewed-by: Seth Forshee <seth.forshee@canonical.com>
+Tested-by: Seth Forshee <seth.forshee@canonical.com>
+Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
+---
+ fs/pnode.c | 25 ++++++++++++++-----------
+ 1 file changed, 14 insertions(+), 11 deletions(-)
+
+diff --git a/fs/pnode.c b/fs/pnode.c
+index c524fdddc7fb..99899705b105 100644
+--- a/fs/pnode.c
++++ b/fs/pnode.c
+@@ -198,7 +198,7 @@ static struct mount *next_group(struct mount *m, struct mount *origin)
+ 
+ /* all accesses are serialized by namespace_sem */
+ static struct user_namespace *user_ns;
+-static struct mount *last_dest, *last_source, *dest_master;
++static struct mount *last_dest, *first_source, *last_source, *dest_master;
+ static struct mountpoint *mp;
+ static struct hlist_head *list;
+ 
+@@ -221,20 +221,22 @@ static int propagate_one(struct mount *m)
+ 		type = CL_MAKE_SHARED;
+ 	} else {
+ 		struct mount *n, *p;
++		bool done;
+ 		for (n = m; ; n = p) {
+ 			p = n->mnt_master;
+-			if (p == dest_master || IS_MNT_MARKED(p)) {
+-				while (last_dest->mnt_master != p) {
+-					last_source = last_source->mnt_master;
+-					last_dest = last_source->mnt_parent;
+-				}
+-				if (!peers(n, last_dest)) {
+-					last_source = last_source->mnt_master;
+-					last_dest = last_source->mnt_parent;
+-				}
++			if (p == dest_master || IS_MNT_MARKED(p))
+ 				break;
+-			}
+ 		}
++		do {
++			struct mount *parent = last_source->mnt_parent;
++			if (last_source == first_source)
++				break;
++			done = parent->mnt_master == p;
++			if (done && peers(n, parent))
++				break;
++			last_source = last_source->mnt_master;
++		} while (!done);
++
+ 		type = CL_SLAVE;
+ 		/* beginning of peer group among the slaves? */
+ 		if (IS_MNT_SHARED(m))
+@@ -286,6 +288,7 @@ int propagate_mnt(struct mount *dest_mnt, struct mountpoint *dest_mp,
+ 	 */
+ 	user_ns = current->nsproxy->mnt_ns->user_ns;
+ 	last_dest = dest_mnt;
++	first_source = source_mnt;
+ 	last_source = source_mnt;
+ 	mp = dest_mp;
+ 	list = tree_list;
+-- 
+2.5.5
+
diff --git a/rebase-notes.txt b/rebase-notes.txt
index 39029bb0d..1cc632157 100644
--- a/rebase-notes.txt
+++ b/rebase-notes.txt
@@ -1,7 +1,9 @@
-Linux 3.4 rebase notes:
+Linux 4.5 rebase notes:
 
-* Look at the CPU modalias patches from Andi.  See if they are sufficient to
-  build the cpufreq drivers as modules again (rhbz 713572 but mostly to just
-  make this person in IRC be quiet)
+- Check on status of drm-i915-turn-off-wc-mmaps.patch (Should be okay to remove in F24, but not F22 or F23)
+- Check on status of disabled ZONE_DMA (They can now coexist with ZONE_DEVICE)
+- Check on status of CONFIG_DW_DMAC_CORE ( Built-in DW_DMAC for now, revisit later)
 
-* Make sure X32 stays disabled.  Preferably forever
+Linux 4.4 rebase notes:
+
+CONFIG_RTL8XXXU_UNTESTED should be turned off. Great for rawhide, not for stable
diff --git a/revert-stmmac-Fix-eth0-No-PHY-found-regression.patch b/revert-stmmac-Fix-eth0-No-PHY-found-regression.patch
new file mode 100644
index 000000000..68b9cd3ab
--- /dev/null
+++ b/revert-stmmac-Fix-eth0-No-PHY-found-regression.patch
@@ -0,0 +1,87 @@
+From 44f947bb8ef5f4add9f2d84e1ff53afd8f2f5537 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Wed, 16 Mar 2016 15:21:44 +0000
+Subject: [PATCH 1/2] Revert "stmmac: Fix 'eth0: No PHY found' regression"
+
+This reverts commit 88f8b1bb41c6208f81b6a480244533ded7b59493.
+---
+ drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c     | 11 ++++++++++-
+ drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c |  9 +--------
+ include/linux/stmmac.h                                |  1 -
+ 3 files changed, 11 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+index efb54f3..0faf163 100644
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+@@ -199,12 +199,21 @@ int stmmac_mdio_register(struct net_device *ndev)
+ 	struct stmmac_priv *priv = netdev_priv(ndev);
+ 	struct stmmac_mdio_bus_data *mdio_bus_data = priv->plat->mdio_bus_data;
+ 	int addr, found;
+-	struct device_node *mdio_node = priv->plat->mdio_node;
++	struct device_node *mdio_node = NULL;
++	struct device_node *child_node = NULL;
+ 
+ 	if (!mdio_bus_data)
+ 		return 0;
+ 
+ 	if (IS_ENABLED(CONFIG_OF)) {
++		for_each_child_of_node(priv->device->of_node, child_node) {
++			if (of_device_is_compatible(child_node,
++						    "snps,dwmac-mdio")) {
++				mdio_node = child_node;
++				break;
++			}
++		}
++
+ 		if (mdio_node) {
+ 			netdev_dbg(ndev, "FOUND MDIO subnode\n");
+ 		} else {
+diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+index 4514ba7..6a52fa1 100644
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+@@ -110,7 +110,6 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
+ 	struct device_node *np = pdev->dev.of_node;
+ 	struct plat_stmmacenet_data *plat;
+ 	struct stmmac_dma_cfg *dma_cfg;
+-	struct device_node *child_node = NULL;
+ 
+ 	plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
+ 	if (!plat)
+@@ -141,19 +140,13 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
+ 		plat->phy_node = of_node_get(np);
+ 	}
+ 
+-	for_each_child_of_node(np, child_node)
+-		if (of_device_is_compatible(child_node,	"snps,dwmac-mdio")) {
+-			plat->mdio_node = child_node;
+-			break;
+-		}
+-
+ 	/* "snps,phy-addr" is not a standard property. Mark it as deprecated
+ 	 * and warn of its use. Remove this when phy node support is added.
+ 	 */
+ 	if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
+ 		dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
+ 
+-	if ((plat->phy_node && !of_phy_is_fixed_link(np)) || !plat->mdio_node)
++	if ((plat->phy_node && !of_phy_is_fixed_link(np)) || plat->phy_bus_name)
+ 		plat->mdio_bus_data = NULL;
+ 	else
+ 		plat->mdio_bus_data =
+diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
+index 881a79d..eead8ab 100644
+--- a/include/linux/stmmac.h
++++ b/include/linux/stmmac.h
+@@ -100,7 +100,6 @@ struct plat_stmmacenet_data {
+ 	int interface;
+ 	struct stmmac_mdio_bus_data *mdio_bus_data;
+ 	struct device_node *phy_node;
+-	struct device_node *mdio_node;
+ 	struct stmmac_dma_cfg *dma_cfg;
+ 	int clk_csr;
+ 	int has_gmac;
+-- 
+2.5.0
+
diff --git a/sources b/sources
index baa462bfc..623f6493c 100644
--- a/sources
+++ b/sources
@@ -1,3 +1,3 @@
-9a78fa2eb6c68ca5a40ed5af08142599  linux-4.4.tar.xz
-dcbc8fe378a676d5d0dd208cf524e144  perf-man-4.4.tar.gz
-b0c445b438e7563f2e33dba9edc926eb  patch-4.4.9.xz
+a60d48eee08ec0536d5efb17ca819aef  linux-4.5.tar.xz
+6f557fe90b800b615c85c2ca04da6154  perf-man-4.5.tar.gz
+efc81327bd2bd0d946f057ac71cbb1a7  patch-4.5.3.xz
diff --git a/sp5100_tco-properly-check-for-new-register-layouts.patch b/sp5100_tco-properly-check-for-new-register-layouts.patch
new file mode 100644
index 000000000..83c86d151
--- /dev/null
+++ b/sp5100_tco-properly-check-for-new-register-layouts.patch
@@ -0,0 +1,75 @@
+From 5896a59895689db447e888c1714022bbb9526ede Mon Sep 17 00:00:00 2001
+From: Lucas Stach <dev@lynxeye.de>
+Date: Tue, 3 May 2016 19:15:58 +0200
+Subject: [PATCH] sp5100_tco: properly check for new register layouts
+
+Commits 190aa4304de6 (Add AMD Mullins platform support) and
+cca118fa2a0a94 (Add AMD Carrizo platform support) enabled the
+driver on a lot more devices, but the following commit missed
+a single location in the code when checking if the SB800 register
+offsets should be used. This leads to the wrong register being
+written which in turn causes ACPI to go haywire.
+
+Fix this by introducing a helper function to check for the new
+register layout and use this consistently.
+
+https://bugzilla.kernel.org/show_bug.cgi?id=114201
+https://bugzilla.redhat.com/show_bug.cgi?id=1329910
+Fixes: bdecfcdb5461 (sp5100_tco: fix the device check for SB800
+and later chipsets)
+Cc: stable@vger.kernel.org (4.5+)
+Signed-off-by: Lucas Stach <dev@lynxeye.de>
+---
+ drivers/watchdog/sp5100_tco.c | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c
+index 6467b91..028618c 100644
+--- a/drivers/watchdog/sp5100_tco.c
++++ b/drivers/watchdog/sp5100_tco.c
+@@ -73,6 +73,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started."
+ /*
+  * Some TCO specific functions
+  */
++
++static bool tco_has_sp5100_reg_layout(struct pci_dev *dev)
++{
++	return dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
++	       dev->revision < 0x40;
++}
++
+ static void tco_timer_start(void)
+ {
+ 	u32 val;
+@@ -129,7 +136,7 @@ static void tco_timer_enable(void)
+ {
+ 	int val;
+
+-	if (sp5100_tco_pci->revision >= 0x40) {
++	if (!tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
+ 		/* For SB800 or later */
+ 		/* Set the Watchdog timer resolution to 1 sec */
+ 		outb(SB800_PM_WATCHDOG_CONFIG, SB800_IO_PM_INDEX_REG);
+@@ -342,8 +349,7 @@ static unsigned char sp5100_tco_setupdevice(void)
+ 	/*
+ 	 * Determine type of southbridge chipset.
+ 	 */
+-	if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
+-	    sp5100_tco_pci->revision < 0x40) {
++	if (tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
+ 		dev_name = SP5100_DEVNAME;
+ 		index_reg = SP5100_IO_PM_INDEX_REG;
+ 		data_reg = SP5100_IO_PM_DATA_REG;
+@@ -388,8 +394,7 @@ static unsigned char sp5100_tco_setupdevice(void)
+ 	 * Secondly, Find the watchdog timer MMIO address
+ 	 * from SBResource_MMIO register.
+ 	 */
+-	if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
+-	    sp5100_tco_pci->revision < 0x40) {
++	if (tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
+ 		/* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
+ 		pci_read_config_dword(sp5100_tco_pci,
+ 				      SP5100_SB_RESOURCE_MMIO_BASE, &val);
+-- 
+2.7.4
+
diff --git a/stmmac-fix-MDIO-settings.patch b/stmmac-fix-MDIO-settings.patch
new file mode 100644
index 000000000..41fa928a4
--- /dev/null
+++ b/stmmac-fix-MDIO-settings.patch
@@ -0,0 +1,235 @@
+From d55a02f460ffd64a5ba7f331489af87edeebf8da Mon Sep 17 00:00:00 2001
+From: Giuseppe CAVALLARO <peppe.cavallaro@st.com>
+Date: Wed, 16 Mar 2016 10:38:49 +0100
+Subject: [PATCH 2/2] stmmac: fix MDIO settings
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Initially the phy_bus_name was added to manipulate the
+driver name but it was recently just used to manage the
+fixed-link and then to take some decision at run-time.
+So the patch uses the is_pseudo_fixed_link and removes
+the phy_bus_name variable not necessary anymore.
+
+The driver can manage the mdio registration by using phy-handle,
+dwmac-mdio and own parameter e.g. snps,phy-addr.
+This patch takes care about all these possible configurations
+and fixes the mdio registration in case of there is a real
+transceiver or a switch (that needs to be managed by using
+fixed-link).
+
+Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
+Reviewed-by: Andreas Färber <afaerber@suse.de>
+Tested-by: Frank Schäfer <fschaefer.oss@googlemail.com>
+Cc: Gabriel Fernandez <gabriel.fernandez@linaro.org>
+Cc: Dinh Nguyen <dinh.linux@gmail.com>
+Cc: David S. Miller <davem@davemloft.net>
+Cc: Phil Reid <preid@electromag.com.au>
+---
+ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  | 11 +--
+ drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c  | 19 +----
+ .../net/ethernet/stmicro/stmmac/stmmac_platform.c  | 84 +++++++++++++++++-----
+ include/linux/stmmac.h                             |  2 +-
+ 4 files changed, 71 insertions(+), 45 deletions(-)
+
+diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+index c21015b..389d7d0 100644
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+@@ -271,7 +271,6 @@ static void stmmac_eee_ctrl_timer(unsigned long arg)
+  */
+ bool stmmac_eee_init(struct stmmac_priv *priv)
+ {
+-	char *phy_bus_name = priv->plat->phy_bus_name;
+ 	unsigned long flags;
+ 	bool ret = false;
+ 
+@@ -283,7 +282,7 @@ bool stmmac_eee_init(struct stmmac_priv *priv)
+ 		goto out;
+ 
+ 	/* Never init EEE in case of a switch is attached */
+-	if (phy_bus_name && (!strcmp(phy_bus_name, "fixed")))
++	if (priv->phydev->is_pseudo_fixed_link)
+ 		goto out;
+ 
+ 	/* MAC core supports the EEE feature. */
+@@ -820,12 +819,8 @@ static int stmmac_init_phy(struct net_device *dev)
+ 		phydev = of_phy_connect(dev, priv->plat->phy_node,
+ 					&stmmac_adjust_link, 0, interface);
+ 	} else {
+-		if (priv->plat->phy_bus_name)
+-			snprintf(bus_id, MII_BUS_ID_SIZE, "%s-%x",
+-				 priv->plat->phy_bus_name, priv->plat->bus_id);
+-		else
+-			snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x",
+-				 priv->plat->bus_id);
++		snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x",
++			 priv->plat->bus_id);
+ 
+ 		snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
+ 			 priv->plat->phy_addr);
+diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+index 0faf163..3f5512f 100644
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+@@ -198,29 +198,12 @@ int stmmac_mdio_register(struct net_device *ndev)
+ 	struct mii_bus *new_bus;
+ 	struct stmmac_priv *priv = netdev_priv(ndev);
+ 	struct stmmac_mdio_bus_data *mdio_bus_data = priv->plat->mdio_bus_data;
++	struct device_node *mdio_node = priv->plat->mdio_node;
+ 	int addr, found;
+-	struct device_node *mdio_node = NULL;
+-	struct device_node *child_node = NULL;
+ 
+ 	if (!mdio_bus_data)
+ 		return 0;
+ 
+-	if (IS_ENABLED(CONFIG_OF)) {
+-		for_each_child_of_node(priv->device->of_node, child_node) {
+-			if (of_device_is_compatible(child_node,
+-						    "snps,dwmac-mdio")) {
+-				mdio_node = child_node;
+-				break;
+-			}
+-		}
+-
+-		if (mdio_node) {
+-			netdev_dbg(ndev, "FOUND MDIO subnode\n");
+-		} else {
+-			netdev_warn(ndev, "No MDIO subnode found\n");
+-		}
+-	}
+-
+ 	new_bus = mdiobus_alloc();
+ 	if (new_bus == NULL)
+ 		return -ENOMEM;
+diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+index 6a52fa1..190fb6d 100644
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+@@ -96,6 +96,69 @@ static int dwmac1000_validate_ucast_entries(int ucast_entries)
+ }
+ 
+ /**
++ * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
++ * @plat: driver data platform structure
++ * @np: device tree node
++ * @dev: device pointer
++ * Description:
++ * The mdio bus will be allocated in case of a phy transceiver is on board;
++ * it will be NULL if the fixed-link is configured.
++ * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
++ * in any case (for DSA, mdio must be registered even if fixed-link).
++ * The table below sums the supported configurations:
++ *	-------------------------------
++ *	snps,phy-addr	|     Y
++ *	-------------------------------
++ *	phy-handle	|     Y
++ *	-------------------------------
++ *	fixed-link	|     N
++ *	-------------------------------
++ *	snps,dwmac-mdio	|
++ *	  even if	|     Y
++ *	fixed-link	|
++ *	-------------------------------
++ *
++ * It returns 0 in case of success otherwise -ENODEV.
++ */
++static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
++			 struct device_node *np, struct device *dev)
++{
++	bool mdio = true;
++
++	/* If phy-handle property is passed from DT, use it as the PHY */
++	plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
++	if (plat->phy_node)
++		dev_dbg(dev, "Found phy-handle subnode\n");
++
++	/* If phy-handle is not specified, check if we have a fixed-phy */
++	if (!plat->phy_node && of_phy_is_fixed_link(np)) {
++		if ((of_phy_register_fixed_link(np) < 0))
++			return -ENODEV;
++
++		dev_dbg(dev, "Found fixed-link subnode\n");
++		plat->phy_node = of_node_get(np);
++		mdio = false;
++	}
++
++	/* If snps,dwmac-mdio is passed from DT, always register the MDIO */
++	for_each_child_of_node(np, plat->mdio_node) {
++		if (of_device_is_compatible(plat->mdio_node, "snps,dwmac-mdio"))
++			break;
++	}
++
++	if (plat->mdio_node) {
++		dev_dbg(dev, "Found MDIO subnode\n");
++		mdio = true;
++	}
++
++	if (mdio)
++		plat->mdio_bus_data =
++			devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
++				     GFP_KERNEL);
++	return 0;
++}
++
++/**
+  * stmmac_probe_config_dt - parse device-tree driver parameters
+  * @pdev: platform_device structure
+  * @plat: driver data platform structure
+@@ -129,30 +192,15 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
+ 	/* Default to phy auto-detection */
+ 	plat->phy_addr = -1;
+ 
+-	/* If we find a phy-handle property, use it as the PHY */
+-	plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
+-
+-	/* If phy-handle is not specified, check if we have a fixed-phy */
+-	if (!plat->phy_node && of_phy_is_fixed_link(np)) {
+-		if ((of_phy_register_fixed_link(np) < 0))
+-			return ERR_PTR(-ENODEV);
+-
+-		plat->phy_node = of_node_get(np);
+-	}
+-
+ 	/* "snps,phy-addr" is not a standard property. Mark it as deprecated
+ 	 * and warn of its use. Remove this when phy node support is added.
+ 	 */
+ 	if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
+ 		dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
+ 
+-	if ((plat->phy_node && !of_phy_is_fixed_link(np)) || plat->phy_bus_name)
+-		plat->mdio_bus_data = NULL;
+-	else
+-		plat->mdio_bus_data =
+-			devm_kzalloc(&pdev->dev,
+-				     sizeof(struct stmmac_mdio_bus_data),
+-				     GFP_KERNEL);
++	/* To Configure PHY by using all device-tree supported properties */
++	if (stmmac_dt_phy(plat, np, &pdev->dev))
++		return ERR_PTR(-ENODEV);
+ 
+ 	of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
+ 
+diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
+index eead8ab..8b1ff2b 100644
+--- a/include/linux/stmmac.h
++++ b/include/linux/stmmac.h
+@@ -94,12 +94,12 @@ struct stmmac_dma_cfg {
+ };
+ 
+ struct plat_stmmacenet_data {
+-	char *phy_bus_name;
+ 	int bus_id;
+ 	int phy_addr;
+ 	int interface;
+ 	struct stmmac_mdio_bus_data *mdio_bus_data;
+ 	struct device_node *phy_node;
++	struct device_node *mdio_node;
+ 	struct stmmac_dma_cfg *dma_cfg;
+ 	int clk_csr;
+ 	int has_gmac;
+-- 
+2.5.0
+
diff --git a/usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch b/usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch
new file mode 100644
index 000000000..2a44851d7
--- /dev/null
+++ b/usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch
@@ -0,0 +1,53 @@
+From patchwork Wed Apr  6 07:54:05 2016
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: usb: phy: tegra: Add 38.4MHz clock table entry
+From: Hunter Laux <hunterlaux@gmail.com>
+X-Patchwork-Id: 606877
+Message-Id: <1459929245-23449-1-git-send-email-hunterlaux@gmail.com>
+To: Stephen Warren <swarren@wwwdotorg.org>,
+ Thierry Reding <thierry.reding@gmail.com>,
+ Alexandre Courbot <gnurou@gmail.com>, linux-tegra@vger.kernel.org
+Cc: Hunter Laux <hunterlaux@gmail.com>
+Date: Wed,  6 Apr 2016 00:54:05 -0700
+
+The Tegra210 uses a 38.4MHz OSC. This clock table entry is required to
+use the ehci phy on the Jetson TX1.
+
+The xtal_freq_count is actually a 12 bit value, so it should be a u16
+instead of u8.
+
+Signed-off-by: Hunter Laux <hunterlaux@gmail.com>
+---
+ drivers/usb/phy/phy-tegra-usb.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
+index 5fe4a57..f0431f0 100644
+--- a/drivers/usb/phy/phy-tegra-usb.c
++++ b/drivers/usb/phy/phy-tegra-usb.c
+@@ -164,7 +164,7 @@ struct tegra_xtal_freq {
+ 	u8 enable_delay;
+ 	u8 stable_count;
+ 	u8 active_delay;
+-	u8 xtal_freq_count;
++	u16 xtal_freq_count;
+ 	u16 debounce;
+ };
+ 
+@@ -201,6 +201,14 @@ static const struct tegra_xtal_freq tegra_freq_table[] = {
+ 		.xtal_freq_count = 0xFE,
+ 		.debounce = 0xFDE8,
+ 	},
++	{
++		.freq = 38400000,
++		.enable_delay = 0x00,
++		.stable_count = 0x00,
++		.active_delay = 0x18,
++		.xtal_freq_count = 0x177,
++		.debounce = 0xBB80,
++	},
+ };
+ 
+ static void set_pts(struct tegra_usb_phy *phy, u8 pts_val)
diff --git a/watchdog-Disable-watchdog-on-virtual-machines.patch b/watchdog-Disable-watchdog-on-virtual-machines.patch
index 11bce5bb7..0a988c189 100644
--- a/watchdog-Disable-watchdog-on-virtual-machines.patch
+++ b/watchdog-Disable-watchdog-on-virtual-machines.patch
@@ -25,9 +25,9 @@ index 18f34cf..6aadffe 100644
 --- a/kernel/watchdog.c
 +++ b/kernel/watchdog.c
 @@ -20,6 +20,7 @@
- #include <linux/smpboot.h>
  #include <linux/sched/rt.h>
  #include <linux/tick.h>
+ #include <linux/workqueue.h>
 +#include <linux/dmi.h>
  
  #include <asm/irq_regs.h>
diff --git a/x86-build-Build-compressed-x86-kernels-as-PIE.patch b/x86-build-Build-compressed-x86-kernels-as-PIE.patch
new file mode 100644
index 000000000..064cb485b
--- /dev/null
+++ b/x86-build-Build-compressed-x86-kernels-as-PIE.patch
@@ -0,0 +1,159 @@
+From 6d92bc9d483aa1751755a66fee8fb39dffb088c0 Mon Sep 17 00:00:00 2001
+From: "H.J. Lu" <hjl.tools@gmail.com>
+Date: Wed, 16 Mar 2016 20:04:35 -0700
+Subject: [PATCH] x86/build: Build compressed x86 kernels as PIE
+
+The 32-bit x86 assembler in binutils 2.26 will generate R_386_GOT32X
+relocation to get the symbol address in PIC.  When the compressed x86
+kernel isn't built as PIC, the linker optimizes R_386_GOT32X relocations
+to their fixed symbol addresses.  However, when the compressed x86
+kernel is loaded at a different address, it leads to the following
+load failure:
+
+  Failed to allocate space for phdrs
+
+during the decompression stage.
+
+If the compressed x86 kernel is relocatable at run-time, it should be
+compiled with -fPIE, instead of -fPIC, if possible and should be built as
+Position Independent Executable (PIE) so that linker won't optimize
+R_386_GOT32X relocation to its fixed symbol address.
+
+Older linkers generate R_386_32 relocations against locally defined
+symbols, _bss, _ebss, _got and _egot, in PIE.  It isn't wrong, just less
+optimal than R_386_RELATIVE.  But the x86 kernel fails to properly handle
+R_386_32 relocations when relocating the kernel.  To generate
+R_386_RELATIVE relocations, we mark _bss, _ebss, _got and _egot as
+hidden in both 32-bit and 64-bit x86 kernels.
+
+To build a 64-bit compressed x86 kernel as PIE, we need to disable the
+relocation overflow check to avoid relocation overflow errors. We do
+this with a new linker command-line option, -z noreloc-overflow, which
+got added recently:
+
+ commit 4c10bbaa0912742322f10d9d5bb630ba4e15dfa7
+ Author: H.J. Lu <hjl.tools@gmail.com>
+ Date:   Tue Mar 15 11:07:06 2016 -0700
+
+    Add -z noreloc-overflow option to x86-64 ld
+
+    Add -z noreloc-overflow command-line option to the x86-64 ELF linker to
+    disable relocation overflow check.  This can be used to avoid relocation
+    overflow check if there will be no dynamic relocation overflow at
+    run-time.
+
+The 64-bit compressed x86 kernel is built as PIE only if the linker supports
+-z noreloc-overflow.  So far 64-bit relocatable compressed x86 kernel
+boots fine even when it is built as a normal executable.
+
+Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
+Cc: Andy Lutomirski <luto@amacapital.net>
+Cc: Borislav Petkov <bp@alien8.de>
+Cc: Brian Gerst <brgerst@gmail.com>
+Cc: Denys Vlasenko <dvlasenk@redhat.com>
+Cc: H. Peter Anvin <hpa@zytor.com>
+Cc: Linus Torvalds <torvalds@linux-foundation.org>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: linux-kernel@vger.kernel.org
+[ Edited the changelog and comments. ]
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+---
+ arch/x86/boot/compressed/Makefile  | 14 +++++++++++++-
+ arch/x86/boot/compressed/head_32.S | 28 ++++++++++++++++++++++++++++
+ arch/x86/boot/compressed/head_64.S |  8 ++++++++
+ 3 files changed, 49 insertions(+), 1 deletion(-)
+
+diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
+index 6915ff2..8774cb2 100644
+--- a/arch/x86/boot/compressed/Makefile
++++ b/arch/x86/boot/compressed/Makefile
+@@ -26,7 +26,7 @@ targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \
+ 	vmlinux.bin.xz vmlinux.bin.lzo vmlinux.bin.lz4
+
+ KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2
+-KBUILD_CFLAGS += -fno-strict-aliasing -fPIC
++KBUILD_CFLAGS += -fno-strict-aliasing $(call cc-option, -fPIE, -fPIC)
+ KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING
+ cflags-$(CONFIG_X86_32) := -march=i386
+ cflags-$(CONFIG_X86_64) := -mcmodel=small
+@@ -40,6 +40,18 @@ GCOV_PROFILE := n
+ UBSAN_SANITIZE :=n
+
+ LDFLAGS := -m elf_$(UTS_MACHINE)
++ifeq ($(CONFIG_RELOCATABLE),y)
++# If kernel is relocatable, build compressed kernel as PIE.
++ifeq ($(CONFIG_X86_32),y)
++LDFLAGS += $(call ld-option, -pie) $(call ld-option, --no-dynamic-linker)
++else
++# To build 64-bit compressed kernel as PIE, we disable relocation
++# overflow check to avoid relocation overflow error with a new linker
++# command-line option, -z noreloc-overflow.
++LDFLAGS += $(shell $(LD) --help 2>&1 | grep -q "\-z noreloc-overflow" \
++	&& echo "-z noreloc-overflow -pie --no-dynamic-linker")
++endif
++endif
+ LDFLAGS_vmlinux := -T
+
+ hostprogs-y	:= mkpiggy
+diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S
+index 8ef964d..0256064 100644
+--- a/arch/x86/boot/compressed/head_32.S
++++ b/arch/x86/boot/compressed/head_32.S
+@@ -31,6 +31,34 @@
+ #include <asm/asm-offsets.h>
+ #include <asm/bootparam.h>
+
++/*
++ * The 32-bit x86 assembler in binutils 2.26 will generate R_386_GOT32X
++ * relocation to get the symbol address in PIC.  When the compressed x86
++ * kernel isn't built as PIC, the linker optimizes R_386_GOT32X
++ * relocations to their fixed symbol addresses.  However, when the
++ * compressed x86 kernel is loaded at a different address, it leads
++ * to the following load failure:
++ *
++ *   Failed to allocate space for phdrs
++ *
++ * during the decompression stage.
++ *
++ * If the compressed x86 kernel is relocatable at run-time, it should be
++ * compiled with -fPIE, instead of -fPIC, if possible and should be built as
++ * Position Independent Executable (PIE) so that linker won't optimize
++ * R_386_GOT32X relocation to its fixed symbol address.  Older
++ * linkers generate R_386_32 relocations against locally defined symbols,
++ * _bss, _ebss, _got and _egot, in PIE.  It isn't wrong, just less
++ * optimal than R_386_RELATIVE.  But the x86 kernel fails to properly handle
++ * R_386_32 relocations when relocating the kernel.  To generate
++ * R_386_RELATIVE relocations, we mark _bss, _ebss, _got and _egot as
++ * hidden:
++ */
++	.hidden _bss
++	.hidden _ebss
++	.hidden _got
++	.hidden _egot
++
+ 	__HEAD
+ ENTRY(startup_32)
+ #ifdef CONFIG_EFI_STUB
+diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
+index b0c0d16..86558a1 100644
+--- a/arch/x86/boot/compressed/head_64.S
++++ b/arch/x86/boot/compressed/head_64.S
+@@ -33,6 +33,14 @@
+ #include <asm/asm-offsets.h>
+ #include <asm/bootparam.h>
+
++/*
++ * Locally defined symbols should be marked hidden:
++ */
++	.hidden _bss
++	.hidden _ebss
++	.hidden _got
++	.hidden _egot
++
+ 	__HEAD
+ 	.code32
+ ENTRY(startup_32)
+-- 
+2.7.3
+