diff options
| author | Thorsten Leemhuis <fedora@leemhuis.info> | 2018-10-04 09:56:28 +0200 |
|---|---|---|
| committer | Thorsten Leemhuis <fedora@leemhuis.info> | 2018-10-04 09:56:28 +0200 |
| commit | cf92766cebf2886c7a41ed0498e4ae681698c1f4 (patch) | |
| tree | be1d1ef7bfad604e3baa36dee66666e037131fdf | |
| parent | b50e2a5ed9d5eb53708a99fdd62826306c224c0b (diff) | |
| parent | a3b5129661a050b3a09799986c80a730a9f85a3d (diff) | |
| download | kernel-cf92766cebf2886c7a41ed0498e4ae681698c1f4.tar.gz kernel-cf92766cebf2886c7a41ed0498e4ae681698c1f4.tar.xz kernel-cf92766cebf2886c7a41ed0498e4ae681698c1f4.zip | |
merge origin
23 files changed, 1508 insertions, 357 deletions
diff --git a/0001-brcmfmac-Remove-firmware-loading-code-duplication.patch b/0001-brcmfmac-Remove-firmware-loading-code-duplication.patch new file mode 100644 index 000000000..5145e5534 --- /dev/null +++ b/0001-brcmfmac-Remove-firmware-loading-code-duplication.patch @@ -0,0 +1,106 @@ +From 920bc5d0e3a0ffa9142b54c3b6acf253e6e24d64 Mon Sep 17 00:00:00 2001 +From: Hans de Goede <hdegoede@redhat.com> +Date: Thu, 27 Sep 2018 17:44:30 +0200 +Subject: [PATCH 1/5] brcmfmac: Remove firmware-loading code duplication + +brcmf_fw_request_next_item and brcmf_fw_request_done both have identical +code to complete the fw-request depending on the item-type. + +This commit adds a new brcmf_fw_complete_request helper removing this code +duplication. + +Signed-off-by: Hans de Goede <hdegoede@redhat.com> +--- + .../broadcom/brcm80211/brcmfmac/firmware.c | 62 +++++++++---------- + 1 file changed, 31 insertions(+), 31 deletions(-) + +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c +index 2af2251cd8e9..848c3351d107 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c +@@ -587,6 +587,34 @@ static int brcmf_fw_request_nvram_done(const struct firmware *fw, void *ctx) + return -ENOENT; + } + ++static int brcmf_fw_complete_request(const struct firmware *fw, ++ struct brcmf_fw *fwctx) ++{ ++ struct brcmf_fw_item *cur = &fwctx->req->items[fwctx->curpos]; ++ int ret = 0; ++ ++ brcmf_dbg(TRACE, "firmware %s %sfound\n", cur->path, fw ? "" : "not "); ++ ++ switch (cur->type) { ++ case BRCMF_FW_TYPE_NVRAM: ++ ret = brcmf_fw_request_nvram_done(fw, fwctx); ++ break; ++ case BRCMF_FW_TYPE_BINARY: ++ if (fw) ++ cur->binary = fw; ++ else ++ ret = -ENOENT; ++ break; ++ default: ++ /* something fishy here so bail out early */ ++ brcmf_err("unknown fw type: %d\n", cur->type); ++ release_firmware(fw); ++ ret = -EINVAL; ++ } ++ ++ return (cur->flags & BRCMF_FW_REQF_OPTIONAL) ? 0 : ret; ++} ++ + static int brcmf_fw_request_next_item(struct brcmf_fw *fwctx, bool async) + { + struct brcmf_fw_item *cur; +@@ -608,15 +636,7 @@ static int brcmf_fw_request_next_item(struct brcmf_fw *fwctx, bool async) + if (ret < 0) { + brcmf_fw_request_done(NULL, fwctx); + } else if (!async && fw) { +- brcmf_dbg(TRACE, "firmware %s %sfound\n", cur->path, +- fw ? "" : "not "); +- if (cur->type == BRCMF_FW_TYPE_BINARY) +- cur->binary = fw; +- else if (cur->type == BRCMF_FW_TYPE_NVRAM) +- brcmf_fw_request_nvram_done(fw, fwctx); +- else +- release_firmware(fw); +- ++ brcmf_fw_complete_request(fw, fwctx); + return -EAGAIN; + } + return 0; +@@ -630,28 +650,8 @@ static void brcmf_fw_request_done(const struct firmware *fw, void *ctx) + + cur = &fwctx->req->items[fwctx->curpos]; + +- brcmf_dbg(TRACE, "enter: firmware %s %sfound\n", cur->path, +- fw ? "" : "not "); +- +- if (!fw) +- ret = -ENOENT; +- +- switch (cur->type) { +- case BRCMF_FW_TYPE_NVRAM: +- ret = brcmf_fw_request_nvram_done(fw, fwctx); +- break; +- case BRCMF_FW_TYPE_BINARY: +- cur->binary = fw; +- break; +- default: +- /* something fishy here so bail out early */ +- brcmf_err("unknown fw type: %d\n", cur->type); +- release_firmware(fw); +- ret = -EINVAL; +- goto fail; +- } +- +- if (ret < 0 && !(cur->flags & BRCMF_FW_REQF_OPTIONAL)) ++ ret = brcmf_fw_complete_request(fw, fwctx); ++ if (ret < 0) + goto fail; + + do { +-- +2.19.0 + diff --git a/0002-brcmfmac-Remove-recursion-from-firmware-load-error-h.patch b/0002-brcmfmac-Remove-recursion-from-firmware-load-error-h.patch new file mode 100644 index 000000000..a0553e6e8 --- /dev/null +++ b/0002-brcmfmac-Remove-recursion-from-firmware-load-error-h.patch @@ -0,0 +1,131 @@ +From 7a2f4b4fa44268a570f6fa7782385741134f8da6 Mon Sep 17 00:00:00 2001 +From: Hans de Goede <hdegoede@redhat.com> +Date: Thu, 27 Sep 2018 17:51:36 +0200 +Subject: [PATCH 2/5] brcmfmac: Remove recursion from firmware load error + handling + +Before this commit brcmf_fw_request_done would call +brcmf_fw_request_next_item to load the next item, which on an error would +call brcmf_fw_request_done, which if the error is recoverable (*) will +then continue calling brcmf_fw_request_next_item for the next item again +which on an error will call brcmf_fw_request_done again... + +This does not blow up because we only have a limited number of items so +we never recurse too deep. But the recursion is still quite ugly and +frankly is giving me a headache, so lets fix this. + +This commit fixes this by removing brcmf_fw_request_next_item and by +making brcmf_fw_get_firmwares and brcmf_fw_request_done directly call +firmware_request_nowait resp. firmware_request themselves. + +*) brcmf_fw_request_nvram_done fallback path succeeds or + BRCMF_FW_REQF_OPTIONAL is set + +Signed-off-by: Hans de Goede <hdegoede@redhat.com> +--- + .../broadcom/brcm80211/brcmfmac/firmware.c | 65 ++++++------------- + 1 file changed, 19 insertions(+), 46 deletions(-) + +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c +index 848c3351d107..13d051cd0fcf 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c +@@ -615,33 +615,6 @@ static int brcmf_fw_complete_request(const struct firmware *fw, + return (cur->flags & BRCMF_FW_REQF_OPTIONAL) ? 0 : ret; + } + +-static int brcmf_fw_request_next_item(struct brcmf_fw *fwctx, bool async) +-{ +- struct brcmf_fw_item *cur; +- const struct firmware *fw = NULL; +- int ret; +- +- cur = &fwctx->req->items[fwctx->curpos]; +- +- brcmf_dbg(TRACE, "%srequest for %s\n", async ? "async " : "", +- cur->path); +- +- if (async) +- ret = request_firmware_nowait(THIS_MODULE, true, cur->path, +- fwctx->dev, GFP_KERNEL, fwctx, +- brcmf_fw_request_done); +- else +- ret = request_firmware(&fw, cur->path, fwctx->dev); +- +- if (ret < 0) { +- brcmf_fw_request_done(NULL, fwctx); +- } else if (!async && fw) { +- brcmf_fw_complete_request(fw, fwctx); +- return -EAGAIN; +- } +- return 0; +-} +- + static void brcmf_fw_request_done(const struct firmware *fw, void *ctx) + { + struct brcmf_fw *fwctx = ctx; +@@ -651,26 +624,19 @@ static void brcmf_fw_request_done(const struct firmware *fw, void *ctx) + cur = &fwctx->req->items[fwctx->curpos]; + + ret = brcmf_fw_complete_request(fw, fwctx); +- if (ret < 0) +- goto fail; +- +- do { +- if (++fwctx->curpos == fwctx->req->n_items) { +- ret = 0; +- goto done; +- } + +- ret = brcmf_fw_request_next_item(fwctx, false); +- } while (ret == -EAGAIN); +- +- return; ++ while (ret == 0 && ++fwctx->curpos < fwctx->req->n_items) { ++ cur = &fwctx->req->items[fwctx->curpos]; ++ request_firmware(&fw, cur->path, fwctx->dev); ++ ret = brcmf_fw_complete_request(fw, ctx); ++ } + +-fail: +- brcmf_dbg(TRACE, "failed err=%d: dev=%s, fw=%s\n", ret, +- dev_name(fwctx->dev), cur->path); +- brcmf_fw_free_request(fwctx->req); +- fwctx->req = NULL; +-done: ++ if (ret) { ++ brcmf_dbg(TRACE, "failed err=%d: dev=%s, fw=%s\n", ret, ++ dev_name(fwctx->dev), cur->path); ++ brcmf_fw_free_request(fwctx->req); ++ fwctx->req = NULL; ++ } + fwctx->done(fwctx->dev, ret, fwctx->req); + kfree(fwctx); + } +@@ -694,7 +660,9 @@ int brcmf_fw_get_firmwares(struct device *dev, struct brcmf_fw_request *req, + void (*fw_cb)(struct device *dev, int err, + struct brcmf_fw_request *req)) + { ++ struct brcmf_fw_item *first = &req->items[0]; + struct brcmf_fw *fwctx; ++ int ret; + + brcmf_dbg(TRACE, "enter: dev=%s\n", dev_name(dev)); + if (!fw_cb) +@@ -711,7 +679,12 @@ int brcmf_fw_get_firmwares(struct device *dev, struct brcmf_fw_request *req, + fwctx->req = req; + fwctx->done = fw_cb; + +- brcmf_fw_request_next_item(fwctx, true); ++ ret = request_firmware_nowait(THIS_MODULE, true, first->path, ++ fwctx->dev, GFP_KERNEL, fwctx, ++ brcmf_fw_request_done); ++ if (ret < 0) ++ brcmf_fw_request_done(NULL, fwctx); ++ + return 0; + } + +-- +2.19.0 + diff --git a/0003-brcmfmac-Add-support-for-first-trying-to-get-a-board.patch b/0003-brcmfmac-Add-support-for-first-trying-to-get-a-board.patch new file mode 100644 index 000000000..d7a3d1be3 --- /dev/null +++ b/0003-brcmfmac-Add-support-for-first-trying-to-get-a-board.patch @@ -0,0 +1,83 @@ +From b2c242bfc79d9a1e6c870595c33707720c7e474c Mon Sep 17 00:00:00 2001 +From: Hans de Goede <hdegoede@redhat.com> +Date: Fri, 28 Sep 2018 00:06:51 +0200 +Subject: [PATCH 3/5] brcmfmac: Add support for first trying to get a board + specific nvram file + +The nvram files which some brcmfmac chips need are board-specific. To be +able to distribute these as part of linux-firmware, so that devices with +such a wifi chip will work OOTB, multiple (one per board) versions must +co-exist under /lib/firmware. + +This commit adds support for callers of the brcmfmac/firmware.c code to +pass in a board_type parameter through the request structure. + +If that parameter is set then the code will first try to load +chipmodel.board_type.txt before falling back to the old chipmodel.txt name. + +Signed-off-by: Hans de Goede <hdegoede@redhat.com> +--- + .../broadcom/brcm80211/brcmfmac/firmware.c | 27 ++++++++++++++++++- + .../broadcom/brcm80211/brcmfmac/firmware.h | 1 + + 2 files changed, 27 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c +index 13d051cd0fcf..5a7cd5e01b52 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c +@@ -615,6 +615,31 @@ static int brcmf_fw_complete_request(const struct firmware *fw, + return (cur->flags & BRCMF_FW_REQF_OPTIONAL) ? 0 : ret; + } + ++static int brcmf_fw_request_firmware(const struct firmware **fw, ++ struct brcmf_fw *fwctx) ++{ ++ struct brcmf_fw_item *cur = &fwctx->req->items[fwctx->curpos]; ++ int ret; ++ ++ /* nvram files are board-specific, first try a board-specific path */ ++ if (cur->type == BRCMF_FW_TYPE_NVRAM && fwctx->req->board_type) { ++ char alt_path[BRCMF_FW_NAME_LEN]; ++ ++ strlcpy(alt_path, cur->path, BRCMF_FW_NAME_LEN); ++ /* strip .txt at the end */ ++ alt_path[strlen(alt_path) - 4] = 0; ++ strlcat(alt_path, ".", BRCMF_FW_NAME_LEN); ++ strlcat(alt_path, fwctx->req->board_type, BRCMF_FW_NAME_LEN); ++ strlcat(alt_path, ".txt", BRCMF_FW_NAME_LEN); ++ ++ ret = request_firmware(fw, alt_path, fwctx->dev); ++ if (ret == 0) ++ return ret; ++ } ++ ++ return request_firmware(fw, cur->path, fwctx->dev); ++} ++ + static void brcmf_fw_request_done(const struct firmware *fw, void *ctx) + { + struct brcmf_fw *fwctx = ctx; +@@ -627,7 +652,7 @@ static void brcmf_fw_request_done(const struct firmware *fw, void *ctx) + + while (ret == 0 && ++fwctx->curpos < fwctx->req->n_items) { + cur = &fwctx->req->items[fwctx->curpos]; +- request_firmware(&fw, cur->path, fwctx->dev); ++ brcmf_fw_request_firmware(&fw, fwctx); + ret = brcmf_fw_complete_request(fw, ctx); + } + +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.h +index 2893e56910f0..a0834be8864e 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.h ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.h +@@ -70,6 +70,7 @@ struct brcmf_fw_request { + u16 domain_nr; + u16 bus_nr; + u32 n_items; ++ const char *board_type; + struct brcmf_fw_item items[0]; + }; + +-- +2.19.0 + diff --git a/0004-brcmfmac-Set-board_type-used-for-nvram-file-selectio.patch b/0004-brcmfmac-Set-board_type-used-for-nvram-file-selectio.patch new file mode 100644 index 000000000..b745abf41 --- /dev/null +++ b/0004-brcmfmac-Set-board_type-used-for-nvram-file-selectio.patch @@ -0,0 +1,87 @@ +From 3a96d5ede49bb9259416a5c21b5e1a1ad5cbb2e1 Mon Sep 17 00:00:00 2001 +From: Hans de Goede <hdegoede@redhat.com> +Date: Fri, 28 Sep 2018 19:23:31 +0200 +Subject: [PATCH 4/5] brcmfmac: Set board_type used for nvram file selection to + machine-compatible + +For of/devicetree using machines, set the board_type used for nvram file +selection to the first string listed in the top-level's node compatible +string, aka the machine-compatible as used by of_machine_is_compatible(). + +The board_type setting is used to load the board-specific nvram file with +a board-specific name so that we can ship files for each supported board +in linux-firmware. + +Signed-off-by: Hans de Goede <hdegoede@redhat.com> +--- + .../net/wireless/broadcom/brcm80211/brcmfmac/common.h | 1 + + drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c | 11 ++++++++++- + .../net/wireless/broadcom/brcm80211/brcmfmac/pcie.c | 1 + + .../net/wireless/broadcom/brcm80211/brcmfmac/sdio.c | 1 + + 4 files changed, 13 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.h +index a34642cb4d2f..e63a273642e9 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.h ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.h +@@ -59,6 +59,7 @@ struct brcmf_mp_device { + bool iapp; + bool ignore_probe_fail; + struct brcmfmac_pd_cc *country_codes; ++ const char *board_type; + union { + struct brcmfmac_sdio_pd sdio; + } bus; +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c +index aee6e5937c41..84e3373289eb 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c +@@ -27,11 +27,20 @@ void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type, + struct brcmf_mp_device *settings) + { + struct brcmfmac_sdio_pd *sdio = &settings->bus.sdio; +- struct device_node *np = dev->of_node; ++ struct device_node *root, *np = dev->of_node; ++ struct property *prop; + int irq; + u32 irqf; + u32 val; + ++ /* Set board-type to the first string of the machine compatible prop */ ++ root = of_find_node_by_path("/"); ++ if (root) { ++ prop = of_find_property(root, "compatible", NULL); ++ settings->board_type = of_prop_next_string(prop, NULL); ++ of_node_put(root); ++ } ++ + if (!np || bus_type != BRCMF_BUSTYPE_SDIO || + !of_device_is_compatible(np, "brcm,bcm4329-fmac")) + return; +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c +index 4fffa6988087..b12f3e0ee69c 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c +@@ -1785,6 +1785,7 @@ brcmf_pcie_prepare_fw_request(struct brcmf_pciedev_info *devinfo) + fwreq->items[BRCMF_PCIE_FW_CODE].type = BRCMF_FW_TYPE_BINARY; + fwreq->items[BRCMF_PCIE_FW_NVRAM].type = BRCMF_FW_TYPE_NVRAM; + fwreq->items[BRCMF_PCIE_FW_NVRAM].flags = BRCMF_FW_REQF_OPTIONAL; ++ fwreq->board_type = devinfo->settings->board_type; + /* NVRAM reserves PCI domain 0 for Broadcom's SDK faked bus */ + fwreq->domain_nr = pci_domain_nr(devinfo->pdev->bus) + 1; + fwreq->bus_nr = devinfo->pdev->bus->number; +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +index a907d7b065fa..3dbbbb117563 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +@@ -4177,6 +4177,7 @@ brcmf_sdio_prepare_fw_request(struct brcmf_sdio *bus) + + fwreq->items[BRCMF_SDIO_FW_CODE].type = BRCMF_FW_TYPE_BINARY; + fwreq->items[BRCMF_SDIO_FW_NVRAM].type = BRCMF_FW_TYPE_NVRAM; ++ fwreq->board_type = bus->sdiodev->settings->board_type; + + return fwreq; + } +-- +2.19.0 + diff --git a/CVE-2018-14633.patch b/CVE-2018-14633.patch deleted file mode 100644 index 731903bdb..000000000 --- a/CVE-2018-14633.patch +++ /dev/null @@ -1,242 +0,0 @@ -From 1816494330a83f2a064499d8ed2797045641f92c Mon Sep 17 00:00:00 2001 -From: Vincent Pelletier <plr.vincent@gmail.com> -Date: Sun, 9 Sep 2018 04:09:26 +0000 -Subject: scsi: target: iscsi: Use hex2bin instead of a re-implementation - -This change has the following effects, in order of descreasing importance: - -1) Prevent a stack buffer overflow - -2) Do not append an unnecessary NULL to an anyway binary buffer, which - is writing one byte past client_digest when caller is: - chap_string_to_hex(client_digest, chap_r, strlen(chap_r)); - -The latter was found by KASAN (see below) when input value hes expected size -(32 hex chars), and further analysis revealed a stack buffer overflow can -happen when network-received value is longer, allowing an unauthenticated -remote attacker to smash up to 17 bytes after destination buffer (16 bytes -attacker-controlled and one null). As switching to hex2bin requires -specifying destination buffer length, and does not internally append any null, -it solves both issues. - -This addresses CVE-2018-14633. - -Beyond this: - -- Validate received value length and check hex2bin accepted the input, to log - this rejection reason instead of just failing authentication. - -- Only log received CHAP_R and CHAP_C values once they passed sanity checks. - -================================================================== -BUG: KASAN: stack-out-of-bounds in chap_string_to_hex+0x32/0x60 [iscsi_target_mod] -Write of size 1 at addr ffff8801090ef7c8 by task kworker/0:0/1021 - -CPU: 0 PID: 1021 Comm: kworker/0:0 Tainted: G O 4.17.8kasan.sess.connops+ #2 -Hardware name: To be filled by O.E.M. To be filled by O.E.M./Aptio CRB, BIOS 5.6.5 05/19/2014 -Workqueue: events iscsi_target_do_login_rx [iscsi_target_mod] -Call Trace: - dump_stack+0x71/0xac - print_address_description+0x65/0x22e - ? chap_string_to_hex+0x32/0x60 [iscsi_target_mod] - kasan_report.cold.6+0x241/0x2fd - chap_string_to_hex+0x32/0x60 [iscsi_target_mod] - chap_server_compute_md5.isra.2+0x2cb/0x860 [iscsi_target_mod] - ? chap_binaryhex_to_asciihex.constprop.5+0x50/0x50 [iscsi_target_mod] - ? ftrace_caller_op_ptr+0xe/0xe - ? __orc_find+0x6f/0xc0 - ? unwind_next_frame+0x231/0x850 - ? kthread+0x1a0/0x1c0 - ? ret_from_fork+0x35/0x40 - ? ret_from_fork+0x35/0x40 - ? iscsi_target_do_login_rx+0x3bc/0x4c0 [iscsi_target_mod] - ? deref_stack_reg+0xd0/0xd0 - ? iscsi_target_do_login_rx+0x3bc/0x4c0 [iscsi_target_mod] - ? is_module_text_address+0xa/0x11 - ? kernel_text_address+0x4c/0x110 - ? __save_stack_trace+0x82/0x100 - ? ret_from_fork+0x35/0x40 - ? save_stack+0x8c/0xb0 - ? 0xffffffffc1660000 - ? iscsi_target_do_login+0x155/0x8d0 [iscsi_target_mod] - ? iscsi_target_do_login_rx+0x3bc/0x4c0 [iscsi_target_mod] - ? process_one_work+0x35c/0x640 - ? worker_thread+0x66/0x5d0 - ? kthread+0x1a0/0x1c0 - ? ret_from_fork+0x35/0x40 - ? iscsi_update_param_value+0x80/0x80 [iscsi_target_mod] - ? iscsit_release_cmd+0x170/0x170 [iscsi_target_mod] - chap_main_loop+0x172/0x570 [iscsi_target_mod] - ? chap_server_compute_md5.isra.2+0x860/0x860 [iscsi_target_mod] - ? rx_data+0xd6/0x120 [iscsi_target_mod] - ? iscsit_print_session_params+0xd0/0xd0 [iscsi_target_mod] - ? cyc2ns_read_begin.part.2+0x90/0x90 - ? _raw_spin_lock_irqsave+0x25/0x50 - ? memcmp+0x45/0x70 - iscsi_target_do_login+0x875/0x8d0 [iscsi_target_mod] - ? iscsi_target_check_first_request.isra.5+0x1a0/0x1a0 [iscsi_target_mod] - ? del_timer+0xe0/0xe0 - ? memset+0x1f/0x40 - ? flush_sigqueue+0x29/0xd0 - iscsi_target_do_login_rx+0x3bc/0x4c0 [iscsi_target_mod] - ? iscsi_target_nego_release+0x80/0x80 [iscsi_target_mod] - ? iscsi_target_restore_sock_callbacks+0x130/0x130 [iscsi_target_mod] - process_one_work+0x35c/0x640 - worker_thread+0x66/0x5d0 - ? flush_rcu_work+0x40/0x40 - kthread+0x1a0/0x1c0 - ? kthread_bind+0x30/0x30 - ret_from_fork+0x35/0x40 - -The buggy address belongs to the page: -page:ffffea0004243bc0 count:0 mapcount:0 mapping:0000000000000000 index:0x0 -flags: 0x17fffc000000000() -raw: 017fffc000000000 0000000000000000 0000000000000000 00000000ffffffff -raw: ffffea0004243c20 ffffea0004243ba0 0000000000000000 0000000000000000 -page dumped because: kasan: bad access detected - -Memory state around the buggy address: - ffff8801090ef680: f2 f2 f2 f2 f2 f2 f2 01 f2 f2 f2 f2 f2 f2 f2 00 - ffff8801090ef700: f2 f2 f2 f2 f2 f2 f2 00 02 f2 f2 f2 f2 f2 f2 00 ->ffff8801090ef780: 00 f2 f2 f2 f2 f2 f2 00 00 f2 f2 f2 f2 f2 f2 00 - ^ - ffff8801090ef800: 00 f2 f2 f2 f2 f2 f2 00 00 00 00 02 f2 f2 f2 f2 - ffff8801090ef880: f2 f2 f2 00 00 00 00 00 00 00 00 f2 f2 f2 f2 00 -================================================================== - -Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> -Reviewed-by: Mike Christie <mchristi@redhat.com> -Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> ---- - drivers/target/iscsi/iscsi_target_auth.c | 30 ++++++++++++++---------------- - 1 file changed, 14 insertions(+), 16 deletions(-) - -diff --git a/drivers/target/iscsi/iscsi_target_auth.c b/drivers/target/iscsi/iscsi_target_auth.c -index 9518ffd8b8ba..6c3b4c022894 100644 ---- a/drivers/target/iscsi/iscsi_target_auth.c -+++ b/drivers/target/iscsi/iscsi_target_auth.c -@@ -26,18 +26,6 @@ - #include "iscsi_target_nego.h" - #include "iscsi_target_auth.h" - --static int chap_string_to_hex(unsigned char *dst, unsigned char *src, int len) --{ -- int j = DIV_ROUND_UP(len, 2), rc; -- -- rc = hex2bin(dst, src, j); -- if (rc < 0) -- pr_debug("CHAP string contains non hex digit symbols\n"); -- -- dst[j] = '\0'; -- return j; --} -- - static void chap_binaryhex_to_asciihex(char *dst, char *src, int src_len) - { - int i; -@@ -248,9 +236,16 @@ static int chap_server_compute_md5( - pr_err("Could not find CHAP_R.\n"); - goto out; - } -+ if (strlen(chap_r) != MD5_SIGNATURE_SIZE * 2) { -+ pr_err("Malformed CHAP_R\n"); -+ goto out; -+ } -+ if (hex2bin(client_digest, chap_r, MD5_SIGNATURE_SIZE) < 0) { -+ pr_err("Malformed CHAP_R\n"); -+ goto out; -+ } - - pr_debug("[server] Got CHAP_R=%s\n", chap_r); -- chap_string_to_hex(client_digest, chap_r, strlen(chap_r)); - - tfm = crypto_alloc_shash("md5", 0, 0); - if (IS_ERR(tfm)) { -@@ -349,9 +344,7 @@ static int chap_server_compute_md5( - pr_err("Could not find CHAP_C.\n"); - goto out; - } -- pr_debug("[server] Got CHAP_C=%s\n", challenge); -- challenge_len = chap_string_to_hex(challenge_binhex, challenge, -- strlen(challenge)); -+ challenge_len = DIV_ROUND_UP(strlen(challenge), 2); - if (!challenge_len) { - pr_err("Unable to convert incoming challenge\n"); - goto out; -@@ -360,6 +353,11 @@ static int chap_server_compute_md5( - pr_err("CHAP_C exceeds maximum binary size of 1024 bytes\n"); - goto out; - } -+ if (hex2bin(challenge_binhex, challenge, challenge_len) < 0) { -+ pr_err("Malformed CHAP_C\n"); -+ goto out; -+ } -+ pr_debug("[server] Got CHAP_C=%s\n", challenge); - /* - * During mutual authentication, the CHAP_C generated by the - * initiator must not match the original CHAP_C generated by --- -cgit 1.2-0.3.lf.el7 - -From 8c39e2699f8acb2e29782a834e56306da24937fe Mon Sep 17 00:00:00 2001 -From: Vincent Pelletier <plr.vincent@gmail.com> -Date: Sun, 9 Sep 2018 04:09:27 +0000 -Subject: scsi: target: iscsi: Use bin2hex instead of a re-implementation - -Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> -Reviewed-by: Mike Christie <mchristi@redhat.com> -Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> ---- - drivers/target/iscsi/iscsi_target_auth.c | 15 +++------------ - 1 file changed, 3 insertions(+), 12 deletions(-) - -diff --git a/drivers/target/iscsi/iscsi_target_auth.c b/drivers/target/iscsi/iscsi_target_auth.c -index 6c3b4c022894..4e680d753941 100644 ---- a/drivers/target/iscsi/iscsi_target_auth.c -+++ b/drivers/target/iscsi/iscsi_target_auth.c -@@ -26,15 +26,6 @@ - #include "iscsi_target_nego.h" - #include "iscsi_target_auth.h" - --static void chap_binaryhex_to_asciihex(char *dst, char *src, int src_len) --{ -- int i; -- -- for (i = 0; i < src_len; i++) { -- sprintf(&dst[i*2], "%02x", (int) src[i] & 0xff); -- } --} -- - static int chap_gen_challenge( - struct iscsi_conn *conn, - int caller, -@@ -50,7 +41,7 @@ static int chap_gen_challenge( - ret = get_random_bytes_wait(chap->challenge, CHAP_CHALLENGE_LENGTH); - if (unlikely(ret)) - return ret; -- chap_binaryhex_to_asciihex(challenge_asciihex, chap->challenge, -+ bin2hex(challenge_asciihex, chap->challenge, - CHAP_CHALLENGE_LENGTH); - /* - * Set CHAP_C, and copy the generated challenge into c_str. -@@ -289,7 +280,7 @@ static int chap_server_compute_md5( - goto out; - } - -- chap_binaryhex_to_asciihex(response, server_digest, MD5_SIGNATURE_SIZE); -+ bin2hex(response, server_digest, MD5_SIGNATURE_SIZE); - pr_debug("[server] MD5 Server Digest: %s\n", response); - - if (memcmp(server_digest, client_digest, MD5_SIGNATURE_SIZE) != 0) { -@@ -411,7 +402,7 @@ static int chap_server_compute_md5( - /* - * Convert response from binary hex to ascii hext. - */ -- chap_binaryhex_to_asciihex(response, digest, MD5_SIGNATURE_SIZE); -+ bin2hex(response, digest, MD5_SIGNATURE_SIZE); - *nr_out_len += sprintf(nr_out_ptr + *nr_out_len, "CHAP_R=0x%s", - response); - *nr_out_len += 1; --- -cgit 1.2-0.3.lf.el7 - diff --git a/HID-intel-ish-hid-Enable-Sunrise-Point-H-ish-driver.patch b/HID-intel-ish-hid-Enable-Sunrise-Point-H-ish-driver.patch new file mode 100644 index 000000000..7057843a6 --- /dev/null +++ b/HID-intel-ish-hid-Enable-Sunrise-Point-H-ish-driver.patch @@ -0,0 +1,128 @@ +From patchwork Fri Aug 17 20:16:00 2018 +Content-Type: text/plain; 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+ Fri, 17 Aug 2018 13:16:37 -0700 (PDT) +From: Andreas Bosch <linux@progandy.de> +Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>, + Jiri Kosina <jikos@kernel.org>, + Benjamin Tissoires <benjamin.tissoires@redhat.com>, + Even Xu <even.xu@intel.com>, linux-input@vger.kernel.org, + linux-kernel@vger.kernel.org +Subject: [PATCH] HID: intel-ish-hid: Enable Sunrise Point-H ish driver +Date: Fri, 17 Aug 2018 22:16:00 +0200 +Message-Id: <20180817201614.11971-1-linux@progandy.de> +X-Mailer: git-send-email 2.18.0 +In-Reply-To: <23171b1a3740407eac5d5c22548ce107d8edde59.camel@linux.intel.com> +References: <23171b1a3740407eac5d5c22548ce107d8edde59.camel@linux.intel.com> +To: unlisted-recipients:; (no To-header on input) +Sender: linux-input-owner@vger.kernel.org +Precedence: bulk +List-ID: <linux-input.vger.kernel.org> +X-Mailing-List: linux-input@vger.kernel.org +X-Virus-Scanned: ClamAV using ClamSMTP + +Added PCI ID for Sunrise Point-H ISH. + +Signed-off-by: Andreas Bosch <linux@progandy.de> +Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> +--- +I hope this patch arrives correctly. +--- + drivers/hid/intel-ish-hid/ipc/hw-ish.h | 1 + + drivers/hid/intel-ish-hid/ipc/pci-ish.c | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/drivers/hid/intel-ish-hid/ipc/hw-ish.h b/drivers/hid/intel-ish-hid/ipc/hw-ish.h +index 97869b7410eb..da133716bed0 100644 +--- a/drivers/hid/intel-ish-hid/ipc/hw-ish.h ++++ b/drivers/hid/intel-ish-hid/ipc/hw-ish.h +@@ -29,6 +29,7 @@ + #define CNL_Ax_DEVICE_ID 0x9DFC + #define GLK_Ax_DEVICE_ID 0x31A2 + #define CNL_H_DEVICE_ID 0xA37C ++#define SPT_H_DEVICE_ID 0xA135 + + #define REVISION_ID_CHT_A0 0x6 + #define REVISION_ID_CHT_Ax_SI 0x0 +diff --git a/drivers/hid/intel-ish-hid/ipc/pci-ish.c b/drivers/hid/intel-ish-hid/ipc/pci-ish.c +index a2c53ea3b5ed..c7b8eb32b1ea 100644 +--- a/drivers/hid/intel-ish-hid/ipc/pci-ish.c ++++ b/drivers/hid/intel-ish-hid/ipc/pci-ish.c +@@ -38,6 +38,7 @@ static const struct pci_device_id ish_pci_tbl[] = { + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_Ax_DEVICE_ID)}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, GLK_Ax_DEVICE_ID)}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_H_DEVICE_ID)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, SPT_H_DEVICE_ID)}, + {0, } + }; + MODULE_DEVICE_TABLE(pci, ish_pci_tbl); diff --git a/arm64-allwinner-fixes.patch b/arm64-allwinner-fixes.patch index ad27d5440..b37e34881 100644 --- a/arm64-allwinner-fixes.patch +++ b/arm64-allwinner-fixes.patch @@ -1,3 +1,325 @@ +From 5828729bebbb69d0743488e742bed8a9727b0b71 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng <icenowy@aosc.io> +Date: Wed, 11 Apr 2018 22:16:40 +0800 +Subject: soc: sunxi: export a regmap for EMAC clock reg on A64 + +The A64 SRAM controller memory zone has a EMAC clock register, which is +needed by the Ethernet MAC driver (dwmac-sun8i). + +Export a regmap for this register on A64. + +Signed-off-by: Icenowy Zheng <icenowy@aosc.io> +[wens@csie.org: export whole address range with only EMAC register + accessible and drop regmap name] +Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> +Signed-off-by: Chen-Yu Tsai <wens@csie.org> +--- + drivers/soc/sunxi/sunxi_sram.c | 57 ++++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 55 insertions(+), 2 deletions(-) + +diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c +index 882be5ed7e84..eec7fc6e9f66 100644 +--- a/drivers/soc/sunxi/sunxi_sram.c ++++ b/drivers/soc/sunxi/sunxi_sram.c +@@ -17,6 +17,7 @@ + #include <linux/of_address.h> + #include <linux/of_device.h> + #include <linux/platform_device.h> ++#include <linux/regmap.h> + + #include <linux/soc/sunxi/sunxi_sram.h> + +@@ -281,13 +282,51 @@ int sunxi_sram_release(struct device *dev) + } + EXPORT_SYMBOL(sunxi_sram_release); + ++struct sunxi_sramc_variant { ++ bool has_emac_clock; ++}; ++ ++static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { ++ /* Nothing special */ ++}; ++ ++static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = { ++ .has_emac_clock = true, ++}; ++ ++#define SUNXI_SRAM_EMAC_CLOCK_REG 0x30 ++static bool sunxi_sram_regmap_accessible_reg(struct device *dev, ++ unsigned int reg) ++{ ++ if (reg == SUNXI_SRAM_EMAC_CLOCK_REG) ++ return true; ++ return false; ++} ++ ++static struct regmap_config sunxi_sram_emac_clock_regmap = { ++ .reg_bits = 32, ++ .val_bits = 32, ++ .reg_stride = 4, ++ /* last defined register */ ++ .max_register = SUNXI_SRAM_EMAC_CLOCK_REG, ++ /* other devices have no business accessing other registers */ ++ .readable_reg = sunxi_sram_regmap_accessible_reg, ++ .writeable_reg = sunxi_sram_regmap_accessible_reg, ++}; ++ + static int sunxi_sram_probe(struct platform_device *pdev) + { + struct resource *res; + struct dentry *d; ++ struct regmap *emac_clock; ++ const struct sunxi_sramc_variant *variant; + + sram_dev = &pdev->dev; + ++ variant = of_device_get_match_data(&pdev->dev); ++ if (!variant) ++ return -EINVAL; ++ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) +@@ -300,12 +339,26 @@ static int sunxi_sram_probe(struct platform_device *pdev) + if (!d) + return -ENOMEM; + ++ if (variant->has_emac_clock) { ++ emac_clock = devm_regmap_init_mmio(&pdev->dev, base, ++ &sunxi_sram_emac_clock_regmap); ++ ++ if (IS_ERR(emac_clock)) ++ return PTR_ERR(emac_clock); ++ } ++ + return 0; + } + + static const struct of_device_id sunxi_sram_dt_match[] = { +- { .compatible = "allwinner,sun4i-a10-sram-controller" }, +- { .compatible = "allwinner,sun50i-a64-sram-controller" }, ++ { ++ .compatible = "allwinner,sun4i-a10-sram-controller", ++ .data = &sun4i_a10_sramc_variant, ++ }, ++ { ++ .compatible = "allwinner,sun50i-a64-sram-controller", ++ .data = &sun50i_a64_sramc_variant, ++ }, + { }, + }; + MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match); +-- +cgit 1.2-0.3.lf.el7 +From ede18ae31202256824b47cfbebc8c0dc219354ef Mon Sep 17 00:00:00 2001 +From: Chen-Yu Tsai <wens@csie.org> +Date: Tue, 22 May 2018 01:02:41 +0800 +Subject: soc: sunxi: sram: Add updated compatible string for A64 system + control + +The SRAM mapping controls on Allwinner SoCs is located in a block called +"System Controls". This block also has registers for identifying the SoC, +reading the state of an external boot-related pin, and on some newer SoCs, +glue layer controls for the EMAC Ethernet controller. + +The A64 variant compatible is renamed to "allwinner,a64-system-control" +to reflect this. The old A64 compatible is deprecated. So far we haven't +seen any actual use of it. + +Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> +Signed-off-by: Chen-Yu Tsai <wens@csie.org> +--- + drivers/soc/sunxi/sunxi_sram.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c +index eec7fc6e9f66..7fec1b160dbb 100644 +--- a/drivers/soc/sunxi/sunxi_sram.c ++++ b/drivers/soc/sunxi/sunxi_sram.c +@@ -359,6 +359,10 @@ static const struct of_device_id sunxi_sram_dt_match[] = { + .compatible = "allwinner,sun50i-a64-sram-controller", + .data = &sun50i_a64_sramc_variant, + }, ++ { ++ .compatible = "allwinner,sun50i-a64-system-control", ++ .data = &sun50i_a64_sramc_variant, ++ }, + { }, + }; + MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match); +-- +cgit 1.2-0.3.lf.el7 +From acc26f59f835142a48f495caf80b86592c4af1f5 Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> +Date: Tue, 10 Jul 2018 10:00:58 +0200 +Subject: soc: sunxi: sram: Add dt match for the A10 system-control compatible + +This binds the new A10 system-control compatible to the associated +driver, with the same driver data as the previous compatible. + +Reviewed-by: Chen-Yu Tsai <wens@csie.org> +Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> +Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> +--- + drivers/soc/sunxi/sunxi_sram.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c +index 7fec1b160dbb..236f34307c0f 100644 +--- a/drivers/soc/sunxi/sunxi_sram.c ++++ b/drivers/soc/sunxi/sunxi_sram.c +@@ -355,6 +355,10 @@ static const struct of_device_id sunxi_sram_dt_match[] = { + .compatible = "allwinner,sun4i-a10-sram-controller", + .data = &sun4i_a10_sramc_variant, + }, ++ { ++ .compatible = "allwinner,sun4i-a10-system-control", ++ .data = &sun4i_a10_sramc_variant, ++ }, + { + .compatible = "allwinner,sun50i-a64-sram-controller", + .data = &sun50i_a64_sramc_variant, +-- +cgit 1.2-0.3.lf.el7 +From 5fdec16b69da273d5654c2c3be01246a59e1bcba Mon Sep 17 00:00:00 2001 +From: Maxime Ripard <maxime.ripard@bootlin.com> +Date: Tue, 10 Jul 2018 10:00:59 +0200 +Subject: drivers: soc: sunxi: Add support for the C1 SRAM region + +This introduces support for the SRAM C1 section, that is controlled by +the system controller. This SRAM area can be muxed either to the CPU +or the Video Engine, that needs this area to store various tables (e.g. +the Huffman VLD decoding tables). + +This only supports devices with the same layout as the A10 (which also +includes the A13, A20, A33 and other SoCs). + +Reviewed-by: Chen-Yu Tsai <wens@csie.org> +Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> +Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> +Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> +--- + drivers/soc/sunxi/sunxi_sram.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c +index 236f34307c0f..b19fa2cc67c2 100644 +--- a/drivers/soc/sunxi/sunxi_sram.c ++++ b/drivers/soc/sunxi/sunxi_sram.c +@@ -64,6 +64,12 @@ static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = { + SUNXI_SRAM_MAP(1, 1, "emac")), + }; + ++static struct sunxi_sram_desc sun4i_a10_sram_c1 = { ++ .data = SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31, ++ SUNXI_SRAM_MAP(0, 0, "cpu"), ++ SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")), ++}; ++ + static struct sunxi_sram_desc sun4i_a10_sram_d = { + .data = SUNXI_SRAM_DATA("D", 0x4, 0x0, 1, + SUNXI_SRAM_MAP(0, 0, "cpu"), +@@ -81,6 +87,10 @@ static const struct of_device_id sunxi_sram_dt_ids[] = { + .compatible = "allwinner,sun4i-a10-sram-a3-a4", + .data = &sun4i_a10_sram_a3_a4.data, + }, ++ { ++ .compatible = "allwinner,sun4i-a10-sram-c1", ++ .data = &sun4i_a10_sram_c1.data, ++ }, + { + .compatible = "allwinner,sun4i-a10-sram-d", + .data = &sun4i_a10_sram_d.data, +-- +cgit 1.2-0.3.lf.el7 +From 7377330a1ed2e9bb5a97758bdadcdb37e2201b2a Mon Sep 17 00:00:00 2001 +From: Maxime Ripard <maxime.ripard@bootlin.com> +Date: Wed, 11 Jul 2018 11:25:07 +0200 +Subject: soc: sunxi: Add the A13, A23 and H3 system control compatibles + +The A13, A23 and H3 have variations of the system controls, in part due to +the SRAM that are available (and can be mapped) in the SoC. + +In order to make it future proof, let's add compatibles for these SoCs in +the driver. + +Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> +--- + drivers/soc/sunxi/sunxi_sram.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c +index b19fa2cc67c2..b4b0f3480bd3 100644 +--- a/drivers/soc/sunxi/sunxi_sram.c ++++ b/drivers/soc/sunxi/sunxi_sram.c +@@ -369,6 +369,18 @@ static const struct of_device_id sunxi_sram_dt_match[] = { + .compatible = "allwinner,sun4i-a10-system-control", + .data = &sun4i_a10_sramc_variant, + }, ++ { ++ .compatible = "allwinner,sun5i-a13-system-control", ++ .data = &sun4i_a10_sramc_variant, ++ }, ++ { ++ .compatible = "allwinner,sun8i-a23-system-control", ++ .data = &sun4i_a10_sramc_variant, ++ }, ++ { ++ .compatible = "allwinner,sun8i-h3-system-control", ++ .data = &sun4i_a10_sramc_variant, ++ }, + { + .compatible = "allwinner,sun50i-a64-sram-controller", + .data = &sun50i_a64_sramc_variant, +-- +cgit 1.2-0.3.lf.el7 +From 0195156340d365540c7dfa239232065826904f59 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng <icenowy@aosc.io> +Date: Fri, 22 Jun 2018 20:45:37 +0800 +Subject: clk: sunxi-ng: add A64 compatible string + +As claiming Allwinner A64 SRAM C is a prerequisite for all sub-blocks of +the A64 DE2, not only the CCU sub-block, a bus driver is then written for +enabling the access to the whole DE2 part by claiming the SRAM. + +In this situation, the A64 compatible string will be just added with no +other requirments, as they're processed by the parent bus driver. + +Signed-off-by: Icenowy Zheng <icenowy@aosc.io> +Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> +--- + drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 11 ++++------- + 1 file changed, 4 insertions(+), 7 deletions(-) + +diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +index 468d1abaf0ee..bae5ee67a797 100644 +--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c ++++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +@@ -288,17 +288,14 @@ static const struct of_device_id sunxi_de2_clk_ids[] = { + .compatible = "allwinner,sun8i-v3s-de2-clk", + .data = &sun8i_v3s_de2_clk_desc, + }, ++ { ++ .compatible = "allwinner,sun50i-a64-de2-clk", ++ .data = &sun50i_a64_de2_clk_desc, ++ }, + { + .compatible = "allwinner,sun50i-h5-de2-clk", + .data = &sun50i_a64_de2_clk_desc, + }, +- /* +- * The Allwinner A64 SoC needs some bit to be poke in syscon to make +- * DE2 really working. +- * So there's currently no A64 compatible here. +- * H5 shares the same reset line with A64, so here H5 is using the +- * clock description of A64. +- */ + { } + }; + +-- +cgit 1.2-0.3.lf.el7 From 2c740e6ab4b66e5bb1cd3c75f00f4ca7e5765037 Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot <manu@freebsd.org> Date: Mon, 21 May 2018 13:54:13 +0200 diff --git a/arm64_kvm_security.patch b/arm64_kvm_security.patch new file mode 100644 index 000000000..71490d969 --- /dev/null +++ b/arm64_kvm_security.patch @@ -0,0 +1,155 @@ +From d26c25a9d19b5976b319af528886f89cf455692d Mon Sep 17 00:00:00 2001 +From: Dave Martin <Dave.Martin@arm.com> +Date: Thu, 27 Sep 2018 16:53:21 +0100 +Subject: arm64: KVM: Tighten guest core register access from userspace + +From: Dave Martin <Dave.Martin@arm.com> + +commit d26c25a9d19b5976b319af528886f89cf455692d upstream. + +We currently allow userspace to access the core register file +in about any possible way, including straddling multiple +registers and doing unaligned accesses. + +This is not the expected use of the ABI, and nobody is actually +using it that way. Let's tighten it by explicitly checking +the size and alignment for each field of the register file. + +Cc: <stable@vger.kernel.org> +Fixes: 2f4a07c5f9fe ("arm64: KVM: guest one-reg interface") +Reviewed-by: Christoffer Dall <christoffer.dall@arm.com> +Reviewed-by: Mark Rutland <mark.rutland@arm.com> +Signed-off-by: Dave Martin <Dave.Martin@arm.com> +[maz: rewrote Dave's initial patch to be more easily backported] +Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> +Signed-off-by: Will Deacon <will.deacon@arm.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> + +--- + arch/arm64/kvm/guest.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 45 insertions(+) + +--- a/arch/arm64/kvm/guest.c ++++ b/arch/arm64/kvm/guest.c +@@ -57,6 +57,45 @@ static u64 core_reg_offset_from_id(u64 i + return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE); + } + ++static int validate_core_offset(const struct kvm_one_reg *reg) ++{ ++ u64 off = core_reg_offset_from_id(reg->id); ++ int size; ++ ++ switch (off) { ++ case KVM_REG_ARM_CORE_REG(regs.regs[0]) ... ++ KVM_REG_ARM_CORE_REG(regs.regs[30]): ++ case KVM_REG_ARM_CORE_REG(regs.sp): ++ case KVM_REG_ARM_CORE_REG(regs.pc): ++ case KVM_REG_ARM_CORE_REG(regs.pstate): ++ case KVM_REG_ARM_CORE_REG(sp_el1): ++ case KVM_REG_ARM_CORE_REG(elr_el1): ++ case KVM_REG_ARM_CORE_REG(spsr[0]) ... ++ KVM_REG_ARM_CORE_REG(spsr[KVM_NR_SPSR - 1]): ++ size = sizeof(__u64); ++ break; ++ ++ case KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]) ... ++ KVM_REG_ARM_CORE_REG(fp_regs.vregs[31]): ++ size = sizeof(__uint128_t); ++ break; ++ ++ case KVM_REG_ARM_CORE_REG(fp_regs.fpsr): ++ case KVM_REG_ARM_CORE_REG(fp_regs.fpcr): ++ size = sizeof(__u32); ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ if (KVM_REG_SIZE(reg->id) == size && ++ IS_ALIGNED(off, size / sizeof(__u32))) ++ return 0; ++ ++ return -EINVAL; ++} ++ + static int get_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) + { + /* +@@ -76,6 +115,9 @@ static int get_core_reg(struct kvm_vcpu + (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs) + return -ENOENT; + ++ if (validate_core_offset(reg)) ++ return -EINVAL; ++ + if (copy_to_user(uaddr, ((u32 *)regs) + off, KVM_REG_SIZE(reg->id))) + return -EFAULT; + +@@ -98,6 +140,9 @@ static int set_core_reg(struct kvm_vcpu + (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs) + return -ENOENT; + ++ if (validate_core_offset(reg)) ++ return -EINVAL; ++ + if (KVM_REG_SIZE(reg->id) > sizeof(tmp)) + return -EINVAL; + +From 2a3f93459d689d990b3ecfbe782fec89b97d3279 Mon Sep 17 00:00:00 2001 +From: Marc Zyngier <marc.zyngier@arm.com> +Date: Thu, 27 Sep 2018 16:53:22 +0100 +Subject: arm64: KVM: Sanitize PSTATE.M when being set from userspace + +From: Marc Zyngier <marc.zyngier@arm.com> + +commit 2a3f93459d689d990b3ecfbe782fec89b97d3279 upstream. + +Not all execution modes are valid for a guest, and some of them +depend on what the HW actually supports. Let's verify that what +userspace provides is compatible with both the VM settings and +the HW capabilities. + +Cc: <stable@vger.kernel.org> +Fixes: 0d854a60b1d7 ("arm64: KVM: enable initialization of a 32bit vcpu") +Reviewed-by: Christoffer Dall <christoffer.dall@arm.com> +Reviewed-by: Mark Rutland <mark.rutland@arm.com> +Reviewed-by: Dave Martin <Dave.Martin@arm.com> +Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> +Signed-off-by: Will Deacon <will.deacon@arm.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> + +--- + arch/arm64/kvm/guest.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +--- a/arch/arm64/kvm/guest.c ++++ b/arch/arm64/kvm/guest.c +@@ -152,17 +152,25 @@ static int set_core_reg(struct kvm_vcpu + } + + if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) { +- u32 mode = (*(u32 *)valp) & COMPAT_PSR_MODE_MASK; ++ u64 mode = (*(u64 *)valp) & COMPAT_PSR_MODE_MASK; + switch (mode) { + case COMPAT_PSR_MODE_USR: ++ if (!system_supports_32bit_el0()) ++ return -EINVAL; ++ break; + case COMPAT_PSR_MODE_FIQ: + case COMPAT_PSR_MODE_IRQ: + case COMPAT_PSR_MODE_SVC: + case COMPAT_PSR_MODE_ABT: + case COMPAT_PSR_MODE_UND: ++ if (!vcpu_el1_is_32bit(vcpu)) ++ return -EINVAL; ++ break; + case PSR_MODE_EL0t: + case PSR_MODE_EL1t: + case PSR_MODE_EL1h: ++ if (vcpu_el1_is_32bit(vcpu)) ++ return -EINVAL; + break; + default: + err = -EINVAL; diff --git a/configs/fedora/generic/arm/CONFIG_INV_MPU6050_I2C b/configs/fedora/generic/arm/CONFIG_INV_MPU6050_I2C new file mode 100644 index 000000000..8ec049b05 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_INV_MPU6050_I2C @@ -0,0 +1 @@ +CONFIG_INV_MPU6050_I2C=m diff --git a/configs/fedora/generic/arm/CONFIG_INV_MPU6050_IIO b/configs/fedora/generic/arm/CONFIG_INV_MPU6050_IIO new file mode 100644 index 000000000..ae4889d92 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_INV_MPU6050_IIO @@ -0,0 +1 @@ +CONFIG_INV_MPU6050_IIO=m diff --git a/configs/fedora/generic/arm/CONFIG_PINCTRL_AS3722 b/configs/fedora/generic/arm/CONFIG_PINCTRL_AS3722 index 399c5bf8e..c620f49f9 100644 --- a/configs/fedora/generic/arm/CONFIG_PINCTRL_AS3722 +++ b/configs/fedora/generic/arm/CONFIG_PINCTRL_AS3722 @@ -1 +1 @@ -CONFIG_PINCTRL_AS3722=m +CONFIG_PINCTRL_AS3722=y diff --git a/configs/fedora/generic/x86/x86_64/CONFIG_CRYPTO_DEV_SP_PSP b/configs/fedora/generic/x86/x86_64/CONFIG_CRYPTO_DEV_SP_PSP index 7b0c6490a..ee59b965f 100644 --- a/configs/fedora/generic/x86/x86_64/CONFIG_CRYPTO_DEV_SP_PSP +++ b/configs/fedora/generic/x86/x86_64/CONFIG_CRYPTO_DEV_SP_PSP @@ -1 +1 @@ -CONFIG_CRYPTO_DEV_SP_PSP=y +# CONFIG_CRYPTO_DEV_SP_PSP is not set diff --git a/dma-stop-losing-firmware-set-dma-masks.patch b/dma-stop-losing-firmware-set-dma-masks.patch new file mode 100644 index 000000000..966434e7e --- /dev/null +++ b/dma-stop-losing-firmware-set-dma-masks.patch @@ -0,0 +1,434 @@ +From a5516219b10218a87abb3352c82248ce3088e94a Mon Sep 17 00:00:00 2001 +From: Robin Murphy <robin.murphy@arm.com> +Date: Fri, 27 Jul 2018 15:14:15 +0100 +Subject: of/platform: Initialise default DMA masks + +When of_dma_configure() was first born in 591c1ee465ce ("of: configure +the platform device dma parameters"), everything DMA-related was +factored out of of_platform_device_create_pdata() as seemed appropriate +at the time. However, now that of_dma_configure() has grown into the +generic handler for processing DMA-related properties from DT for all +kinds of devices, it is no longer an appropriate place to be doing +OF-platform-specific business. Since there are still plenty of platform +drivers not setting their own masks and depending on the bus default, +let's reinstate that inialisation in the OF-platform code itself, and +restore the long-standing status quo from 0589342c2794 ("of: set +dma_mask to point to coherent_dma_mask") + +Signed-off-by: Robin Murphy <robin.murphy@arm.com> +Acked-by: Rob Herring <robh@kernel.org> +Signed-off-by: Christoph Hellwig <hch@lst.de> +--- + drivers/of/platform.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/of/platform.c b/drivers/of/platform.c +index 6925d993e1f0..7ba90c290a42 100644 +--- a/drivers/of/platform.c ++++ b/drivers/of/platform.c +@@ -185,6 +185,9 @@ static struct platform_device *of_platform_device_create_pdata( + if (!dev) + goto err_clear_flag; + ++ dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); ++ if (!dev->dev.dma_mask) ++ dev->dev.dma_mask = &dev->dev.coherent_dma_mask; + dev->dev.bus = &platform_bus_type; + dev->dev.platform_data = platform_data; + of_msi_configure(&dev->dev, dev->dev.of_node); +-- +cgit 1.2-0.3.lf.el7 +From 5ac65e8c89410892189ef778f567da4adafb2e2f Mon Sep 17 00:00:00 2001 +From: Robin Murphy <robin.murphy@arm.com> +Date: Mon, 23 Jul 2018 23:16:06 +0100 +Subject: ACPI/IORT: Support address size limit for root complexes + +IORT revision D allows PCI root complex nodes to specify a memory +address size limit equivalently to named components, to help describe +straightforward integrations which don't really warrant a full-blown +_DMA method. Now that our headers are up-to-date, plumb it in. + +If both _DMA and an address size limit are present, we would always +expect the former to be a more specific subset of the latter (since it +makes little sense for a _DMA range to involve bits which IORT says +aren't wired up), thus we can save calculating an explicit intersection +of the two effective masks and simply use short-circuit logic instead. + +Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> +Signed-off-by: Robin Murphy <robin.murphy@arm.com> +Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +Acked-by: Will Deacon <will.deacon@arm.com> +Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> +Signed-off-by: Christoph Hellwig <hch@lst.de> +--- + drivers/acpi/arm64/iort.c | 25 +++++++++++++++++++++++-- + 1 file changed, 23 insertions(+), 2 deletions(-) + +diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c +index 7a3a541046ed..4a66896e2aa3 100644 +--- a/drivers/acpi/arm64/iort.c ++++ b/drivers/acpi/arm64/iort.c +@@ -947,6 +947,24 @@ static int nc_dma_get_range(struct device *dev, u64 *size) + return 0; + } + ++static int rc_dma_get_range(struct device *dev, u64 *size) ++{ ++ struct acpi_iort_node *node; ++ struct acpi_iort_root_complex *rc; ++ ++ node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX, ++ iort_match_node_callback, dev); ++ if (!node || node->revision < 1) ++ return -ENODEV; ++ ++ rc = (struct acpi_iort_root_complex *)node->node_data; ++ ++ *size = rc->memory_address_limit >= 64 ? U64_MAX : ++ 1ULL<<rc->memory_address_limit; ++ ++ return 0; ++} ++ + /** + * iort_dma_setup() - Set-up device DMA parameters. + * +@@ -975,10 +993,13 @@ void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size) + + size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); + +- if (dev_is_pci(dev)) ++ if (dev_is_pci(dev)) { + ret = acpi_dma_get_range(dev, &dmaaddr, &offset, &size); +- else ++ if (ret == -ENODEV) ++ ret = rc_dma_get_range(dev, &size); ++ } else { + ret = nc_dma_get_range(dev, &size); ++ } + + if (!ret) { + msb = fls64(dmaaddr + size - 1); +-- +cgit 1.2-0.3.lf.el7 +From f07d141fe9430cdf9f8a65a87c4136bd83b8ab2e Mon Sep 17 00:00:00 2001 +From: Robin Murphy <robin.murphy@arm.com> +Date: Mon, 23 Jul 2018 23:16:07 +0100 +Subject: dma-mapping: Generalise dma_32bit_limit flag + +Whilst the notion of an upstream DMA restriction is most commonly seen +in PCI host bridges saddled with a 32-bit native interface, a more +general version of the same issue can exist on complex SoCs where a bus +or point-to-point interconnect link from a device's DMA master interface +to another component along the path to memory (often an IOMMU) may carry +fewer address bits than the interfaces at both ends nominally support. +In order to properly deal with this, the first step is to expand the +dma_32bit_limit flag into an arbitrary mask. + +To minimise the impact on existing code, we'll make sure to only +consider this new mask valid if set. That makes sense anyway, since a +mask of zero would represent DMA not being wired up at all, and that +would be better handled by not providing valid ops in the first place. + +Signed-off-by: Robin Murphy <robin.murphy@arm.com> +Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +Signed-off-by: Christoph Hellwig <hch@lst.de> +--- + arch/x86/kernel/pci-dma.c | 2 +- + include/linux/device.h | 6 +++--- + kernel/dma/direct.c | 6 +++--- + 3 files changed, 7 insertions(+), 7 deletions(-) + +diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c +index ab5d9dd668d2..80f9fe8d27d0 100644 +--- a/arch/x86/kernel/pci-dma.c ++++ b/arch/x86/kernel/pci-dma.c +@@ -175,7 +175,7 @@ rootfs_initcall(pci_iommu_init); + + static int via_no_dac_cb(struct pci_dev *pdev, void *data) + { +- pdev->dev.dma_32bit_limit = true; ++ pdev->dev.bus_dma_mask = DMA_BIT_MASK(32); + return 0; + } + +diff --git a/include/linux/device.h b/include/linux/device.h +index 055a69dbcd18..6d3b000be57e 100644 +--- a/include/linux/device.h ++++ b/include/linux/device.h +@@ -886,6 +886,8 @@ struct dev_links_info { + * @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all + * hardware supports 64-bit addresses for consistent allocations + * such descriptors. ++ * @bus_dma_mask: Mask of an upstream bridge or bus which imposes a smaller DMA ++ * limit than the device itself supports. + * @dma_pfn_offset: offset of DMA memory range relatively of RAM + * @dma_parms: A low level driver may set these to teach IOMMU code about + * segment limitations. +@@ -912,8 +914,6 @@ struct dev_links_info { + * @offline: Set after successful invocation of bus type's .offline(). + * @of_node_reused: Set if the device-tree node is shared with an ancestor + * device. +- * @dma_32bit_limit: bridge limited to 32bit DMA even if the device itself +- * indicates support for a higher limit in the dma_mask field. + * + * At the lowest level, every device in a Linux system is represented by an + * instance of struct device. The device structure contains the information +@@ -967,6 +967,7 @@ struct device { + not all hardware supports + 64 bit addresses for consistent + allocations such descriptors. */ ++ u64 bus_dma_mask; /* upstream dma_mask constraint */ + unsigned long dma_pfn_offset; + + struct device_dma_parameters *dma_parms; +@@ -1002,7 +1003,6 @@ struct device { + bool offline_disabled:1; + bool offline:1; + bool of_node_reused:1; +- bool dma_32bit_limit:1; + }; + + static inline struct device *kobj_to_dev(struct kobject *kobj) +diff --git a/kernel/dma/direct.c b/kernel/dma/direct.c +index 8be8106270c2..c2860c5a9e96 100644 +--- a/kernel/dma/direct.c ++++ b/kernel/dma/direct.c +@@ -180,10 +180,10 @@ int dma_direct_supported(struct device *dev, u64 mask) + return 0; + #endif + /* +- * Various PCI/PCIe bridges have broken support for > 32bit DMA even +- * if the device itself might support it. ++ * Upstream PCI/PCIe bridges or SoC interconnects may not carry ++ * as many DMA address bits as the device itself supports. + */ +- if (dev->dma_32bit_limit && mask > DMA_BIT_MASK(32)) ++ if (dev->bus_dma_mask && mask > dev->bus_dma_mask) + return 0; + return 1; + } +-- +cgit 1.2-0.3.lf.el7 +From d74ea7100b0d065f2008c4e1ddf637483bc3d28c Mon Sep 17 00:00:00 2001 +From: Robin Murphy <robin.murphy@arm.com> +Date: Mon, 23 Jul 2018 23:16:08 +0100 +Subject: ACPI/IORT: Set bus DMA mask as appropriate + +When an explicit DMA limit is described by firmware, we need to remember +it regardless of how drivers might subsequently update their devices' +masks. The new bus_dma_mask field does that. + +Signed-off-by: Robin Murphy <robin.murphy@arm.com> +Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> +Signed-off-by: Christoph Hellwig <hch@lst.de> +--- + drivers/acpi/arm64/iort.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c +index 4a66896e2aa3..bc51cff5505e 100644 +--- a/drivers/acpi/arm64/iort.c ++++ b/drivers/acpi/arm64/iort.c +@@ -1014,6 +1014,7 @@ void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size) + * Limit coherent and dma mask based on size + * retrieved from firmware. + */ ++ dev->bus_dma_mask = mask; + dev->coherent_dma_mask = mask; + *dev->dma_mask = mask; + } +-- +cgit 1.2-0.3.lf.el7 +From 6c2fb2ea76361da9b420a8e23a2a19e7842cbdda Mon Sep 17 00:00:00 2001 +From: Robin Murphy <robin.murphy@arm.com> +Date: Mon, 23 Jul 2018 23:16:09 +0100 +Subject: of/device: Set bus DMA mask as appropriate + +When an explicit DMA limit is described by firmware, we need to remember +it regardless of how drivers might subsequently update their devices' +masks. The new bus_dma_mask field does that. + +Signed-off-by: Robin Murphy <robin.murphy@arm.com> +Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +Signed-off-by: Christoph Hellwig <hch@lst.de> +--- + drivers/of/device.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/of/device.c b/drivers/of/device.c +index 33d85511d790..0d39633e8545 100644 +--- a/drivers/of/device.c ++++ b/drivers/of/device.c +@@ -149,6 +149,7 @@ int of_dma_configure(struct device *dev, struct device_node *np, bool force_dma) + * set by the driver. + */ + mask = DMA_BIT_MASK(ilog2(dma_addr + size - 1) + 1); ++ dev->bus_dma_mask = mask; + dev->coherent_dma_mask &= mask; + *dev->dma_mask &= mask; + +-- +cgit 1.2-0.3.lf.el7 +From 03bfdc31176cbe21e456f889ccbbf67568831149 Mon Sep 17 00:00:00 2001 +From: Robin Murphy <robin.murphy@arm.com> +Date: Mon, 23 Jul 2018 23:16:10 +0100 +Subject: iommu/dma: Respect bus DMA limit for IOVAs + +Take the new bus limit into account (when present) for IOVA allocations, +to accommodate those SoCs which integrate off-the-shelf IP blocks with +narrower interconnects such that the link between a device output and an +IOMMU input can truncate DMA addresses to even fewer bits than the +native size of either block's interface would imply. + +Eventually it might make sense for the DMA core to apply this constraint +up-front in dma_set_mask() and friends, but for now this seems like the +least risky approach. + +Signed-off-by: Robin Murphy <robin.murphy@arm.com> +Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +Acked-by: Joerg Roedel <jroedel@suse.de> +Signed-off-by: Christoph Hellwig <hch@lst.de> +--- + drivers/iommu/dma-iommu.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c +index ddcbbdb5d658..511ff9a1d6d9 100644 +--- a/drivers/iommu/dma-iommu.c ++++ b/drivers/iommu/dma-iommu.c +@@ -367,6 +367,9 @@ static dma_addr_t iommu_dma_alloc_iova(struct iommu_domain *domain, + if (iova_len < (1 << (IOVA_RANGE_CACHE_MAX_SIZE - 1))) + iova_len = roundup_pow_of_two(iova_len); + ++ if (dev->bus_dma_mask) ++ dma_limit &= dev->bus_dma_mask; ++ + if (domain->geometry.force_aperture) + dma_limit = min(dma_limit, domain->geometry.aperture_end); + +-- +cgit 1.2-0.3.lf.el7 +From 6757cdae44449dec2af68cd4db0a5f9a30e66b38 Mon Sep 17 00:00:00 2001 +From: Robin Murphy <robin.murphy@arm.com> +Date: Mon, 23 Jul 2018 23:16:11 +0100 +Subject: ACPI/IORT: Don't set default coherent DMA mask + +Now that we can track upstream DMA constraints properly with +bus_dma_mask instead of trying (and failing) to maintain it in +coherent_dma_mask, it doesn't make much sense for the firmware code to +be touching the latter at all. It's merely papering over bugs wherein a +driver has failed to call dma_set_coherent_mask() *and* the bus code has +not initialised any default value. + +We don't really want to encourage more drivers coercing dma_mask so +we'll continue to fix that up if necessary, but add a warning to help +flush out any such buggy bus code that remains. + +Signed-off-by: Robin Murphy <robin.murphy@arm.com> +Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> +Signed-off-by: Christoph Hellwig <hch@lst.de> +--- + drivers/acpi/arm64/iort.c | 22 +++++++++++----------- + 1 file changed, 11 insertions(+), 11 deletions(-) + +diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c +index bc51cff5505e..08f26db2da7e 100644 +--- a/drivers/acpi/arm64/iort.c ++++ b/drivers/acpi/arm64/iort.c +@@ -978,20 +978,20 @@ void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size) + int ret, msb; + + /* +- * Set default coherent_dma_mask to 32 bit. Drivers are expected to +- * setup the correct supported mask. ++ * If @dev is expected to be DMA-capable then the bus code that created ++ * it should have initialised its dma_mask pointer by this point. For ++ * now, we'll continue the legacy behaviour of coercing it to the ++ * coherent mask if not, but we'll no longer do so quietly. + */ +- if (!dev->coherent_dma_mask) +- dev->coherent_dma_mask = DMA_BIT_MASK(32); +- +- /* +- * Set it to coherent_dma_mask by default if the architecture +- * code has not set it. +- */ +- if (!dev->dma_mask) ++ if (!dev->dma_mask) { ++ dev_warn(dev, "DMA mask not set\n"); + dev->dma_mask = &dev->coherent_dma_mask; ++ } + +- size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); ++ if (dev->coherent_dma_mask) ++ size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); ++ else ++ size = 1ULL << 32; + + if (dev_is_pci(dev)) { + ret = acpi_dma_get_range(dev, &dmaaddr, &offset, &size); +-- +cgit 1.2-0.3.lf.el7 +From 4d8bde883bfba3e8dd3335f91b640e5a70ec0aa6 Mon Sep 17 00:00:00 2001 +From: Robin Murphy <robin.murphy@arm.com> +Date: Mon, 23 Jul 2018 23:16:12 +0100 +Subject: OF: Don't set default coherent DMA mask + +Now that we can track upstream DMA constraints properly with +bus_dma_mask instead of trying (and failing) to maintain it in +coherent_dma_mask, it doesn't make much sense for the firmware code to +be touching the latter at all. It's merely papering over bugs wherein a +driver has failed to call dma_set_coherent_mask() *and* the bus code has +not initialised any default value. + +We don't really want to encourage more drivers coercing dma_mask so +we'll continue to fix that up if necessary, but add a warning to help +flush out any such buggy bus code that remains. + +Signed-off-by: Robin Murphy <robin.murphy@arm.com> +Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +Signed-off-by: Christoph Hellwig <hch@lst.de> +--- + drivers/of/device.c | 20 ++++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +diff --git a/drivers/of/device.c b/drivers/of/device.c +index 0d39633e8545..5957cd4fa262 100644 +--- a/drivers/of/device.c ++++ b/drivers/of/device.c +@@ -127,20 +127,20 @@ int of_dma_configure(struct device *dev, struct device_node *np, bool force_dma) + } + + /* +- * Set default coherent_dma_mask to 32 bit. Drivers are expected to +- * setup the correct supported mask. ++ * If @dev is expected to be DMA-capable then the bus code that created ++ * it should have initialised its dma_mask pointer by this point. For ++ * now, we'll continue the legacy behaviour of coercing it to the ++ * coherent mask if not, but we'll no longer do so quietly. + */ +- if (!dev->coherent_dma_mask) +- dev->coherent_dma_mask = DMA_BIT_MASK(32); +- /* +- * Set it to coherent_dma_mask by default if the architecture +- * code has not set it. +- */ +- if (!dev->dma_mask) ++ if (!dev->dma_mask) { ++ dev_warn(dev, "DMA mask not set\n"); + dev->dma_mask = &dev->coherent_dma_mask; ++ } + +- if (!size) ++ if (!size && dev->coherent_dma_mask) + size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); ++ else if (!size) ++ size = 1ULL << 32; + + dev->dma_pfn_offset = offset; + +-- +cgit 1.2-0.3.lf.el7 diff --git a/drm-vc4-Fix-the-no-scaling-case-on-multi-planar-YUV-formats.patch b/drm-vc4-Fix-the-no-scaling-case-on-multi-planar-YUV-formats.patch deleted file mode 100644 index 195ced13b..000000000 --- a/drm-vc4-Fix-the-no-scaling-case-on-multi-planar-YUV-formats.patch +++ /dev/null @@ -1,88 +0,0 @@ -From patchwork Wed Jul 25 12:29:07 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: drm/vc4: Fix the "no scaling" case on multi-planar YUV formats -From: Boris Brezillon <boris.brezillon@bootlin.com> -X-Patchwork-Id: 240917 -Message-Id: <20180725122907.13702-1-boris.brezillon@bootlin.com> -To: Eric Anholt <eric@anholt.net> -Cc: David Airlie <airlied@linux.ie>, - Boris Brezillon <boris.brezillon@bootlin.com>, stable@vger.kernel.org, - dri-devel@lists.freedesktop.org -Date: Wed, 25 Jul 2018 14:29:07 +0200 - -When there's no scaling requested ->is_unity should be true no matter -the format. - -Also, when no scaling is requested and we have a multi-planar YUV -format, we should leave ->y_scaling[0] to VC4_SCALING_NONE and only -set ->x_scaling[0] to VC4_SCALING_PPF. - -Doing this fixes an hardly visible artifact (seen when using modetest -and a rather big overlay plane in YUV420). - -Fixes: fc04023fafec ("drm/vc4: Add support for YUV planes.") -Cc: <stable@vger.kernel.org> -Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> -Reviewed-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_plane.c | 25 ++++++++++++------------- - 1 file changed, 12 insertions(+), 13 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c -index cfb50fedfa2b..a3275fa66b7b 100644 ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -297,6 +297,9 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0], - vc4_state->crtc_h); - -+ vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE && -+ vc4_state->y_scaling[0] == VC4_SCALING_NONE); -+ - if (num_planes > 1) { - vc4_state->is_yuv = true; - -@@ -312,24 +315,17 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - vc4_get_scaling_mode(vc4_state->src_h[1], - vc4_state->crtc_h); - -- /* YUV conversion requires that scaling be enabled, -- * even on a plane that's otherwise 1:1. Choose TPZ -- * for simplicity. -+ /* YUV conversion requires that horizontal scaling be enabled, -+ * even on a plane that's otherwise 1:1. Looks like only PPF -+ * works in that case, so let's pick that one. - */ -- if (vc4_state->x_scaling[0] == VC4_SCALING_NONE) -- vc4_state->x_scaling[0] = VC4_SCALING_TPZ; -- if (vc4_state->y_scaling[0] == VC4_SCALING_NONE) -- vc4_state->y_scaling[0] = VC4_SCALING_TPZ; -+ if (vc4_state->is_unity) -+ vc4_state->x_scaling[0] = VC4_SCALING_PPF; - } else { - vc4_state->x_scaling[1] = VC4_SCALING_NONE; - vc4_state->y_scaling[1] = VC4_SCALING_NONE; - } - -- vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE && -- vc4_state->y_scaling[0] == VC4_SCALING_NONE && -- vc4_state->x_scaling[1] == VC4_SCALING_NONE && -- vc4_state->y_scaling[1] == VC4_SCALING_NONE); -- - /* No configuring scaling on the cursor plane, since it gets - non-vblank-synced updates, and scaling requires requires - LBM changes which have to be vblank-synced. -@@ -672,7 +668,10 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5); - } - -- if (!vc4_state->is_unity) { -+ if (vc4_state->x_scaling[0] != VC4_SCALING_NONE || -+ vc4_state->x_scaling[1] != VC4_SCALING_NONE || -+ vc4_state->y_scaling[0] != VC4_SCALING_NONE || -+ vc4_state->y_scaling[1] != VC4_SCALING_NONE) { - /* LBM Base Address. */ - if (vc4_state->y_scaling[0] != VC4_SCALING_NONE || - vc4_state->y_scaling[1] != VC4_SCALING_NONE) { diff --git a/kernel-aarch64-debug.config b/kernel-aarch64-debug.config index 0a3754165..aed8b0153 100644 --- a/kernel-aarch64-debug.config +++ b/kernel-aarch64-debug.config @@ -2494,8 +2494,8 @@ CONFIG_INTEL_SOC_PMIC_CHTDC_TI=m # CONFIG_INTEL_TH is not set CONFIG_INTEL_XWAY_PHY=m # CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_INV_MPU6050_I2C is not set -# CONFIG_INV_MPU6050_IIO is not set +CONFIG_INV_MPU6050_I2C=m +CONFIG_INV_MPU6050_IIO=m # CONFIG_INV_MPU6050_SPI is not set CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set @@ -4384,7 +4384,7 @@ CONFIG_PINCONF=y CONFIG_PINCTRL_AMD=y # CONFIG_PINCTRL_APQ8064 is not set # CONFIG_PINCTRL_APQ8084 is not set -CONFIG_PINCTRL_AS3722=m +CONFIG_PINCTRL_AS3722=y CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set diff --git a/kernel-aarch64.config b/kernel-aarch64.config index b342c27b3..bfa39c00d 100644 --- a/kernel-aarch64.config +++ b/kernel-aarch64.config @@ -2476,8 +2476,8 @@ CONFIG_INTEL_SOC_PMIC_CHTDC_TI=m # CONFIG_INTEL_TH is not set CONFIG_INTEL_XWAY_PHY=m # CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_INV_MPU6050_I2C is not set -# CONFIG_INV_MPU6050_IIO is not set +CONFIG_INV_MPU6050_I2C=m +CONFIG_INV_MPU6050_IIO=m # CONFIG_INV_MPU6050_SPI is not set CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set @@ -4362,7 +4362,7 @@ CONFIG_PINCONF=y CONFIG_PINCTRL_AMD=y # CONFIG_PINCTRL_APQ8064 is not set # CONFIG_PINCTRL_APQ8084 is not set -CONFIG_PINCTRL_AS3722=m +CONFIG_PINCTRL_AS3722=y CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set diff --git a/kernel-armv7hl-debug.config b/kernel-armv7hl-debug.config index 7750adb9a..f3c702367 100644 --- a/kernel-armv7hl-debug.config +++ b/kernel-armv7hl-debug.config @@ -2629,8 +2629,8 @@ CONFIG_INTEL_SOC_PMIC_CHTDC_TI=m # CONFIG_INTEL_TH is not set CONFIG_INTEL_XWAY_PHY=m # CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_INV_MPU6050_I2C is not set -# CONFIG_INV_MPU6050_IIO is not set +CONFIG_INV_MPU6050_I2C=m +CONFIG_INV_MPU6050_IIO=m # CONFIG_INV_MPU6050_SPI is not set CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set @@ -4645,7 +4645,7 @@ CONFIG_PINCTRL_APQ8064=m CONFIG_PINCTRL_APQ8084=m CONFIG_PINCTRL_ARMADA_370=y CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_AS3722=m +CONFIG_PINCTRL_AS3722=y CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set diff --git a/kernel-armv7hl-lpae-debug.config b/kernel-armv7hl-lpae-debug.config index 17004fdb3..968b8df82 100644 --- a/kernel-armv7hl-lpae-debug.config +++ b/kernel-armv7hl-lpae-debug.config @@ -2495,8 +2495,8 @@ CONFIG_INTEL_SOC_PMIC_CHTDC_TI=m # CONFIG_INTEL_TH is not set CONFIG_INTEL_XWAY_PHY=m # CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_INV_MPU6050_I2C is not set -# CONFIG_INV_MPU6050_IIO is not set +CONFIG_INV_MPU6050_I2C=m +CONFIG_INV_MPU6050_IIO=m # CONFIG_INV_MPU6050_SPI is not set CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set @@ -4413,7 +4413,7 @@ CONFIG_PINCONF=y # CONFIG_PINCTRL_AMD is not set CONFIG_PINCTRL_ARMADA_370=y CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_AS3722=m +CONFIG_PINCTRL_AS3722=y CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set diff --git a/kernel-armv7hl-lpae.config b/kernel-armv7hl-lpae.config index 07885b08a..b02ff24a2 100644 --- a/kernel-armv7hl-lpae.config +++ b/kernel-armv7hl-lpae.config @@ -2477,8 +2477,8 @@ CONFIG_INTEL_SOC_PMIC_CHTDC_TI=m # CONFIG_INTEL_TH is not set CONFIG_INTEL_XWAY_PHY=m # CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_INV_MPU6050_I2C is not set -# CONFIG_INV_MPU6050_IIO is not set +CONFIG_INV_MPU6050_I2C=m +CONFIG_INV_MPU6050_IIO=m # CONFIG_INV_MPU6050_SPI is not set CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set @@ -4391,7 +4391,7 @@ CONFIG_PINCONF=y # CONFIG_PINCTRL_AMD is not set CONFIG_PINCTRL_ARMADA_370=y CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_AS3722=m +CONFIG_PINCTRL_AS3722=y CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set diff --git a/kernel-armv7hl.config b/kernel-armv7hl.config index 0ec0f377e..164c41acf 100644 --- a/kernel-armv7hl.config +++ b/kernel-armv7hl.config @@ -2611,8 +2611,8 @@ CONFIG_INTEL_SOC_PMIC_CHTDC_TI=m # CONFIG_INTEL_TH is not set CONFIG_INTEL_XWAY_PHY=m # CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_INV_MPU6050_I2C is not set -# CONFIG_INV_MPU6050_IIO is not set +CONFIG_INV_MPU6050_I2C=m +CONFIG_INV_MPU6050_IIO=m # CONFIG_INV_MPU6050_SPI is not set CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set @@ -4623,7 +4623,7 @@ CONFIG_PINCTRL_APQ8064=m CONFIG_PINCTRL_APQ8084=m CONFIG_PINCTRL_ARMADA_370=y CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_AS3722=m +CONFIG_PINCTRL_AS3722=y CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set diff --git a/kernel-x86_64-debug.config b/kernel-x86_64-debug.config index 64923e464..18ec046db 100644 --- a/kernel-x86_64-debug.config +++ b/kernel-x86_64-debug.config @@ -974,7 +974,7 @@ CONFIG_CRYPTO_DEV_QAT_C62XVF=m CONFIG_CRYPTO_DEV_QAT_DH895xCC=m CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m # CONFIG_CRYPTO_DEV_SP_CCP is not set -CONFIG_CRYPTO_DEV_SP_PSP=y +# CONFIG_CRYPTO_DEV_SP_PSP is not set CONFIG_CRYPTO_DEV_VIRTIO=m CONFIG_CRYPTO_DH=y CONFIG_CRYPTO_DRBG_CTR=y diff --git a/kernel-x86_64.config b/kernel-x86_64.config index d29efaa14..46c3c0ceb 100644 --- a/kernel-x86_64.config +++ b/kernel-x86_64.config @@ -970,7 +970,7 @@ CONFIG_CRYPTO_DEV_QAT_C62XVF=m CONFIG_CRYPTO_DEV_QAT_DH895xCC=m CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m # CONFIG_CRYPTO_DEV_SP_CCP is not set -CONFIG_CRYPTO_DEV_SP_PSP=y +# CONFIG_CRYPTO_DEV_SP_PSP is not set CONFIG_CRYPTO_DEV_VIRTIO=m CONFIG_CRYPTO_DH=y CONFIG_CRYPTO_DRBG_CTR=y diff --git a/kernel.spec b/kernel.spec index d1c98bd46..743e1d8d7 100644 --- a/kernel.spec +++ b/kernel.spec @@ -631,8 +631,11 @@ Patch331: bcm2835-cpufreq-add-CPU-frequency-control-driver.patch Patch332: bcm2835-hwmon-Add-support-for-RPi-voltage-sensor.patch -# https://patchwork.freedesktop.org/patch/240917/ -Patch334: drm-vc4-Fix-the-no-scaling-case-on-multi-planar-YUV-formats.patch +# Patches enabling device specific brcm firmware nvram +Patch340: 0001-brcmfmac-Remove-firmware-loading-code-duplication.patch +Patch341: 0002-brcmfmac-Remove-recursion-from-firmware-load-error-h.patch +Patch342: 0003-brcmfmac-Add-support-for-first-trying-to-get-a-board.patch +Patch343: 0004-brcmfmac-Set-board_type-used-for-nvram-file-selectio.patch # Fix for AllWinner A64 Timer Errata, still not final # https://patchwork.kernel.org/patch/10392891/ @@ -640,6 +643,12 @@ Patch350: arm64-arch_timer-Workaround-for-Allwinner-A64-timer-instability.patch Patch351: arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch Patch352: arm64-allwinner-fixes.patch +# Patch series is in 4.19, needed for Ampere eMAG platform +# first patch fixes a bug in OF/DT seen on some devices with series +# http://git.infradead.org/users/hch/dma-mapping.git/commitdiff/a5516219b10218a87abb3352c82248ce3088e94a +# https://www.spinics.net/lists/linux-acpi/msg83312.html +Patch360: dma-stop-losing-firmware-set-dma-masks.patch + # 400 - IBM (ppc/s390x) patches # 500 - Temp fixes/CVEs etc @@ -682,12 +691,15 @@ Patch531: xsa270.patch Patch533: 0001-random-add-a-config-option-to-trust-the-CPU-s-hwrng.patch Patch534: 0001-random-make-CPU-trust-a-boot-parameter.patch -# CVE-2018-14633 rhbz 1626035 1632185 -Patch535: CVE-2018-14633.patch - # rhbz 1628394 Patch536: powerpc-ipv6.patch +# rhbz 1634250 +Patch537: HID-intel-ish-hid-Enable-Sunrise-Point-H-ish-driver.patch + +# rhbz 1635475 1635476 +Patch538: arm64_kvm_security.patch + # END OF PATCH DEFINITIONS %endif @@ -1950,6 +1962,27 @@ fi # # %changelog +* Wed Oct 3 2018 Peter Robinson <pbrobinson@fedoraproject.org> +- Fixes for Ampere platforms + +* Wed Oct 03 2018 Justin M. Forbes <jforbes@fedoraproject.org> +- Fix arm64 kvm priv escalation (rhbz 1635475 1635476) + +* Mon Oct 01 2018 Laura Abbott <labbott@redhat.com> +- Disable CONFIG_CRYPTO_DEV_SP_PSP (rhbz 1608242) + +* Mon Oct 1 2018 Laura Abbott <labbott@redhat.com> +- Fix for Intel Sensor Hub (rhbz 1634250) + +* Mon Oct 1 2018 Peter Robinson <pbrobinson@fedoraproject.org> 4.18.11-301 +- Support loading device specific NVRAM files on brcm WiFi devices + +* Sun Sep 30 2018 Peter Robinson <pbrobinson@fedoraproject.org> +- Fixes for AllWinner A64 NICs + +* Sun Sep 30 2018 Laura Abbott <labbott@redhat.com> - 4.18.11-300 +- Linux v4.18.11 + * Wed Sep 26 2018 Peter Robinson <pbrobinson@fedoraproject.org> - Add thermal trip to bcm283x (Raspberry Pi) cpufreq - Add initial RockPro64 DT support |