Bring in patch-series from drm-next to fix skl_update_other_pipe_wm issues

  (rhbz 1305038)
- Disable fbc on haswell by default (fdo#96461)

1 files changed, 57 insertions, 0 deletions

diff --git a/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch b/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch
new file mode 100644
index 000000000..a5e34c39c
--- /dev/null
+++ b/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch
@@ -0,0 +1,57 @@
+From f28225dda2a2bf1e2d96bbe44b45d43a7d5071d3 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:05:59 -0700
+Subject: [PATCH 05/17] drm/i915/gen9: Store plane minimum blocks in CRTC wm
+ state (v2)
+
+This will eventually allow us to re-use old values without
+re-calculating them for unchanged planes (which also helps us avoid
+re-grabbing extra plane states).
+
+v2:
+ -  Drop unnecessary memset's; they were meant for a later patch (which
+    got reworked anyway to not need them, but were mis-rebased into this
+    one.  (Maarten)
+
+Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-6-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_drv.h | 4 ++++
+ drivers/gpu/drm/i915/intel_pm.c  | 4 ++--
+ 2 files changed, 6 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
+index 6a95696..9308cff 100644
+--- a/drivers/gpu/drm/i915/intel_drv.h
++++ b/drivers/gpu/drm/i915/intel_drv.h
+@@ -431,6 +431,10 @@ struct intel_crtc_wm_state {
+ 			/* cached plane data rate */
+ 			unsigned plane_data_rate[I915_MAX_PLANES];
+ 			unsigned plane_y_data_rate[I915_MAX_PLANES];
++
++			/* minimum block allocation */
++			uint16_t minimum_blocks[I915_MAX_PLANES];
++			uint16_t minimum_y_blocks[I915_MAX_PLANES];
+ 		} skl;
+ 	};
+ 
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index 5104ba7..6c7a048 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3067,8 +3067,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 	enum pipe pipe = intel_crtc->pipe;
+ 	struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
+ 	uint16_t alloc_size, start, cursor_blocks;
+-	uint16_t minimum[I915_MAX_PLANES];
+-	uint16_t y_minimum[I915_MAX_PLANES];
++	uint16_t *minimum = cstate->wm.skl.minimum_blocks;
++	uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;
+ 	unsigned int total_data_rate;
+ 
+ 	skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc);
+-- 
+2.7.4
+