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authorPeter Robinson <pbrobinson@gmail.com>2013-09-04 02:43:18 +0100
committerPeter Robinson <pbrobinson@gmail.com>2013-09-04 02:43:18 +0100
commitbad69a54fc999f7ed3871b472a31c1a760ed1e81 (patch)
tree16a0df217b495c859746080ca7f3cc4e1ff26366 /0002-dts-beaglebone-Add-I2C-definitions-for-EEPROMs-capes.patch
parent7ad7e4c4014b96bb176b000b8be71063cf5fc60f (diff)
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Add patch set to fix MMC on AM33xx, Add basic support for BeagleBone Black
Diffstat (limited to '0002-dts-beaglebone-Add-I2C-definitions-for-EEPROMs-capes.patch')
-rw-r--r--0002-dts-beaglebone-Add-I2C-definitions-for-EEPROMs-capes.patch142
1 files changed, 142 insertions, 0 deletions
diff --git a/0002-dts-beaglebone-Add-I2C-definitions-for-EEPROMs-capes.patch b/0002-dts-beaglebone-Add-I2C-definitions-for-EEPROMs-capes.patch
new file mode 100644
index 000000000..8493d1606
--- /dev/null
+++ b/0002-dts-beaglebone-Add-I2C-definitions-for-EEPROMs-capes.patch
@@ -0,0 +1,142 @@
+From e3c9bd680440e6216a86184687968a3939c06160 Mon Sep 17 00:00:00 2001
+From: Pantelis Antoniou <panto@antoniou-consulting.com>
+Date: Fri, 28 Jun 2013 18:39:55 +0300
+Subject: [PATCH 2/4] dts: beaglebone: Add I2C definitions for EEPROMs & capes
+
+Add the I2C definitions for the EEPROM devices on the baseboard
+and on the possibly connected capes.
+
+Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
+---
+ arch/arm/boot/dts/am335x-bone.dts | 44 ++++++++++++++++++++++++++++++++++
+ arch/arm/boot/dts/am335x-boneblack.dts | 44 ++++++++++++++++++++++++++++++++++
+ 2 files changed, 88 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
+index b8debea..15c9643 100644
+--- a/arch/arm/boot/dts/am335x-bone.dts
++++ b/arch/arm/boot/dts/am335x-bone.dts
+@@ -110,6 +110,18 @@
+ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
++ i2c0_pins: pinmux_i2c0_pins {
++ pinctrl-single,pins = <
++ 0x188 0x70 /* i2c0_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */
++ 0x18c 0x70 /* i2c0_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */
++ >;
++ };
++ i2c2_pins: pinmux_i2c2_pins {
++ pinctrl-single,pins = <
++ 0x178 0x73 /* uart1_ctsn.i2c2_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */
++ 0x17c 0x73 /* uart1_rtsn.i2c2_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */
++ >;
++ };
+ };
+
+ ocp {
+@@ -131,7 +143,39 @@
+ reg = <0x24>;
+ };
+
++ baseboard_eeprom: baseboard_eeprom@50 {
++ compatible = "at,24c256";
++ reg = <0x50>;
++ };
+ };
++
++ i2c2: i2c@4819c000 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c2_pins>;
++ status = "okay";
++ clock-frequency = <100000>;
++
++ cape_eeprom0: cape_eeprom0@54 {
++ compatible = "at,24c256";
++ reg = <0x54>;
++ };
++
++ cape_eeprom1: cape_eeprom1@55 {
++ compatible = "at,24c256";
++ reg = <0x55>;
++ };
++
++ cape_eeprom2: cape_eeprom2@56 {
++ compatible = "at,24c256";
++ reg = <0x56>;
++ };
++
++ cape_eeprom3: cape_eeprom3@57 {
++ compatible = "at,24c256";
++ reg = <0x57>;
++ };
++ };
++
+ };
+
+ leds {
+diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
+index 75a924d..9e453b6 100644
+--- a/arch/arm/boot/dts/am335x-boneblack.dts
++++ b/arch/arm/boot/dts/am335x-boneblack.dts
+@@ -140,6 +140,19 @@
+ 0x50 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a4.gpio1_20 */
+ >;
+ };
++
++ i2c0_pins: pinmux_i2c0_pins {
++ pinctrl-single,pins = <
++ 0x188 0x70 /* i2c0_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */
++ 0x18c 0x70 /* i2c0_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */
++ >;
++ };
++ i2c2_pins: pinmux_i2c2_pins {
++ pinctrl-single,pins = <
++ 0x178 0x73 /* uart1_ctsn.i2c2_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */
++ 0x17c 0x73 /* uart1_rtsn.i2c2_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */
++ >;
++ };
+ };
+
+ ocp {
+@@ -161,6 +174,37 @@
+ reg = <0x24>;
+ };
+
++ baseboard_eeprom: baseboard_eeprom@50 {
++ compatible = "at,24c256";
++ reg = <0x50>;
++ };
++ };
++
++ i2c2: i2c@4819c000 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c2_pins>;
++ status = "okay";
++ clock-frequency = <100000>;
++
++ cape_eeprom0: cape_eeprom0@54 {
++ compatible = "at,24c256";
++ reg = <0x54>;
++ };
++
++ cape_eeprom1: cape_eeprom1@55 {
++ compatible = "at,24c256";
++ reg = <0x55>;
++ };
++
++ cape_eeprom2: cape_eeprom2@56 {
++ compatible = "at,24c256";
++ reg = <0x56>;
++ };
++
++ cape_eeprom3: cape_eeprom3@57 {
++ compatible = "at,24c256";
++ reg = <0x57>;
++ };
+ };
+ };
+
+--
+1.8.2.1
+