/* * Copyright (C) 2013 Red Hat, Inc. All rights reserved. * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public * License as published by the Free Software Foundation; either * version 2.1 of the License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * * Authors: Peter Schiffer */ #ifndef DMIDECODE_H_ #define DMIDECODE_H_ #include #include #include #include "utils.h" /* Processor from dmidecode. */ typedef struct _DmiProcessor { char *id; /* ID */ char *family; /* Family */ char *status; /* CPU Status */ unsigned current_speed; /* Current Speed in MHz */ unsigned max_speed; /* Max Speed in MHz */ unsigned external_clock; /* External Clock Speed in MHz */ char *name; /* CPU name, version in dmidecode */ unsigned cores; /* Number of cores */ unsigned enabled_cores; /* Number of enabled cores */ unsigned threads; /* Number of threads */ char *type; /* CPU Type/Role */ char *stepping; /* Stepping (revision level within family) */ char *upgrade; /* CPU upgrade method - socket */ unsigned charact_nb; /* Number of CPU Characteristics */ char **characteristics; /* CPU Characteristics */ char *l1_cache_handle; /* Level 1 Cache Handle */ char *l2_cache_handle; /* Level 2 Cache Handle */ char *l3_cache_handle; /* Level 3 Cache Handle */ char *manufacturer; /* CPU Manufacturer */ char *serial_number; /* CPU Serial Number */ char *part_number; /* CPU Part Number */ } DmiProcessor; /* Processor cache from dmidecode. */ typedef struct _DmiCpuCache { char *id; /* ID */ unsigned size; /* Cache Size */ char *name; /* Cache Name */ char *status; /* Cache Status (Enabled or Disabled) */ unsigned level; /* Cache Level */ char *op_mode; /* Cache Operational Mode (Write Back, ..) */ char *type; /* Cache Type (Data, Instruction, Unified..) */ char *associativity; /* Cache Associativity */ } DmiCpuCache; /* * Get array of processors according to the dmidecode program. * @param cpu array of cpus, this function will allocate necessary memory, * but caller is responsible for freeing it * @param cpus_nb number of processors in cpus * @return 0 if success, negative value otherwise */ short dmi_get_processors(DmiProcessor **cpus, unsigned *cpus_nb); /* * Free array of processor structures. * @param cpus array of cpus * @param cpus_nb number of cpus */ void dmi_free_processors(DmiProcessor **cpus, unsigned *cpus_nb); /* * Get array of processor caches according to the dmidecode program. * @param caches array of cpu caches, this function will allocate necessary * memory, but caller is responsible for freeing it * @param caches_nb number of caches in caches * @return 0 if success, negative value otherwise */ short dmi_get_cpu_caches(DmiCpuCache **caches, unsigned *caches_nb); /* * Free array of cpu cache structures. * @param caches array of caches * @param caches_nb number of caches */ void dmi_free_cpu_caches(DmiCpuCache **caches, unsigned *caches_nb); #endif /* DMIDECODE_H_ */