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-rw-r--r--src/hardware/LMI_AssociatedProcessorCacheMemoryProvider.c4
-rw-r--r--src/hardware/LMI_Hardware.h1
-rw-r--r--src/hardware/LMI_ProcessorCacheMemoryProvider.c2
-rw-r--r--src/hardware/LMI_ProcessorCapabilitiesProvider.c4
-rw-r--r--src/hardware/LMI_ProcessorChipProvider.c195
-rw-r--r--src/hardware/LMI_ProcessorChipRealizesProvider.c269
-rw-r--r--src/hardware/LMI_ProcessorElementCapabilitiesProvider.c2
-rw-r--r--src/hardware/LMI_ProcessorProvider.c2
-rw-r--r--src/hardware/dmidecode.c48
-rw-r--r--src/hardware/dmidecode.h3
10 files changed, 523 insertions, 7 deletions
diff --git a/src/hardware/LMI_AssociatedProcessorCacheMemoryProvider.c b/src/hardware/LMI_AssociatedProcessorCacheMemoryProvider.c
index 1af1bad..3d06a65 100644
--- a/src/hardware/LMI_AssociatedProcessorCacheMemoryProvider.c
+++ b/src/hardware/LMI_AssociatedProcessorCacheMemoryProvider.c
@@ -156,7 +156,7 @@ static CMPIStatus LMI_AssociatedProcessorCacheMemoryEnumInstances(
cache_level = get_cache_level(dmi_cpu_caches[j].level);
if (cache_level == LMI_AssociatedProcessorCacheMemory_Level_Other) {
- char other_level[LONG_INT_LEN] = "";
+ char other_level[LONG_INT_LEN];
snprintf(other_level, LONG_INT_LEN, "%u",
dmi_cpu_caches[j].level);
LMI_AssociatedProcessorCacheMemory_Set_OtherLevelDescription(
@@ -238,7 +238,7 @@ static CMPIStatus LMI_AssociatedProcessorCacheMemoryEnumInstances(
cache_level = get_cache_level(sysfs_cpu_caches[i].level);
if (cache_level == LMI_AssociatedProcessorCacheMemory_Level_Other) {
- char other_level[LONG_INT_LEN] = "";
+ char other_level[LONG_INT_LEN];
snprintf(other_level, LONG_INT_LEN, "%u",
sysfs_cpu_caches[i].level);
LMI_AssociatedProcessorCacheMemory_Set_OtherLevelDescription(
diff --git a/src/hardware/LMI_Hardware.h b/src/hardware/LMI_Hardware.h
index ff8848a..1f30be6 100644
--- a/src/hardware/LMI_Hardware.h
+++ b/src/hardware/LMI_Hardware.h
@@ -27,5 +27,6 @@
#define CPU_CLASS_NAME "Processor"
#define CPU_CAP_CLASS_NAME "ProcessorCapabilities"
#define CPU_CACHE_CLASS_NAME "ProcessorCacheMemory"
+#define CPU_CHIP_CLASS_NAME "ProcessorChip"
#endif /* LMI_HARDWARE_H_ */
diff --git a/src/hardware/LMI_ProcessorCacheMemoryProvider.c b/src/hardware/LMI_ProcessorCacheMemoryProvider.c
index ca45b67..afc5d7f 100644
--- a/src/hardware/LMI_ProcessorCacheMemoryProvider.c
+++ b/src/hardware/LMI_ProcessorCacheMemoryProvider.c
@@ -60,7 +60,7 @@ static CMPIStatus LMI_ProcessorCacheMemoryEnumInstances(
{
LMI_ProcessorCacheMemory lmi_cpu_cache;
const char *ns = KNameSpace(cop);
- char *error_msg = NULL, instance_id[INSTANCE_ID_LEN] = "";
+ char *error_msg = NULL, instance_id[INSTANCE_ID_LEN];
unsigned i, caches = 0;
DmiCpuCache *dmi_cpu_caches = NULL;
unsigned dmi_cpu_caches_nb = 0;
diff --git a/src/hardware/LMI_ProcessorCapabilitiesProvider.c b/src/hardware/LMI_ProcessorCapabilitiesProvider.c
index b29e0a9..c771124 100644
--- a/src/hardware/LMI_ProcessorCapabilitiesProvider.c
+++ b/src/hardware/LMI_ProcessorCapabilitiesProvider.c
@@ -60,8 +60,8 @@ static CMPIStatus LMI_ProcessorCapabilitiesEnumInstances(
CMPIUint16 cores = 1, threads = 1;
const char *ns = KNameSpace(cop),
*element_name_string = "Capabilities of processor ";
- char *error_msg = NULL, instance_id[INSTANCE_ID_LEN] = "",
- element_name[ELEMENT_NAME_LEN] = "";
+ char *error_msg = NULL, instance_id[INSTANCE_ID_LEN],
+ element_name[ELEMENT_NAME_LEN];
unsigned i, cpus_nb = 0;
DmiProcessor *dmi_cpus = NULL;
unsigned dmi_cpus_nb = 0;
diff --git a/src/hardware/LMI_ProcessorChipProvider.c b/src/hardware/LMI_ProcessorChipProvider.c
new file mode 100644
index 0000000..47ba488
--- /dev/null
+++ b/src/hardware/LMI_ProcessorChipProvider.c
@@ -0,0 +1,195 @@
+/*
+ * Copyright (C) 2013 Red Hat, Inc. All rights reserved.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * Authors: Peter Schiffer <pschiffe@redhat.com>
+ */
+
+#include <konkret/konkret.h>
+#include "LMI_ProcessorChip.h"
+#include "LMI_Hardware.h"
+#include "globals.h"
+#include "dmidecode.h"
+
+static const CMPIBroker* _cb = NULL;
+
+static void LMI_ProcessorChipInitialize()
+{
+}
+
+static CMPIStatus LMI_ProcessorChipCleanup(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ CMPIBoolean term)
+{
+ CMReturn(CMPI_RC_OK);
+}
+
+static CMPIStatus LMI_ProcessorChipEnumInstanceNames(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop)
+{
+ return KDefaultEnumerateInstanceNames(
+ _cb, mi, cc, cr, cop);
+}
+
+static CMPIStatus LMI_ProcessorChipEnumInstances(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char** properties)
+{
+ LMI_ProcessorChip lmi_cpu_chip;
+ const char *ns = KNameSpace(cop);
+ char *error_msg = NULL, instance_id[INSTANCE_ID_LEN];
+ unsigned i;
+ DmiProcessor *dmi_cpus = NULL;
+ unsigned dmi_cpus_nb = 0;
+
+ if (dmi_get_processors(&dmi_cpus, &dmi_cpus_nb) != 0 || dmi_cpus_nb < 1) {
+ goto done;
+ }
+
+ for (i = 0; i < dmi_cpus_nb; i++) {
+ LMI_ProcessorChip_Init(&lmi_cpu_chip, _cb, ns);
+
+ LMI_ProcessorChip_Set_CreationClassName(&lmi_cpu_chip,
+ ORGID "_" CPU_CHIP_CLASS_NAME);
+
+ snprintf(instance_id, INSTANCE_ID_LEN,
+ ORGID ":" CPU_CHIP_CLASS_NAME ":%s", dmi_cpus[i].id);
+
+ LMI_ProcessorChip_Set_Tag(&lmi_cpu_chip, dmi_cpus[i].id);
+ LMI_ProcessorChip_Set_ElementName(&lmi_cpu_chip, dmi_cpus[i].name);
+ LMI_ProcessorChip_Set_Manufacturer(&lmi_cpu_chip,
+ dmi_cpus[i].manufacturer);
+ LMI_ProcessorChip_Set_Model(&lmi_cpu_chip, dmi_cpus[i].name);
+ LMI_ProcessorChip_Set_SerialNumber(&lmi_cpu_chip,
+ dmi_cpus[i].serial_number);
+ LMI_ProcessorChip_Set_PartNumber(&lmi_cpu_chip,
+ dmi_cpus[i].part_number);
+ LMI_ProcessorChip_Set_Caption(&lmi_cpu_chip, "Processor Chip");
+ LMI_ProcessorChip_Set_Description(&lmi_cpu_chip,
+ "This object represents one chip of processor in system.");
+ LMI_ProcessorChip_Set_InstanceID(&lmi_cpu_chip, instance_id);
+ LMI_ProcessorChip_Set_Name(&lmi_cpu_chip, dmi_cpus[i].name);
+
+ KReturnInstance(cr, lmi_cpu_chip);
+ }
+
+done:
+ dmi_free_processors(&dmi_cpus, &dmi_cpus_nb);
+
+ if (error_msg) {
+ KReturn2(_cb, ERR_FAILED, error_msg);
+ }
+
+ CMReturn(CMPI_RC_OK);
+}
+
+static CMPIStatus LMI_ProcessorChipGetInstance(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char** properties)
+{
+ return KDefaultGetInstance(
+ _cb, mi, cc, cr, cop, properties);
+}
+
+static CMPIStatus LMI_ProcessorChipCreateInstance(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const CMPIInstance* ci)
+{
+ CMReturn(CMPI_RC_ERR_NOT_SUPPORTED);
+}
+
+static CMPIStatus LMI_ProcessorChipModifyInstance(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const CMPIInstance* ci,
+ const char** properties)
+{
+ CMReturn(CMPI_RC_ERR_NOT_SUPPORTED);
+}
+
+static CMPIStatus LMI_ProcessorChipDeleteInstance(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop)
+{
+ CMReturn(CMPI_RC_ERR_NOT_SUPPORTED);
+}
+
+static CMPIStatus LMI_ProcessorChipExecQuery(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char* lang,
+ const char* query)
+{
+ CMReturn(CMPI_RC_ERR_NOT_SUPPORTED);
+}
+
+CMInstanceMIStub(
+ LMI_ProcessorChip,
+ LMI_ProcessorChip,
+ _cb,
+ LMI_ProcessorChipInitialize())
+
+static CMPIStatus LMI_ProcessorChipMethodCleanup(
+ CMPIMethodMI* mi,
+ const CMPIContext* cc,
+ CMPIBoolean term)
+{
+ CMReturn(CMPI_RC_OK);
+}
+
+static CMPIStatus LMI_ProcessorChipInvokeMethod(
+ CMPIMethodMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char* meth,
+ const CMPIArgs* in,
+ CMPIArgs* out)
+{
+ return LMI_ProcessorChip_DispatchMethod(
+ _cb, mi, cc, cr, cop, meth, in, out);
+}
+
+CMMethodMIStub(
+ LMI_ProcessorChip,
+ LMI_ProcessorChip,
+ _cb,
+ LMI_ProcessorChipInitialize())
+
+KONKRET_REGISTRATION(
+ "root/cimv2",
+ "LMI_ProcessorChip",
+ "LMI_ProcessorChip",
+ "instance method")
diff --git a/src/hardware/LMI_ProcessorChipRealizesProvider.c b/src/hardware/LMI_ProcessorChipRealizesProvider.c
new file mode 100644
index 0000000..6dfd4bf
--- /dev/null
+++ b/src/hardware/LMI_ProcessorChipRealizesProvider.c
@@ -0,0 +1,269 @@
+/*
+ * Copyright (C) 2013 Red Hat, Inc. All rights reserved.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * Authors: Peter Schiffer <pschiffe@redhat.com>
+ */
+
+#include <konkret/konkret.h>
+#include "LMI_ProcessorChipRealizes.h"
+#include "LMI_Hardware.h"
+#include "globals.h"
+#include "dmidecode.h"
+
+static const CMPIBroker* _cb;
+
+static void LMI_ProcessorChipRealizesInitialize()
+{
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesCleanup(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ CMPIBoolean term)
+{
+ CMReturn(CMPI_RC_OK);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesEnumInstanceNames(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop)
+{
+ return KDefaultEnumerateInstanceNames(
+ _cb, mi, cc, cr, cop);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesEnumInstances(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char** properties)
+{
+ LMI_ProcessorChipRealizes lmi_cpu_chip_realizes;
+ LMI_ProcessorChipRef lmi_cpu_chip;
+ LMI_ProcessorRef lmi_cpu;
+ const char *ns = KNameSpace(cop);
+ char *error_msg = NULL;
+ unsigned i;
+ DmiProcessor *dmi_cpus = NULL;
+ unsigned dmi_cpus_nb = 0;
+
+ if (dmi_get_processors(&dmi_cpus, &dmi_cpus_nb) != 0 || dmi_cpus_nb < 1) {
+ goto done;
+ }
+
+ for (i = 0; i < dmi_cpus_nb; i++) {
+ LMI_ProcessorChipRealizes_Init(&lmi_cpu_chip_realizes, _cb, ns);
+
+ LMI_ProcessorRef_Init(&lmi_cpu, _cb, ns);
+ LMI_ProcessorRef_Set_SystemCreationClassName(&lmi_cpu,
+ get_system_creation_class_name());
+ LMI_ProcessorRef_Set_SystemName(&lmi_cpu, get_system_name());
+ LMI_ProcessorRef_Set_CreationClassName(&lmi_cpu,
+ ORGID "_" CPU_CLASS_NAME);
+ LMI_ProcessorRef_Set_DeviceID(&lmi_cpu, dmi_cpus[i].id);
+
+ LMI_ProcessorChipRef_Init(&lmi_cpu_chip, _cb, ns);
+ LMI_ProcessorChipRef_Set_CreationClassName(&lmi_cpu_chip,
+ ORGID "_" CPU_CHIP_CLASS_NAME);
+ LMI_ProcessorChipRef_Set_Tag(&lmi_cpu_chip, dmi_cpus[i].id);
+
+ LMI_ProcessorChipRealizes_Set_Antecedent(&lmi_cpu_chip_realizes,
+ &lmi_cpu_chip);
+ LMI_ProcessorChipRealizes_Set_Dependent(&lmi_cpu_chip_realizes,
+ &lmi_cpu);
+
+ KReturnInstance(cr, lmi_cpu_chip_realizes);
+ }
+
+done:
+ dmi_free_processors(&dmi_cpus, &dmi_cpus_nb);
+
+ if (error_msg) {
+ KReturn2(_cb, ERR_FAILED, error_msg);
+ }
+
+ CMReturn(CMPI_RC_OK);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesGetInstance(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char** properties)
+{
+ return KDefaultGetInstance(
+ _cb, mi, cc, cr, cop, properties);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesCreateInstance(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const CMPIInstance* ci)
+{
+ CMReturn(CMPI_RC_ERR_NOT_SUPPORTED);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesModifyInstance(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const CMPIInstance* ci,
+ const char**properties)
+{
+ CMReturn(CMPI_RC_ERR_NOT_SUPPORTED);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesDeleteInstance(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop)
+{
+ CMReturn(CMPI_RC_ERR_NOT_SUPPORTED);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesExecQuery(
+ CMPIInstanceMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char* lang,
+ const char* query)
+{
+ CMReturn(CMPI_RC_ERR_NOT_SUPPORTED);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesAssociationCleanup(
+ CMPIAssociationMI* mi,
+ const CMPIContext* cc,
+ CMPIBoolean term)
+{
+ CMReturn(CMPI_RC_OK);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesAssociators(
+ CMPIAssociationMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char* assocClass,
+ const char* resultClass,
+ const char* role,
+ const char* resultRole,
+ const char** properties)
+{
+ return KDefaultAssociators(
+ _cb,
+ mi,
+ cc,
+ cr,
+ cop,
+ LMI_ProcessorChipRealizes_ClassName,
+ assocClass,
+ resultClass,
+ role,
+ resultRole,
+ properties);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesAssociatorNames(
+ CMPIAssociationMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char* assocClass,
+ const char* resultClass,
+ const char* role,
+ const char* resultRole)
+{
+ return KDefaultAssociatorNames(
+ _cb,
+ mi,
+ cc,
+ cr,
+ cop,
+ LMI_ProcessorChipRealizes_ClassName,
+ assocClass,
+ resultClass,
+ role,
+ resultRole);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesReferences(
+ CMPIAssociationMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char* assocClass,
+ const char* role,
+ const char** properties)
+{
+ return KDefaultReferences(
+ _cb,
+ mi,
+ cc,
+ cr,
+ cop,
+ LMI_ProcessorChipRealizes_ClassName,
+ assocClass,
+ role,
+ properties);
+}
+
+static CMPIStatus LMI_ProcessorChipRealizesReferenceNames(
+ CMPIAssociationMI* mi,
+ const CMPIContext* cc,
+ const CMPIResult* cr,
+ const CMPIObjectPath* cop,
+ const char* assocClass,
+ const char* role)
+{
+ return KDefaultReferenceNames(
+ _cb,
+ mi,
+ cc,
+ cr,
+ cop,
+ LMI_ProcessorChipRealizes_ClassName,
+ assocClass,
+ role);
+}
+
+CMInstanceMIStub(
+ LMI_ProcessorChipRealizes,
+ LMI_ProcessorChipRealizes,
+ _cb,
+ LMI_ProcessorChipRealizesInitialize())
+
+CMAssociationMIStub(
+ LMI_ProcessorChipRealizes,
+ LMI_ProcessorChipRealizes,
+ _cb,
+ LMI_ProcessorChipRealizesInitialize())
+
+KONKRET_REGISTRATION(
+ "root/cimv2",
+ "LMI_ProcessorChipRealizes",
+ "LMI_ProcessorChipRealizes",
+ "instance association")
diff --git a/src/hardware/LMI_ProcessorElementCapabilitiesProvider.c b/src/hardware/LMI_ProcessorElementCapabilitiesProvider.c
index 0ed7354..322e966 100644
--- a/src/hardware/LMI_ProcessorElementCapabilitiesProvider.c
+++ b/src/hardware/LMI_ProcessorElementCapabilitiesProvider.c
@@ -62,7 +62,7 @@ static CMPIStatus LMI_ProcessorElementCapabilitiesEnumInstances(
LMI_ProcessorCapabilitiesRef lmi_cpu_cap;
LMI_ProcessorRef lmi_cpu;
const char *ns = KNameSpace(cop);
- char *error_msg = NULL, instance_id[INSTANCE_ID_LEN] = "";
+ char *error_msg = NULL, instance_id[INSTANCE_ID_LEN];
unsigned i, cpus_nb = 0;
DmiProcessor *dmi_cpus = NULL;
unsigned dmi_cpus_nb = 0;
diff --git a/src/hardware/LMI_ProcessorProvider.c b/src/hardware/LMI_ProcessorProvider.c
index 4475de2..99b0fad 100644
--- a/src/hardware/LMI_ProcessorProvider.c
+++ b/src/hardware/LMI_ProcessorProvider.c
@@ -75,7 +75,7 @@ static CMPIStatus LMI_ProcessorEnumInstances(
unsigned i, j, cpus_nb = 0;
char *other_family = NULL, *architecture = NULL, *cpu_name = NULL,
*stepping = NULL, *error_msg = NULL,
- instance_id[INSTANCE_ID_LEN] = "";
+ instance_id[INSTANCE_ID_LEN];
struct utsname utsname_buf;
DmiProcessor *dmi_cpus = NULL;
unsigned dmi_cpus_nb = 0;
diff --git a/src/hardware/dmidecode.c b/src/hardware/dmidecode.c
index 04988a9..348c7a2 100644
--- a/src/hardware/dmidecode.c
+++ b/src/hardware/dmidecode.c
@@ -49,6 +49,9 @@ void init_dmiprocessor_struct(DmiProcessor *cpu)
cpu->l1_cache_handle = NULL;
cpu->l2_cache_handle = NULL;
cpu->l3_cache_handle = NULL;
+ cpu->manufacturer = NULL;
+ cpu->serial_number = NULL;
+ cpu->part_number = NULL;
}
/*
@@ -120,6 +123,24 @@ short check_dmiprocessor_attributes(DmiProcessor *cpu)
goto done;
}
}
+ if (!cpu->manufacturer) {
+ if (!(cpu->manufacturer = strdup(""))) {
+ ret = -12;
+ goto done;
+ }
+ }
+ if (!cpu->serial_number) {
+ if (!(cpu->serial_number = strdup(""))) {
+ ret = -13;
+ goto done;
+ }
+ }
+ if (!cpu->part_number) {
+ if (!(cpu->part_number = strdup(""))) {
+ ret = -14;
+ goto done;
+ }
+ }
ret = 0;
@@ -193,6 +214,13 @@ short dmi_get_processors(DmiProcessor **cpus, unsigned *cpus_nb)
buf = NULL;
continue;
}
+ /* Manufacturer */
+ buf = copy_string_part_after_delim(buffer[i], "Manufacturer: ");
+ if (buf) {
+ (*cpus)[curr_cpu].manufacturer = buf;
+ buf = NULL;
+ continue;
+ }
/* Status */
buf = copy_string_part_after_delim(buffer[i], "Status: Populated, ");
if (buf) {
@@ -297,6 +325,20 @@ short dmi_get_processors(DmiProcessor **cpus, unsigned *cpus_nb)
buf = NULL;
continue;
}
+ /* Serial Number */
+ buf = copy_string_part_after_delim(buffer[i], "Serial Number: ");
+ if (buf) {
+ (*cpus)[curr_cpu].serial_number = buf;
+ buf = NULL;
+ continue;
+ }
+ /* Part Number */
+ buf = copy_string_part_after_delim(buffer[i], "Part Number: ");
+ if (buf) {
+ (*cpus)[curr_cpu].part_number = buf;
+ buf = NULL;
+ continue;
+ }
/* CPU Characteristics */
if (strstr(buffer[i], "Characteristics:")
&& !strstr(buffer[i], "Characteristics: ")) {
@@ -390,6 +432,12 @@ void dmi_free_processors(DmiProcessor **cpus, unsigned *cpus_nb)
(*cpus)[i].l2_cache_handle = NULL;
free((*cpus)[i].l3_cache_handle);
(*cpus)[i].l3_cache_handle = NULL;
+ free((*cpus)[i].manufacturer);
+ (*cpus)[i].manufacturer = NULL;
+ free((*cpus)[i].serial_number);
+ (*cpus)[i].serial_number = NULL;
+ free((*cpus)[i].part_number);
+ (*cpus)[i].part_number = NULL;
}
free (*cpus);
}
diff --git a/src/hardware/dmidecode.h b/src/hardware/dmidecode.h
index 1b4eca8..9190ea4 100644
--- a/src/hardware/dmidecode.h
+++ b/src/hardware/dmidecode.h
@@ -48,6 +48,9 @@ typedef struct _DmiProcessor {
char *l1_cache_handle; /* Level 1 Cache Handle */
char *l2_cache_handle; /* Level 2 Cache Handle */
char *l3_cache_handle; /* Level 3 Cache Handle */
+ char *manufacturer; /* CPU Manufacturer */
+ char *serial_number; /* CPU Serial Number */
+ char *part_number; /* CPU Part Number */
} DmiProcessor;
/* Processor cache from dmidecode. */
generated by cgit (git 2.34.1) at 2024-11-15 08:06:57 +0000