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authorMichael Young <m.a.young@durham.ac.uk>2010-08-06 21:33:47 +0100
committerMichael Young <m.a.young@durham.ac.uk>2010-08-06 21:33:47 +0100
commit3134353828223561ab1cfe0bb9b100a28127d2dd (patch)
tree9360e0bf137c2d1727bfc8df705410d8db49ab8b /xen.pvops.pre.patch
parent02278bed64f873548bb483f77def738699a9012f (diff)
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update pvops to 2.6.32.17 and try removing patch which set CONFIG_XEN_XENBUS_FRONTEND=y
Diffstat (limited to 'xen.pvops.pre.patch')
-rw-r--r--xen.pvops.pre.patch69
1 files changed, 69 insertions, 0 deletions
diff --git a/xen.pvops.pre.patch b/xen.pvops.pre.patch
new file mode 100644
index 0000000..a978beb
--- /dev/null
+++ b/xen.pvops.pre.patch
@@ -0,0 +1,69 @@
+temporarily revert various Fedora changes so that the pvops patch applies cleanly
+Affected patches;
+linux-2.6-defaults-pci_no_msi.patch - drivers/pci/pci.h
+linux-2.6-pci-cacheline-sizing.patch - arch/x86/pci/common.c
+linux-2.6-execshield.patch - arch/x86/include/asm/mmu.h
+
+--- a/drivers/pci/pci.h 2009-04-24 20:46:50.000000000 +0100
++++ b/drivers/pci/pci.h 2009-04-23 20:13:43.000000000 +0100
+@@ -112,11 +112,9 @@
+
+ #ifdef CONFIG_PCI_MSI
+ void pci_no_msi(void);
+-void pci_yes_msi(void);
+ extern void pci_msi_init_pci_dev(struct pci_dev *dev);
+ #else
+ static inline void pci_no_msi(void) { }
+-static inline void pci_yes_msi(void) { }
+ static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
+ #endif
+
+diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
+index 2202b62..f371fe8 100644
+--- a/arch/x86/pci/common.c
++++ b/arch/x86/pci/common.c
+@@ -432,22 +432,6 @@ int __init pcibios_init(void)
+ else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
+ pci_cache_line_size = 128 >> 2; /* P4 */
+
+- if (c->x86_clflush_size != (pci_cache_line_size <<2))
+- printk(KERN_DEBUG "PCI: old code would have set cacheline "
+- "size to %d bytes, but clflush_size = %d\n",
+- pci_cache_line_size << 2,
+- c->x86_clflush_size);
+-
+- /* Once we know this logic works, all the above code can be deleted. */
+- if (c->x86_clflush_size > 0) {
+- pci_cache_line_size = c->x86_clflush_size >> 2;
+- printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
+- pci_cache_line_size << 2);
+- } else {
+- pci_cache_line_size = 32 >> 2;
+- printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
+- }
+-
+ pcibios_resource_survey();
+
+ if (pci_bf_sort >= pci_force_bf)
+--- a/arch/x86/include/asm/mmu.h
++++ b/arch/x86/include/asm/mmu.h
+@@ -7,19 +7,12 @@
+ /*
+ * The x86 doesn't have a mmu context, but
+ * we put the segment information here.
+- *
+- * exec_limit is used to track the range PROT_EXEC
+- * mappings span.
+ */
+ typedef struct {
+ void *ldt;
+ int size;
+ struct mutex lock;
+ void *vdso;
+-#ifdef CONFIG_X86_32
+- struct desc_struct user_cs;
+- unsigned long exec_limit;
+-#endif
+ } mm_context_t;
+
+ #ifdef CONFIG_SMP