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| author | Jesse Keating <jkeating@redhat.com> | 2010-07-29 17:18:45 -0700 |
|---|---|---|
| committer | Jesse Keating <jkeating@redhat.com> | 2010-07-29 17:18:45 -0700 |
| commit | 2f82dda4a9bf41e64e864889bf06564bdf826e25 (patch) | |
| tree | 118a7b483ae5de4dbf83d20001302f1404866ef0 /sky2-optima-add-missing-write-bits.patch | |
| parent | 64ba2e5ffde5f2418eb26c700cb0ab62b04e5013 (diff) | |
| download | dom0-kernel-2f82dda4a9bf41e64e864889bf06564bdf826e25.tar.gz dom0-kernel-2f82dda4a9bf41e64e864889bf06564bdf826e25.tar.xz dom0-kernel-2f82dda4a9bf41e64e864889bf06564bdf826e25.zip | |
initial srpm import
Diffstat (limited to 'sky2-optima-add-missing-write-bits.patch')
| -rw-r--r-- | sky2-optima-add-missing-write-bits.patch | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/sky2-optima-add-missing-write-bits.patch b/sky2-optima-add-missing-write-bits.patch new file mode 100644 index 0000000..98b924d --- /dev/null +++ b/sky2-optima-add-missing-write-bits.patch @@ -0,0 +1,46 @@ +From: Takashi Iwai <tiwai@suse.de> +Date: Thu, 3 Dec 2009 05:12:02 +0000 (+0000) +Subject: net: Add missing TST_CFG_WRITE bits around sky2_pci_write +X-Git-Tag: v2.6.33-rc1~59^2~38 +X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftorvalds%2Flinux-2.6.git;a=commitdiff_plain;h=d66f0b20b2f8eac365fadf5ca492efe4ba539446 + +net: Add missing TST_CFG_WRITE bits around sky2_pci_write + +Add missing TST_CFG_WRITE bits around sky2_pci_write*() in Optima +setup routines. Without the cfg-write bits, the driver may spew endless +link-up messages through qlink irq. + +Signed-off-by: Takashi Iwai <tiwai@suse.de> +Signed-off-by: David S. Miller <davem@davemloft.net> +--- + +diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c +index 050e6b5..013c9f5 100644 +--- a/drivers/net/sky2.c ++++ b/drivers/net/sky2.c +@@ -2152,7 +2152,9 @@ static void sky2_qlink_intr(struct sky2_hw *hw) + + /* reset PHY Link Detect */ + phy = sky2_pci_read16(hw, PSM_CONFIG_REG4); ++ sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); + sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1); ++ sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); + + sky2_link_up(sky2); + } +@@ -3082,6 +3084,7 @@ static void sky2_reset(struct sky2_hw *hw) + reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE; + + /* reset PHY Link Detect */ ++ sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); + sky2_pci_write16(hw, PSM_CONFIG_REG4, + reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT); + sky2_pci_write16(hw, PSM_CONFIG_REG4, reg); +@@ -3099,6 +3102,7 @@ static void sky2_reset(struct sky2_hw *hw) + /* restore the PCIe Link Control register */ + sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg); + } ++ sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); + + /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ + sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); |