From 32104b29cdf93f78ac37e681bd4547413466d13c Mon Sep 17 00:00:00 2001 From: Kyle McMartin Date: Sun, 13 Aug 2006 20:37:26 -0400 Subject: [PARISC] PA7200 also supports prefetch for read It seems PA7200 processors also suppress traps on loads to %r0. This means we can prefetch for read on these cpus. Of course, we can't support prefetch for write, since that requires LOAD DOUBLEWORD which was added with PA2.0 Signed-off-by: Kyle McMartin --- arch/parisc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/parisc/Kconfig') diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index 6dd0ea8f88e..d2101237442 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig @@ -127,7 +127,7 @@ config PA11 config PREFETCH def_bool y - depends on PA8X00 + depends on PA8X00 || PA7200 config 64BIT bool "64-bit kernel" -- cgit