From ffae4e014a4bff7b904e4b5ace2ae453b9d93519 Mon Sep 17 00:00:00 2001 From: Srinidhi Kasagar Date: Sat, 28 Nov 2009 08:10:40 +0100 Subject: ARM: 5829/1: ARM: U8500 register definitions Adds register definitions, shared peripheral interrupt numbers (SHPI) and IO mappings for the U8500 core support. SHPI are assigned to [160:32] where first 32 interrupts are reserved. Reviewed-by: Alessandro Rubin Signed-off-by: srinidhi kasagar Acked-by: Andrea Gallo Signed-off-by: Russell King --- arch/arm/mach-ux500/include/mach/io.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 arch/arm/mach-ux500/include/mach/io.h (limited to 'arch/arm/mach-ux500/include/mach/io.h') diff --git a/arch/arm/mach-ux500/include/mach/io.h b/arch/arm/mach-ux500/include/mach/io.h new file mode 100644 index 00000000000..1cf3f44ce5b --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/io.h @@ -0,0 +1,22 @@ +/* + * arch/arm/mach-u8500/include/mach/io.h + * + * Copyright (C) 1997-1999 Russell King + * + * Modifications: + * 06-12-1997 RMK Created. + * 07-04-1999 RMK Major cleanup + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * We don't actually have real ISA nor PCI buses, but there is so many + * drivers out there that might just work if we fake them... + */ +#define __io(a) __typesafe_io(a) +#define __mem_pci(a) (a) + +#endif -- cgit