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* [PATCH] Have x86_64 use add_active_range() and free_area_init_nodesMel Gorman2006-09-272-5/+2
| | | | | | | | | | | | | | | | | Size zones and holes in an architecture independent manner for x86_64. Signed-off-by: Mel Gorman <mel@csn.ul.ie> Cc: Dave Hansen <haveblue@us.ibm.com> Cc: Andy Whitcroft <apw@shadowen.org> Cc: Andi Kleen <ak@muc.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: "Keith Mannthey" <kmannth@gmail.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: Yasunori Goto <y-goto@jp.fujitsu.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] fix x86_64-mm-spinlock-cleanupAndrew Morton2006-09-271-0/+1
| | | | | | | | We need processor.h for cpu_relax(). Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6Linus Torvalds2006-09-2643-418/+397
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (225 commits) [PATCH] Don't set calgary iommu as default y [PATCH] i386/x86-64: New Intel feature flags [PATCH] x86: Add a cumulative thermal throttle event counter. [PATCH] i386: Make the jiffies compares use the 64bit safe macros. [PATCH] x86: Refactor thermal throttle processing [PATCH] Add 64bit jiffies compares (for use with get_jiffies_64) [PATCH] Fix unwinder warning in traps.c [PATCH] x86: Allow disabling early pci scans with pci=noearly or disallowing conf1 [PATCH] x86: Move direct PCI scanning functions out of line [PATCH] i386/x86-64: Make all early PCI scans dependent on CONFIG_PCI [PATCH] Don't leak NT bit into next task [PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinder [PATCH] Fix some broken white space in ia32_signal.c [PATCH] Initialize argument registers for 32bit signal handlers. [PATCH] Remove all traces of signal number conversion [PATCH] Don't synchronize time reading on single core AMD systems [PATCH] Remove outdated comment in x86-64 mmconfig code [PATCH] Use string instructions for Core2 copy/clear [PATCH] x86: - restore i8259A eoi status on resume [PATCH] i386: Split multi-line printk in oops output. ...
| * [PATCH] x86: Refactor thermal throttle processingDmitriy Zavin2006-09-262-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor the event processing (syslog messaging and rate limiting) into separate file therm_throt.c. This allows consistent reporting of CPU thermal throttle events. After ACK'ing the interrupt, if the event is current, the user (p4.c/mce_intel.c) calls therm_throt_process to log (and rate limit) the event. If that function returns 1, the user has the option to log things further (such as to mce_log in x86_64). AK: minor cleanup Signed-off-by: Dmitriy Zavin <dmitriyz@google.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Fix unwinder warning in traps.cAndi Kleen2006-09-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix linux/arch/x86_64/kernel/traps.c: In function 'dump_trace': linux/arch/x86_64/kernel/traps.c:275: warning: cast to pointer from integer of different size with allnoconfig Cc: jbeulich@novell.com Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: Allow disabling early pci scans with pci=noearly or disallowing ↵Andi Kleen2006-09-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | conf1 Some buggy systems can machine check when config space accesses happen for some non existent devices. i386/x86-64 do some early device scans that might trigger this. Allow pci=noearly to disable this. Also when type 1 is disabling also don't do any early accesses which are always type1. This moves the pci= configuration parsing to be a early parameter. I don't think this can break anything because it only changes a single global that is only used by PCI. Cc: gregkh@suse.de Cc: Trammell Hudson <hudson@osresearch.net> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: Move direct PCI scanning functions out of lineAndi Kleen2006-09-261-38/+4
| | | | | | | | | | | | Saves about 200 bytes of code space. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Don't leak NT bit into next taskAndi Kleen2006-09-261-2/+3
| | | | | | | | | | | | | | | | | | SYSENTER can cause a NT to be set which might cause crashes on the IRET in the next task. Following similar i386 patch from Linus. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinderJan Beulich2006-09-262-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current gcc generates calls not jumps to noreturn functions. When that happens the return address can point to the next function, which confuses the unwinder. This patch works around it by marking asynchronous exception frames in contrast normal call frames in the unwind information. Then teach the unwinder to decode this. For normal call frames the unwinder now subtracts one from the address which avoids this problem. The standard libgcc unwinder uses the same trick. It doesn't include adjustment of the printed address (i.e. for the original example, it'd still be kernel_math_error+0 that gets displayed, but the unwinder wouldn't get confused anymore. This only works with binutils 2.6.17+ and some versions of H.J.Lu's 2.6.16 unfortunately because earlier binutils don't support .cfi_signal_frame [AK: added automatic detection of the new binutils and wrote description] Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Fix idle notifiersAndi Kleen2006-09-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously exit_idle would be called more often than enter_idle Now instead of using complicated tests just keep track of it using the per CPU variable as a flip flop. I moved the idle state into the PDA to make the access more efficient. Original bug report and an initial patch from Stephane Eranian, but redone by AK. Cc: Stephane Eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Remove unused asm-x86_64/mmx.hAndi Kleen2006-09-261-14/+0
| | | | | | | | Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Define __bad_pda_field as noreturnAndi Kleen2006-09-261-1/+1
| | | | | | | | | | | | This quietens so warnings about uninitialized use of the return value of the pda read operations. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Reindent macros in pda.hAndi Kleen2006-09-261-32/+53
| | | | | | | | | | | | | | | | | | Reindent the macros in x86-64 pda.h, making them much more readable. Follows Jeremy's i386 version of this. No functional changes Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Fix some stylistic issues in uaccess.hAndi Kleen2006-09-261-10/+10
| | | | | | | | | | | | | | | | | | - Replace some broken white space. - Replace __ keywords with standard names No functional changes. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Add __must_check to copy_*_userAndi Kleen2006-09-262-21/+29
| | | | | | | | | | | | | | | | Following i386. And also fix the two occurrences that caused warnings in arch/x86_64/* Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Fix zeroing on exception in copy_*_userAndi Kleen2006-09-261-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | - Don't zero for __copy_from_user_inatomic following i386. This will prevent spurious zeros for parallel file system writers when one does a exception - The string instruction version didn't zero the output on exception. Oops. Also I cleaned up the code a bit while I was at it and added a minor optimization to the string instruction path. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Type checking for write_pda()Jeremy Fitzhardinge2006-09-261-1/+2
| | | | | | | | | | | | | | | | | | I just added type checking for assignments the PDA in the i386 PDA code. Here's the x86-64 equivalent. (Obviously this doesn't contain the latest x86-64 PDA change.) Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Use %c instead of %P modifier in pda accessAndi Kleen2006-09-261-6/+6
| | | | | | | | | | | | | | Apparently that is the more official way to get numbers without $ in inline assembly Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Add the canary field to the PDA area and the task structArjan van de Ven2006-09-261-1/+6
| | | | | | | | | | | | | | | | | | | | | | This patch adds the per thread cookie field to the task struct and the PDA. Also it makes sure that the PDA value gets the new cookie value at context switch, and that a new task gets a new cookie at task creation time. Signed-off-by: Arjan van Ven <arjan@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andi Kleen <ak@suse.de> CC: Andi Kleen <ak@suse.de>
| * [PATCH] Add comments to the PDA structure to annotate offsetsArjan van de Ven2006-09-261-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | Change the comments in the pda structure to make the first fields to have their offset documented and to have the comments aligned. The stack protector series needs a field at offset 40 (gcc ABI); annotate upto 40 for that reason. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andi Kleen <ak@suse.de> CC: Andi Kleen <ak@suse.de>
| * [PATCH] Avoid overwriting the current pgd (V4, x86_64)Magnus Damm2006-09-261-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | kexec: Avoid overwriting the current pgd (V4, x86_64) This patch upgrades the x86_64-specific kexec code to avoid overwriting the current pgd. Overwriting the current pgd is bad when CONFIG_CRASH_DUMP is used to start a secondary kernel that dumps the memory of the previous kernel. The code introduces a new set of page tables. These tables are used to provide an executable identity mapping without overwriting the current pgd. Signed-off-by: Magnus Damm <magnus@valinux.co.jp> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Remove most of the special cases for the debug IST stackKeith Owens2006-09-261-3/+0
| | | | | | | | | | | | | | | | | | Remove most of the special cases for the debug IST stack. This is a follow on clean up patch, it requires the bug fix patch that adds orig_ist. Signed-off-by: Keith Owens <kaos@ocs.com.au> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Optimize PDA accesses slightlyAndi Kleen2006-09-261-19/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on a idea by Jeremy Fitzhardinge: Replace the volatiles and memory clobbers in the PDA access with telling gcc about access to a proxy PDA structure that doesn't actually exist. But the dummy accesses give a defined ordering for read/write accesses. Also add some memory barriers to the early GS initialization to make sure no PDA access is moved before it. Advantage is some .text savings (probably most from better code for accessing "current"): text data bss dec hex filename 4845647 1223688 615864 6685199 66020f vmlinux 4837780 1223688 615864 6677332 65e354 vmlinux-pda 1.2% smaller code Cc: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: Remove incorrect comment about ACPI e820 entriesAndi Kleen2006-09-261-1/+1
| | | | | | | | | | | | | | They cannot be actually freed because the FACS table has a shared-with-the-BIOS lock. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] optimize hweight64 for x86_64Andi Kleen2006-09-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on patch from David Rientjes <rientjes@google.com>, but changed by AK. Optimizes the 64-bit hamming weight for x86_64 processors assuming they have fast multiplication. Uses five fewer bitops than the generic hweight64. Benchmark on one EMT64 showed ~25% speedup with 2^24 consecutive calls. Define a new ARCH_HAS_FAST_MULTIPLIER that can be set by other architectures that can also multiply fast. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Remove non e820 fallbacks in high level codeAndi Kleen2006-09-261-4/+0
| | | | | | | | | | | | | | | | Drop support for non e820 BIOS calls to get the memory map. The boot assembler code still has some support, but not the C code now. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Remove some cruft in apic id checking during processor setupAndi Kleen2006-09-261-2/+0
| | | | | | | | | | | | | | | | | | | | | | - Remove a define that was used only once - Remove the too large APIC ID check because we always support the full 8bit range of APICs. - Restructure code a bit to be simpler. Cc: len.brown@intel.com Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Use proper accessors to change PSE bits in change_page_attr()Andi Kleen2006-09-261-0/+1
| | | | | | | | | | | | | | Use normal pte accessors in change_page_attr() to access the PSE bits. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Fix pte_exec/mkexec and use it in change_page_attr()Andi Kleen2006-09-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | Fix the pte_exec/mkexec page table accessor functions to really use the NX bit. Previously they only checked the USER bit, but weren't actually used for anything. Then use them in change_page_attr() to manipulate the NX bit properly. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Remove safe_smp_processor_id()Andi Kleen2006-09-261-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | And replace all users with ordinary smp_processor_id. The function was originally added to get some basic oops information out even if the GS register was corrupted. However that didn't work for some anymore because printk is needed to print the oops and it uses smp_processor_id() already. Also GS register corruptions are not particularly common anymore. This also helps the Xen port which would otherwise need to do this in a special way because it can't access the local APIC. Cc: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: remove config.h includes from asm-i386 & asm-x86_64Dave Jones2006-09-261-1/+0
| | | | | | | | | | | | | | This is now automatically included by kbuild. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] non lazy "sleazy" fpu implementationArjan van de Ven2006-09-261-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now the kernel on x86-64 has a 100% lazy fpu behavior: after *every* context switch a trap is taken for the first FPU use to restore the FPU context lazily. This is of course great for applications that have very sporadic or no FPU use (since then you avoid doing the expensive save/restore all the time). However for very frequent FPU users... you take an extra trap every context switch. The patch below adds a simple heuristic to this code: After 5 consecutive context switches of FPU use, the lazy behavior is disabled and the context gets restored every context switch. If the app indeed uses the FPU, the trap is avoided. (the chance of the 6th time slice using FPU after the previous 5 having done so are quite high obviously). After 256 switches, this is reset and lazy behavior is returned (until there are 5 consecutive ones again). The reason for this is to give apps that do longer bursts of FPU use still the lazy behavior back after some time. [akpm@osdl.org: place new task_struct field next to jit_keyring to save space] Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
| * [PATCH] Auto size the per cpu area.Eric W. Biederman2006-09-261-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now for a completely different but trivial approach. I just boot tested it with 255 CPUS and everything worked. Currently everything (except module data) we place in the per cpu area we know about at compile time. So instead of allocating a fixed size for the per_cpu area allocate the number of bytes we need plus a fixed constant for to be used for modules. It isn't perfect but it is much less of a pain to work with than what we are doing now. AK: fixed warning Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Merge stacktrace and show_traceAndi Kleen2006-09-261-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This unifies the standard backtracer and the new stacktrace in memory backtracer. The standard one is converted to use callbacks and then reimplement stacktrace using new callbacks. The main advantage is that stacktrace can now use the new dwarf2 unwinder and avoid false positives in many cases. I kept it simple to make sure the standard backtracer stays reliable. Cc: mingo@elte.hu Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Don't access the APIC in safe_smp_processor_id when it is not mapped yetAndi Kleen2006-09-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Lockdep can call the dwarf2 unwinder early, and the dwarf2 code uses safe_smp_processor_id which tries to access the local APIC page. But that doesn't work before the APIC code has set up its fixmap. Check for this case and always return boot cpu then. Cc: jbeulich@novell.com Cc: mingo@elte.hu Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: Remove unneeded externs in acpi/boot.cAndi Kleen2006-09-261-0/+2
| | | | | | | | | | | | | | And move one into proto.h Cc: len.brown@intel.com Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Convert x86-64 to early paramAndi Kleen2006-09-264-16/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of hackish manual parsing Requires earlier i386 patchkit, but also fixes i386 early_printk again. I removed some obsolete really early parameters which didn't do anything useful. Also made a few parameters that needed it early (mostly oops printing setup) Also removed one panic check that wasn't visible without early console anyways (the early console is now initialized after that panic) This cleans up a lot of code. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Clean up spin/rwlocksAndi Kleen2006-09-262-44/+41
| | | | | | | | | | | | | | | | - Inline spinlock strings into their inline functions - Convert macros to typesafe inlines - Replace some leftover __asm__ __volatile__s with asm volatile Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Don't use lock section for mutexes and semaphoresAndi Kleen2006-09-263-45/+24
| | | | | | | | | | | | | | | | Lock sections cannot be handled by the dwarf2 unwinder. Disadvantage is a taken branch in the hot path. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Calgary IOMMU: consolidate per bus data structuresMuli Ben-Yehuda2006-09-261-1/+0
| | | | | | | | | | | | | | | | | | | | | | Move the tce_table_kva array, disabled bitmap and bus_to_phb array into a new per bus 'struct calgary_bus_info'. Also slightly reorganize build_tce_table and tce_table_setparms to avoid exporting bus_info to tce.c. Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Jon Mason <jdmason@us.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Calgary IOMMU: rearrange 'struct iommu_table' membersMuli Ben-Yehuda2006-09-261-3/+3
| | | | | | | | | | | | | | | | | | Rearrange struct members loosely based on size for improved alignment and to save a few bytes. Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Jon Mason <jdmason@us.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] remove int_delivery_destJan Beulich2006-09-262-2/+0
| | | | | | | | | | | | | | The genapic field and the accessor macro weren't used anywhere. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] x86: Detect CFI support in the assembler at runtimeAndi Kleen2006-09-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ... instead of using a CONFIG option. The config option still controls if the resulting executable actually has unwind information. This is useful to prevent compilation errors when users select CONFIG_STACK_UNWIND on old binutils and also allows to use CFI in the future for non kernel debugging applications. Cc: jbeulich@novell.com Cc: sam@ravnborg.org Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Replace mp bus array with bitmap for bus not pciAndi Kleen2006-09-261-7/+1
| | | | | | | | | | | | | | Since we only support PCI and ISA legacy busses now there is no need to have an full array with checking. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Move early chipset quirks out to new fileAndi Kleen2006-09-261-1/+1
| | | | | | | | | | | | | | | | | | They did not really belong into io_apic.c. Move them into a new file and clean it up a bit. Also remove outdated ATI quirk that was obsolete, Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Remove obsolete PIC modeAndi Kleen2006-09-262-2/+0
| | | | | | | | | | | | | | | | | | | | | | PIC mode is an outdated way to drive the APICs that was used on some early MP boards. It is not supported in the ACPI model. It is unlikely to be ever configured by any x86-64 system Remove it thus. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Clean up and minor fixes to TLB flushAndi Kleen2006-09-262-37/+35
| | | | | | | | | | | | | | | | | | | | | | - Convert CR* accesses to dedicated inline functions and rewrite the rest as C inlines - Don't do a double flush for global flushes (pointed out by Zach Amsden) This was a bug workaround for old CPUs that don't do 64bit and is obsolete. - Add a proper memory clobber to invlpg - Remove an unused extern Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Remove all ifdefs for local/io apicAndi Kleen2006-09-266-22/+0
| | | | | | | | | | | | | | | | | | | | IO-APIC or local APIC can only be disabled at runtime anyways and Kconfig has forced these options on for a long time now. The Kconfigs are kept only now for the benefit of the shared acpi boot.c code. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Add proper alignment to ENTRYAndi Kleen2006-09-261-1/+1
| | | | | | | | | | | | | | | | Previously it didn't align. Use the same one as the C compiler in blended mode, which is good for K8 and Core2 and doesn't hurt on P4. Signed-off-by: Andi Kleen <ak@suse.de>
| * [PATCH] Clean up read write lock assemblyAndi Kleen2006-09-262-67/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Move the slow path fallbacks to their own assembly files This makes them much easier to read and is needed for the next change. - Add CFI annotations for unwinding (XXX need review) - Remove constant case which can never happen with out of line spinlocks - Use patchable LOCK prefixes - Don't use lock sections anymore for inline code because they can't be expressed by the unwinder (this adds one taken jump to the lock fast path) Cc: jbeulich@novell.com Signed-off-by: Andi Kleen <ak@suse.de>
generated by cgit (git 2.34.1) at 2024-09-20 13:39:14 +0000