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* | x86: align to clflush sizeGlauber Costa2008-04-191-1/+1
| | | | | | | | | | | | | | | | | | | | Do it instead of using the conservative approach we're currently doing. This is the way x86_64 does, and this patch makes this piece of code the same between them, ready to be integrated. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_supported and dma_set_mask to pci-dma_32.cGlauber Costa2008-04-193-33/+3
| | | | | | | | | | | | | | | | | | | | This is the way x86_64 does, so this make them equal. They have to be extern now in the header, and the extern definition is moved to the common dma-mapping.h header. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_cache_sync to common headerGlauber Costa2008-04-193-14/+6
| | | | | | | | | | | | | | | | they are the same in both architectures. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: dma-ops on highmem fixIngo Molnar2008-04-191-4/+6
| | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_map_page and dma_unmap_page to common headerGlauber Costa2008-04-193-19/+14
| | | | | | | | | | | | | | | | | | They are similar enough to do this move. the macro version is ugly, and we use inline functions instead. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move alloc and free coherent to common headerGlauber Costa2008-04-193-20/+10
| | | | | | | | | | | | | | | | | | | | | | they are the same between architectures. (except for the fact that x86_64 has duplicate code) move them to dma-mapping.h Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_sync_sg_for_device to common headerGlauber Costa2008-04-193-19/+11
| | | | | | | | | | | | | | | | i386 gets an empty function. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_sync_sg_for_cpu to common headerGlauber Costa2008-04-193-17/+9
| | | | | | | | | | | | | | | | i386 gets an empty function. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_sync_single_range_for_device to common headerGlauber Costa2008-04-193-20/+14
| | | | | | | | | | | | | | | | i386 gets an empty function. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_sync_single_range_for_cpu to common headerGlauber Costa2008-04-193-19/+11
| | | | | | | | | | | | | | | | i386 gets an empty function. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_sync_single_for_device to common headerGlauber Costa2008-04-193-18/+11
| | | | | | | | | | | | | | | | i386 gets an empty function. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_sync_single_for_cpu to common headerGlauber Costa2008-04-193-17/+12
| | | | | | | | | | | | | | | | i386 gets an empty function. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_unmap_sg to common headerGlauber Costa2008-04-193-16/+9
| | | | | | | | | | | | | | | | i386 gets an empty function. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_map_sg to common headerGlauber Costa2008-04-193-28/+7
| | | | | | | | | | | | | | | | the old i386 implementation is moved to pci-base_32.c Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_unmap_single to common headerGlauber Costa2008-04-193-15/+10
| | | | | | | | | | | | | | | | i386 base does not need it, so it gets an empty function. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: implement dma_map_single through dma_opsGlauber Costa2008-04-193-19/+10
| | | | | | | | | | | | | | | | | | | | | | That's already the name of the game for x86_64. For i386, we add a pci-base_32.c, that will hold the default operations. The function call itself goes through dma-mapping.h , the common header Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: move dma_ops struct definition to dma-mapping.hGlauber Costa2008-04-192-49/+54
| | | | | | | | | | | | | | | | take it off the x86_64 specific header Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: reserve dma32 early for gartYinghai Lu2008-04-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a system with 256 GB of RAM, when NUMA is disabled crashes the following way: Your BIOS doesn't leave a aperture memory hole Please enable the IOMMU option in the BIOS setup This costs you 64 MB of RAM Cannot allocate aperture memory hole (ffff8101c0000000,65536K) Kernel panic - not syncing: Not enough memory for aperture Pid: 0, comm: swapper Not tainted 2.6.25-rc4-x86-latest.git #33 Call Trace: [<ffffffff84037c62>] panic+0xb2/0x190 [<ffffffff840381fc>] ? release_console_sem+0x7c/0x250 [<ffffffff847b1628>] ? __alloc_bootmem_nopanic+0x48/0x90 [<ffffffff847b0ac9>] ? free_bootmem+0x29/0x50 [<ffffffff847ac1f7>] gart_iommu_hole_init+0x5e7/0x680 [<ffffffff847b255b>] ? alloc_large_system_hash+0x16b/0x310 [<ffffffff84506a2f>] ? _etext+0x0/0x1 [<ffffffff847a2e8c>] pci_iommu_alloc+0x1c/0x40 [<ffffffff847ac795>] mem_init+0x45/0x1a0 [<ffffffff8479ff35>] start_kernel+0x295/0x380 [<ffffffff8479f1c2>] _sinittext+0x1c2/0x230 the root cause is : memmap PMD is too big, [ffffe200e0600000-ffffe200e07fffff] PMD ->ffff81383c000000 on node 0 almost near 4G..., and vmemmap_alloc_block will use up the ram under 4G. solution will be: 1. make memmap allocation get memory above 4G... 2. reserve some dma32 range early before we try to set up memmap for all. and release that before pci_iommu_alloc, so gart or swiotlb could get some range under 4g limit for sure. the patch is using method 2. because method1 may need more code to handle SPARSEMEM and SPASEMEM_VMEMMAP will get Your BIOS doesn't leave a aperture memory hole Please enable the IOMMU option in the BIOS setup This costs you 64 MB of RAM Mapping aperture over 65536 KB of RAM @ 4000000 Memory: 264245736k/268959744k available (8484k kernel code, 4187464k reserved, 4004k data, 724k init) Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | srat, x86: add support for nodes spanning other nodesSuresh Siddha2008-04-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For example, If the physical address layout on a two node system with 8 GB memory is something like: node 0: 0-2GB, 4-6GB node 1: 2-4GB, 6-8GB Current kernels fail to boot/detect this NUMA topology. ACPI SRAT tables can expose such a topology which needs to be supported. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: fpu xstate split fixSuresh Siddha2008-04-191-0/+1
| | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: fpu xstate split cleanupSuresh Siddha2008-04-191-2/+2
| | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86, fpu: lazy allocation of FPU area - v5Suresh Siddha2008-04-192-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Only allocate the FPU area when the application actually uses FPU, i.e., in the first lazy FPU trap. This could save memory for non-fpu using apps. for example: on my system after boot, there are around 300 processes, with only 17 using FPU. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86, fpu: split FPU state from task struct - v5Suresh Siddha2008-04-195-25/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the FPU save area from the task struct. This allows easy migration of FPU context, and it's generally cleaner. It also allows the following two optimizations: 1) only allocate when the application actually uses FPU, so in the first lazy FPU trap. This could save memory for non-fpu using apps. Next patch does this lazy allocation. 2) allocate the right size for the actual cpu rather than 512 bytes always. Patches enabling xsave/xrstor support (coming shortly) will take advantage of this. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: rename find_max_pfn() to propagate_e820_map()Ingo Molnar2008-04-191-1/+1
| | | | | | | | | | | | | | | | this function doesnt just 'find' the max_pfn - it also has other side-effects such as registering sparse memory maps. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: implement prctl PR_GET_TSC and PR_SET_TSCErik Bosman2008-04-193-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the PR_GET_TSC and PR_SET_TSC prctl() commands on the x86 platform (both 32 and 64 bit.) These commands control the ability to read the timestamp counter from userspace (the RDTSC instruction.) While the RDTSC instuction is a useful profiling tool, it is also the source of some non-determinism in ring-3. For deterministic replay applications it is useful to be able to trap and emulate (and record the outcome of) this instruction. This patch uses code earlier used to disable the timestamp counter for the SECCOMP framework. A side-effect of this patch is that the SECCOMP environment will now also disable the timestamp counter on x86_64 due to the addition of the TIF_NOTSC define on this platform. The code which enables/disables the RDTSC instruction during context switches is in the __switch_to_xtra function, which already handles other unusual conditions, so normal performance should not have to suffer from this change. Signed-off-by: Erik Bosman <ejbosman@cs.vu.nl> Acked-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: cleanup boot-heap usageAlexander van Heukelum2008-04-191-0/+8
|/ | | | | | | | | | | | | | The kernel decompressor wrapper uses memory located beyond the end of the image. This might lead to hard to debug problems, but even if it can be proven to be safe, it is at the very least unclean. I don't see any advantages either, unless you count it not being zeroed out as an advantage. This patch moves the boot-heap area to the bss segment. Signed-off-by: Alexander van Heukelum <heukelum@fastmail.fm> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6Linus Torvalds2008-04-181-10/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6: (58 commits) ide: remove ide_init_default_irq() macro ide: move default IDE ports setup to ide_generic host driver ide: remove obsoleted "idex=noprobe" kernel parameter (take 2) ide: remove needless hwif->irq check from ide_hwif_configure() ide: init hwif->{io_ports,irq} explicitly in legacy VLB host drivers ide: limit legacy VLB host drivers to alpha, x86 and mips cmd640: init hwif->{io_ports,irq} explicitly cmd640: cleanup setup_device_ptrs() ide: add ide-4drives host driver (take 3) ide: remove ppc ifdef from init_ide_data() ide: remove ide_default_io_ctl() macro ide: remove CONFIG_IDE_ARCH_OBSOLETE_INIT ide: add CONFIG_IDE_ARCH_OBSOLETE_DEFAULTS (take 2) ppc/pmac: remove no longer needed IDE quirk ppc: don't include <linux/ide.h> ppc: remove ppc_ide_md ppc/pplus: remove ppc_ide_md.ide_init_hwif hook ppc/sandpoint: remove ppc_ide_md hooks ppc/lopec: remove ppc_ide_md hooks ppc/mpc8xx: remove ppc_ide_md hooks ...
| * ide: remove ide_init_default_irq() macroBartlomiej Zolnierkiewicz2008-04-181-6/+0
| | | | | | | | | | | | | | | | | | | | * Use ide_default_irq() instead of ide_init_default_irq() in ide_generic host driver (so the correct IRQ is always set regardless of CONFIG_PCI / CONFIG_BLK_DEV_IDEPCI). * Remove no longer needed ide_init_default_irq() macro. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
| * ide: remove ide_default_io_ctl() macroBartlomiej Zolnierkiewicz2008-04-181-2/+0
| | | | | | | | | | | | | | It is always == '((base) + 0x206)' if CONFIG_IDE_ARCH_OBSOLETE_DEFAULTS=y and it is not needed otherwise (arm, blackfin, parisc, ppc64, sh, sparc[64]). Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
| * ide: add CONFIG_IDE_ARCH_OBSOLETE_DEFAULTS (take 2)Bartlomiej Zolnierkiewicz2008-04-181-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add CONFIG_IDE_ARCH_OBSOLETE_DEFAULTS to drivers/ide/Kconfig and use it instead of defining IDE_ARCH_OBSOLETE_DEFAULTS in <arch/ide.h>. v2: * Define ide_default_irq() in ide-probe.c/ns87415.c if not already defined and drop defining ide_default_irq() for CONFIG_IDE_ARCH_OBSOLETE_DEFAULTS=n. [ Thanks to Stephen Rothwell and David Miller for noticing the problem. ] Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: David Miller <davem@davemloft.net> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux-2.6-kgdbLinus Torvalds2008-04-182-0/+82
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux-2.6-kgdb: kgdb: always use icache flush for sw breakpoints kgdb: fix SMP NMI kgdb_handle_exception exit race kgdb: documentation fixes kgdb: allow static kgdbts boot configuration kgdb: add documentation kgdb: Kconfig fix kgdb: add kgdb internal test suite kgdb: fix several kgdb regressions kgdb: kgdboc pl011 I/O module kgdb: fix optional arch functions and probe_kernel_* kgdb: add x86 HW breakpoints kgdb: print breakpoint removed on exception kgdb: clocksource watchdog kgdb: fix NMI hangs kgdb: fix kgdboc dynamic module configuration kgdb: document parameters x86: kgdb support consoles: polling support, kgdboc kgdb: core uaccess: add probe_kernel_write()
| * | kgdb: fix NMI hangsJason Wessel2008-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the hang regression with kgdb when the NMI interrupt comes in while the master core is returning from an exception. Adjust the NMI logic such that KGDB will not stop NMI exceptions from occurring by in general returning NOTIFY_DONE. It is not possible to distinguish the debug NMI sync vs the normal NMI apic interrupt so kgdb needs to catch the unknown NMI if it the debugger was previously active on one of the cpus. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: kgdb supportIngo Molnar2008-04-171-0/+81
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | simplified and streamlined kgdb support on x86, both 32-bit and 64-bit, based on patch from: Subject: kgdb: core-lite From: Jason Wessel <jason.wessel@windriver.com> [ and countless other authors - see the patch for details. ] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
* | Merge branch 'for-linus' of ↵Linus Torvalds2008-04-18175-4279/+5290
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86: (613 commits) x86: standalone trampoline code x86: move suspend wakeup code to C x86: coding style fixes to arch/x86/kernel/acpi/sleep.c x86: setup_trampoline() - fix section mismatch warning x86: section mismatch fixes, #1 x86: fix paranoia about using BIOS quickboot mechanism. x86: print out buggy mptable x86: use cpu_online() x86: use cpumask_of_cpu() x86: remove unnecessary tmp local variable x86: remove unnecessary memset() x86: use ioapic_read_entry() and ioapic_write_entry() x86: avoid redundant loop in io_apic_level_ack_pending() x86: remove superfluous initialisation in boot code. x86: merge mpparse_{32,64}.c x86: unify mp_register_gsi x86: unify mp_config_acpi_legacy_irqs x86: unify mp_register_ioapic x86: unify uniq_io_apic_id x86: unify smp_scan_config ...
| * | x86: move suspend wakeup code to CPavel Machek2008-04-172-13/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move wakeup code to .c, so that video mode setting code can be shared between boot and wakeup. Remove nasty assembly code in 64-bit case by re-using trampoline code. Stack setup was fixed to clear high 16bits of %esp, maybe that fixes some machines. .c code sharing and morse code was done H. Peter Anvin, Sam Ravnborg reviewed kbuild related stuff, and it seems okay to him. Rafael did some cleanups. [rjw: * Made the patch stop breaking compilation on x86-32 * Added arch/x86/kernel/acpi/sleep.h * Got rid of compiler warnings in arch/x86/kernel/acpi/sleep.c * Fixed 32-bit compilation on x86-64 systems * Added include/asm-x86/trampoline.h and fixed the non-SMP compilation on 64-bit x86 * Removed arch/x86/kernel/acpi/sleep_32.c which was not used * Fixed some breakage caused by the integration of smpboot.c done under us in the meantime] Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move mp_register_lapic_address to boot.cAlexey Starikovskiy2008-04-171-1/+0
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move mp_register_lapic to boot.cAlexey Starikovskiy2008-04-171-1/+0
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move up & smp variables to setup.cAlexey Starikovskiy2008-04-171-1/+2
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: move mp_ioapic_routing to boot.cAlexey Starikovskiy2008-04-171-0/+7
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: don't set IO APIC features if IO APIC is not enabledAlexey Starikovskiy2008-04-172-3/+2
| | | | | | | | | | | | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: clean up non-smp usage of cpu mapsMike Travis2008-04-172-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup references to the early cpu maps for the non-SMP configuration and remove some functions called for SMP configurations only. Cc: Andi Kleen <ak@suse.de> Cc: Christoph Lameter <clameter@sgi.com> Signed-off-by: Mike Travis <travis@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: uv fixIngo Molnar2008-04-171-1/+1
| | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: support for new UV apicJack Steiner2008-04-172-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UV supports really big systems. So big, in fact, that the APICID register does not contain enough bits to contain an APICID that is unique across all cpus. The UV BIOS supports 3 APICID modes: - legacy mode. This mode uses the old APIC mode where APICID is in bits [31:24] of the APICID register. - x2apic mode. This mode is whitebox-compatible. APICIDs are unique across all cpus. Standard x2apic APIC operations (Intel-defined) can be used for IPIs. The node identifier fits within the Intel-defined portion of the APICID register. - x2apic-uv mode. In this mode, the APICIDs on each node have unique IDs, but IDs on different node are not unique. For example, if each mode has 32 cpus, the APICIDs on each node might be 0 - 31. Every node has the same set of IDs. The UV hub is used to route IPIs/interrupts to the correct node. Traditional APIC operations WILL NOT WORK. In x2apic-uv mode, the ACPI tables all contain a full unique ID (note: exact bit layout still changing but the following is close): nnnnnnnnnnlc0cch n = unique node number l = socket number on board c = core h = hyperthread Only the "lc0cch" bits are written to the APICID register. The remaining bits are supplied by having the get_apic_id() function "OR" the extra bits into the value read from the APICID register. (Hmmm.. why not keep the ENTIRE APICID register in per-cpu data....) The x2apic-uv mode is recognized by the MADT table containing: oem_id = "SGI" oem_table_id = "UV-X" Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: define the macros and tables for blade functionsJack Steiner2008-04-171-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add UV macros for converting between cpu numbers, blade numbers and node numbers. Note that these are used ONLY within x86_64 UV modules, and are not for general kernel use. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: define the macros and tables for the basic UV infrastructure.Jack Steiner2008-04-171-0/+210
| | | | | | | | | | | | | | | | | | | | | Define the macros and tables for the basic UV infrastructure. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: add UV specific header for MMR definitionsJack Steiner2008-04-171-0/+373
| | | | | | | | | | | | | | | | | | | | | | | | Definitions of UV MMRs. Note: this file is auto-generated by hardware design tools. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: increase size of APICIDJack Steiner2008-04-172-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Increase the number of bits in an apicid from 8 to 32. By default, MP_processor_info() gets the APICID from the mpc_config_processor structure. However, this structure limits the size of APICID to 8 bits. This patch allows the caller of MP_processor_info() to optionally pass a larger APICID that will be used instead of the one in the mpc_config_processor struct. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: add functions to determine if platform is a UV platformJack Steiner2008-04-172-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add functions that can be used to determine if an x86_64 system is a SGI "UV" system. UV systems come in 3 types and are identified by the OEM ID in the MADT. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: change GET_APIC_ID() from an inline function to an out-of-line functionJack Steiner2008-04-174-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a function to read the local APIC_ID. This change is in preparation for additional changes to the APICID functions that will come in a later patch. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: replace most VM86 flags with flags from processor-flags.hgorcunov@gmail.com2008-04-171-8/+2
| | | | | | | | | | | | | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
generated by cgit (git 2.34.1) at 2024-09-22 05:28:38 +0000