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* powerpc/44x: Add Eiger AMCC (AppliedMicro) PPC460SX evaluation board support.fkan@amcc.com2009-08-314-0/+1686
| | | | | | | | | | This patch adds support for the AMCC (AppliedMicro) PPC460SX Eiger evaluation board. Signed-off-by: Tai Tri Nguyen <ttnguyen@amcc.com> Acked-by: Feng Kan <fkan@amcc.com> Acked-by: Tirumala Marri <tmarri@amcc.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* powerpc/44x: Update Arches defconfigStefan Roese2009-08-311-50/+332
| | | | | | | | This patch adds NOR MTD support and I2C HWMON support for the AD7414 to the AMCC Arches defconfig. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* powerpc/44x: Update Arches dtsStefan Roese2009-08-311-0/+50
| | | | | | | | | | | This patch adds some nodes to the AMCC Arches dts: - L2 cache support - NOR FLASH mapping with default partitioning - I2C HWMON device (AD7414) Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* powerpc: Properly start decrementer on BookE secondary CPUsBenjamin Herrenschmidt2009-08-282-20/+22
| | | | | | | | | | This moves the code to start the decrementer on 40x and BookE into a separate function which is now called from time_init() and secondary_time_init(), before the respective clock sources are registered. We also remove the 85xx specific code for doing it from the platform code. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: derive COMMAND_LINE_SIZE from asm-genericPaul Gortmaker2009-08-281-1/+1
| | | | | | | | | The default COMMAND_LINE_SIZE in asm-generic is 512, so the net effect of this change is nil, aside from the cleanup factor. See also commit 2b74b8569. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/pci: Pull ppc32 PCI features into commonKumar Gala2009-08-284-93/+90
| | | | | | | | | | | | | | | | | Some of the PCI features we have in ppc32 we will need on ppc64 platforms in the future. These include support for: * ppc_md.pci_exclude_device * indirect config cycles * early config cycles We also simplified the logic in fake_pci_bus() to assume it will always get a valid pci_controller. Since all current callers seem to pass it one. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/pci: move pci_64.c device tree scanning code into pci-common.cGrant Likely2009-08-286-296/+364
| | | | | | | | | | | | | | | | The PCI device tree scanning code in pci_64.c is some useful functionality. It allows PCI devices to be described in the device tree instead of being probed for, which in turn allows pci devices to use all of the device tree facilities to describe complex PCI bus architectures like GPIO and IRQ routing (perhaps not a common situation for desktop or server systems, but useful for embedded systems with on-board PCI devices). This patch moves the device tree scanning into pci-common.c so it is available for 32-bit powerpc machines too. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/pci: Remove dead checks for CONFIG_PPC_OFGrant Likely2009-08-282-17/+0
| | | | | | | | | | PPC_OF is always selected for arch/powerpc. This patch removes the stale #defines Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/book3e-64: Add support to initial_tlb_book3e for non-HES TLBKumar Gala2009-08-282-4/+202
| | | | | | | | | | | | | We now search through TLBnCFG looking for the first array that has IPROT support (we assume that there is only one). If that TLB has hardware entry select (HES) support we use the existing code and with the proper TLB select (the HES code still needs to clean up bolted entries from firmware). The non-HES code is pretty similiar to the 32-bit FSL Book-E code but does make some new assumtions (like that we have tlbilx) and simplifies things down a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/book3e-64: Add helper function to setup IVORsKumar Gala2009-08-282-0/+23
| | | | | | | | | | Not all 64-bit Book-3E parts will have fixed IVORs so add a function that cpusetup code can call to setup the base IVORs (0..15) to match the fixed offsets. We need to 'or' part of interrupt_base_book3e into the IVORs since on parts that have them the IVPR doesn't extend as far down. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/book3e-64: Wait til generic_calibrate_decr to enable decrementerKumar Gala2009-08-281-2/+4
| | | | | | | | | | | Match what we do on 32-bit Book-E processors and enable the decrementer in generic_calibrate_decr. We need to make sure we disable the decrementer early in boot since we currently use lazy (soft) interrupt on 64-bit Book-E and possible get a decrementer exception before we are ready for it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/book3e-64: Move the default cpu table entryKumar Gala2009-08-281-22/+27
| | | | | | | | | Move the default cpu entry table for CONFIG_PPC_BOOK3E_64 to the very end since we will probably want to support both 32-bit and 64-bit kernels for some processors that are higher up in the list. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/mm: Add MMU features for TLB reservation & Paired MAS registersKumar Gala2009-08-282-1/+46
| | | | | | | | | | | | | Support for TLB reservation (or TLB Write Conditional) and Paired MAS registers are optional for a processor implementation so we handle them via MMU feature sections. We currently only used paired MAS registers to access the full RPN + perm bits that are kept in MAS7||MAS3. We assume that if an implementation has hardware page table at this time it also implements in TLB reservations. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Adjust base and index registers in Altivec macrosMichael Wolf2009-08-281-6/+6
| | | | | | | | | | On POWER6 systems RA needs to be the base and RB the index. If they are reversed you take a misdirect hit. Signed-off-by: Mike Wolf <mjwolf@us.ibm.com> ---- Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Name xpn & x fields in HW Hash PTE formatBecky Bruce2009-08-281-3/+7
| | | | | | | | | | | | Previously, the 36-bit code was using these bits, but they had never been named in the pte format definition. This patch just gives those fields their proper names and adds a comment that they are only present on some processors. There is no functional code change. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Add CONFIG_DMA_API_DEBUG supportFUJITA Tomonori2009-08-283-1/+22
| | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Handle SWIOTLB mapping error properlyFUJITA Tomonori2009-08-282-1/+7
| | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Use asm-generic/dma-mapping-common.hFUJITA Tomonori2009-08-282-241/+7
| | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: use dma_map_ops structFUJITA Tomonori2009-08-2812-79/+37
| | | | | | | | | This converts uses dma_map_ops struct (in include/linux/dma-mapping.h) instead of POWERPC homegrown dma_mapping_ops. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Remove swiotlb_pci_dma_opsFUJITA Tomonori2009-08-286-19/+4
| | | | | | | | | Now swiotlb_pci_dma_ops is identical to swiotlb_dma_ops; we can use swiotlb_dma_ops with any devices. This removes swiotlb_pci_dma_ops. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Remove addr_needs_map in struct dma_mapping_opsFUJITA Tomonori2009-08-288-28/+28
| | | | | | | | | | | | | | | | This patch adds max_direct_dma_addr to struct dev_archdata to remove addr_needs_map in struct dma_mapping_ops. It also converts dma_capable() to use max_direct_dma_addr. max_direct_dma_addr is initialized in pci_dma_dev_setup_swiotlb(), called via ppc_md.pci_dma_dev_setup hook. For further information: http://marc.info/?t=124719060200001&r=1&w=2 Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge commit 'tip/iommu-for-powerpc' into nextBenjamin Herrenschmidt2009-08-2820-698/+247
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| * sparc: Add CONFIG_DMA_API_DEBUG supportFUJITA Tomonori2009-08-105-34/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All we need to do for CONFIG_DMA_API_DEBUG support is call dma_debug_init() in DMA code common for SPARC32 and SPARC64. Now SPARC32 uses two dma_map_ops structures for pci and sbus so there is not much dma stuff for SPARC32 in kernel/dma.c. kernel/ioport.c also includes dma stuff for SPARC32. So let's put all the dma stuff for SPARC32 in kernel/ioport.c and make kernel/dma.c common for SPARC32 and SPARC64. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-9-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Use asm-generic/pci-dma-compatFUJITA Tomonori2009-08-109-444/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts SPARC to use asm-generic/pci-dma-compat instead of the homegrown mechnism. SPARC32 has two dma_map_ops structures for pci and sbus (removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor). The global 'dma_ops' is set to sbus_dma_ops and get_dma_ops() returns pci32_dma_ops for pci devices so we can use the appropriate dma mapping operations. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-8-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Replace sbus_map_single and sbus_unmap_single with sbus_map_page and ↵FUJITA Tomonori2009-08-103-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sbus_unmap_page This is a preparation for using asm-generic/pci-dma-compat.h; SPARC32 has two dma_map_ops structures for pci and sbus (removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-7-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Remove no-op dma_4v_sync_single_for_cpu and dma_4v_sync_sg_for_cpuFUJITA Tomonori2009-08-101-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now sparc uses include/asm-generic/dma-mapping-common.h. pci_sun4v.c doesn't need to have no-op dma_4v_sync_single_for_cpu and dma_4v_sync_sg_for_cpu (dma-mapping-common.h does nothing if sync_{single|sg}_for_cpu hook is not defined). So we can remove them safely. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-6-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Use asm-generic/dma-mapping-common.hFUJITA Tomonori2009-08-105-99/+19
| | | | | | | | | | | | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-5-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Use dma_map_ops structFUJITA Tomonori2009-08-104-53/+36
| | | | | | | | | | | | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-4-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * IA64: Remove NULL flush_write_buffersFUJITA Tomonori2009-08-101-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | flush_write_buffers() in dma-mapping-common.h was removed so we can remove NULL flush_write_buffers() in IA64. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com Cc: davem@davemloft.net LKML-Reference: <1249872797-1314-3-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * dma-ops: Remove flush_write_buffers() in dma-mapping-common.hArnd Bergmann2009-08-101-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves flush_write_buffers() in asm-generic/dma-mapping-common.h to arch/x86/kernel/pci-nommu.c. The purpose of this patch is that, we can avoid defining NULL flush_write_buffers() on IA64 and SPARC. dma-mapping-common.h is used by X86 and IA64 (and SPARC soon) but only X86 with CONFIG_X86_OOSTORE or CONFIG_X86_PPRO_FENCE actually uses flush_write_buffers(). CONFIG_X86_OOSTORE or CONFIG_X86_PPRO_FENCE is usable with only kernel/pci-nommu.c (that is, not usable with other X86 IOMMU implementations such as SWIOTLB, VT-d, etc) so we can safely move flush_write_buffers() in asm-generic/dma-mapping-common.h to arch/x86/kernel/pci-nommu.c. The further discussion is: http://lkml.org/lkml/2009/6/28/104 Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: davem@davemloft.net Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-2-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * x86: remove unused swiotlb_phys_to_bus() and swiotlb_bus_to_phys()FUJITA Tomonori2009-07-281-10/+0
| | | | | | | | | | | | | | phys_to_dma() and dma_to_phys() are used instead of swiotlb_phys_to_bus() and swiotlb_bus_to_phys(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
| * powerpc: remove unused swiotlb_phys_to_bus() and swiotlb_bus_to_phys()FUJITA Tomonori2009-07-281-11/+0
| | | | | | | | | | | | | | | | phys_to_dma() and dma_to_phys() are used instead of swiotlb_phys_to_bus() and swiotlb_bus_to_phys(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * x86, IA64, powerpc: add phys_to_dma() and dma_to_phys()FUJITA Tomonori2009-07-283-0/+30
| | | | | | | | | | | | | | | | | | This adds two functions, phys_to_dma() and dma_to_phys() to x86, IA64 and powerpc. swiotlb uses them. phys_to_dma() converts a physical address to a dma address. dma_to_phys() does the opposite. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * powerpc: remove unncesary swiotlb_arch_address_needs_mappingFUJITA Tomonori2009-07-281-26/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | swiotlb doesn't use swiotlb_arch_address_needs_mapping(); it uses dma_capalbe(). We can remove unnecessary swiotlb_arch_address_needs_mapping(). We can remove swiotlb_addr_needs_map() and is_buffer_dma_capable() in swiotlb_pci_addr_needs_map() too; dma_capable() handles the features that both provide. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * powerpc: add dma_capable() to replace is_buffer_dma_capable()FUJITA Tomonori2009-07-281-0/+13
| | | | | | | | | | | | | | | | | | | | dma_capable() eventually replaces is_buffer_dma_capable(), which tells if a memory area is dma-capable or not. The problem of is_buffer_dma_capable() is that it doesn't take a pointer to struct device so it doesn't work for POWERPC. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * ia64: add dma_capable() to replace is_buffer_dma_capable()FUJITA Tomonori2009-07-281-0/+8
| | | | | | | | | | | | | | | | | | dma_capable() eventually replaces is_buffer_dma_capable(), which tells if a memory area is dma-capable or not. The problem of is_buffer_dma_capable() is that it doesn't take a pointer to struct device so it doesn't work for POWERPC. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
| * x86: replace is_buffer_dma_capable() with dma_capableFUJITA Tomonori2009-07-283-5/+4
| | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
| * x86: add dma_capable() to replace is_buffer_dma_capable()FUJITA Tomonori2009-07-281-0/+8
| | | | | | | | | | | | | | | | | | | | dma_capable() eventually replaces is_buffer_dma_capable(), which tells if a memory area is dma-capable or not. The problem of is_buffer_dma_capable() is that it doesn't take a pointer to struct device so it doesn't work for POWERPC. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
| * swiotlb: remove unnecessary swiotlb_bus_to_virtFUJITA Tomonori2009-07-281-10/+0
| | | | | | | | | | | | | | | | swiotlb_bus_to_virt is unncessary; we can use swiotlb_bus_to_phys and phys_to_virt instead. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * swiotlb: remove swiotlb_arch_range_needs_mappingFUJITA Tomonori2009-07-281-5/+0
| | | | | | | | | | | | | | Nobody uses swiotlb_arch_range_needs_mapping(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * swiotlb: remove unused swiotlb_alloc()FUJITA Tomonori2009-07-281-5/+0
| | | | | | | | | | | | | | Nobody uses swiotlb_alloc(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * swiotlb: remove unused swiotlb_alloc_boot()FUJITA Tomonori2009-07-281-5/+0
| | | | | | | | | | | | | | Nobody uses swiotlb_alloc_boot(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
* | Merge commit 'kumar/next' into nextBenjamin Herrenschmidt2009-08-2721-50/+1321
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| * | powerpc/qe_lib: Set gpio data before changing the direction to outputMichael Barkowski2009-08-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids having a short glitch if the desired initial value is not the same as what was previously in the data register. Signed-off-by: Michael Barkowski <michaelbarkowski@ruggedcom.com> Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add QE USB support for MPC8569E-MDS boardsAnton Vorontsov2009-08-252-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add gpio-controller node for BCSR17, it is used to control USB speed and VBUS; - Add timer node for QE GTM, needed for USB host; - Add usb node itself; - Add some probing code for BCSR GPIOs. NOTE: QE USB doesn't work on prototype boards, but should work on pilot boards if specs and schematics are correct, though we don't have the pilot boards to actually test it. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/82xx: Add CPM USB Gadget support for MPC8272ADS boardsAnton Vorontsov2009-08-252-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add usb node; - Configure pins and clocks; - Enable USB function in BCSR. The support was successfully tested using serial and ethernet gadget drivers. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/82xx: Fix BCSR bits for MPC8272ADS boardsAnton Vorontsov2009-08-251-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mpc8272_ads.c is using BCSR bits definitions from pq2ads.h, but according to User's Guide the bits are wrong for MPC8272ADS boards (I guess definitions from pq2ads should only be used for PQ2FADS boards). So, let's introduce our own definitions for MPC8272ADS, and don't include pq2ads.h. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add eSDHC support for MPC8536DS boardsAnton Vorontsov2009-08-252-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch simply adds sdhci node to the device tree. We specify clock-frequency manually, so that eSDHC will work without upgrading U-Boot. Though, that'll only work for default setup (1500 MHz) on new board revisions. For non-default setups, it's recommended to upgrade U-Boot, since it will fixup clock-frequency automatically. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: sbc8560 - remove "has-rstcr" from global utilities blockPaul Gortmaker2009-08-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The earlier mpc8560 CPUs don't have the RSTCR at 0xe00b0 in the GUTS. The generic reboot code uses this tag to determine if it should be using the RSTCR for reboot, so remove it from the board definition. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: issue fsl_soc reboot warning only when applicablePaul Gortmaker2009-08-241-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some CPU, like the MPC8560 don't have a RSTCR in the Global Utilities Block. These boards will implement their own reboot call, and not use this code, so we should only warn about the absence of the GUTS RSTCR when the default reboot code is used. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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