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* [ARM] Allow MTD device name to be passed via platform dataRussell King2005-10-291-0/+2
| | | | | | | Allow SA1100 devices to pass the name of the flash device to the SA1100 map driver. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'release' of ↵Linus Torvalds2005-10-2842-1205/+4000
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
| * [IA64] fix warning unused variable `g'Tony Luck2005-10-281-1/+1
| | | | | | | | | | | | | | 4ac0068f44f192f2de95a7bb36df3e19767a45fb forgot to delete the declaration of this variable which is no longer used. Signed-off-by: Tony Luck <tony.luck@intel.com>
| * Pull optimize-ptrace-threads into release branchTony Luck2005-10-281-16/+10
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| | * [IA64] ptrace - find memory sharers on children listCliff Wickman2005-10-271-16/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In arch/ia64/kernel/ptrace.c there is a test for a peek or poke of a register image (in register backing storage). The test can be unnecessarily long (and occurs while holding the tasklist_lock). Especially long on a large system with thousands of active tasks. The ptrace caller (presumably a debugger) specifies the pid of its target and an address to peek or poke. But the debugger could be attached to several tasks. The idea of find_thread_for_addr() is to find whether the target address is in the RBS for any of those tasks. Currently it searches the thread-list of the target pid. If that search does not find a match, and the shared mm-struct's user count indicates that there are other tasks sharing this address space (a rare occurrence), a search is made of all the tasks in the system. Another approach can drastically shorten this procedure. It depends upon the fact that in order to peek or poke from/to any task, the debugger must first attach to that task. And when it does, the attached task is made a child of the debugger (is chained to its children list). Therefore we can search just the debugger's children list. Signed-off-by: Cliff Wickman <cpw@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | Pull fix-slow-tlb-purge into release branchTony Luck2005-10-282-19/+28
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| | * | [IA64] - Avoid slow TLB purges on SGI Altix systemsDean Roe2005-10-272-19/+28
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flush_tlb_all() can be a scaling issue on large SGI Altix systems since it uses the global call_lock and always executes on all cpus. When a process enters flush_tlb_range() to purge TLBs for another process, it is possible to avoid flush_tlb_all() and instead allow sn2_global_tlb_purge() to purge TLBs only where necessary. This patch modifies flush_tlb_range() so that this case can be handled by platform TLB purge functions and updates ia64_global_tlb_purge() accordingly. sn2_global_tlb_purge() now calculates the region register value from the mm argument introduced with this patch. Signed-off-by: Dean Roe <roe@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | Pull fix-bte-copy into release branchTony Luck2005-10-281-1/+1
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| | * | [IA64-SGI] fix bte_copy() calling get_nasid() while preemptibleRuss Anderson2005-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bte_copy() calls calls get_nasid(), which will get flagged if preemption if enabled. raw_smp_processor_id() is used instead. It is OK if we migrate off node. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | Pull xpc-disengage into release branchTony Luck2005-10-284-368/+1130
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| | * | | [IA64-SGI] cleanup the way XPC locates the reserved pageDean Nelson2005-10-251-13/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Eliminate the passing in of a scratch buffer used for locating the reserved page setup for XPC. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] XPC changes to support more than 2k nasidsDean Nelson2005-10-253-84/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XPC needs to be changed to support up to 16k nasids on an SGI Altix system. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] fixes for XPC disengage and open/close protocolDean Nelson2005-10-254-88/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch addresses a few issues with the open/close protocol that were revealed by the newly added disengage functionality combined with more extensive testing. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | [IA64-SGI] get XPC to cleanly disengage from remote memory referencesDean Nelson2005-09-064-237/+813
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When XPC is being shutdown (i.e., rmmod, reboot) it doesn't ensure that other partitions with whom it was connected have completely disengaged from any attempt at cross-partition memory references. This can lead to MCAs in any of these other partitions when the partition is reset. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | Pull for-each-cpu into release branchTony Luck2005-10-286-22/+21
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| | * | | | [IA64] another place to use for_each_cpu_mask() in arch/ia64hawkes@sgi.com2005-10-251-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In arch/ia64 change the explicit use of a for-loop using NR_CPUS into the general for_each_online_cpu() construct. This widens the scope of potential future optimizations of the general constructs, as well as takes advantage of the existing optimizations of first_cpu() and next_cpu(), which is advantageous when the true CPU count is much smaller than NR_CPUS. Signed-off-by: John Hawkes <hawkes@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | | [IA64] wider use of for_each_cpu_mask() in arch/ia64hawkes@sgi.com2005-10-255-19/+20
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In arch/ia64 change the explicit use of for-loops and NR_CPUS into the general for_each_cpu() or for_each_online_cpu() constructs, as appropriate. This widens the scope of potential future optimizations of the general constructs, as well as takes advantage of the existing optimizations of first_cpu() and next_cpu(). Signed-off-by: John Hawkes <hawkes@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | Pull asm-slot-fix into release branchTony Luck2005-10-281-4/+12
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| | * | | | [IA64] Fix 2.6 kernel for the new ia64 assemblerH. J. Lu2005-10-251-4/+12
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new ia64 assembler uses slot 1 for the offset of a long (2-slot) instruction and the old assembler uses slot 2. The 2.6 kernel assumes slot 2 and won't boot when the new assembler is used: http://sources.redhat.com/bugzilla/show_bug.cgi?id=1433 This patch will work with either slot 1 or 2. Patch provided by H.J. Lu Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | Pull proc-cpuinfo-siblings into release branchTony Luck2005-10-281-1/+1
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| | * | | | [IA64] fix siblings field value in /proc/cpuinfoSiddha, Suresh B2005-10-251-1/+1
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the "siblings" field value in /proc/cpuinfo so that it now shows the number of siblings as seen by OS, instead of what is available from hardware perspective. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | Pull big-sim-disk into release branchTony Luck2005-10-281-5/+8
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| | * | | | [IA64] Allow simulator to use bigger disksPeter Chubb2005-10-251-5/+8
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The simscsi code at present overflows an int if it's given a large disk image. The attached patch increases the possible size to 128G. While it's unlikely that anyone will want to use SKI with such a large drive, the same framework is currently being used for various virtualisation experiments. Signed-off-by: Peter Chubb <peterc@gelato.unsw.edu.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | Pull sparsemem-v5 into release branchTony Luck2005-10-287-46/+1445
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| | * | | | [PATCH] V5 ia64 SPARSEMEM - gensparse_defconfigBob Picco2005-10-041-0/+1319
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gensparse_defconfig is a config generated file for SPARSEMEM and GENERIC kernel configuration (defconfig). Signed-off-by: Bob Picco <bob.picco@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | | [PATCH] V5 ia64 SPARSEMEM - SPARSEMEM code changesBob Picco2005-10-043-3/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is the minimal set of changes required by ia64 to use SPARSEMEM. Signed-off-by: Bob Picco <bob.picco@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | | [PATCH] V5 ia64 SPARSEMEM - eliminate contig_page_dataBob Picco2005-10-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For FLATMEM contig_page_data has been made transparent to the arch code. This patch conforms to that change. Signed-off-by: Bob Picco <bob.picco@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | | [PATCH] V5 ia64 SPARSEMEM - Kconfig and MakefileBob Picco2005-10-042-41/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch modifies the Kconfig file to introduce the new memory model options and other related SPARSEMEM changes. There is also a minor change in the Makefile. Signed-off-by: Bob Picco <bob.picco@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | Pull new-efi-memmap into release branchTony Luck2005-10-283-192/+367
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| | * | | | | [IA64] end of kernel 'data' is at _end, not _edataTony Luck2005-09-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | /proc/iomem describes a block of memory as "Kernel data", but the end address is derived from "_edata". The kernel actually has many other sections beyond _edata. Get the real end address from _end. Acked-by: Khalid Aziz <khalid_aziz@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | | | [IA64] include EFI memory information in /proc/iomemKhalid Aziz2005-09-192-0/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | User mode kexec tools expect to find information about physical memory in /proc/iomem (as they do on x86) to validate the addresses that the new kernel will use. Signed-off-by: Khalid Aziz <khalid.aziz@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | | | | [IA64] simplified efi memory map parsingTony Luck2005-09-083-192/+251
| | | |_|/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New version leaves the original memory map unmodified. Also saves any granule trimmings for use by the uncached memory allocator. Inspired by Khalid Aziz (various traces of his patch still remain). Fixes to uncached_build_memmap() and sn2 testing by Martin Hicks. Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | Pull define-node-cleanup into release branchTony Luck2005-10-285-118/+57
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| | * | | | | [IA64] Cleanup use of various #defines related to nodesJack Steiner2005-09-155-118/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the SN code & #defines related to compact nodes & IO discovery have gotten stale over the years. This patch attempts to clean them up. Some of the various SN MAX_xxx #defines were also unclear & misused. The primary changes are: - use MAX_NUMNODES. This is the generic linux #define for the number of nodes that are known to the generic kernel. Arrays & loops for constructs that are 1:1 with linux-defined nodes should use the linux #define - not an SN equivalent. - use MAX_COMPACT_NODES for MAX_NUMNODES + NUM_TIOS. This is the number of nodes in the SSI system. Compact nodes are a hack to get around the IA64 architectural limit of 256 nodes. Large SGI systems have more than 256 nodes. When we upgrade to ACPI3.0, I _hope_ that all nodes will be real nodes that are known to the generic kernel. That will allow us to delete the notion of "compact nodes". - add MAX_NUMALINK_NODES for the total number of nodes that are in the numalink domain - all partitions. - simplified (understandable) scan_for_ionodes() - small amount of cleanup related to cnodes Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | | Pull sn_pci_legacy_read-write into release branchTony Luck2005-10-281-0/+46
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| | * | | | | | [IA64-SGI] fix sn_pci_legacy_read/fix sn_pci_legacy_writeMark Maule2005-09-231-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a #define for SN_SAL_IOIF_PCI_SAFE and makes that the preferred method of implementing sn_pci_legacy_read() and sn_pci_legacy_write(). This SAL call has been present in SGI proms since version 4.10. If the SN_SAL_IOIF_PCI_SAFE call fails, revert to the previous code for compatability with older proms. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | | | Pull acpi-produce-consume into release branchTony Luck2005-10-281-8/+27
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| | * | | | | | | [IA64] respect ACPI producer/consumer flag for PCI root bridgesBjorn Helgaas2005-09-231-8/+27
| | |/ / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Address space resources for ACPI devices have a producer/consumer flag. All devices "consume" the indicated address space. If the resource is marked as a "producer", the range is also passed on to child devices. We currently ignore this flag when setting up MMIO and I/O port windows for PCI root bridges, so we could mistakenly interpret a "consumed-only" range, like CSR space for the device itself, as a window that is routed to children. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | | | Pull update-default-configs into release branchTony Luck2005-10-284-262/+576
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| | * | | | | | | [IA64] Update default configsBjorn Helgaas2005-09-154-262/+576
| | | |/ / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PNP and PNPACPI turned on i8042 recently changed from ACPI to PNP detection. Without PNP, it probes legacy I/O ports for the keyboard controller, which causes an MCA on HP boxes. Also, I'm about to remove 8250_acpi.c, so we'll need PNP to detect non-PCI serial ports. Until 8250_acpi.c is removed, some systems will see serial ports reported twice (once from 8250_acpi.c and again from 8250_pnp.c). This is harmless. PNPACPI is still marked EXPERIMENTAL, but I'm not aware of any outstanding issues on ia64. IDE_GENERIC turned off (except for SGI simulator, all ia64 IDE is PCI) ide-generic probes compiled-in legacy I/O ports for IDE devices, which again causes an MCA. It would be nicer to just get rid of all the legacy junk from include/asm-ia64/ide.h, but that is a bit riskier because it could break ide-cs and the HDIO_REGISTER_HWIF ioctl (http://www.ussg.iu.edu/hypermail/linux/kernel/0508.2/0049.html). Here's the essence of the patch: -# CONFIG_PNP is not set +CONFIG_PNP=y +CONFIG_PNPACPI=y -CONFIG_IDE_GENERIC=y +# CONFIG_IDE_GENERIC is not set Tested on tiger, bigsur, and zx1. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | | | Pull move-iosapic-to-acpi into release branchTony Luck2005-10-282-25/+11
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| | * | | | | | | [IA64] move ACPI IOSAPIC locality domain mapping from pci.c to acpi.cBjorn Helgaas2005-09-192-25/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move acpi_map_iosapics() from pci.c to acpi.c, since it doesn't have anything to do with PCI. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | | | | Pull ar-k0-usage into release branchTony Luck2005-10-281-13/+16
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| | * | | | | | | | [IA64] ia64: add ar.k0 usage noteBjorn Helgaas2005-09-191-13/+16
| | |/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update comment about how ar.k0 is used. Make the initialization the same as in start_secondary() (no functional change, just make it look more similar). Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | | | | Pull 1024-cpu into release branchTony Luck2005-10-281-2/+2
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| | * | | | | | | | [IA64] Increase max NR_CPUS on IA64 from 512 to 1024Jack Steiner2005-09-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch increases the maximum number of cpus supported on IA64 to 1024. No changes are made to the default SSI size. The patch simply allows specifying up to 1024p. There are certainly scaling (& other) issues that also need to be addressed!!! Additional patches will follow..... Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | | | | | Pull hp-machvec into release branchTony Luck2005-10-283-15/+145
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| | * | | | | | | | | [IA64] more robust zx1/sx1000 machvec supportAlex Williamson2005-09-143-15/+145
| | | |_|/ / / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Machine vector selection has always been a bit of a hack given how early in system boot it needs to be done. Services like ACPI namespace are not available and there are non-trivial problems to moving them to early boot. However, there's no reason we can't change to a different machvec later in boot when the services we need are available. By adding a entry point for later initialization of the swiotlb, we can add an error path for the hpzx1 machevec initialization and fall back to the DIG machine vector if IOMMU hardware isn't found in the system. Since ia64 uses 4GB for zone DMA (no ISA support), it's trivial to allocate a contiguous range from the slab for bounce buffer usage. Signed-off-by: Alex Williamson <alex.williamson@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | | | | | | | Pull altix-mmr into release branchTony Luck2005-10-283-58/+63
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| | * | | | | | | | | [IA64] Need to include <asm/sn/io.h> in a few more places.Tony Luck2005-09-093-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tony Luck <tony.luck@intel.com>
generated by cgit (git 2.34.1) at 2024-11-19 11:17:27 +0000