summaryrefslogtreecommitdiffstats
path: root/arch/mips/mm
Commit message (Expand)AuthorAgeFilesLines
* [MIPS] unexport __kmap_atomic_to_pageAdrian Bunk2008-05-121-1/+0
* [MIPS] unexport copy_from_user_page()Dmitri Vorobiev2008-04-281-3/+0
* [MIPS] unexport copy_to_user_page()Dmitri Vorobiev2008-04-281-2/+0
* [MIPS] unexport copy_user_highpage()Dmitri Vorobiev2008-04-281-2/+0
* [MIPS] remove redundant display of free swap space in show_mem()Johannes Weiner2008-04-281-1/+0
* [MIPS] Add support for MIPS CMP platform.Ralf Baechle2008-04-282-7/+38
* [MIPS] Allow setting of the cache attribute at run time.Chris Dearman2008-04-282-9/+41
* [MIPS] All MIPS32 processors support64-bit physical addresses.Chris Dearman2008-04-282-2/+2
* [MIPS] Reimplement clear_page/copy_pageThiemo Seufer2008-04-286-862/+725
* [MIPS] Handle aliases in vmalloc correctly.Ralf Baechle2008-04-073-0/+32
* [MIPS] Add missing 4KEC TLB refill handlerThomas Bogendoerfer2008-04-011-0/+1
* [MIPS] Fix loads of section missmatchesRalf Baechle2008-03-1217-158/+148
* [MIPS] Fix typo in commentThiemo Seufer2008-03-121-1/+1
* [MIPS] SB1: Fix CONFIG_SIBYTE_DMA_PAGEOPS build failure.Thiemo Seufer2008-02-191-7/+7
* [MIPS] Fix buggy invocations of kmap_coherent()Ralf Baechle2008-02-192-8/+16
* [MIPS] Handle I-cache coherency in flush_cache_range()Ralf Baechle2008-02-191-3/+6
* arch/mips/: Spelling fixesJoe Perches2008-02-031-1/+1
* [MIPS] Split the micro-assembler from tlbex.c.Thiemo Seufer2008-02-014-960/+1111
* [MIPS] Alchemy: Au1210/Au1250 CPU supportManuel Lauss2008-01-292-0/+4
* [MIPS] Use correct dma flushing in dma_cache_sync()Thomas Bogendoerfer2008-01-291-1/+1
* [MIPS] Use real cache invalidateThomas Bogendoerfer2008-01-291-2/+2
* [MIPS] tlbex.c: cleanup debug codeFranck Bui-Huu2008-01-291-57/+26
* [MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align Franck Bui-Huu2008-01-291-6/+3
* [MIPS] tlbex.c: cleanup include filesFranck Bui-Huu2008-01-291-6/+0
* [MIPS] tlbex.c: Cleanup __init usages.Franck Bui-Huu2008-01-291-49/+49
* [MIPS] Remove useless S-cache flushes.Ralf Baechle2008-01-291-9/+0
* [MIPS] Use pte_present instead of open coded test for _PAGE_PRESENT.Ralf Baechle2008-01-291-1/+1
* [MIPS] R4000/R4400 daddiu erratum workaroundMaciej W. Rozycki2008-01-292-47/+61
* [MIPS] tlbex: Cleanup handling of R2 hazards in TLB handlers.Ralf Baechle2008-01-291-8/+6
* [MIPS] Wrong CONFIG option prevents setup of DMA zone.Thomas Bogendoerfer2008-01-111-1/+1
* [MIPS] 64-bit Sibyte kernels need DMA32.Ralf Baechle2007-11-262-36/+44
* [MIPS] Sibyte: Replace use of removed IO_SPACE_BASE with IOADDR.Ralf Baechle2007-11-151-3/+3
* [MIPS] Convert reference to mem_map to pfn_to_page().Ralf Baechle2007-11-151-1/+1
* [MIPS] Sibyte: resurrect old cache hack.Ralf Baechle2007-11-151-1/+6
* [MIPS] MT: Fix bug in multithreaded kernels.Ralf Baechle2007-10-291-3/+18
* [MIPS] c-r3k: Implement flush_cache_range()Maciej W. Rozycki2007-10-291-28/+32
* [MIPS] Cleanup random difference between the lmo and kernel.org tree.Ralf Baechle2007-10-291-1/+1
* mips: sg_page() falloutJens Axboe2007-10-231-0/+1
* Update arch/ to use sg helpersJens Axboe2007-10-221-9/+7
* pid namespaces: define is_global_init() and is_container_init()Serge E. Hallyn2007-10-191-1/+1
* Remove dma_cache_(wback|inv|wback_inv) functionsRalf Baechle2007-10-171-2/+0
* Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2007-10-162-10/+19
|\
| * [MIPS] Cache: Provide more information on cache policy on bootup.Ralf Baechle2007-10-161-3/+7
| * [MIPS] Fix aliasing bug in copy_user_highpage, take 2.Ralf Baechle2007-10-161-7/+12
* | During VM oom condition, kill all threads in process groupWill Schmidt2007-10-161-1/+1
|/
* [MIPS] Revert "[MIPS] tlbex.c: Cleanup __init usage."Ralf Baechle2007-10-131-48/+48
* [MIPS] tlbex.c: Cleanup __init usage.Franck Bui-Huu2007-10-111-48/+48
* [MIPS] checkfiles: Fix "need space after that ','" errors.Ralf Baechle2007-10-116-66/+74
* [MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle2007-10-113-8/+8
* [MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle2007-10-115-17/+17
generated by cgit (git 2.34.1) at 2024-11-19 16:40:45 +0000