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* [ARM] 5605/1: Fix ep93xx gpio.c headersRyan Mallon2009-07-171-0/+1
| | | | | | | | Fix a number of build errors in ep93xx gpio.c due to to missing irq.h Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5600/1: ep93xx: core.c remove cast when copying dev_addrHartley Sweeten2009-07-171-4/+2
| | | | | | | | | | | | | The MAC address for the ep93xx ethernet driver can be optionally copied from registers in the controller when booting. Due to [ARM] 5573/1: ep93xx: ensure typesafe io, the cast for the source address is no longer needed. EP93XX_ETHERNET_BASE is typed as a (void __iomem __force *) so memcpy_fromio() needs to be used instead of memcpy(). Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5598/1: ep93xx: core.c typesafe vic_initHartley Sweeten2009-07-111-2/+2
| | | | | | | | | | The EP93XX_VIC{1/2}_BASE defines are now typesafe due to [ARM] 5573/1: ep93xx: ensure typesafe io. The (void *) cast is not needed when calling vic_init(). Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5593/1: ep93xx: clock.c __iomem pointerHartley Sweeten2009-07-091-1/+1
| | | | | | | | To ensure typesafe io, the enable_reg variable should be a void __iomem pointer not u32. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5592/1: ep93xx: cleanup platform header includesHartley Sweeten2009-07-098-62/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-ep93xx/include/mach/hardware.h 1. Properly name the include files so that they are loaded from the <mach/*> directory and not the local directory. 2. Remove including the ts72xx.h header. This header is not generic to the ep93xx platform. It should only be included by the ts72xx specific files that require it. The only two users in the tree are arch/arm/mach-ep93xx/ts72xx.c and drivers/mtd/nand/ts7250.c. arch/arm/mach-ep93xx/include/mach/ts72xx.h 1. <linux/io.h> should already be included by any user of this header. Doing the include here hides it from being needed by the calling source file. arch/arm/mach-ep93xx/core.c 1. Remove unnecessary headers. They were probably included originally due to cut-and-paste from other files. 2. <linux/io.h> should be included not <mach/gpio.h> arch/arm/mach-ep93xx/adsphere.c arch/arm/mach-ep93xx/edb93xx.c arch/arm/mach-ep93xx/gesbc9312.c arch/arm/mach-ep93xx/micro9.c arch/arm/mach-ep93xx/ts72xx.c 1. Remove unnecessary headers. arch/arm/mach-ep93xx/ts72xx.c 1. Remove unnecessary headers. 2. Add platform specific header <mach/ts72xx.h>. drivers/mtd/nand/ts7250.c 1. <linux/io.h> should be included not <asm/io.h>. 2. Add platform specific header <mach/ts72xx.h>. Cc: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5578/1: ep93xx: add ep93xx-keypad clockHartley Sweeten2009-07-092-33/+82
| | | | | | | | | | | | | | | | | | | | | | | | Add clkdev support for the ep93xx_keypad driver. A matrix keypad driver for the ep93xx just got merged via the input subsystem group. For this driver to work the keypad clock needs to be added to the ep93xx clkdev support. In order to accomplish this the following changes are implemented: 1) Move the EP93XX_EXT_*_RATE defines to mach/include/hardware.h. 2) Add EP93XX_KEYTCHCLK_DIV{4/16} for the keypad driver. 3) Add support for programmable clocks (set_rate() callback). 4) Add clk_keypad for the keypad driver. 5) tab indent the clk_lookup table for easier reading. 6) Add the set_rate() callback to program the keypad clock. This callback is generalized since the ADC clock (touchscreen) can use the same callback. 7) Use the ep93xx_syscon_swlocked_write() core function for updating the software locked register. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5577/2: ep93xx: syscon locked register functionsHartley Sweeten2009-07-096-35/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add core functions to handle writes to the ep93xx software locked registers. There are a number of registers in the EP93xx System Controller that require a write to the software lock register before they can be updated. This patch adds a number of exported functions to the ep93xx core that handle this access. The software locked clock divider registers, VidClkDiv, MIRClkDiv, I2SClkDiv and KeyTchClkDiv would typically involve writing a specific value to the register. To support this the ep93xx_syscon_swlocked_write() function is provided. For the DeviceCfg register it's more typical to only need to set or clear a single bit. A generic ep93xx_devcfg_set_clear() function is provided to handle both operations. Two inline functions, ep93xx_devcfg_set_bits() and ep93xx_devcfg_clear_bits() are also provided to improve code readability. In addition, the remaining bits in the System Controller Device Config Register have been documented and the previously defined names shortened. All code paths that use this functionality have been updated except for arch/arm/kernel/crunch.c. That code is in a context switch path, which is not reentrant, so it is safe against itself. Cc: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Matthias Kaehlcke <matthias@kaehlcke.net> Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5575/1: ep93xx: Show gpio interrupt type in debugfs output.Hartley Sweeten2009-06-271-5/+51
| | | | | | | | | | | | ep93xx: Show gpio interrupt type in debugfs output. EP93xx uses a private implementation for the debugfs output. Modify this output so it includes the interrupt type when the gpio is configured as an interrupt Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5574/1: ep93xx: gpio.c: fix header includes and __iomem pointersHartley Sweeten2009-06-271-4/+4
| | | | | | | | | | | | | Fix ep93xx gpio.c header includes and __iomem pointers. 1. <linux/gpio.h> should be included instead of <asm/gpio.h> 2. <mach/hardware.h> should be included instead of <mach/ep93xx-regs.h> 3. data_reg and data_dir_reg in struct ep93xx_gpio_chip should be void __iomem pointers not unsigned int Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5573/1: ep93xx: ensure typesafe ioHartley Sweeten2009-06-272-31/+47
| | | | | | | | | | | | ARM: ep93xx: ensure typesafe io For the ep93xx platform, all EP93XX_*_BASE defines are based on virtual addresses. Ensure that all these defines are properly typesafe for the __raw_{read/write}* macros. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge git://git.infradead.org/mtd-2.6Linus Torvalds2009-06-222-14/+25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.infradead.org/mtd-2.6: (63 commits) mtd: OneNAND: Allow setting of boundary information when built as module jffs2: leaking jffs2_summary in function jffs2_scan_medium mtd: nand: Fix memory leak on txx9ndfmc probe failure. mtd: orion_nand: use burst reads with double word accesses mtd/nand: s3c6400 support for s3c2410 driver [MTD] [NAND] S3C2410: Use DIV_ROUND_UP [MTD] [NAND] S3C2410: Deal with unaligned lengths in S3C2440 buffer read/write [MTD] [NAND] S3C2410: Allow the machine code to get the BBT table from NAND [MTD] [NAND] S3C2410: Added a kerneldoc for s3c2410_nand_set mtd: physmap_of: Add multiple regions and concatenation support mtd: nand: max_retries off by one in mxc_nand mtd: nand: s3c2410_nand_setrate(): use correct macros for 2412/2440 mtd: onenand: add bbt_wait & unlock_all as replaceable for some platform mtd: Flex-OneNAND support mtd: nand: add OMAP2/OMAP3 NAND driver mtd: maps: Blackfin async: fix memory leaks in probe/remove funcs mtd: uclinux: mark local stuff static mtd: uclinux: do not allow to be built as a module mtd: uclinux: allow systems to override map addr/size mtd: blackfin NFC: fix hang when using NAND on BF527-EZKITs ...
| * Merge branch 'next-mtd' of git://aeryn.fluff.org.uk/bjdooks/linuxDavid Woodhouse2009-06-0835-147/+195
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| | * [MTD] [NAND] S3C2410: Allow the machine code to get the BBT table from NANDMichel Pollet2009-06-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added a flag to allow the machine code to tell the NAND subsystem that it should try to pickup a BBT from the flash, and also skip the NAND full scan at startup. Signed-off-by: Michel Pollet <buserror@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * [MTD] [NAND] S3C2410: Added a kerneldoc for s3c2410_nand_setMichel Pollet2009-06-081-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | Converted the old comnent to kerneldoc. Signed-off-by: Michel Pollet <buserror@gmail.com> [ben-linux@fluff.org: updated subject, spello fix] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * [MTD] [NAND] S3C2410: Small colon cleanupNelson Castillo2009-05-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | checkpatch would complain with "disable_ecc : 1". Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net> [ben-linux@fluff.org: subject cleanup] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | mtd: nand: davinci_nand, 4-bit ECC for smallpageDavid Brownell2009-06-051-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Minimal support for the 4-bit ECC engine found on DM355, DM365, DA830/OMAP-L137, and similar recent DaVinci-family chips. This is limited to small-page flash for now; there are some page layout issues for large page chips. Note that most boards using this engine (like the DM355 EVM) include 2GiB large page chips. Sanity tested on DM355 EVM after swapping the socketed NAND for a small-page one. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | | Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2009-06-2253-150/+5226
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (49 commits) [ARM] idle: clean up pm_idle calling, obey hlt_counter [ARM] S3C: Fix gpio-config off-by-one bug [ARM] S3C64XX: add to_irq() support for EINT() GPIO [ARM] S3C64XX: clock.c: fix typo in usb-host clock ctrlbit [ARM] S3C64XX: fix HCLK gate defines [ARM] Update mach-types [ARM] wire up rt_tgsigqueueinfo and perf_counter_open OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisons OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL OMAP3: Add support for DPLL3 divisor values higher than 2 OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers OMAP3 SRAM: add more comments on the SRAM code OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change OMAP3 clock: add a short delay when lowering CORE clk rate OMAP3 clock: initialize SDRC timings at kernel start OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize [ARM] Add old Feroceon support to compressed/head.S [ARM] 5559/1: Limit the stack unwinding caused by a kthread exit [ARM] 5558/1: Add extra checks to ARM unwinder to avoid tracing corrupt stacks [ARM] 5557/1: Discard some ARM.ex*.*exit.text sections when !HOTPLUG or !HOTPLUG_CPU ...
| * | | [ARM] idle: clean up pm_idle calling, obey hlt_counterRussell King2009-06-221-26/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pm_idle is used by infrastructure (eg, cpuidle) which expects architectures to call it in a certain way. Arrange for ARM to follow x86's lead on this and call pm_idle() with interrupts already disabled. However, we expect pm_idle() to enable interrupts before it returns. Also, OMAP wants to be able to disable hlt-ing, so allow hlt_counter to prevent all calls to pm_idle. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | Merge branch 'next-s3c' of git://aeryn.fluff.org.uk/bjdooks/linux into develRussell King2009-06-224-7/+13
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| | * | | [ARM] S3C: Fix gpio-config off-by-one bugMarek Szyprowski2009-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix gpio-config off-by-one bug. Without this patch, touching GPA0 pin on S3C64XX platform causes kernel oops. Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C64XX: add to_irq() support for EINT() GPIOMarek Szyprowski2009-06-221-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | N group Add to_irq() function to onvert gpio to irq for external interrupt group (GPN). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C64XX: clock.c: fix typo in usb-host clock ctrlbitPeter Korsgaard2009-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The usb-host clock was using the wrong define (the SCLK enable for the usb-host-bus) to change the HCLK register instead of the HCLK_UHOST bit. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C64XX: fix HCLK gate definesPeter Korsgaard2009-06-221-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A few typos seems to have sneaked into the HCLK gate defines, causing the usb host clock to not get enabled. Fix them according to the reference manual and throw in the 3d accel bit for good measure. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | | [ARM] Update mach-typesRussell King2009-06-201-2/+37
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] wire up rt_tgsigqueueinfo and perf_counter_openRussell King2009-06-202-0/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Merge branch 'omap-clock-for-next' of git://git.pwsan.com/linux-2.6 into develRussell King2009-06-207-62/+163
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| | * | | | OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisonsRoel Kluin2009-06-192-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1 after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT) that's still success. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLLPaul Walmsley2009-06-191-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correspondence with the TI OMAP hardware team indicates that SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f. This number was apparently derived from process validation. This is only used when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than 83MHz). Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3: Add support for DPLL3 divisor values higher than 2Tero Kristo2009-06-194-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control. Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
| | * | | | OMAP3 SRAM: convert SRAM code to use macros rather than magic numbersPaul Walmsley2009-06-191-15/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert omap3_sram_configure_core_dpll() to use macros rather than magic numbers. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3 SRAM: add more comments on the SRAM codePaul Walmsley2009-06-191-21/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up comments and copyrights on the CORE DPLL3 M2 divider change code. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock changePaul Walmsley2009-06-194-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Program the SDRC_MR_0 register as well during SDRC clock changes. This register allows selection of the memory CAS latency. Some SDRAM chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency at lower clock rates. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3 clock: add a short delay when lowering CORE clk ratePaul Walmsley2009-06-194-18/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2 divider, add a short delay before returning to SDRAM to allow the SDRC time to stabilize. Without this delay, the system is prone to random panics upon re-entering SDRAM. This time delay varies based on MPU frequency. At 500MHz MPU frequency at room temperature, 64 loops seems to work okay; so add another 32 loops for environmental and process variation. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3 clock: initialize SDRC timings at kernel startPaul Walmsley2009-06-192-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the OMAP3, initialize SDRC timings when the kernel boots. This ensures that the kernel is running with known, optimized SDRC timings, rather than whatever was configured by the bootloader. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3 clock: remove wait for DPLL3 M2 clock to stabilizePaul Walmsley2009-06-191-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original CDP kernel that this code comes from waited for 0x800 loops after switching the CORE DPLL M2 divider. This does not appear to be necessary. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | | | | Merge branch 'for-rmk' of git://git.marvell.com/orion into develRussell King2009-06-194-3/+19
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| | * | | | | [ARM] Add old Feroceon support to compressed/head.SJoonyoung Shim2009-06-191-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch supports the cache handling for some old Feroceon cores for which the CPU ID is like 0x41159260. This is a complement to commit ab6d15d50637fc25ee941710b23fed09ceb28db3. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | * | | | | [ARM] orion5x: register the crypto device on SOCs that support itNicolas Pitre2009-06-152-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not all Orion variants do implement the crypto unit. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | * | | | | [ARM] orion5x: increment window counter after adding sram mappingSebastian Andrzej Siewior2009-06-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without incrementing the counter the next window setup will overwrite the SRAM mapping. Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | | | | | [ARM] 5559/1: Limit the stack unwinding caused by a kthread exitCatalin Marinas2009-06-191-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a kthread function returns, it branches to do_exit(). However, the unwinding information isn't valid anymore and any stack trace caused by do_exit() may be incorrect. This patch adds a kernel_thread_exit() function and annotated with '.cantunwind' so that the unwinder stops when reaching it. Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | [ARM] 5558/1: Add extra checks to ARM unwinder to avoid tracing corrupt stacksCatalin Marinas2009-06-191-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are situations where the unwinder goes beyond stack boundaries and unwinds random data. This patch moves the stack boundaries check after the unwind_exec_insn() call and adds an extra check for possible infinite loops (like "mov pc, lr" with pc == lr). The patch also fixes a bug in the unwind instructions interpreter. The 0xb0 instruction can only set PC to LR if this wasn't already set by a previous instruction (this is used on exceptions taken while in kernel mode where svc_entry is annotated with ".save {r0 - pc}"). Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | [ARM] 5557/1: Discard some ARM.ex*.*exit.text sections when !HOTPLUG or ↵Catalin Marinas2009-06-191-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | !HOTPLUG_CPU Not discarding these sections when hotplug isn't available prevents the kernel from building. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | [ARM] 5540/1: 32-bit Thumb-2 {ld,st}{m,rd} alignment fault fixup supportGeorge G. Davis2009-06-191-20/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Min Zhang <mzhang@mvista.com> Add alignment fault fixup support for 32-bit Thumb-2 LDM, LDRD, POP, PUSH, STM and STRD instructions. Alignment fault fixup support for the remaining 32-bit Thumb-2 load/store instruction cases is not included since ARMv6 and later processors include hardware support for loads and stores of unaligned words and halfwords. Signed-off-by: Min Zhang <mzhang@mvista.com> Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | [ARM] 5556/1: Fix the irq_desc.cpu referencesCatalin Marinas2009-06-192-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cpu member of struct irq_desc was recently renamed to node. The patch renames the ARM references to the old member. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | [ARM] 5555/1: RealView: Include asm/smp_twd.h in realview-pbx.cCatalin Marinas2009-06-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This header file is needed for twd_base. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | Merge branch 'next-s3c' of git://aeryn.fluff.org.uk/bjdooks/linux into develRussell King2009-06-1816-5/+3902
| |\ \ \ \ \ \ | | | |_|/ / / | | |/| | | |
| | * | | | | [ARM] S3C2440: Merge branch next-mini2440 into next-s3cBen Dooks2009-06-164-0/+2811
| | |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Merge branch 'next-mini2440' into next-s3c
| | | * | | | | [ARM] MINI2440: Cleanup duplicated header includesBen Dooks2009-06-151-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove duplicate mach headers for gpio. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | | * | | | | [ARM] MINI2440: Create a mini2440_defconfig fileMichel Pollet2009-06-151-0/+2097
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just a working, starting point config file for the board. Signed-off-by: Michel Pollet <buserror@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | | * | | | | [ARM] MINI2440: Add machine supportMichel Pollet2009-06-153-0/+717
| | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MINI2440 is a chinese made s3c2440 development board with a large set of peripherals. This patch provides machine support for almost all the features of the board. Since it can come with various "options" fitted, a kernel parameter is used to specify the lcd size, backlight control and touchscreen. Signed-off-by: Michel Pollet <buserror@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
generated by cgit (git 2.34.1) at 2025-01-10 15:00:05 +0000