summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* PCI PM: Power-manage devices without drivers during suspend-resumeRafael J. Wysocki2009-01-071-4/+29
| | | | | | | | | | | | | PCI devices without drivers can be put into low power states during suspend with the help of pci_prepare_to_sleep() and prevented from generating wake-up events during resume with the help of pci_enable_wake(). However, it's better not to put bridges into low power states during suspend, because that might result in entire bus segments being powered off. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI PM: Add suspend counterpart of pci_reenable_deviceRafael J. Wysocki2009-01-073-13/+59
| | | | | | | | | | | | | | | | | PCI devices without drivers are not disabled during suspend and hibernation, but they are enabled during resume, with the help of pci_reenable_device(), so there is an unbalanced execution of pcibios_enable_device() in the resume code path. To correct this introduce function pci_disable_enabled_device() that will disable the argument device, if it is enabled when the function is being run, without updating the device's pci_dev structure and use it in the suspend code path to balance the pci_reenable_device() executed during resume. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI PM: Fix poweroff and restore callbacksRafael J. Wysocki2009-01-071-5/+5
| | | | | | | | | | pci_fixup_device() is called too early in pci_pm_poweroff() and too late in pci_pm_restore(). Moreover, pci_pm_restore_noirq() calls pci_fixup_device() twice and in a wrong way. Fix that. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Use msleep instead of cpu_relax during ASPM link retrainingAndrew Patterson2009-01-071-4/+9
| | | | | | | | | | | | | | | | | | | | | | | The cpu_relax() function can be a noop on certain architectures like IA-64 when CPU threads are disabled, so use msleep instead during link retraining busy/wait loop. Introduce define LINK_RETRAIN_TIMEOUT instead of hard-coding timeout in pcie_aspm_configure_common_clock. Use time_after() to avoid jiffy wraparound when checking for expired timeout. After timeout expires, recheck link status register link training bit instead of checking for expired timeout to avoid possible false positive. Note that Matthew Wilcox came up with the first rough version of this patch. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: PCIe portdrv: Add kerneldoc comments to remining core funtionsRafael J. Wysocki2009-01-071-0/+34
| | | | | | | | Add kerneldoc comments to the reamining functions in drivers/pci/pcie/portdrv_core.c . Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: PCIe portdrv: Rearrange code so that related things are togetherRafael J. Wysocki2009-01-072-50/+50
| | | | | | | | | Rearrange code in drivers/pci/pcie/portdrv_bus.c and drivers/pci/pcie/portdrv_core.c so that related functions and data structures are closer together. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: PCIe portdrv: Fix suspend and resume of PCI Express port servicesRafael J. Wysocki2009-01-072-67/+0
| | | | | | | | | | | | | | | | | | | | There is a problem with the suspend and resume of PCI Express port service devices that the ->suspend() and ->resume() routines of each service device are called twice in each suspend-resume cycle, which is obviously wrong. The scenario is that first, the PCI Express port driver calls suspend and resume routines of each port service driver from its pcie_portdrv_suspend() and pcie_portdrv_resume() callbacks, respectively (which is correct), and second, the pcie_port_bus_type driver calls them from its ->suspend() and ->resume() callbacks (which is not correct, because it doesn't happen at the right time). The solution is to remove the ->suspend() and ->resume() callbacks from pcie_port_bus_type and the associated functions. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: PCIe portdrv: Add kerneldoc comments to some core functionsRafael J. Wysocki2009-01-071-7/+70
| | | | | | | | | Add kerneldoc comments to some functions in drivers/pci/pcie/portdrv_core.c, since the code in there is not easy to follow without any additional description. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: Do not use interrupt links for devices using MSI-XRafael J. Wysocki2009-01-072-2/+11
| | | | | | | | | | pcibios_enable_device() and pcibios_disable_device() don't handle IRQs for devices that have MSI enabled and it should treat the devices with MSI-X enabled in the same way. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* net: sfc: Use pci_clear_master() to disable bus masteringBen Hutchings2009-01-071-2/+2
| | | | | | | | | | pci_disable_device() disables many features, like MSI-X, which we never reenable in efx_reset(). Further, calls to pci_enable_device() and pci_disable_device() must be matched since the nesting count was introduced, so switch to using pci_clear_master() instead. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Add pci_clear_master() as opposite of pci_set_master()Ben Hutchings2009-01-073-12/+31
| | | | | | | | | | | | During an online device reset it may be useful to disable bus-mastering. pci_disable_device() does that, and far more besides, so is not suitable for an online reset. Add pci_clear_master() which does just this. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI hotplug: remove redundant test in cpq hotplugJulia Lawall2009-01-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | func is checked not to be NULL a few lines before. A simplified version of the semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @r exists@ local idexpression x; expression E; position p1,p2; @@ if (x@p1 == NULL || ...) { ... when forall return ...; } ... when != \(x=E\|x--\|x++\|--x\|++x\|x-=E\|x+=E\|x|=E\|x&=E\|&x\) ( x@p2 == NULL | x@p2 != NULL ) // another path to the test that is not through p1? @s exists@ local idexpression r.x; position r.p1,r.p2; @@ ... when != x@p1 ( x@p2 == NULL | x@p2 != NULL ) @fix depends on !s@ position r.p1,r.p2; expression x,E; statement S1,S2; @@ ( - if ((x@p2 != NULL) || ...) S1 | - if ((x@p2 == NULL) && ...) S1 | - BUG_ON(x@p2 == NULL); ) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: pciehp: cleanup register and field definitionsKenji Kaneshige2009-01-072-236/+156
| | | | | | | | | | | | | Clean up register definitions related to PCI Express Hot plug. - Add register definitions into include/linux/pci_regs.h, and use them instead of pciehp's locally definied register definitions. - Remove pciehp's locally defined register definitions - Remove unused register definitions in pciehp. - Some minor cleanups. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: pciehp: ignore undefined bit in link status registerKenji Kaneshige2009-01-071-2/+1
| | | | | | | | | | Bit 10 in Link Status register used to be defined as Training Error in the PCI Express 1.0a specification. But it was removed by Training Error ECN and is no longer defined. So pciehp must ignore the value read from it. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: keep ASPM link state consistent throughout PCIe hierarchyShaohua Li2009-01-071-19/+106
| | | | | | | | | | | | | In a PCIe hierarchy with a switch present, if the link state of an endpoint device is changed, we must check the whole hierarchy from the endpoint device to root port, and for each link in the hierarchy, the new link state should be configured. Previously, the implementation checked the state but forgot to configure the links between root port to switch. Fixes Novell bz #448987. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Tested-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: use dev_printk for PCI bus locality messagesBjorn Helgaas2009-01-071-5/+3
| | | | | | | | Since pci_bus has a struct device, use dev_printk directly instead of faking it by hand. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: use dev_printk for PCI bus resource mssagesBjorn Helgaas2009-01-071-3/+2
| | | | | | | | Since pci_bus has a struct device, use dev_printk directly instead of faking it by hand. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: add interface to set visible size of VPDStephen Hemminger2009-01-072-0/+24
| | | | | | | | | The VPD on all devices may not be 32K. Unfortunately, there is no generic way to find the size, so this adds a simple API hook to reset it. Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: revise VPD access interfaceStephen Hemminger2009-01-074-90/+114
| | | | | | | | | | | Change PCI VPD API which was only used by sysfs to something usable in drivers. * move iteration over multiple words to the low level * use conventional types for arguments * add exportable wrapper Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: handle long delays in VPD accessStephen Hemminger2009-01-071-22/+33
| | | | | | | | | | | | | | | Accessing the VPD area can take a long time. The existing VPD access code fails consistently on my hardware. There are comments in the SysKonnect vendor driver that it can take up to 13ms per word. Change the access routines to: * use a mutex rather than spinning with IRQ's disabled and lock held * have a much longer timeout * call cond_resched while spinning Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: x86/visws: use generic INTx swizzle from PCI coreBjorn Helgaas2009-01-071-14/+1
| | | | | | | Use the generic pci_common_swizzle() instead of arch-specific code. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: sh: use generic INTx swizzle from PCI coreBjorn Helgaas2009-01-071-16/+1
| | | | | | | | | | | Use the generic pci_common_swizzle() instead of arch-specific code. Note that pci_common_swizzle() loops based on dev->bus->self, not dev->bus->parent as the sh simple_swizzle() did. I think they are equivalent for this purpose. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: mips: use generic INTx swizzle from PCI coreBjorn Helgaas2009-01-071-16/+1
| | | | | | | | | | | Use the generic pci_common_swizzle() instead of arch-specific code. Note that pci_common_swizzle() loops based on dev->bus->self, not dev->bus->parent as the mips common_swizzle() did. I think they are equivalent for this purpose. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: arm: use generic INTx swizzle from PCI coreBjorn Helgaas2009-01-072-28/+1
| | | | | | | Use the generic pci_common_swizzle() instead of arch-specific code. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: alpha: use generic INTx swizzle from PCI coreBjorn Helgaas2009-01-072-20/+2
| | | | | | | | | | | Use the generic pci_common_swizzle() instead of arch-specific code. Note that pci_common_swizzle() loops based on dev->bus->self, not dev->bus->parent as the alpha common_swizzle() did. I think they are equivalent for this purpose. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: add pci_common_swizzle() for INTx swizzlingBjorn Helgaas2009-01-072-0/+21
| | | | | | | | | | | | This patch adds pci_common_swizzle(), which swizzles INTx values all the way up to a root bridge. This common implementation can replace several architecture-specific ones. This should someday be combined with pci_get_interrupt_pin(), but I left it separate for now to make reviewing easier. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI hotplug: introduce functions for ACPI slot detectionKenji Kaneshige2009-01-075-142/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | Some ACPI related PCI hotplug code can be shared among PCI hotplug drivers. This patch introduces the following functions in drivers/pci/hotplug/acpi_pcihp.c to share the code, and changes acpiphp and pciehp to use them. - int acpi_pci_detect_ejectable(struct pci_bus *pbus) This checks if the specified PCI bus has ejectable slots. - int acpi_pci_check_ejectable(struct pci_bus *pbus, acpi_handle handle) This checks if the specified handle is ejectable ACPI PCI slot. The 'pbus' parameter is needed to check if 'handle' is PCI related ACPI object. This patch also introduces the following inline function in include/linux/pci-acpi.h, which is useful to get ACPI handle of the PCI bridge from struct pci_bus of the bridge's secondary bus. - static inline acpi_handle acpi_pci_get_bridge_handle(struct pci_bus *pbus) This returns ACPI handle of the PCI bridge which generates PCI bus specified by 'pbus'. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: pciehp: add auto option to pciehp_detect_modeKenji Kaneshige2009-01-071-4/+76
| | | | | | | | | | | | | | | | | | | ACPI based hot-pluggable PCIe slot detection logic was added to prevent the problem non hot-pluggable PCIe slot was detected as hot-pluggable. The slot detection logic can be selected through 'pciehp_detect_mode', but it would be better if it is selected automatically. This patch adds 'auto' option for 'pciehp_detect_mode'. When it is specified, pciehp judges which 'acpi' or 'pcie' should be used. It seems that the physical slot number is duplicated among some slots on most of the platforms with the above-mentioned problem. So 'auto' mode uses this information to judge which 'acpi' or 'pcie' should be used. That is, if duplicated physical slot numbers are detected, 'acpi' mode is used. This method is not perfect, but it's realistic. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: pciehp: add ACPI based slot detectionKenji Kaneshige2009-01-074-1/+132
| | | | | | | | | | | | | | | | | | | | | There is a problem that some non hot-pluggable PCIe slots are detected as hot-pluggable by pciehp on some platforms. The immediate cause of this problem is that hot-plug capable bit in the Slot Capabilities register is set even for non hot-pluggable slots on those platforms. It seems a BIOS/hardware problem, but we need workaround about that. Some of those platforms define hot-pluggable PCIe slots on ACPI namespace properly, while hot-plug capable bit in the Slot Capabilities register is set improperly. So using ACPI namespace information in pciehp to detect PCIe hot-pluggable slots would be a workaround. This patch adds 'pciehp_detect_mode' module option. When 'acpi' is specified, pciehp uses ACPI namespace information to detect PCIe hot-pluggable slots. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: work_on_cpu: use in drivers/pci/pci-driver.cRusty Russell2009-01-071-20/+32
| | | | | | | | | | | | | | | | This uses work_on_cpu(), rather than altering the cpumask of the thread which we happen to be. Note the cleanups: 1) I've removed the CONFIG_NUMA test, since dev_to_node() returns -1 for !CONFIG_NUMA anyway and the compiler will eliminate it. 2) No need to reset mempolicy to default (a bad idea anyway) since work_on_cpu is run from a workqueue. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI PM: Split PCI Express port suspend-resumeRafael J. Wysocki2009-01-071-6/+17
| | | | | | | | | | | | Suspend-resume of PCI Express ports has recently been moved into _suspend_late() and _resume_early() callbacks, but some functions executed from there should not be called with interrupts disabled, eg. pci_enable_device(). For this reason, split the suspend-resume of PCI Express ports into parts to be executed with interrupts disabled and with interrupts enabled. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI PM: Fix pci_update_current_stateRafael J. Wysocki2009-01-071-3/+6
| | | | | | | | | | | | Currently, PCI devices without the PM capability that are power manageable by the platform (eg. ACPI) are not handled correctly by pci_set_power_state(), because their current_state field is not updated to reflect the new power state of the device. Fix this by making pci_update_current_state() accept additional argument representing the power state of the device as set by the platform. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: set device wakeup capable flag if platform support is presentJesse Barnes2009-01-073-0/+22
| | | | | | | | | | | | | When PCI devices are initialized, we check whether they support PCI PM caps and set the device can_wakeup flag if so. However, some devices may have platform provided wakeup events rather than PCI PME signals, so we need to set can_wakeup in that case too. Doing so should allow wakeups from many more devices, especially on cost constrained systems. Reported-by: Alan Stern <stern@rowland.harvard.edu> Tested-by: Joseph Chan <JosephChan@via.com.tw> Acked-by: "Rafael J. Wysocki" <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: factor pci_bus_add_child() from pci_bus_add_devices()Yu Zhao2009-01-072-23/+34
| | | | | | | | | This patch splits a new function, pci_bus_add_child(), from pci_bus_add_devices(). The new function can be used to register PCI buses to the device core. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: cleanup pci_bus_add_devices()Yu Zhao2009-01-071-27/+28
| | | | | | | | | Cleanup pci_bus_add_devices() by negating the conditional and continuing, rather than having a single conditional take up the whole body. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: add a new function to map BAR offsetsYu Zhao2009-01-073-8/+29
| | | | | | | | Add a function to map a given resource number to a corresponding register so drivers can get the offset and type of device specific BARs. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: allow pci_alloc_child_bus() to handle a NULL bridgeYu Zhao2009-01-071-2/+6
| | | | | | | | | Allow pci_alloc_child_bus() to allocate buses without bridge devices. Some SR-IOV devices can occupy more than one bus number, but there is no explicit bridges because that have internal routing mechanism. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: export __pci_read_base()Yu Zhao2009-01-072-11/+18
| | | | | | | Export __pci_read_base() so it can be used by whole PCI subsystem. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: remove unnecessary condition check in pci_restore_bars()Yu Zhao2009-01-071-17/+2
| | | | | | | | Remove the unnecessary number of resources condition checks because the pci_update_resource() will check availability of the resources. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: define PCI resource names in an 'enum'Yu Zhao2009-01-074-18/+32
| | | | | | | | | | This patch moves all definitions of the PCI resource names to an 'enum', and also replaces some hard-coded resource variables with symbol names. This change eases introduction of device specific resources. Reviewed-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: remove unnecessary arg of pci_update_resource()Yu Zhao2009-01-073-6/+7
| | | | | | | | | This cleanup removes unnecessary argument 'struct resource *res' in pci_update_resource(), so it takes same arguments as other companion functions (pci_assign_resource(), etc.). Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: enhance pci_ari_enabled()Yu Zhao2009-01-071-3/+3
| | | | | | | | | | | Change parameter of pci_ari_enabled() from 'pci_dev' to 'pci_bus'. ARI forwarding on the bridge mostly concerns the subordinate devices rather than the bridge itself. So this change will make the function easier to use. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI quirks: piix3: warn softer about enabling passive releaseAdam Jackson2009-01-071-1/+1
| | | | | | | | | | | | All the other quirks are dev_info() not dev_err(), this one isn't special. This makes 'quiet' boot in qemu really quiet. Signed-off-by: Adam Jackson <ajax@redhat.com> Cc: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Make settable sysfs attributes more consistentTrent Piepho2009-01-071-20/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | PCI devices have three settable boolean attributes, enable, broken_parity_status, and msi_bus. The store functions for these would silently interpret "0x01" as false, "1llogical" as true, and "true" would be (silently!) ignored and do nothing. This is inconsistent with typical sysfs handling of settable attributes, and just plain doesn't make much sense. So, use strict_strtoul(), which was created for this purpose. The store functions will treat a value of 0 as false, non-zero as true, and return -EINVAL for a parse failure. Additionally, is_enabled_store() and msi_bus_store() return -EPERM if CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more typical behavior for sysfs attributes that need a capability. And msi_bus_store() will only print the "forced subordinate bus ..." warning if the MSI flag was actually forced to a different value. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: uninline pci_ioremap_bar()Andrew Morton2009-01-072-14/+17
| | | | | | | | It's too large to be inlined. Acked-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: fix incorrect error return in pci_enable_wakeAlan Stern2009-01-071-1/+1
| | | | | | | | | | This patch (as1186) fixes a minor mistake in pci_enable_wake(). When the routine is asked to disable remote wakeup, it should not return an error merely because the device is not allowed to do wakeups! Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: parisc: use generic pci_swizzle_interrupt_pin()Bjorn Helgaas2009-01-072-4/+3
| | | | | | | | Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Acked-by: Kyle McMartin <kyle@infradead.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: mips: use generic pci_swizzle_interrupt_pin()Bjorn Helgaas2009-01-072-14/+1
| | | | | | | | Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: x86: use generic pci_swizzle_interrupt_pin()Bjorn Helgaas2009-01-072-8/+3
| | | | | | | | | | Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: hpa@zytor.com Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: alpha: use generic pci_swizzle_interrupt_pin()Bjorn Helgaas2009-01-078-14/+9
| | | | | | | | Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
generated by cgit (git 2.34.1) at 2024-10-02 22:35:03 +0000