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* Merge branch 'copy_user' of git://git.marvell.com/orion into develRussell King2009-06-146-2/+253
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| * [ARM] alternative copy_to_user: more precise fallback thresholdNicolas Pitre2009-05-301-2/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous size thresholds were guessed from various user space benchmarks using a kernel with and without the alternative uaccess option. This is however not as precise as a kernel based test to measure the real speed of each method. This adds a simple test bench to show the time needed for each method. With this, the optimal size treshold for the alternative implementation can be determined with more confidence. It appears that the optimal threshold for both copy_to_user and clear_user is around 64 bytes. This is not a surprise knowing that the memcpy and memset implementations need at least 64 bytes to achieve maximum throughput. One might suggest that such test be used to determine the optimal threshold at run time instead, but results are near enough to 64 on tested targets concerned by this alternative copy_to_user implementation, so adding some overhead associated with a variable threshold is probably not worth it for now. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] lower overhead with alternative copy_to_user for small copiesNicolas Pitre2009-05-291-9/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the alternate copy_to_user implementation has a higher setup cost than the standard implementation, the size of the memory area to copy is tested and the standard implementation invoked instead when that size is too small. Still, that test is made after the processor has preserved a bunch of registers on the stack which have to be reloaded right away needlessly in that case, causing a measurable performance regression compared to plain usage of the standard implementation only. To make the size test overhead negligible, let's factorize it out of the alternate copy_to_user function where it is clear to the compiler that no stack frame is needed. Thanks to CONFIG_ARM_UNWIND allowing for frame pointers to be disabled and tail call optimization to kick in, the overhead in the small copy case becomes only 3 assembly instructions. A similar trick is applied to clear_user as well. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] alternative copy_to_user/clear_user implementationLennert Buytenhek2009-05-293-0/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements {copy_to,clear}_user() by faulting in the userland pages and then using the regular kernel mem{cpy,set}() to copy the data (while holding the page table lock). This is a win if the regular mem{cpy,set}() implementations are faster than the user copy functions, which is the case e.g. on Feroceon, where 8-word STMs (which memcpy() uses under the right conditions) give significantly higher memory write throughput than a sequence of individual 32bit stores. Here are numbers for page sized buffers on some Feroceon cores: - copy_to_user on Orion5x goes from 51 MB/s to 83 MB/s - clear_user on Orion5x goes from 89MB/s to 314MB/s - copy_to_user on Kirkwood goes from 240 MB/s to 356 MB/s - clear_user on Kirkwood goes from 367 MB/s to 1108 MB/s - copy_to_user on Disco-Duo goes from 248 MB/s to 398 MB/s - clear_user on Disco-Duo goes from 328 MB/s to 1741 MB/s Because the setup cost is non negligible, this is worthwhile only if the amount of data to copy is large enough. The operation falls back to the standard implementation when the amount of data is below a certain threshold. This threshold was determined empirically, however some targets could benefit from a lower runtime determined value for optimal results eventually. In the copy_from_user() case, this technique does not provide any worthwhile performance gain due to the fact that any kind of read access allocates the cache and subsequent 32bit loads are just as fast as the equivalent 8-word LDM. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Tested-by: Martin Michlmayr <tbm@cyrius.com>
| * [ARM] allow for alternative __copy_to_user/__clear_user implementationsNicolas Pitre2009-05-293-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows for optional alternative implementations of __copy_to_user and __clear_user, with a possible runtime fallback to the standard version when the alternative provides no gain over that standard version. This is done by making the standard __copy_to_user into a weak alias for the symbol __copy_to_user_std. Same thing for __clear_user. Those two functions are particularly good candidates to have alternative implementations for, since they rely on the STRT instruction which has lower performances than STM instructions on some CPU cores such as the ARM1176 and Marvell Feroceon. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* | [ARM] 5552/1: ep93xx get_uart_rate(): use EP93XX_SYSCON_PWRCNT and ↵Matthias Kaehlcke2009-06-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | EP93XX_SYSCON_PWRCN ep93xx: get_uart_rate() uses the constants EP93XX_SYSCON_CLOCK_CONTROL and EP93XX_SYSCON_CLOCK_UARTBAUD, which no longer exist. Use EP93XX_SYSCON_PWRCNT and EP93XX_SYSCON_PWRCNT_UARTBAUD instead Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 5544/1: Trust PrimeCell resource sizesLinus Walleij2009-06-118-9/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I found the PrimeCell/AMBA Bus drivers distrusting the resource passed in as part of the struct amba_device abstraction. This patch removes all hard coded resource sizes found in the PrimeCell drivers and move the responsibility of this definition back to the platform/board device definition, which already exist and appear to be correct for all in-tree users of these drivers. We do this using the resource_size() inline function which was also replicated in the only driver using the resource size, so that has been changed too. The KMI_SIZE was left in kmi.h in case someone likes it. Test-compiled against Versatile and Integrator defconfigs, seems to work but I don't posess these boards and cannot test them. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6 into develRussell King2009-06-1142-429/+1298
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/kernel/smp.c arch/arm/mach-realview/Makefile arch/arm/mach-realview/platsmp.c
| * | Fix the VFP handling on the Feroceon CPUCatalin Marinas2009-05-302-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CPU generates synchronous VFP exceptions in a non-standard way - the FPEXC.EX bit set but without the FPSCR.IXE bit being set like in the VFP subarchitecture 1 or just the FPEXC.DEX bit like in VFP subarchitecture 2. The main problem is that the faulty instruction (which needs to be emulated in software) will be restarted several times (normally until a context switch disables the VFP). This patch ensures that the VFP exception is treated as synchronous. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Nicolas Pitre <nico@cam.org>
| * | Add core support for ARMv6/v7 big-endianCatalin Marinas2009-05-3012-2/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting with ARMv6, the CPUs support the BE-8 variant of big-endian (byte-invariant). This patch adds the core support: - setting of the BE-8 mode via the CPSR.E register for both kernel and user threads - big-endian page table walking - REV used to rotate instructions read from memory during fault processing as they are still little-endian format - Kconfig and Makefile support for BE-8. The --be8 option must be passed to the final linking stage to convert the instructions to little-endian Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | RealView: Move the IRQ_* definitions out of the board-*.h filesCatalin Marinas2009-05-3013-461/+572
| | | | | | | | | | | | | | | | | | | | | The IRQ_* macros need to be made visible via the mach/irqs.h file but without the additional macros defined in the board-*.h files. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | arm: Provide _sdata and __bss_stop in the vmlinux.lds.S fileCatalin Marinas2009-05-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | _sdata and __bss_stop are common symbols defined by many architectures and made available to the kernel via asm-generic/sections.h. Kmemleak uses these symbols when scanning the data sections. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | ARMv7: Document the PRRR and NMRR registers settingCatalin Marinas2009-05-301-2/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a comment to the proc-v7.S file for the setting of the PRRR and NMRR registers. It also sets the PRRR[13:12] bits to 0 (corresponding to the reserved TEX[0]CB encoding 110) to be consistent with the documentation. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | ARMv7: Enable the SWP instructionCatalin Marinas2009-05-301-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SWP instruction has been deprecated starting with the ARMv6 architecture. On ARMv7 processors with the multiprocessor extensions (like Cortex-A9), this instruction is disabled by default but it can be enabled by setting bit 10 in the System Control register. Note that setting this bit is safe even if the ARMv7 processor has the SWP instruction enabled by default. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | Clear the IT state when invoking a Thumb-2 signal handlerCatalin Marinas2009-05-302-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | If a process is interrupted during an If-Then block and a signal is invoked, the ITSTATE bits must be cleared otherwise the handler would not run correctly. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Joseph S. Myers <joseph@codesourcery.com>
| * | ARMv7: Mark the PTWs inner WBWA on SMP and WB on UPTony Thompson2009-05-301-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are additional bits to set for the ARMv7 SMP extensions in the TTBR registers. The IRGN bits order is counter-intuitive but it allows software built for the ARMv7 base architecture to run on an implementation with the MP extensions. Signed-off-by: Tony Thompson <Anthony.Thompson@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | Check whether the TLB operations need broadcasting on SMP systemsCatalin Marinas2009-05-305-36/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARMv7 SMP hardware can handle the TLB maintenance operations broadcasting in hardware so that the software can avoid the costly IPIs. This patch adds the necessary checks (the MMFR3 CPUID register) to avoid the broadcasting if already supported by the hardware. (this patch is based on the work done by Tony Thompson @ ARM) Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | RealView: Toggle one LED per CPUCatalin Marinas2009-05-301-3/+4
| | | | | | | | | | | | | | | | | | | | | If CONFIG_LEDS is enabled, it makes more sense to toggle one LED per CPU in SMP systems rather than a single LED for all the CPUs. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | RealView: Allow CONFIG_LEDS on this platformColin Tuckley2009-05-301-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Colin Tuckley <Colin.Tuckley@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | RealView: Allow access to the secure flash memory block on PB1176Catalin Marinas2009-05-303-5/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a Kconfig option for specifying whether Linux will only be run in secure mode on the RealView PB1176 platform. Enabling it will make the secure flash memory block (64MB @ 0x3c000000) available to Linux. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | RealView: Add support for the RealView/PBX platformColin Tuckley2009-05-3011-6/+563
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is a RealView platform supporting core tiles with ARM11MPCore, Cortex-A8 or Cortex-A9 (multicore) processors. It has support for MMC, CompactFlash, PCI-E. Signed-off-by: Colin Tuckley <colin.tuckley@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | RealView: Allow SMP when the Cortex-A9 tile is enabled for EBCatalin Marinas2009-05-301-1/+1
| |/ | | | | | | Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | Merge branch 'w90x900' into develRussell King2009-06-1116-98/+1189
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| * | [ARM] 5550/1: Add default configure file for w90p910 platformwanzongshun2009-06-111-72/+351
| | | | | | | | | | | | | | | | | | | | | Add default configure file for w90p910 platform. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5549/1: Add clock api for w90p910 platform.wanzongshun2009-06-118-4/+164
| | | | | | | | | | | | | | | | | | | | | Add clock api for w90p910 platform. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5548/1: Add gpio api for w90p910 platformwanzongshun2009-06-114-1/+191
| | | | | | | | | | | | | | | | | | | | | Add gpio api for w90p910 platform. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5551/1: Add multi-function pin api for w90p910 platform.wanzongshun2009-06-112-1/+117
| | | | | | | | | | | | | | | | | | | | | Add multi-function pin api for w90p910 platform. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5512/1: Add w90p910 rtc,kpi and usbd device platform_device define.wanzongshun2009-05-181-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | Add rtc,kpi and usbd device platform_device define in arch/arm/mach-w90x900/mach-w90p910evb.c. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5511/1: Add w90p910 rtc,kpi and usbd device map_desc define.wanzongshun2009-05-181-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add rtc,kpi and usbd device map_desc define in /arch/arm/mach-w90x900/w90p910.c. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5499/1: Add Usb register controller header file dfinewanzongshun2009-05-071-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add Usb register controller header file dfine. w90p910 usb ip is standard,but some mutifunction controll pin must be special define in w90p910 Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5498/1: w90p910 Clock register controller header file dfinewanzongshun2009-05-071-0/+31
| | | | | | | | | | | | | | | | | | | | | Add Clock register controller header file dfine. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5497/1: Add usb and ts relevant kernel maping optionwanzongshun2009-05-071-4/+5
| | | | | | | | | | | | | | | | | | | | | Add drivers relevant kernel maping option. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5496/1: Add w90p910 touch screen driver relevant kernel parts[2/2].wanzongshun2009-05-071-0/+24
| | | | | | | | | | | | | | | | | | | | | Add this touch screen driver relevant kernel parts. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5495/1: Add w90p910 usb host driver relevant kernel parts[1/2]wanzongshun2009-05-071-4/+61
| | | | | | | | | | | | | | | | | | | | | Add this usb host driver relevant kernel parts. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5494/1: Add w90p910 irq number definewanzongshun2009-05-071-4/+45
| | | | | | | | | | | | | | | | | | | | | Add irq number define for driver will be submitted. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 5493/1: Add w90p910 IC interface controller regester mapwanzongshun2009-05-071-10/+91
| | | | | | | | | | | | | | | | | | | | | | | | Add w90p910 IC other interface controller regester map for driver will be submitted. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | [ARM] Make ARM_VIC_NR depend on ARM_VICRussell King2009-06-101-0/+1
| | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch for-rmk-devel of git://aeryn.fluff.org.uk/bjdooks/linux into develRussell King2009-06-10118-1358/+4529
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| * \ \ [ARM] S3C24XX: Merge devel-gpioBen Dooks2009-05-2138-627/+409
| |\ \ \ | | | | | | | | | | | | | | | Merge branch 'devel-gpio' into for-rmk-devel
| | * | | [ARM] S3C24XX: GPIO: Change usb-simtec.c to use gpiolib.Ben Dooks2009-05-182-9/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make arch/arm/mach-s3c2410/usb-simtec.c use gpiolib to manage gpio access. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: GPIO: Fix missing GPIOs in gpiolibBen Dooks2009-05-181-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPG bank has 16 IOs, not 10. Add the missing GPH bank. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: GPIO: Move gpiolib initialisation earlierBen Dooks2009-05-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The arch_initcall() is too late for board initialisation to use gpiolib when doing their machine specific initilisation via the .init_machine callback. Bring the file into line with the s3c64xx implementation and use the core_initcall() to register the GPIO chips. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: GPIO: Fix error returns from gpio functionsBen Dooks2009-05-183-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several GPIO functions have been returning -1 to indicate an error instead of returning a proper error code. Change to return -EINVAL for invalid argument(s). Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: GPIO: Change to macros for GPIO numberingBen Dooks2009-05-1829-291/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prepare to remove the large number of S3C2410_GPxn defines by moving to S3C2410_GPx(n) in arch/arm. The following perl was used to change the files: perl -pi~ -e 's/S3C2410_GP([A-Z])([0-9]+)([^_^0-9])/S3C2410_GP\1\(\2\)\3/g' Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: GPIO: Add S3C64XX style GPIO numberingBen Dooks2009-05-181-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the new style of GPIO numbering by using a single macro for each GPIO bank. This means S3C2410_GPA0 becomes S3C2410_GPA(0), and so on. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: GPIO: Start removal of S3C24XX_GPIO_BASEBen Dooks2009-05-181-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The S3C24XX_GPIO_BASE makes it difficult to compress the GPIO number space, and is only used in a few places of which everything outside arch/arm/plat-s3c24xx/gpiolib.c will be removed as soon as possible. Change gpiolib.c to use the S3C2410_GPxCON register addresses as the base for each bank, thus eliminating S3C24XX_GPIO_BASE. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: GPIO: Clean out unused definitions in <mach/regs-gpio.h>Ben Dooks2009-05-181-211/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The <mach/regs-gpio.h> really does not need the input and output pin configurations as these are standard and have a generic representation (plus the s3c24xx gpio specific code is going to be phased out soon). The following sed was applied to remove the lines: sed -i~ -e '/S3C2410_GP[A-Z][0-9]*_\INP/d' \ -e '/S3C2410_GP[A-Z][0-9]*_\OUTP/d' \ -e '/S3C2410_GPA[0-9]*_OUT/d' to remove these. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: Fix missing <linux/sysdev.h>Ben Dooks2009-05-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In our recent changes, arch/arm/plat-s3c24xx/gpiolib.c needs to have <linux/sysdev.h> included for it to build. This fixes the following error/warnings: arch/arm/plat-s3c/include/plat/pm.h:104: error: expected declaration specifiers or '...' before 'pm_message_t' arch/arm/plat-s3c/include/plat/pm.h:104: warning: 'struct sys_device' declared inside parameter list arch/arm/plat-s3c/include/plat/pm.h:104: warning: its scope is only this definition or declaration, which is probably not what you want arch/arm/plat-s3c/include/plat/pm.h:105: warning: 'struct sys_device' declared inside parameter list Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: GPIO: Move gpio functions out of <mach/hardware.h>Ben Dooks2009-05-1826-85/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move all the gpio functions out of <mach/hardware.h> as this file is for defining the generic IO base addresses for the kernel IO calls. Make a new header <mach/gpio-fns.h> to take this and include it via the chain from <linux/gpio.h> which is what most of these files should be using (and will be changed as soon as possible). Note, this does make minor changes to some drivers but should not mess up any pending merges. CC: Richard Purdie <rpurdie@rpsys.net> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> CC: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C24XX: GPIO: Remove pin specific input and output definesBen Dooks2009-05-178-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The use of S3C2410_GP[A-Z]x_INP and S3C2410_GP[A-Z]x_OUTP are very rare and are taking up large amounts of space in the regs-gpio.h header. The GPIO layer has had generic input and out defines called S3C2410_GPIO_INPUT and S3C2410_GPIO_OUTPUT for a while which work for all S3C24XX GPIOs. Do the following replacements: S3C2410_GP[A-Z][0-9]*_\OUTP => S3C2410_GPIO_OUTPUT S3C2410_GP[A-Z][0-9]*_\INP => /S3C2410_GPIO_INPUT S3C2410_GPA[0-9]*_OUT => S3C2410_GPIO_OUTPUT to remove any usages of these and prepare the header for the removal of these. The following command was used to acheive this: find . -type f -writable ! -name regs-gpio.h ! -name "*~" | xargs sed -i~ -e 's/S3C2410_GP[A-Z][0-9]*_\OUTP/S3C2410_GPIO_OUTPUT/g' -e 's/S3C2410_GP[A-Z][0-9]*_\INP/S3C2410_GPIO_INPUT/g' -e 's/S3C2410_GPA[0-9]*_OUT/S3C2410_GPIO_OUTPUT/g' Signed-off-by: Ben Dooks <ben-linux@fluff.org>
generated by cgit (git 2.34.1) at 2025-01-11 16:02:36 +0000