diff options
Diffstat (limited to 'include')
55 files changed, 442 insertions, 377 deletions
diff --git a/include/asm-alpha/emergency-restart.h b/include/asm-alpha/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-alpha/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-arm/arch-imx/imxfb.h b/include/asm-arm/arch-imx/imxfb.h index 2346d454ab9..7dbc7bbba65 100644 --- a/include/asm-arm/arch-imx/imxfb.h +++ b/include/asm-arm/arch-imx/imxfb.h @@ -25,6 +25,7 @@ struct imxfb_mach_info { u_int pcr; u_int pwmr; u_int lscr1; + u_int dmacr; u_char * fixed_screen_cpu; dma_addr_t fixed_screen_dma; diff --git a/include/asm-arm/arch-s3c2410/regs-iis.h b/include/asm-arm/arch-s3c2410/regs-iis.h index 385b07d510d..fdd62e8cd6c 100644 --- a/include/asm-arm/arch-s3c2410/regs-iis.h +++ b/include/asm-arm/arch-s3c2410/regs-iis.h @@ -15,6 +15,9 @@ * 12-03-2004 BJD Updated include protection * 07-03-2005 BJD Added FIFO size flags and S3C2440 MPLL * 05-04-2005 LCVR Added IISFCON definitions for the S3C2400 + * 18-07-2005 DA Change IISCON_MPLL to IISMOD_MPLL + * Correct IISMOD_256FS and IISMOD_384FS + * Add IISCON_PSCEN */ #ifndef __ASM_ARCH_REGS_IIS_H @@ -22,7 +25,6 @@ #define S3C2410_IISCON (0x00) -#define S3C2440_IISCON_MPLL (1<<9) #define S3C2410_IISCON_LRINDEX (1<<8) #define S3C2410_IISCON_TXFIFORDY (1<<7) #define S3C2410_IISCON_RXFIFORDY (1<<6) @@ -30,10 +32,12 @@ #define S3C2410_IISCON_RXDMAEN (1<<4) #define S3C2410_IISCON_TXIDLE (1<<3) #define S3C2410_IISCON_RXIDLE (1<<2) +#define S3C2410_IISCON_PSCEN (1<<1) #define S3C2410_IISCON_IISEN (1<<0) #define S3C2410_IISMOD (0x04) +#define S3C2440_IISMOD_MPLL (1<<9) #define S3C2410_IISMOD_SLAVE (1<<8) #define S3C2410_IISMOD_NOXFER (0<<6) #define S3C2410_IISMOD_RXMODE (1<<6) @@ -46,8 +50,8 @@ #define S3C2410_IISMOD_8BIT (0<<3) #define S3C2410_IISMOD_16BIT (1<<3) #define S3C2410_IISMOD_BITMASK (1<<3) -#define S3C2410_IISMOD_256FS (0<<1) -#define S3C2410_IISMOD_384FS (1<<1) +#define S3C2410_IISMOD_256FS (0<<2) +#define S3C2410_IISMOD_384FS (1<<2) #define S3C2410_IISMOD_16FS (0<<0) #define S3C2410_IISMOD_32FS (1<<0) #define S3C2410_IISMOD_48FS (2<<0) diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h index 4edd4dc40c5..c1adc6b3e86 100644 --- a/include/asm-arm/bitops.h +++ b/include/asm-arm/bitops.h @@ -21,8 +21,8 @@ #include <asm/system.h> -#define smp_mb__before_clear_bit() do { } while (0) -#define smp_mb__after_clear_bit() do { } while (0) +#define smp_mb__before_clear_bit() mb() +#define smp_mb__after_clear_bit() mb() /* * These functions are the basis of our bit ops. diff --git a/include/asm-arm/emergency-restart.h b/include/asm-arm/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-arm/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-arm/locks.h b/include/asm-arm/locks.h index c26298f3891..f08dc844791 100644 --- a/include/asm-arm/locks.h +++ b/include/asm-arm/locks.h @@ -28,7 +28,8 @@ " blmi " #fail \ : \ : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ + smp_mb(); \ }) #define __down_op_ret(ptr,fail) \ @@ -48,12 +49,14 @@ " mov %0, ip" \ : "=&r" (ret) \ : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ + smp_mb(); \ ret; \ }) #define __up_op(ptr,wake) \ ({ \ + smp_mb(); \ __asm__ __volatile__( \ "@ up_op\n" \ "1: ldrex lr, [%0]\n" \ @@ -61,12 +64,12 @@ " strex ip, lr, [%0]\n" \ " teq ip, #0\n" \ " bne 1b\n" \ -" teq lr, #0\n" \ +" cmp lr, #0\n" \ " movle ip, %0\n" \ " blle " #wake \ : \ : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ }) /* @@ -92,15 +95,17 @@ " blne " #fail \ : \ : "r" (ptr), "I" (RW_LOCK_BIAS) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ + smp_mb(); \ }) #define __up_op_write(ptr,wake) \ ({ \ + smp_mb(); \ __asm__ __volatile__( \ "@ up_op_read\n" \ "1: ldrex lr, [%0]\n" \ -" add lr, lr, %1\n" \ +" adds lr, lr, %1\n" \ " strex ip, lr, [%0]\n" \ " teq ip, #0\n" \ " bne 1b\n" \ @@ -108,7 +113,7 @@ " blcs " #wake \ : \ : "r" (ptr), "I" (RW_LOCK_BIAS) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ }) #define __down_op_read(ptr,fail) \ @@ -116,6 +121,7 @@ #define __up_op_read(ptr,wake) \ ({ \ + smp_mb(); \ __asm__ __volatile__( \ "@ up_op_read\n" \ "1: ldrex lr, [%0]\n" \ @@ -128,7 +134,7 @@ " bleq " #wake \ : \ : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ }) #else @@ -148,7 +154,8 @@ " blmi " #fail \ : \ : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ + smp_mb(); \ }) #define __down_op_ret(ptr,fail) \ @@ -169,12 +176,14 @@ " mov %0, ip" \ : "=&r" (ret) \ : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ + smp_mb(); \ ret; \ }) #define __up_op(ptr,wake) \ ({ \ + smp_mb(); \ __asm__ __volatile__( \ "@ up_op\n" \ " mrs ip, cpsr\n" \ @@ -188,7 +197,7 @@ " blle " #wake \ : \ : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ }) /* @@ -215,7 +224,8 @@ " blne " #fail \ : \ : "r" (ptr), "I" (RW_LOCK_BIAS) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ + smp_mb(); \ }) #define __up_op_write(ptr,wake) \ @@ -233,7 +243,8 @@ " blcs " #wake \ : \ : "r" (ptr), "I" (RW_LOCK_BIAS) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ + smp_mb(); \ }) #define __down_op_read(ptr,fail) \ @@ -241,6 +252,7 @@ #define __up_op_read(ptr,wake) \ ({ \ + smp_mb(); \ __asm__ __volatile__( \ "@ up_op_read\n" \ " mrs ip, cpsr\n" \ @@ -254,7 +266,7 @@ " bleq " #wake \ : \ : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc", "memory"); \ + : "ip", "lr", "cc"); \ }) #endif diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h index 182323619ca..1f906d09b68 100644 --- a/include/asm-arm/spinlock.h +++ b/include/asm-arm/spinlock.h @@ -8,9 +8,10 @@ /* * ARMv6 Spin-locking. * - * We (exclusively) read the old value, and decrement it. If it - * hits zero, we may have won the lock, so we try (exclusively) - * storing it. + * We exclusively read the old value. If it is zero, we may have + * won the lock, so we try exclusively storing it. A memory barrier + * is required after we get a lock, and before we release it, because + * V6 CPUs are assumed to have weakly ordered memory. * * Unlocked value: 0 * Locked value: 1 @@ -41,7 +42,9 @@ static inline void _raw_spin_lock(spinlock_t *lock) " bne 1b" : "=&r" (tmp) : "r" (&lock->lock), "r" (1) - : "cc", "memory"); + : "cc"); + + smp_mb(); } static inline int _raw_spin_trylock(spinlock_t *lock) @@ -54,18 +57,25 @@ static inline int _raw_spin_trylock(spinlock_t *lock) " strexeq %0, %2, [%1]" : "=&r" (tmp) : "r" (&lock->lock), "r" (1) - : "cc", "memory"); - - return tmp == 0; + : "cc"); + + if (tmp == 0) { + smp_mb(); + return 1; + } else { + return 0; + } } static inline void _raw_spin_unlock(spinlock_t *lock) { + smp_mb(); + __asm__ __volatile__( " str %1, [%0]" : : "r" (&lock->lock), "r" (0) - : "cc", "memory"); + : "cc"); } /* @@ -79,7 +89,8 @@ typedef struct { } rwlock_t; #define RW_LOCK_UNLOCKED (rwlock_t) { 0 } -#define rwlock_init(x) do { *(x) + RW_LOCK_UNLOCKED; } while (0) +#define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while (0) +#define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0) /* * Write locks are easy - we just set bit 31. When unlocking, we can @@ -97,16 +108,40 @@ static inline void _raw_write_lock(rwlock_t *rw) " bne 1b" : "=&r" (tmp) : "r" (&rw->lock), "r" (0x80000000) - : "cc", "memory"); + : "cc"); + + smp_mb(); +} + +static inline int _raw_write_trylock(rwlock_t *rw) +{ + unsigned long tmp; + + __asm__ __volatile__( +"1: ldrex %0, [%1]\n" +" teq %0, #0\n" +" strexeq %0, %2, [%1]" + : "=&r" (tmp) + : "r" (&rw->lock), "r" (0x80000000) + : "cc"); + + if (tmp == 0) { + smp_mb(); + return 1; + } else { + return 0; + } } static inline void _raw_write_unlock(rwlock_t *rw) { + smp_mb(); + __asm__ __volatile__( "str %1, [%0]" : : "r" (&rw->lock), "r" (0) - : "cc", "memory"); + : "cc"); } /* @@ -133,11 +168,17 @@ static inline void _raw_read_lock(rwlock_t *rw) " bmi 1b" : "=&r" (tmp), "=&r" (tmp2) : "r" (&rw->lock) - : "cc", "memory"); + : "cc"); + + smp_mb(); } static inline void _raw_read_unlock(rwlock_t *rw) { + unsigned long tmp, tmp2; + + smp_mb(); + __asm__ __volatile__( "1: ldrex %0, [%2]\n" " sub %0, %0, #1\n" @@ -146,24 +187,9 @@ static inline void _raw_read_unlock(rwlock_t *rw) " bne 1b" : "=&r" (tmp), "=&r" (tmp2) : "r" (&rw->lock) - : "cc", "memory"); + : "cc"); } #define _raw_read_trylock(lock) generic_raw_read_trylock(lock) -static inline int _raw_write_trylock(rwlock_t *rw) -{ - unsigned long tmp; - - __asm__ __volatile__( -"1: ldrex %0, [%1]\n" -" teq %0, #0\n" -" strexeq %0, %2, [%1]" - : "=&r" (tmp) - : "r" (&rw->lock), "r" (0x80000000) - : "cc", "memory"); - - return tmp == 0; -} - #endif /* __ASM_SPINLOCK_H */ diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index 2f44b204421..8efa4ebdcac 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -139,7 +139,12 @@ extern unsigned int user_debug; #define vectors_high() (0) #endif +#if __LINUX_ARM_ARCH__ >= 6 +#define mb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ + : : "r" (0) : "memory") +#else #define mb() __asm__ __volatile__ ("" : : : "memory") +#endif #define rmb() mb() #define wmb() mb() #define read_barrier_depends() do { } while(0) @@ -323,12 +328,8 @@ do { \ * NOTE that this solution won't work on an SMP system, so explcitly * forbid it here. */ -#ifdef CONFIG_SMP -#error SMP is not supported on SA1100/SA110 -#else #define swp_is_buggy #endif -#endif static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) { @@ -337,35 +338,68 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size #ifdef swp_is_buggy unsigned long flags; #endif +#if __LINUX_ARM_ARCH__ >= 6 + unsigned int tmp; +#endif switch (size) { -#ifdef swp_is_buggy - case 1: - local_irq_save(flags); - ret = *(volatile unsigned char *)ptr; - *(volatile unsigned char *)ptr = x; - local_irq_restore(flags); - break; - - case 4: - local_irq_save(flags); - ret = *(volatile unsigned long *)ptr; - *(volatile unsigned long *)ptr = x; - local_irq_restore(flags); - break; +#if __LINUX_ARM_ARCH__ >= 6 + case 1: + asm volatile("@ __xchg1\n" + "1: ldrexb %0, [%3]\n" + " strexb %1, %2, [%3]\n" + " teq %1, #0\n" + " bne 1b" + : "=&r" (ret), "=&r" (tmp) + : "r" (x), "r" (ptr) + : "memory", "cc"); + break; + case 4: + asm volatile("@ __xchg4\n" + "1: ldrex %0, [%3]\n" + " strex %1, %2, [%3]\n" + " teq %1, #0\n" + " bne 1b" + : "=&r" (ret), "=&r" (tmp) + : "r" (x), "r" (ptr) + : "memory", "cc"); + break; +#elif defined(swp_is_buggy) +#ifdef CONFIG_SMP +#error SMP is not supported on this platform +#endif + case 1: + local_irq_save(flags); + ret = *(volatile unsigned char *)ptr; + *(volatile unsigned char *)ptr = x; + local_irq_restore(flags); + break; + + case 4: + local_irq_save(flags); + ret = *(volatile unsigned long *)ptr; + *(volatile unsigned long *)ptr = x; + local_irq_restore(flags); + break; #else - case 1: __asm__ __volatile__ ("swpb %0, %1, [%2]" - : "=&r" (ret) - : "r" (x), "r" (ptr) - : "memory", "cc"); - break; - case 4: __asm__ __volatile__ ("swp %0, %1, [%2]" - : "=&r" (ret) - : "r" (x), "r" (ptr) - : "memory", "cc"); - break; + case 1: + asm volatile("@ __xchg1\n" + " swpb %0, %1, [%2]" + : "=&r" (ret) + : "r" (x), "r" (ptr) + : "memory", "cc"); + break; + case 4: + asm volatile("@ __xchg4\n" + " swp %0, %1, [%2]" + : "=&r" (ret) + : "r" (x), "r" (ptr) + : "memory", "cc"); + break; #endif - default: __bad_xchg(ptr, size), ret = 0; + default: + __bad_xchg(ptr, size), ret = 0; + break; } return ret; diff --git a/include/asm-arm26/emergency-restart.h b/include/asm-arm26/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-arm26/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-cris/emergency-restart.h b/include/asm-cris/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-cris/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-frv/emergency-restart.h b/include/asm-frv/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-frv/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-generic/emergency-restart.h b/include/asm-generic/emergency-restart.h new file mode 100644 index 00000000000..0d68a1eae98 --- /dev/null +++ b/include/asm-generic/emergency-restart.h @@ -0,0 +1,9 @@ +#ifndef _ASM_GENERIC_EMERGENCY_RESTART_H +#define _ASM_GENERIC_EMERGENCY_RESTART_H + +static inline void machine_emergency_restart(void) +{ + machine_restart(NULL); +} + +#endif /* _ASM_GENERIC_EMERGENCY_RESTART_H */ diff --git a/include/asm-h8300/emergency-restart.h b/include/asm-h8300/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-h8300/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-i386/emergency-restart.h b/include/asm-i386/emergency-restart.h new file mode 100644 index 00000000000..680c3956334 --- /dev/null +++ b/include/asm-i386/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +extern void machine_emergency_restart(void); + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-i386/i387.h b/include/asm-i386/i387.h index f6feb98a939..6747006743f 100644 --- a/include/asm-i386/i387.h +++ b/include/asm-i386/i387.h @@ -19,10 +19,21 @@ extern void mxcsr_feature_mask_init(void); extern void init_fpu(struct task_struct *); + /* * FPU lazy state save handling... */ -extern void restore_fpu( struct task_struct *tsk ); + +/* + * The "nop" is needed to make the instructions the same + * length. + */ +#define restore_fpu(tsk) \ + alternative_input( \ + "nop ; frstor %1", \ + "fxrstor %1", \ + X86_FEATURE_FXSR, \ + "m" ((tsk)->thread.i387.fxsave)) extern void kernel_fpu_begin(void); #define kernel_fpu_end() do { stts(); preempt_enable(); } while(0) @@ -32,13 +43,12 @@ extern void kernel_fpu_begin(void); */ static inline void __save_init_fpu( struct task_struct *tsk ) { - if ( cpu_has_fxsr ) { - asm volatile( "fxsave %0 ; fnclex" - : "=m" (tsk->thread.i387.fxsave) ); - } else { - asm volatile( "fnsave %0 ; fwait" - : "=m" (tsk->thread.i387.fsave) ); - } + alternative_input( + "fnsave %1 ; fwait ;" GENERIC_NOP2, + "fxsave %1 ; fnclex", + X86_FEATURE_FXSR, + "m" (tsk->thread.i387.fxsave) + :"memory"); tsk->thread_info->status &= ~TS_USEDFPU; } diff --git a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h index eef9f93870d..b926cb4f4cf 100644 --- a/include/asm-i386/ptrace.h +++ b/include/asm-i386/ptrace.h @@ -57,14 +57,21 @@ struct pt_regs { #ifdef __KERNEL__ struct task_struct; extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code); -#define user_mode(regs) (3 & (regs)->xcs) -#define user_mode_vm(regs) ((VM_MASK & (regs)->eflags) || user_mode(regs)) + +static inline int user_mode(struct pt_regs *regs) +{ + return (regs->xcs & 3) != 0; +} +static inline int user_mode_vm(struct pt_regs *regs) +{ + return ((regs->xcs & 3) | (regs->eflags & VM_MASK)) != 0; +} #define instruction_pointer(regs) ((regs)->eip) #if defined(CONFIG_SMP) && defined(CONFIG_FRAME_POINTER) extern unsigned long profile_pc(struct pt_regs *regs); #else #define profile_pc(regs) instruction_pointer(regs) #endif -#endif +#endif /* __KERNEL__ */ #endif diff --git a/include/asm-ia64/emergency-restart.h b/include/asm-ia64/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-ia64/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-m32r/emergency-restart.h b/include/asm-m32r/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-m32r/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-m68k/emergency-restart.h b/include/asm-m68k/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-m68k/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-m68knommu/emergency-restart.h b/include/asm-m68knommu/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-m68knommu/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-mips/emergency-restart.h b/include/asm-mips/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-mips/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-parisc/emergency-restart.h b/include/asm-parisc/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-parisc/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-ppc/emergency-restart.h b/include/asm-ppc/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-ppc/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-ppc64/emergency-restart.h b/include/asm-ppc64/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-ppc64/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-s390/emergency-restart.h b/include/asm-s390/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-s390/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-sh/emergency-restart.h b/include/asm-sh/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-sh/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-sh64/emergency-restart.h b/include/asm-sh64/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-sh64/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-sparc/emergency-restart.h b/include/asm-sparc/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-sparc/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-sparc64/bitops.h b/include/asm-sparc64/bitops.h index 9d722dc8cca..9c5e7197028 100644 --- a/include/asm-sparc64/bitops.h +++ b/include/asm-sparc64/bitops.h @@ -20,52 +20,52 @@ extern void change_bit(unsigned long nr, volatile unsigned long *addr); /* "non-atomic" versions... */ -static __inline__ void __set_bit(int nr, volatile unsigned long *addr) +static inline void __set_bit(int nr, volatile unsigned long *addr) { - volatile unsigned long *m = addr + (nr >> 6); + unsigned long *m = ((unsigned long *)addr) + (nr >> 6); *m |= (1UL << (nr & 63)); } -static __inline__ void __clear_bit(int nr, volatile unsigned long *addr) +static inline void __clear_bit(int nr, volatile unsigned long *addr) { - volatile unsigned long *m = addr + (nr >> 6); + unsigned long *m = ((unsigned long *)addr) + (nr >> 6); *m &= ~(1UL << (nr & 63)); } -static __inline__ void __change_bit(int nr, volatile unsigned long *addr) +static inline void __change_bit(int nr, volatile unsigned long *addr) { - volatile unsigned long *m = addr + (nr >> 6); + unsigned long *m = ((unsigned long *)addr) + (nr >> 6); *m ^= (1UL << (nr & 63)); } -static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr) +static inline int __test_and_set_bit(int nr, volatile unsigned long *addr) { - volatile unsigned long *m = addr + (nr >> 6); - long old = *m; - long mask = (1UL << (nr & 63)); + unsigned long *m = ((unsigned long *)addr) + (nr >> 6); + unsigned long old = *m; + unsigned long mask = (1UL << (nr & 63)); *m = (old | mask); return ((old & mask) != 0); } -static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr) +static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr) { - volatile unsigned long *m = addr + (nr >> 6); - long old = *m; - long mask = (1UL << (nr & 63)); + unsigned long *m = ((unsigned long *)addr) + (nr >> 6); + unsigned long old = *m; + unsigned long mask = (1UL << (nr & 63)); *m = (old & ~mask); return ((old & mask) != 0); } -static __inline__ int __test_and_change_bit(int nr, volatile unsigned long *addr) +static inline int __test_and_change_bit(int nr, volatile unsigned long *addr) { - volatile unsigned long *m = addr + (nr >> 6); - long old = *m; - long mask = (1UL << (nr & 63)); + unsigned long *m = ((unsigned long *)addr) + (nr >> 6); + unsigned long old = *m; + unsigned long mask = (1UL << (nr & 63)); *m = (old ^ mask); return ((old & mask) != 0); @@ -79,13 +79,13 @@ static __inline__ int __test_and_change_bit(int nr, volatile unsigned long *addr #define smp_mb__after_clear_bit() barrier() #endif -static __inline__ int test_bit(int nr, __const__ volatile unsigned long *addr) +static inline int test_bit(int nr, __const__ volatile unsigned long *addr) { - return (1UL & ((addr)[nr >> 6] >> (nr & 63))) != 0UL; + return (1UL & (addr[nr >> 6] >> (nr & 63))) != 0UL; } /* The easy/cheese version for now. */ -static __inline__ unsigned long ffz(unsigned long word) +static inline unsigned long ffz(unsigned long word) { unsigned long result; @@ -103,7 +103,7 @@ static __inline__ unsigned long ffz(unsigned long word) * * Undefined if no bit exists, so code should check against 0 first. */ -static __inline__ unsigned long __ffs(unsigned long word) +static inline unsigned long __ffs(unsigned long word) { unsigned long result = 0; @@ -144,7 +144,7 @@ static inline int sched_find_first_bit(unsigned long *b) * the libc and compiler builtin ffs routines, therefore * differs in spirit from the above ffz (man ffs). */ -static __inline__ int ffs(int x) +static inline int ffs(int x) { if (!x) return 0; @@ -158,7 +158,7 @@ static __inline__ int ffs(int x) #ifdef ULTRA_HAS_POPULATION_COUNT -static __inline__ unsigned int hweight64(unsigned long w) +static inline unsigned int hweight64(unsigned long w) { unsigned int res; @@ -166,7 +166,7 @@ static __inline__ unsigned int hweight64(unsigned long w) return res; } -static __inline__ unsigned int hweight32(unsigned int w) +static inline unsigned int hweight32(unsigned int w) { unsigned int res; @@ -174,7 +174,7 @@ static __inline__ unsigned int hweight32(unsigned int w) return res; } -static __inline__ unsigned int hweight16(unsigned int w) +static inline unsigned int hweight16(unsigned int w) { unsigned int res; @@ -182,7 +182,7 @@ static __inline__ unsigned int hweight16(unsigned int w) return res; } -static __inline__ unsigned int hweight8(unsigned int w) +static inline unsigned int hweight8(unsigned int w) { unsigned int res; @@ -236,7 +236,7 @@ extern unsigned long find_next_zero_bit(const unsigned long *, #define test_and_clear_le_bit(nr,addr) \ test_and_clear_bit((nr) ^ 0x38, (addr)) -static __inline__ int test_le_bit(int nr, __const__ unsigned long * addr) +static inline int test_le_bit(int nr, __const__ unsigned long * addr) { int mask; __const__ unsigned char *ADDR = (__const__ unsigned char *) addr; diff --git a/include/asm-sparc64/emergency-restart.h b/include/asm-sparc64/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-sparc64/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-sparc64/ptrace.h b/include/asm-sparc64/ptrace.h index 2d2b5a113d2..6194f771e9f 100644 --- a/include/asm-sparc64/ptrace.h +++ b/include/asm-sparc64/ptrace.h @@ -94,8 +94,9 @@ struct sparc_trapf { #define STACKFRAME32_SZ sizeof(struct sparc_stackf32) #ifdef __KERNEL__ -#define force_successful_syscall_return() \ - set_thread_flag(TIF_SYSCALL_SUCCESS) +#define force_successful_syscall_return() \ +do { current_thread_info()->syscall_noerror = 1; \ +} while (0) #define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) #define instruction_pointer(regs) ((regs)->tpc) #ifdef CONFIG_SMP diff --git a/include/asm-sparc64/rwsem.h b/include/asm-sparc64/rwsem.h index a1cc94f9598..4568ee4022d 100644 --- a/include/asm-sparc64/rwsem.h +++ b/include/asm-sparc64/rwsem.h @@ -46,54 +46,14 @@ extern void __up_read(struct rw_semaphore *sem); extern void __up_write(struct rw_semaphore *sem); extern void __downgrade_write(struct rw_semaphore *sem); -static __inline__ int rwsem_atomic_update(int delta, struct rw_semaphore *sem) +static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) { - int tmp = delta; - - __asm__ __volatile__( - "1:\tlduw [%2], %%g1\n\t" - "add %%g1, %1, %%g7\n\t" - "cas [%2], %%g1, %%g7\n\t" - "cmp %%g1, %%g7\n\t" - "membar #StoreLoad | #StoreStore\n\t" - "bne,pn %%icc, 1b\n\t" - " nop\n\t" - "mov %%g7, %0\n\t" - : "=&r" (tmp) - : "0" (tmp), "r" (sem) - : "g1", "g7", "memory", "cc"); - - return tmp + delta; -} - -#define rwsem_atomic_add rwsem_atomic_update - -static __inline__ __u16 rwsem_cmpxchgw(struct rw_semaphore *sem, __u16 __old, __u16 __new) -{ - u32 old = (sem->count & 0xffff0000) | (u32) __old; - u32 new = (old & 0xffff0000) | (u32) __new; - u32 prev; - -again: - __asm__ __volatile__("cas [%2], %3, %0\n\t" - "membar #StoreLoad | #StoreStore" - : "=&r" (prev) - : "0" (new), "r" (sem), "r" (old) - : "memory"); - - /* To give the same semantics as x86 cmpxchgw, keep trying - * if only the upper 16-bits changed. - */ - if (prev != old && - ((prev & 0xffff) == (old & 0xffff))) - goto again; - - return prev & 0xffff; + return atomic_add_return(delta, (atomic_t *)(&sem->count)); } -static __inline__ signed long rwsem_cmpxchg(struct rw_semaphore *sem, signed long old, signed long new) +static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) { - return cmpxchg(&sem->count,old,new); + atomic_add(delta, (atomic_t *)(&sem->count)); } #endif /* __KERNEL__ */ diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h index 1aa932773af..962638c9d12 100644 --- a/include/asm-sparc64/spitfire.h +++ b/include/asm-sparc64/spitfire.h @@ -56,52 +56,6 @@ extern void cheetah_enable_pcache(void); SPITFIRE_HIGHEST_LOCKED_TLBENT : \ CHEETAH_HIGHEST_LOCKED_TLBENT) -static __inline__ unsigned long spitfire_get_isfsr(void) -{ - unsigned long ret; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (ret) - : "r" (TLB_SFSR), "i" (ASI_IMMU)); - return ret; -} - -static __inline__ unsigned long spitfire_get_dsfsr(void) -{ - unsigned long ret; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (ret) - : "r" (TLB_SFSR), "i" (ASI_DMMU)); - return ret; -} - -static __inline__ unsigned long spitfire_get_sfar(void) -{ - unsigned long ret; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (ret) - : "r" (DMMU_SFAR), "i" (ASI_DMMU)); - return ret; -} - -static __inline__ void spitfire_put_isfsr(unsigned long sfsr) -{ - __asm__ __volatile__("stxa %0, [%1] %2\n\t" - "membar #Sync" - : /* no outputs */ - : "r" (sfsr), "r" (TLB_SFSR), "i" (ASI_IMMU)); -} - -static __inline__ void spitfire_put_dsfsr(unsigned long sfsr) -{ - __asm__ __volatile__("stxa %0, [%1] %2\n\t" - "membar #Sync" - : /* no outputs */ - : "r" (sfsr), "r" (TLB_SFSR), "i" (ASI_DMMU)); -} - /* The data cache is write through, so this just invalidates the * specified line. */ @@ -193,90 +147,6 @@ static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data) "i" (ASI_ITLB_DATA_ACCESS)); } -/* Spitfire hardware assisted TLB flushes. */ - -/* Context level flushes. */ -static __inline__ void spitfire_flush_dtlb_primary_context(void) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (0x40), "i" (ASI_DMMU_DEMAP)); -} - -static __inline__ void spitfire_flush_itlb_primary_context(void) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (0x40), "i" (ASI_IMMU_DEMAP)); -} - -static __inline__ void spitfire_flush_dtlb_secondary_context(void) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (0x50), "i" (ASI_DMMU_DEMAP)); -} - -static __inline__ void spitfire_flush_itlb_secondary_context(void) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (0x50), "i" (ASI_IMMU_DEMAP)); -} - -static __inline__ void spitfire_flush_dtlb_nucleus_context(void) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (0x60), "i" (ASI_DMMU_DEMAP)); -} - -static __inline__ void spitfire_flush_itlb_nucleus_context(void) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (0x60), "i" (ASI_IMMU_DEMAP)); -} - -/* Page level flushes. */ -static __inline__ void spitfire_flush_dtlb_primary_page(unsigned long page) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (page), "i" (ASI_DMMU_DEMAP)); -} - -static __inline__ void spitfire_flush_itlb_primary_page(unsigned long page) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (page), "i" (ASI_IMMU_DEMAP)); -} - -static __inline__ void spitfire_flush_dtlb_secondary_page(unsigned long page) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (page | 0x10), "i" (ASI_DMMU_DEMAP)); -} - -static __inline__ void spitfire_flush_itlb_secondary_page(unsigned long page) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (page | 0x10), "i" (ASI_IMMU_DEMAP)); -} - static __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page) { __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index f9be2c5b4dc..ee4bdfc6b88 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h @@ -190,24 +190,23 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \ "wrpr %%g1, %%cwp\n\t" \ "ldx [%%g6 + %3], %%o6\n\t" \ "ldub [%%g6 + %2], %%o5\n\t" \ - "ldx [%%g6 + %4], %%o7\n\t" \ + "ldub [%%g6 + %4], %%o7\n\t" \ "mov %%g6, %%l2\n\t" \ "wrpr %%o5, 0x0, %%wstate\n\t" \ "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \ "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \ "wrpr %%g0, 0x94, %%pstate\n\t" \ "mov %%l2, %%g6\n\t" \ - "ldx [%%g6 + %7], %%g4\n\t" \ + "ldx [%%g6 + %6], %%g4\n\t" \ "wrpr %%g0, 0x96, %%pstate\n\t" \ - "andcc %%o7, %6, %%g0\n\t" \ - "beq,pt %%icc, 1f\n\t" \ + "brz,pt %%o7, 1f\n\t" \ " mov %%g7, %0\n\t" \ "b,a ret_from_syscall\n\t" \ "1:\n\t" \ : "=&r" (last) \ : "0" (next->thread_info), \ - "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_FLAGS), "i" (TI_CWP), \ - "i" (_TIF_NEWCHILD), "i" (TI_TASK) \ + "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \ + "i" (TI_CWP), "i" (TI_TASK) \ : "cc", \ "g1", "g2", "g3", "g7", \ "l2", "l3", "l4", "l5", "l6", "l7", \ diff --git a/include/asm-sparc64/thread_info.h b/include/asm-sparc64/thread_info.h index a1d25c06f92..352d9943661 100644 --- a/include/asm-sparc64/thread_info.h +++ b/include/asm-sparc64/thread_info.h @@ -47,7 +47,9 @@ struct thread_info { struct pt_regs *kregs; struct exec_domain *exec_domain; int preempt_count; /* 0 => preemptable, <0 => BUG */ - int __pad; + __u8 new_child; + __u8 syscall_noerror; + __u16 __pad; unsigned long *utraps; @@ -87,6 +89,8 @@ struct thread_info { #define TI_KREGS 0x00000028 #define TI_EXEC_DOMAIN 0x00000030 #define TI_PRE_COUNT 0x00000038 +#define TI_NEW_CHILD 0x0000003c +#define TI_SYS_NOERROR 0x0000003d #define TI_UTRAPS 0x00000040 #define TI_REG_WINDOW 0x00000048 #define TI_RWIN_SPTRS 0x000003c8 @@ -219,10 +223,10 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */ #define TIF_NEWSIGNALS 6 /* wants new-style signals */ #define TIF_32BIT 7 /* 32-bit binary */ -#define TIF_NEWCHILD 8 /* just-spawned child process */ +/* flag bit 8 is available */ #define TIF_SECCOMP 9 /* secure computing */ #define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */ -#define TIF_SYSCALL_SUCCESS 11 +/* flag bit 11 is available */ /* NOTE: Thread flags >= 12 should be ones we have no interest * in using in assembly, else we can't use the mask as * an immediate value in instructions such as andcc. @@ -239,10 +243,8 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define _TIF_UNALIGNED (1<<TIF_UNALIGNED) #define _TIF_NEWSIGNALS (1<<TIF_NEWSIGNALS) #define _TIF_32BIT (1<<TIF_32BIT) -#define _TIF_NEWCHILD (1<<TIF_NEWCHILD) #define _TIF_SECCOMP (1<<TIF_SECCOMP) #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) -#define _TIF_SYSCALL_SUCCESS (1<<TIF_SYSCALL_SUCCESS) #define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) diff --git a/include/asm-sparc64/timer.h b/include/asm-sparc64/timer.h index ba33a2b6b7b..edc8e08c3a3 100644 --- a/include/asm-sparc64/timer.h +++ b/include/asm-sparc64/timer.h @@ -9,49 +9,8 @@ #include <linux/types.h> -/* How timers work: - * - * On uniprocessors we just use counter zero for the system wide - * ticker, this performs thread scheduling, clock book keeping, - * and runs timer based events. Previously we used the Ultra - * %tick interrupt for this purpose. - * - * On multiprocessors we pick one cpu as the master level 10 tick - * processor. Here this counter zero tick handles clock book - * keeping and timer events only. Each Ultra has it's level - * 14 %tick interrupt set to fire off as well, even the master - * tick cpu runs this locally. This ticker performs thread - * scheduling, system/user tick counting for the current thread, - * and also profiling if enabled. - */ - #include <linux/config.h> -/* Two timers, traditionally steered to PIL's 10 and 14 respectively. - * But since INO packets are used on sun5, we could use any PIL level - * we like, however for now we use the normal ones. - * - * The 'reg' and 'interrupts' properties for these live in nodes named - * 'counter-timer'. The first of three 'reg' properties describe where - * the sun5_timer registers are. The other two I have no idea. (XXX) - */ -struct sun5_timer { - u64 count0; - u64 limit0; - u64 count1; - u64 limit1; -}; - -#define SUN5_LIMIT_ENABLE 0x80000000 -#define SUN5_LIMIT_TOZERO 0x40000000 -#define SUN5_LIMIT_ZRESTART 0x20000000 -#define SUN5_LIMIT_CMASK 0x1fffffff - -/* Given a HZ value, set the limit register to so that the timer IRQ - * gets delivered that often. - */ -#define SUN5_HZ_TO_LIMIT(__hz) (1000000/(__hz)) - struct sparc64_tick_ops { void (*init_tick)(unsigned long); unsigned long (*get_tick)(void); diff --git a/include/asm-um/emergency-restart.h b/include/asm-um/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-um/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-v850/emergency-restart.h b/include/asm-v850/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-v850/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-x86_64/emergency-restart.h b/include/asm-x86_64/emergency-restart.h new file mode 100644 index 00000000000..680c3956334 --- /dev/null +++ b/include/asm-x86_64/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +extern void machine_emergency_restart(void); + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-x86_64/ia32_unistd.h b/include/asm-x86_64/ia32_unistd.h index f3b7111cf33..d5166ec3868 100644 --- a/include/asm-x86_64/ia32_unistd.h +++ b/include/asm-x86_64/ia32_unistd.h @@ -294,7 +294,12 @@ #define __NR_ia32_add_key 286 #define __NR_ia32_request_key 287 #define __NR_ia32_keyctl 288 +#define __NR_ia32_ioprio_set 289 +#define __NR_ia32_ioprio_get 290 +#define __NR_ia32_inotify_init 291 +#define __NR_ia32_inotify_add_watch 292 +#define __NR_ia32_inotify_rm_watch 293 -#define IA32_NR_syscalls 290 /* must be > than biggest syscall! */ +#define IA32_NR_syscalls 294 /* must be > than biggest syscall! */ #endif /* _ASM_X86_64_IA32_UNISTD_H_ */ diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h index 6560439a83e..11ba931cf82 100644 --- a/include/asm-x86_64/unistd.h +++ b/include/asm-x86_64/unistd.h @@ -565,8 +565,14 @@ __SYSCALL(__NR_keyctl, sys_keyctl) __SYSCALL(__NR_ioprio_set, sys_ioprio_set) #define __NR_ioprio_get 252 __SYSCALL(__NR_ioprio_get, sys_ioprio_get) - -#define __NR_syscall_max __NR_ioprio_get +#define __NR_inotify_init 253 +__SYSCALL(__NR_inotify_init, sys_inotify_init) +#define __NR_inotify_add_watch 254 +__SYSCALL(__NR_inotify_add_watch, sys_inotify_add_watch) +#define __NR_inotify_rm_watch 255 +__SYSCALL(__NR_inotify_rm_watch, sys_inotify_rm_watch) + +#define __NR_syscall_max __NR_inotify_rm_watch #ifndef __NO_STUBS /* user-visible error numbers are in the range -1 - -4095 */ diff --git a/include/asm-xtensa/emergency-restart.h b/include/asm-xtensa/emergency-restart.h new file mode 100644 index 00000000000..108d8c48e42 --- /dev/null +++ b/include/asm-xtensa/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +#include <asm-generic/emergency-restart.h> + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/linux/netfilter_ipv4/ip_conntrack.h b/include/linux/netfilter_ipv4/ip_conntrack.h index 3781192ce15..08fe5f7d14a 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack.h +++ b/include/linux/netfilter_ipv4/ip_conntrack.h @@ -197,6 +197,9 @@ struct ip_conntrack_expect /* Timer function; deletes the expectation. */ struct timer_list timeout; + /* Usage count. */ + atomic_t use; + #ifdef CONFIG_IP_NF_NAT_NEEDED /* This is the original per-proto part, used to map the * expected connection the way the recipient expects. */ @@ -236,7 +239,7 @@ ip_conntrack_get(const struct sk_buff *skb, enum ip_conntrack_info *ctinfo) } /* decrement reference count on a conntrack */ -extern inline void ip_conntrack_put(struct ip_conntrack *ct); +extern void ip_conntrack_put(struct ip_conntrack *ct); /* call to create an explicit dependency on ip_conntrack. */ extern void need_ip_conntrack(void); diff --git a/include/linux/netfilter_ipv4/ip_conntrack_helper.h b/include/linux/netfilter_ipv4/ip_conntrack_helper.h index b1bbba0a12c..3692daa93de 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_helper.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_helper.h @@ -30,9 +30,10 @@ extern int ip_conntrack_helper_register(struct ip_conntrack_helper *); extern void ip_conntrack_helper_unregister(struct ip_conntrack_helper *); /* Allocate space for an expectation: this is mandatory before calling - ip_conntrack_expect_related. */ -extern struct ip_conntrack_expect *ip_conntrack_expect_alloc(void); -extern void ip_conntrack_expect_free(struct ip_conntrack_expect *exp); + ip_conntrack_expect_related. You will have to call put afterwards. */ +extern struct ip_conntrack_expect * +ip_conntrack_expect_alloc(struct ip_conntrack *master); +extern void ip_conntrack_expect_put(struct ip_conntrack_expect *exp); /* Add an expected connection: can have more than one per connection */ extern int ip_conntrack_expect_related(struct ip_conntrack_expect *exp); diff --git a/include/linux/netlink.h b/include/linux/netlink.h index 2f0c085f2c7..70c2a9dc4b2 100644 --- a/include/linux/netlink.h +++ b/include/linux/netlink.h @@ -5,7 +5,7 @@ #include <linux/types.h> #define NETLINK_ROUTE 0 /* Routing/device hook */ -#define NETLINK_SKIP 1 /* Reserved for ENskip */ +#define NETLINK_W1 1 /* 1-wire subsystem */ #define NETLINK_USERSOCK 2 /* Reserved for user mode socket protocols */ #define NETLINK_FIREWALL 3 /* Firewalling hook */ #define NETLINK_TCPDIAG 4 /* TCP socket monitoring */ diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 27348c22dac..d2ad2c4f835 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -911,6 +911,15 @@ #define PCI_DEVICE_ID_QLOGIC_ISP1022 0x1022 #define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100 #define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200 +#define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300 +#define PCI_DEVICE_ID_QLOGIC_ISP2312 0x2312 +#define PCI_DEVICE_ID_QLOGIC_ISP2322 0x2322 +#define PCI_DEVICE_ID_QLOGIC_ISP6312 0x6312 +#define PCI_DEVICE_ID_QLOGIC_ISP6322 0x6322 +#define PCI_DEVICE_ID_QLOGIC_ISP2422 0x2422 +#define PCI_DEVICE_ID_QLOGIC_ISP2432 0x2432 +#define PCI_DEVICE_ID_QLOGIC_ISP2512 0x2512 +#define PCI_DEVICE_ID_QLOGIC_ISP2522 0x2522 #define PCI_VENDOR_ID_CYRIX 0x1078 #define PCI_DEVICE_ID_CYRIX_5510 0x0000 @@ -1872,6 +1881,7 @@ #define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001 #define PCI_VENDOR_ID_SIIG 0x131f +#define PCI_SUBVENDOR_ID_SIIG 0x131f #define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000 #define PCI_DEVICE_ID_SIIG_1S_10x_650 0x1001 #define PCI_DEVICE_ID_SIIG_1S_10x_850 0x1002 @@ -1909,6 +1919,7 @@ #define PCI_DEVICE_ID_SIIG_2S1P_20x_550 0x2060 #define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061 #define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062 +#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050 #define PCI_VENDOR_ID_RADISYS 0x1331 #define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030 @@ -2096,6 +2107,8 @@ #define PCI_DEVICE_ID_TIGON3_5721 0x1659 #define PCI_DEVICE_ID_TIGON3_5705M 0x165d #define PCI_DEVICE_ID_TIGON3_5705M_2 0x165e +#define PCI_DEVICE_ID_TIGON3_5780 0x166a +#define PCI_DEVICE_ID_TIGON3_5780S 0x166b #define PCI_DEVICE_ID_TIGON3_5705F 0x166e #define PCI_DEVICE_ID_TIGON3_5750 0x1676 #define PCI_DEVICE_ID_TIGON3_5751 0x1677 diff --git a/include/linux/reboot.h b/include/linux/reboot.h index 2d4dd23168d..3b3266ff1a9 100644 --- a/include/linux/reboot.h +++ b/include/linux/reboot.h @@ -55,6 +55,22 @@ extern void machine_shutdown(void); struct pt_regs; extern void machine_crash_shutdown(struct pt_regs *); +/* + * Architecture independent implemenations of sys_reboot commands. + */ + +extern void kernel_restart(char *cmd); +extern void kernel_halt(void); +extern void kernel_power_off(void); +extern void kernel_kexec(void); + +/* + * Emergency restart, callable from an interrupt handler. + */ + +extern void emergency_restart(void); +#include <asm/emergency-restart.h> + #endif #endif /* _LINUX_REBOOT_H */ diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 5d4a990d557..0061c947048 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -502,7 +502,8 @@ static inline struct sk_buff *skb_share_check(struct sk_buff *skb, * * %NULL is returned on a memory allocation failure. */ -static inline struct sk_buff *skb_unshare(struct sk_buff *skb, int pri) +static inline struct sk_buff *skb_unshare(struct sk_buff *skb, + unsigned int __nocast pri) { might_sleep_if(pri & __GFP_WAIT); if (skb_cloned(skb)) { diff --git a/include/linux/tc_ematch/tc_em_meta.h b/include/linux/tc_ematch/tc_em_meta.h index bcb762d9312..081b1ee8516 100644 --- a/include/linux/tc_ematch/tc_em_meta.h +++ b/include/linux/tc_ematch/tc_em_meta.h @@ -41,19 +41,14 @@ enum TCF_META_ID_LOADAVG_1, TCF_META_ID_LOADAVG_2, TCF_META_ID_DEV, - TCF_META_ID_INDEV, - TCF_META_ID_REALDEV, TCF_META_ID_PRIORITY, TCF_META_ID_PROTOCOL, - TCF_META_ID_SECURITY, /* obsolete */ TCF_META_ID_PKTTYPE, TCF_META_ID_PKTLEN, TCF_META_ID_DATALEN, TCF_META_ID_MACLEN, TCF_META_ID_NFMARK, TCF_META_ID_TCINDEX, - TCF_META_ID_TCVERDICT, - TCF_META_ID_TCCLASSID, TCF_META_ID_RTCLASSID, TCF_META_ID_RTIIF, TCF_META_ID_SK_FAMILY, diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h index 4a26adfaed7..e1d5ec1c23c 100644 --- a/include/net/sctp/sctp.h +++ b/include/net/sctp/sctp.h @@ -167,15 +167,12 @@ void sctp_unhash_established(struct sctp_association *); void sctp_hash_endpoint(struct sctp_endpoint *); void sctp_unhash_endpoint(struct sctp_endpoint *); struct sock *sctp_err_lookup(int family, struct sk_buff *, - struct sctphdr *, struct sctp_endpoint **, - struct sctp_association **, + struct sctphdr *, struct sctp_association **, struct sctp_transport **); -void sctp_err_finish(struct sock *, struct sctp_endpoint *, - struct sctp_association *); +void sctp_err_finish(struct sock *, struct sctp_association *); void sctp_icmp_frag_needed(struct sock *, struct sctp_association *, struct sctp_transport *t, __u32 pmtu); void sctp_icmp_proto_unreachable(struct sock *sk, - struct sctp_endpoint *ep, struct sctp_association *asoc, struct sctp_transport *t); diff --git a/include/net/xfrm.h b/include/net/xfrm.h index 029522a4ced..868ef88ef97 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h @@ -803,7 +803,7 @@ struct xfrm_algo_desc { /* XFRM tunnel handlers. */ struct xfrm_tunnel { int (*handler)(struct sk_buff *skb); - void (*err_handler)(struct sk_buff *skb, void *info); + void (*err_handler)(struct sk_buff *skb, __u32 info); }; struct xfrm6_tunnel { diff --git a/include/scsi/scsi.h b/include/scsi/scsi.h index 1fb23374151..b361172b576 100644 --- a/include/scsi/scsi.h +++ b/include/scsi/scsi.h @@ -28,7 +28,7 @@ extern const unsigned char scsi_command_size[8]; * SCSI device types */ -#define MAX_SCSI_DEVICE_CODE 14 +#define MAX_SCSI_DEVICE_CODE 15 extern const char *const scsi_device_types[MAX_SCSI_DEVICE_CODE]; /* @@ -211,8 +211,8 @@ static inline int scsi_status_is_good(int status) * - treated as TYPE_DISK */ #define TYPE_MEDIUM_CHANGER 0x08 #define TYPE_COMM 0x09 /* Communications device */ -#define TYPE_ENCLOSURE 0x0d /* Enclosure Services Device */ #define TYPE_RAID 0x0c +#define TYPE_ENCLOSURE 0x0d /* Enclosure Services Device */ #define TYPE_RBC 0x0e #define TYPE_NO_LUN 0x7f diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h index 07f5c699eaa..9957f16dcc5 100644 --- a/include/scsi/scsi_cmnd.h +++ b/include/scsi/scsi_cmnd.h @@ -31,14 +31,11 @@ struct scsi_cmnd { int sc_magic; struct scsi_device *device; - unsigned short state; - unsigned short owner; struct scsi_request *sc_request; struct list_head list; /* scsi_cmnd participates in queue lists */ struct list_head eh_entry; /* entry for the host eh_cmd_q */ - int eh_state; /* Used for state tracking in error handlr */ int eh_eflags; /* Used by error handlr */ void (*done) (struct scsi_cmnd *); /* Mid-level done function */ @@ -80,8 +77,6 @@ struct scsi_cmnd { * sense info */ unsigned short use_sg; /* Number of pieces of scatter-gather */ unsigned short sglist_len; /* size of malloc'd scatter-gather list */ - unsigned short abort_reason; /* If the mid-level code requests an - * abort, this is the reason. */ unsigned bufflen; /* Size of data buffer */ void *buffer; /* Data buffer */ diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index 63c91dd85ca..835af8ecbb7 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -9,7 +9,7 @@ struct request_queue; struct scsi_cmnd; struct scsi_mode_data; - +struct scsi_lun; /* * sdev state: If you alter this, you also need to alter scsi_sysfs.c @@ -243,6 +243,7 @@ extern void scsi_target_reap(struct scsi_target *); extern void scsi_target_block(struct device *); extern void scsi_target_unblock(struct device *); extern void scsi_remove_target(struct device *); +extern void int_to_scsilun(unsigned int, struct scsi_lun *); extern const char *scsi_device_state_name(enum scsi_device_state); extern int scsi_is_sdev_device(const struct device *); extern int scsi_is_target_device(const struct device *); diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index db9914adeac..81d5234f677 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -641,12 +641,6 @@ static inline void scsi_assign_lock(struct Scsi_Host *shost, spinlock_t *lock) shost->host_lock = lock; } -static inline void scsi_set_device(struct Scsi_Host *shost, - struct device *dev) -{ - shost->shost_gendev.parent = dev; -} - static inline struct device *scsi_get_device(struct Scsi_Host *shost) { return shost->shost_gendev.parent; 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