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-rw-r--r--arch/mips/sgi-ip22/ip22-eisa.c2
-rw-r--r--arch/mips/sgi-ip22/ip22-hpc.c2
-rw-r--r--arch/mips/sgi-ip22/ip22-int.c12
-rw-r--r--arch/mips/sgi-ip22/ip22-nvram.c8
-rw-r--r--arch/mips/sgi-ip22/ip22-reset.c2
-rw-r--r--arch/mips/sgi-ip22/ip22-time.c2
6 files changed, 14 insertions, 14 deletions
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c
index 0ab4abf65d5..fa0e719c5bd 100644
--- a/arch/mips/sgi-ip22/ip22-eisa.c
+++ b/arch/mips/sgi-ip22/ip22-eisa.c
@@ -242,7 +242,7 @@ int __init ip22_eisa_init(void)
int i, c;
char *str;
u8 *slot_addr;
-
+
if (!(sgimc->systemid & SGIMC_SYSID_EPRESENT)) {
printk(KERN_INFO "EISA: bus not present.\n");
return 1;
diff --git a/arch/mips/sgi-ip22/ip22-hpc.c b/arch/mips/sgi-ip22/ip22-hpc.c
index c0afeccb08c..5c00cdd20d8 100644
--- a/arch/mips/sgi-ip22/ip22-hpc.c
+++ b/arch/mips/sgi-ip22/ip22-hpc.c
@@ -49,7 +49,7 @@ void __init sgihpc_init(void)
sgint = &sgioc->int3;
system_type = "SGI Indy";
}
-
+
sgi_ioc_reset = (SGIOC_RESET_PPORT | SGIOC_RESET_KBDMOUSE |
SGIOC_RESET_EISA | SGIOC_RESET_ISDN |
SGIOC_RESET_LC0OFF);
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index ea2844d29e6..d16fb43b1a9 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -28,7 +28,7 @@
/* #define DEBUG_SGINT */
/* So far nothing hangs here */
-#undef USE_LIO3_IRQ
+#undef USE_LIO3_IRQ
struct sgint_regs *sgint;
@@ -272,32 +272,32 @@ void indy_buserror_irq(struct pt_regs *regs)
irq_exit();
}
-static struct irqaction local0_cascade = {
+static struct irqaction local0_cascade = {
.handler = no_action,
.flags = SA_INTERRUPT,
.name = "local0 cascade",
};
-static struct irqaction local1_cascade = {
+static struct irqaction local1_cascade = {
.handler = no_action,
.flags = SA_INTERRUPT,
.name = "local1 cascade",
};
-static struct irqaction buserr = {
+static struct irqaction buserr = {
.handler = no_action,
.flags = SA_INTERRUPT,
.name = "Bus Error",
};
-static struct irqaction map0_cascade = {
+static struct irqaction map0_cascade = {
.handler = no_action,
.flags = SA_INTERRUPT,
.name = "mapable0 cascade",
};
#ifdef USE_LIO3_IRQ
-static struct irqaction map1_cascade = {
+static struct irqaction map1_cascade = {
.handler = no_action,
.flags = SA_INTERRUPT,
.name = "mapable1 cascade",
diff --git a/arch/mips/sgi-ip22/ip22-nvram.c b/arch/mips/sgi-ip22/ip22-nvram.c
index de43e86fa17..fd29fd407ae 100644
--- a/arch/mips/sgi-ip22/ip22-nvram.c
+++ b/arch/mips/sgi-ip22/ip22-nvram.c
@@ -39,7 +39,7 @@
*ptr |= EEPROM_CSEL; \
*ptr |= EEPROM_ECLK; })
-
+
#define eeprom_cs_off(ptr) ({ \
*ptr &= ~EEPROM_ECLK; \
*ptr &= ~EEPROM_CSEL; \
@@ -50,7 +50,7 @@
/*
* clock in the nvram command and the register number. For the
* national semiconductor nv ram chip the op code is 3 bits and
- * the address is 6/8 bits.
+ * the address is 6/8 bits.
*/
static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
unsigned reg)
@@ -90,7 +90,7 @@ unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg)
if (*ctrl & EEPROM_DATI)
res |= 1;
}
-
+
eeprom_cs_off(ctrl);
return res;
@@ -113,7 +113,7 @@ unsigned short ip22_nvram_read(int reg)
reg <<= 1;
tmp = hpc3c0->bbram[reg++] & 0xff;
return (tmp << 8) | (hpc3c0->bbram[reg] & 0xff);
- }
+ }
}
EXPORT_SYMBOL(ip22_nvram_read);
diff --git a/arch/mips/sgi-ip22/ip22-reset.c b/arch/mips/sgi-ip22/ip22-reset.c
index ed5c60adce6..214ffd2e98a 100644
--- a/arch/mips/sgi-ip22/ip22-reset.c
+++ b/arch/mips/sgi-ip22/ip22-reset.c
@@ -185,7 +185,7 @@ static irqreturn_t panel_int(int irq, void *dev_id, struct pt_regs *regs)
add_timer(&debounce_timer);
}
- /* Power button was pressed
+ /* Power button was pressed
* ioc.ps page 22: "The Panel Register is called Power Control by Full
* House. Only lowest 2 bits are used. Guiness uses upper four bits
* for volume control". This is not true, all bits are pulled high
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 173f76805ea..df9b5694328 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -126,7 +126,7 @@ static __init void indy_time_init(void)
unsigned long r4k_ticks[3];
unsigned long r4k_tick;
- /*
+ /*
* Figure out the r4k offset, the algorithm is very simple and works in
* _all_ cases as long as the 8254 counter register itself works ok (as
* an interrupt driving timer it does not because of bug, this is why