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-rw-r--r--arch/sparc64/kernel/head.S2
-rw-r--r--arch/sparc64/mm/init.c11
-rw-r--r--include/asm-sparc64/cpudata.h1
3 files changed, 4 insertions, 10 deletions
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index 82ce5bced9c..2988be85147 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -454,7 +454,7 @@ setup_trap_table:
restore
.globl setup_tba
-setup_tba: /* i0 = is_starfire */
+setup_tba:
save %sp, -192, %sp
/* The boot processor is the only cpu which invokes this
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index f4d22ccb4cf..20e7af552ce 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -1092,15 +1092,8 @@ void __init paging_init(void)
inherit_prom_mappings();
- /* Ok, we can use our TLB miss and window trap handlers safely.
- * We need to do a quick peek here to see if we are on StarFire
- * or not, so setup_tba can setup the IRQ globals correctly (it
- * needs to get the hard smp processor id correctly).
- */
- {
- extern void setup_tba(int);
- setup_tba(this_is_starfire);
- }
+ /* Ok, we can use our TLB miss and window trap handlers safely. */
+ setup_tba();
__flush_tlb_all();
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index 6c57cbb9a7d..16d62891383 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -61,6 +61,7 @@ struct trap_per_cpu {
extern struct trap_per_cpu trap_block[NR_CPUS];
extern void init_cur_cpu_trap(void);
extern void per_cpu_patch(void);
+extern void setup_tba(void);
#endif /* !(__ASSEMBLY__) */