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authorJeff Garzik <jgarzik@pobox.com>2006-02-07 01:47:12 -0500
committerJeff Garzik <jgarzik@pobox.com>2006-02-07 01:47:12 -0500
commit3c9b3a8575b4f2551e3b5b74ffa1c3559c6338eb (patch)
tree7f8d84353852401ec74e005f6f0b1eb958b9a70d /include/asm-x86_64/cpufeature.h
parentc0d3c0c0ce94d3db893577ae98e64414d92e49d8 (diff)
parentc03296a868ae7c91aa2d8b372184763b18f16d7a (diff)
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Merge branch 'master'
Diffstat (limited to 'include/asm-x86_64/cpufeature.h')
-rw-r--r--include/asm-x86_64/cpufeature.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h
index 41c0ac8559b..76bb6193ae9 100644
--- a/include/asm-x86_64/cpufeature.h
+++ b/include/asm-x86_64/cpufeature.h
@@ -61,7 +61,7 @@
#define X86_FEATURE_K6_MTRR (3*32+ 1) /* AMD K6 nonstandard MTRRs */
#define X86_FEATURE_CYRIX_ARR (3*32+ 2) /* Cyrix ARRs (= MTRRs) */
#define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */
-/* 4 free */
+#define X86_FEATURE_REP_GOOD (3*32+ 4) /* rep microcode works well on this CPU */
#define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */
#define X86_FEATURE_SYNC_RDTSC (3*32+6) /* RDTSC syncs CPU core */