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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2007-02-20 10:52:01 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-20 10:52:43 +0000 |
| commit | e80a0e6e7ccdf64575d4384cb4172860422f5b81 (patch) | |
| tree | 8960fa71eb73d0f1185e893192411cb873362738 /include/asm-arm/arch-iop32x/entry-macro.S | |
| parent | 3b0eb4a195a124567cd0dd6f700f8388def542c6 (diff) | |
| parent | 3668b45d46f777b0773ef5ff49531c1144efb6dd (diff) | |
| download | kernel-crypto-e80a0e6e7ccdf64575d4384cb4172860422f5b81.tar.gz kernel-crypto-e80a0e6e7ccdf64575d4384cb4172860422f5b81.tar.xz kernel-crypto-e80a0e6e7ccdf64575d4384cb4172860422f5b81.zip | |
[ARM] Merge remaining IOP code
Conflicts:
include/asm-arm/arch-at91rm9200/entry-macro.S
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop32x/entry-macro.S')
| -rw-r--r-- | include/asm-arm/arch-iop32x/entry-macro.S | 33 |
1 files changed, 24 insertions, 9 deletions
diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S index 1500cbbd229..207db99dfbd 100644 --- a/include/asm-arm/arch-iop32x/entry-macro.S +++ b/include/asm-arm/arch-iop32x/entry-macro.S @@ -9,13 +9,28 @@ */ #include <asm/arch/iop32x.h> - .macro disable_fiq - .endm + .macro disable_fiq + .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =IOP3XX_REG_ADDR(0x07D8) - ldr \irqstat, [\base] @ Read IINTSRC - cmp \irqstat, #0 - clzne \irqnr, \irqstat - rsbne \irqnr, \irqnr, #31 - .endm + .macro get_irqnr_preamble, base, tmp + mrc p15, 0, \tmp, c15, c1, 0 + orr \tmp, \tmp, #(1 << 6) + mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access + mrc p15, 0, \tmp, c15, c1, 0 + mov \tmp, \tmp + sub pc, pc, #4 @ cp_wait + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC + cmp \irqstat, #0 + clzne \irqnr, \irqstat + rsbne \irqnr, \irqnr, #31 + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + mrc p15, 0, \tmp1, c15, c1, 0 + ands \tmp2, \tmp1, #(1 << 6) + bicne \tmp1, \tmp1, #(1 << 6) + mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access + .endm |