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| author | Luis R. Rodriguez <lrodriguez@atheros.com> | 2010-08-30 19:26:33 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-09-20 13:36:17 -0700 |
| commit | 5f555d8ad4b3e1cd500f6dac90b317c61695a19a (patch) | |
| tree | 87764648094e693f16a4941a062689e8a4cdba82 /drivers/ssb/pci.c | |
| parent | 5db688f45431d16ac961b441d4125f7b1243051d (diff) | |
| download | kernel-crypto-5f555d8ad4b3e1cd500f6dac90b317c61695a19a.tar.gz kernel-crypto-5f555d8ad4b3e1cd500f6dac90b317c61695a19a.tar.xz kernel-crypto-5f555d8ad4b3e1cd500f6dac90b317c61695a19a.zip | |
ath9k_hw: fix parsing of HT40 5 GHz CTLs
commit 904879748d7439a6dabdc6be9aad983e216b027d upstream.
The 5 GHz CTL indexes were not being read for all hardware
devices due to the masking out through the CTL_MODE_M mask
being one bit too short. Without this the calibrated regulatory
maximum values were not being picked up when devices operate
on 5 GHz in HT40 mode. The final output power used for Atheros
devices is the minimum between the calibrated CTL values and
what CRDA provides.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/ssb/pci.c')
0 files changed, 0 insertions, 0 deletions